JP2006210258A - Spacer, flat display device and its assembling method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a spacer capable of surely preventing an electron emission characteristic from being degraded in an electron emission part even if gas adsorbed to the surface of the spacer is released by the collision of electrons with the surface of the spacer, and having a simple structure. <P>SOLUTION: This spacer 40 is used in a flat display device where a first panel composed by forming a plurality of electron emission sources for emitting electrons on a support body is jointed to a second panel composed by forming, on a substrate, a phosphor layer with which the electrons emitted from the electron emission sources collide and an anode electrode in peripheral parts thereof, and a space sandwiched between the first panel and the second panel is kept in a vacuum. A fine particle layer 41 formed of fine particles 42 having getter effects is formed on the surface thereof. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention is characterized by, for example, a spacer used in a flat display device that displays information such as characters and images, a flat display device incorporating such a spacer, an assembling method thereof, and a surface shape of a phosphor layer. The present invention relates to a flat display device having

  As an image display device that can replace the mainstream cathode ray tube (CRT), various types of flat display devices have been studied. Examples of such a flat display device include a liquid crystal display device (LCD), an electroluminescence display device (ELD), and a plasma display device (PDP). Development of a flat display device incorporating an electron-emitting device is also underway. Here, cold cathode field emission devices, metal / insulating film / metal type devices (also referred to as MIM devices), and surface conduction type electron emission devices are known as electron emission devices, and are composed of these cold cathode electron sources. The flat display device incorporating the electron-emitting device is attracting attention from the viewpoint of high resolution, high luminance color display, and low power consumption.

  A cold cathode field emission display device (hereinafter sometimes abbreviated as a display device), which is a flat display device incorporating a cold cathode field emission device, generally corresponds to each pixel arranged in a two-dimensional matrix. The cathode panel having the electron emission region and the anode panel having a phosphor layer that emits light when excited by collision with electrons emitted from the electron emission region are arranged to face each other through a vacuum layer. The electron emission region is usually provided with one or a plurality of cold cathode field emission devices (hereinafter sometimes abbreviated as field emission devices). Examples of field emission devices include Spindt type, flat type, edge type, and planar type.

  As an example, a conceptual partial end view of a display device having a Spindt-type field emission device is shown in FIG. 2, and a schematic view of a part of the cathode panel CP and the anode panel AP when the cathode panel CP and the anode panel AP are disassembled. A simple exploded perspective view is shown in FIG. The Spindt-type field emission device constituting this display device was formed on the cathode 10 formed on the support 10, the insulating layer 12 formed on the support 10 and the cathode 11, and the insulating layer 12. A gate electrode 13, an opening 14 provided in the gate electrode 13 and the insulating layer 12 (a first opening 14A provided in the gate electrode 13 and a second opening 14B provided in the insulating layer 12), and an opening It is composed of a conical electron emission portion 15 formed on the cathode electrode 11 located at the bottom of the portion 14.

  Alternatively, FIG. 4 shows a conceptual partial end view of a display device having a so-called flat type field emission device having a substantially planar electron emission portion 15A. The field emission device includes a cathode electrode 11 formed on a support 10, an insulating layer 12 formed on the support 10 and the cathode electrode 11, a gate electrode 13 formed on the insulating layer 12, a gate An opening 14 provided in the electrode 13 and the insulating layer 12 (a first opening 14A provided in the gate electrode 13 and a second opening 14B provided in the insulating layer 12) and a bottom of the opening 14 The electron emission portion 15A is formed on the cathode electrode 11 positioned. The electron emission portion 15A is composed of, for example, a large number of carbon nanotubes partially embedded in a matrix.

  In these display devices, the cathode electrode 11 has a strip shape extending in the first direction, and the gate electrode 13 has a strip shape extending in a second direction different from the first direction (see FIG. 3). In general, the cathode electrode 11 and the gate electrode 13 are each formed in a strip shape in a direction in which the projected images of both the electrodes 11 and 13 are orthogonal to each other. An overlapping region where the strip-shaped cathode electrode 11 and the strip-shaped gate electrode 13 overlap is an electron emission region EA, which corresponds to one subpixel. The electron emission areas EA are normally arranged in a two-dimensional matrix within the effective area of the cathode panel CP (area that functions as an actual display portion).

  On the other hand, the anode panel AP has a phosphor layer 22 (specifically, a red light-emitting phosphor layer 22R, a green light-emitting phosphor layer 22G, and a blue light-emitting phosphor layer 22B) having a predetermined pattern on the substrate 20. The phosphor layer 22 is formed and covered with the anode electrode 24. Between these phosphor layers 22, a light absorbing layer (black matrix) 23 made of a light absorbing material such as carbon is embedded to prevent display image color turbidity and optical crosstalk. ing. In the figure, reference numeral 21 represents a partition wall, reference numeral 140 represents a conventional spacer, reference numeral 25 represents a spacer holding part, reference numeral 26 represents a frame, and reference numeral 16 represents a focusing electrode. . In FIGS. 3 and 4, illustration of the partition walls, the spacers, the spacer holding portion, and the focusing electrode is omitted.

  The anode electrode 24 functions as a reflection film that reflects the light emitted from the phosphor layer 22, and rebounds from the phosphor layer 22 or secondary electrons emitted from the phosphor layer 22 (hereinafter referred to as these The electrons are collectively referred to as backscattered electrons) and have a function of preventing the phosphor layer 22 from being charged. The barrier rib 21 has a function of preventing so-called optical crosstalk (color turbidity) from occurring due to backscattered electrons colliding with another phosphor layer 22.

  One subpixel is composed of an electron emission area EA on the cathode panel side and a phosphor layer 22 on the anode panel side facing a group of these field emission elements. In the effective area, such pixels are arranged on the order of hundreds of thousands to millions, for example.

Then, the anode panel AP and the cathode panel CP are arranged so that the electron emission area EA and the phosphor layer 22 face each other, joined at the peripheral portion via the frame body 26, and then exhausted and sealed. Thus, a display device can be manufactured. A space surrounded by the anode panel AP, the cathode panel CP, and the frame body 26 is in a high vacuum (for example, 1 × 10 ⁻³ Pa or less).

Therefore, unless the spacer 140 is disposed between the anode panel AP and the cathode panel CP, the display device is damaged by the atmospheric pressure. Note that an antistatic film (not shown) made of, for example, CrO _x or CrAl _x O _y is usually formed on the surface of the conventional spacer 140.

  A relatively negative voltage is applied to the cathode electrode 11 from the cathode electrode control circuit 31, a relatively positive voltage is applied to the gate electrode 13 from the gate electrode control circuit 32, and the anode electrode 24 is applied to the anode electrode 24 more than the gate electrode 13. Further, a higher positive voltage is applied from the anode electrode control circuit 33. When performing display in such a display device, for example, a scanning signal is input to the cathode electrode 11 from the cathode electrode control circuit 31, and a video signal is input to the gate electrode 13 from the gate electrode control circuit 32. Alternatively, a video signal is input from the cathode electrode control circuit 31 to the cathode electrode 11, and a scanning signal is input from the gate electrode control circuit 32 to the gate electrode 13. Electrons are emitted from the electron emission portions 15 and 15A based on the quantum tunnel effect due to an electric field generated when a voltage is applied between the cathode electrode 11 and the gate electrode 13, and the electrons are attracted to the anode electrode 24. It passes through 24 and collides with the phosphor layer 22. As a result, the phosphor layer 22 is excited to emit light, and a desired image can be obtained. That is, the operation of the cold cathode field emission display is basically controlled by the voltage applied to the gate electrode 13 and the voltage applied to the cathode electrode 11.

  25, 26, and 27 schematically show the trajectories of electrons or electron beams in one sub-pixel located in the vicinity of the spacer 140. FIG. In FIGS. 25, 26, and 27, the anode electrode and the light absorption layer (black matrix) are not shown. Further, the gate electrode 13 extends in a direction perpendicular to the drawing sheet, and the cathode electrode 11 extends in a direction parallel to the drawing sheet.

  As shown in FIG. 25, a part of the electrons that have passed through an anode electrode (not shown) in the anode panel AP and collided with the phosphor layer 22 are back-scattered by the phosphor layer 22 as shown in FIG. Some of the backscattered electrons collide with the spacer 140.

  By the way, such backscattered electrons cause various problems.

  That is, the first problem is a decrease in color purity. The backscattered electrons collide with the phosphor layer adjacent to the phosphor layer that is originally intended to emit light, and cause the phosphor layer to emit light. In particular, the emission of different colors during single color display causes a decrease in color purity and causes a very large problem such as a decrease in image quality. Although the partition wall 21 is provided, it is not sufficient to solve such a problem. Therefore, it is important to reduce the amount of backscattered electrons. Further, in the vicinity of the spacer 140, since the decrease in color purity due to the backscattered electrons from the phosphor layer 22 and the like located in the vicinity of the spacer 140 is suppressed by the presence of the spacer 140, the spacer is regarded as color unevenness. Will be recognized.

  A second problem is that the spacer 140 is visually recognized as a result of the electron beam trajectory changing due to the charge-up (charging) of the spacer 140.

  That is, some of the backscattered electrons collide with the spacer 140 in the vicinity of the spacer 140. In general, a material such as a ceramic material or glass having an excellent withstand voltage has a relatively high value of the total secondary electron emission coefficient (TSEEY), and the total secondary electron emission in a wide energy region in which electrons collide with the spacer 140. The value of the coefficient is a value exceeding 1. Here, the total secondary electron emission coefficient (TSEEY) is represented by the sum of the secondary electron emission coefficient (SEEC) and the reflected electron coefficient (BC). As shown in FIG. 28, the total secondary electron emission coefficient is a function of the energy of the electron beam, and takes a maximum value in the vicinity of 450 eV in almost all substances. Further, the total secondary electron emission coefficient varies depending on the incident angle θ incident on the surface of the substance. Here, FIG. 28 shows the relationship between the energy of the electron beam and the total secondary electron emission coefficient (TSEEY) when the incident angle θ is 0 degree, 30 degrees, 60 degrees, and 80 degrees. FIG. 28 also shows that the total secondary electron emission coefficient increases when electrons enter the spacer 140 from an oblique direction.

  FIG. 29A shows the energy distribution of electrons that collide with the spacer 140, and FIG. 29B shows the angular distribution of electrons that collide with the spacer 140. When the phosphor layer 22 is irradiated with an electron beam having an energy of 10 keV, the backscattered electrons are temporarily directed to the cathode panel CP side, but the electric field is positive on the anode panel AP side. It takes a so-called parabolic trajectory. Therefore, the electrons are incident (collised) on the spacer 140 at various energy distributions (see FIG. 29A) and at various angles (see FIG. 29B). Ideally, if the total secondary electron emission coefficient on the surface of the spacer 140 is 1, no charge-up occurs on the surface of the spacer 140. However, it is almost impossible to set the total secondary electron emission coefficient to 1 for electrons that enter (impact) the spacer 140 at various angles and various energies. It is difficult to say that the antistatic film functions sufficiently.

  As a result, a positive charge is generated on the surface of the spacer 140. Due to the positive charge, a parallel electric field is bent near the spacer 140, and the electron beam trajectory is curved. Further, the curvature of the electron beam trajectory further causes electrons to collide with the spacer 140. In the spacer 140, charge-up is further increased, and the electron beam trajectory is further bent (see FIG. 27). In such a state, the electron beam does not collide with the desired phosphor layer 22, and the formed image is distorted in the vicinity of the spacer 140 due to the disturbance of the electron beam trajectory in the vicinity of the spacer 140, which seriously affects the image formation. Effect.

Furthermore, as a third problem, when backscattered electrons collide with the spacer 140, the resistance value of the spacer 140 varies. As described above, generally, the surface of the spacer 140 is coated with a transition metal oxide film made of CrO _x or CrAl _x O _y as an antistatic film. This transition metal oxide film is reduced by an electron beam. As a result, the resistance may fluctuate. Alternatively, the resistance may fluctuate as a result of adhesion of a carbide-based conductive material to the surface of the antistatic film due to electron beam impact.

  As a fourth problem, when electrons collide with the spacer 140, the gas is released from the spacer 140, and the molecules of the gas adhere to or adhere to the surfaces of the electron emission portions 15 and 15A. There exists a problem of deteriorating the electron emission characteristic in 15,15A.

JP 11-250839 A JP 2001-216925 JP 2002-150977 JP 2003-22744 A JP 2000-219901 A JP 2002-338959 A JP-A-49-107173 JP-A-3-266339 JP-A-6-231701

  As one of the methods for reducing the amount of backscattered electrons, a method of applying a substance having a small atomic weight such as carbon on the anode electrode 24 is disclosed in, for example, JP-A-49-107173 and JP-A-3-266339. JP-A-6-2311701 is well known. A substance having a small atomic weight such as carbon has an effect of reducing the reflectance of electrons. The thicker the carbon film, the more effective. However, when the carbon film thickness is increased, the energy loss of electrons emitted from the electron emission source, passing through the carbon film thickness and colliding with the phosphor layer increases, and the light emission efficiency decreases. On the other hand, if the carbon film thickness is thin, the effect of reducing the amount of backscattered electrons is lost.

  As described above, conventionally, the backscattered electrons are shielded as much as possible by providing the partition walls 21. By the way, the backscattered electrons have an energy distribution as shown in FIG. 30A in which the same energy as the primary electron energy is maximized, and furthermore, cosine-type scattering as shown in FIG. Has an angular distribution.

Also,
Initial velocity of backscattered electrons: v ₀
Scattering angle with substrate: θ
Electron unit charge: e
Electron mass: _me
Distance between anode electrode and electron emission part: d
Applied voltage to anode electrode: V _A
, The trajectory of backscattered electrons after the elapse of time t can be expressed by the following equation. Here, X (t) represents the X coordinate of the backscattered electrons after the elapse of time t, Z (t) represents the Z coordinate of the backscattered electrons after the elapse of time t, and the X axis is Located on the surface of the substrate 20, the Z-axis is perpendicular to the surface of the substrate 20, and the origin of coordinates is the position where electrons collide.

X (t) = v ₀ · t · cos (θ)
Z (t) = v ₀ · t · sin (θ) − (1/2) (e / _me ) (V _A / d) t ²

Further, the maximum scattering height Z _h of backscattered electrons can be expressed by the following equation when the anode electrode is used as a reference plane. It should be noted that v ₀ ² = 2 (e / _me ) _VA when elastically scattering.

Z _h = (1/2) (m _e / e) (d / V _A ) v ₀ ² · sin ² (θ)
<D · sin ² (θ)

Furthermore, the maximum scattering distance X _s of backscattered electrons can be expressed by the following equation.

X _s = (m _e / e) (d / V _A ) v ₀ · sin (2θ)

Here, when θ = 45 degrees,
X _s <(m _e / e) (d / V _A ) v ₀ ²
<2d
It is.

From the above calculation results, the maximum scattering distance X _s of backscattered electrons is maximum when the scattering angle (θ) is 45 degrees, and at the time of elastic scattering, it is up to twice the distance d between the anode electrode and the electron emission portion. Backscattered electrons arrive. On the other hand, the maximum scattering height Z _h of the back-scattered electrons, scattering angle (theta) is maximized at 90 degrees, at the time of elastic scattering, backscattering electrons to the electron emission source arrives.

Accordingly, in order to shield the backscattered electrons by the partition wall 21, the partition wall aspect ratio (H ₁ / L ₁ ) is sufficiently large when the distance between the partition walls is L ₁ and the partition wall height is H _1. There is a need to. FIG. 31 shows the relationship between the partition wall aspect ratio and the backscattered electron emission ratio when the energy of the electrons emitted from the electron emitting portion and colliding with the phosphor layer 22 is 9 keV. From FIG. 31, when 90% of backscattered electrons are shielded, the partition wall aspect ratio is about 5. That is, when the distance between the partition walls is 100 μm, the height of the partition wall 21 is required to be about 500 μm. However, there is no suitable process for forming such a partition wall.

  For example, in the technique disclosed in Japanese Patent Application Laid-Open No. 11-250839, a collector electrode having a slit structure is provided on the anode electrode, and an appropriate potential is applied to the collector electrode, so that backscattered electrons may It is prevented from entering the phosphor layer. Although the effect of shielding backscattered electrons is excellent, alignment accuracy and cost in forming the collector electrode are problems.

  Japanese Patent Application Laid-Open Nos. 2001-216925 and 2002-150977 increase the luminous efficiency of the phosphor, improve the luminance, or keep the current density of electrons that collide with the phosphor layer low, and the luminance over time. In order to suppress general degradation, flat display devices having a concave phosphor layer are disclosed. However, in these patent publications, the amount of backscattered electrons colliding with the spacer is reduced. There is no discussion from the viewpoint of doing.

  A technique for removing gas in a space sandwiched between the cathode panel CP and the anode panel AP with a getter is well known. However, usually, getters are only arranged at several places at maximum in the invalid area of the display device (area surrounding the valid area and not contributing to display). Therefore, it is difficult to reliably adsorb the gas released from the spacer located far from the getter with the getter. Therefore, even if the amount of gas emitted from the spacer is extremely small, the influence of the gas emitted from the spacer is different between the electron emitting portion located near the spacer and the electron emitting portion located away from the spacer. The degree of is different. As a result, there is a difference in the change (deterioration) state of the electron emission characteristics between the electron emission portion located in the vicinity of the spacer and the electron emission portion located away from the spacer, resulting in uneven brightness.

  Japanese Patent Application Laid-Open No. 2003-22744 discloses a technique for press-fitting and fixing a non-evaporable getter formed by powder injection molding into a part of the spacer, but the structure of such a spacer is complicated. .

  Therefore, the first object of the present invention is to ensure that the electron emission characteristics deteriorate in the electron emission portion even when electrons collide with the spacer surface and the gas adsorbed on the spacer surface is released. Provided are a spacer used in a flat display device that displays information such as characters and images, and that has a simple structure, a flat display device incorporating such a spacer, and an assembling method thereof. There is. A second object of the present invention is a flat display having a structure that can reliably reduce the amount of backscattered electrons that jump out of a phosphor layer, collide with a spacer, or enter an adjacent phosphor layer. To provide an apparatus.

In order to achieve the above first object, the spacer of the present invention is such that a first panel in which a plurality of electron emission sources for emitting electrons are formed on a support and an electron emitted from the electron emission source collide with each other. A flat panel display device in which a second panel in which a phosphor layer and an anode electrode are formed on a substrate is joined at the periphery thereof, and a space sandwiched between the first panel and the second panel is maintained in a vacuum. A spacer disposed between the first panel and the second panel, comprising:
A fine particle layer comprising fine particles having a getter effect is formed on the surface.

The flat panel display according to the first aspect of the present invention for achieving the first object includes a first panel in which a plurality of electron emission sources for emitting electrons are formed on a support, an electron emission A phosphor layer on which the electrons emitted from the source collide and a second panel formed by forming an anode electrode on the substrate are joined at the periphery thereof, and a space sandwiched between the first panel and the second panel is formed. A flat display device maintained in a vacuum,
A spacer having a fine particle layer made of fine particles having a getter effect formed on the surface thereof is disposed between the first panel and the second panel.

In order to achieve the first object described above, a method for assembling a flat panel display device according to the present invention includes a first panel provided with a plurality of electron emission sources that emit electrons, and an electron emitted from the electron emission source collides. And a second panel having a phosphor layer and an anode electrode bonded to each other at a peripheral portion thereof, and a flat panel display device including a spacer having a fine particle layer made of fine particles having a getter effect formed on the surface thereof An assembly method,
Spacers are arranged between the first panel and the second panel, the first panel and the second panel are joined at their peripheral edges, and the space sandwiched between the first panel and the second panel is exhausted. After a vacuum, electrons are emitted from an electron emission source and collided with a fine particle layer of a spacer to activate the fine particles, thereby generating a getter effect.

  In the spacer according to the present invention, the flat display device according to the first aspect of the present invention, or the assembling method of the flat display device according to the present invention, the fine particles have a getter effect. This means that there are many hands, and the gas component that forms a stable gas at room temperature such as oxygen, carbon dioxide, and carbon monoxide is chemically bonded on the surface and adsorbed. In general, when a collection of fine particles is sealed in a sealed vacuum container and left in a vacuum of at least 0.1 Pa or less, the gas adsorbed on the surface of the general fine particles is released into the vacuum. For this reason, the pressure of the sealed vacuum vessel gradually increases. On the other hand, in the case of fine particles having a getter effect, the pressure inside the sealed vacuum vessel gradually decreases because the gas in the vacuum vessel is adsorbed by the fine particles. Thus, when the gas absorption amount is larger than the gas discharge amount of the fine particles at a certain degree of vacuum (0.1 Pa or less), it is defined that “the fine particles have a getter effect”.

  In the spacer of the present invention, the flat display device according to the first aspect of the present invention, or the assembling method of the flat display device of the present invention, the thickness of the fine particle layer is limited from the viewpoint of ensuring the getter effect. Although it is not a thing, it is preferable that it is 0.1 micrometer thru | or 30 micrometers.

  In the method for assembling the flat display device of the present invention, the getter effect is also produced when the fine particles are activated by emitting electrons from the electron emission source and colliding with the fine particle layer of the spacer. It is preferable that the space sandwiched between the first panel and the second panel is continuously exhausted. In this case, after the getter effect is generated, the space sandwiched between the first panel and the second panel is appropriately treated. It is desirable to seal with.

In the spacer according to the present invention, the flat display device according to the first aspect of the present invention, or the assembling method of the flat display device according to the present invention, the fine particles are preferably made of a metal or an alloy. (Pb), platinum (Pt), ruthenium (Ru), silver (Ag), gold (Au), titanium (Ti), indium (In), copper (Cu), chromium (Cr), iron (Fe), zinc (Zn), tin (Sn), tantalum (Ta), tungsten (W), aluminum (Al), vanadium (V), manganese (Mn), zirconium (Zr), nickel (Ni), cobalt (Co), and And at least one metal selected from the group consisting of molybdenum (Mo) or an alloy thereof. Here, examples of the alloy include a Zr—Ni alloy, a Ti—Zr—V—Fe alloy, a Ti—Zr—Al alloy, and a Ti—Mn—V alloy. Alternatively, in this case, a part of the surface of the fine particles is covered with an oxide film or a nitride film. For example, when the fine particle layer is formed on the surface of the spacer in the air atmosphere, the fine particles constituting the fine particle layer This is preferable from the viewpoint of preventing adsorption of unnecessary gas. That is, generally, when the metal is made into nano-order (1 μm or less) fine particles, it is in a very reactive state. For example, in the case of molybdenum (Mo) fine particles, it reacts immediately with oxygen in the air and is oxidized. Therefore, it is necessary to make the surface inactive and adhere to the spacer. Therefore, the entire surface of the fine particles before forming the fine particle layer on the surface of the spacer is made of an oxide film or a nitride film (or an organic film when the fine particles are made of carbon (C) as will be described later). It is desirable to coat and keep the surface of the fine particles in an inactive state. However, if the entire surface of the fine particles is covered with the oxide film, the nitride film, or the organic film as described above, the surface of the fine particles remains in an inactive state. Therefore, after covering the surface of the fine particles with an oxide film, nitride film or organic film, finally removing a part of the oxide film, nitride film or organic film is necessary for the fine particles to function as a getter. Needed. Such removal of part of the oxide film, nitride film, or organic film can be performed by the activation process described above. Alternatively, in this case, the average particle diameter of the fine particles is preferably 1 × 10 ⁻⁸ m to 1 × 10 ⁻⁵ m from the viewpoint of ensuring that the fine particles exhibit the getter effect.

Alternatively, in the spacer of the present invention, the flat display device according to the first aspect of the present invention, or the assembling method of the flat display device of the present invention, the fine particles are preferably made of silicon (Si). It is preferable from the viewpoint as described above that a part of the surface is covered with an oxide film or a nitride film. Alternatively, in this case, the average particle diameter of the fine particles is preferably 1 × 10 ⁻⁸ m to 1 × 10 ⁻⁵ m from the viewpoint of ensuring that the fine particles exhibit the getter effect.

Alternatively, in the spacer of the present invention, the flat display device according to the first aspect of the present invention, or the assembling method of the flat display device of the present invention, the fine particles are carbon (C), specifically, for example, carbon fiber And at least one carbon selected from the group consisting of graphite, and in this case, a part of the surface of the fine particles is an organic film such as ethylene glycol, photoresist material, polyimide resin, silicon resin, chloride It is preferable from the viewpoint as described above that it is coated with vinyl, polystyrene, polyethylene, polypropylene, polyamide, polycarbonate, polyethylene terephthalate, fluororesin or the like. Alternatively, in this case, the average particle diameter of the fine particles is preferably 1 × 10 ⁻⁸ m to 1 × 10 ⁻⁵ m from the viewpoint of ensuring that the fine particles exhibit the getter effect.

  Here, the shape of the fine particles is preferably closer to a true sphere, but may be any shape such as a columnar shape or a polygonal shape. When the shape of the fine particles is an arbitrary shape, the average volume of the fine particles is obtained, and the diameter of the sphere corresponding to the average volume may be set as the average particle diameter of the fine particles.

In the spacer of the present invention including the above various preferred embodiments, the flat display device according to the first aspect of the present invention, or the assembly method of the flat display device of the present invention, the fine particle layer is porous, The specific resistance is determined by the area of contact between the fine particles and the fine particles, but is 10 ⁵ Ω / □ to 10 ¹² Ω / □, which increases the gas adsorption area in the fine particle layer and allows the second through the fine particle layer. This is preferable from the viewpoint of preventing an excessive current from flowing from the panel to the first panel.

  In the flat display device according to the first aspect of the present invention including the various preferred embodiments described above, by activating the fine particles by colliding electrons emitted from the electron emission source with the fine particle layer, Producing the getter effect is preferable from the viewpoint of simplifying the assembly process.

In the spacer of the present invention, the flat display device according to the first aspect of the present invention or the assembling method of the flat display device of the present invention, the fine particles are activated by colliding electrons emitted from the electron emission source with the fine particle layer. The getter effect can be produced by the formation of the oxide, the nitride film or the organic film as a result of electrons colliding with the oxide film, nitride film or organic film formed on the surface of the fine particles. (For example, as a result of the oxide film being reduced, at least a part of the active fine particle surface is exposed and the nitride film is removed in the form of NH ₃ , NO, NO ₂ , resulting in the active fine particle surface. This is because at least a part of the surface of the active fine particles is exposed and the organic film is removed in the form of CH _x or the like, so that at least a part of the active fine particle surface is exposed). The thickness of the oxide film, nitride film, or organic film is not limited, but is preferably about 1 nm to 10 nm.

  Further, in the flat display device according to the first aspect of the present invention including the various preferred embodiments described above, in order to achieve the second object, a phosphor layer is provided in the second panel. Is formed on the surface of the substrate, and the anode electrode is formed on the phosphor layer; when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate, The surface shape is preferably substantially “V” -shaped. In this case, when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate, the surface shape of the portion of the substrate is preferably approximately “V”, The aspect ratio of the substantially “V” -shaped surface shape is 0.29 or more (inclination angle of 30 degrees or more), preferably 0.87 or more (inclination angle of 60 degrees or more).

The aspect ratio of the substantially “V” -shaped surface shape means that the opening length (distance) of the upper end portion of the substantially “V” -shaped surface shape is L ₀ , and the substantially “V” -shaped surface shape. When the depth of D is D ₀ , it can be expressed by (D ₀ / L ₀ ). Further, one or more sections having a substantially “V” -shaped surface shape may be formed in a region of the phosphor layer constituting one subpixel. In the latter case, when the planar shape of the section is a concave cone shape, a concave elliptical cone shape, or a concave pyramid shape (triangular pyramid, polygonal pyramid including a quadrangular pyramid), one subpixel is configured. Examples of the number of sections per unit area of the phosphor layer include 2 / mm ^{2 to} 2000 / mm ² . Alternatively, in the latter case, when the planar shape of the section is a groove, the number of sections (grooves) per unit length of the phosphor layer constituting one subpixel is 2 / mm. Thirty to forty lines / mm can be exemplified. Furthermore, examples of the planar shape of the portion of the substrate having a substantially “V” -shaped surface shape include a circle and an ellipse. That is, examples of the shape of the portion of the substrate include a recessed cone shape, a recessed elliptical cone shape, and a recessed pyramid shape (a triangular pyramid, a polygonal pyramid including a quadrangular pyramid). The same applies to the flat display device according to the second aspect of the present invention to be described later. When the partition walls are provided, the partition wall aspect ratio (H ₁ / L ₁ ) which is a value of (partition wall height H ₁ ) / (distance L ₁ between the partition walls) is preferably less than 3. Further, the difference in height from the top surface of the phosphor layer to the top surface of the partition wall is desirably 10 μm or more and 200 μm or less.

  In the method for assembling the flat display device according to the first aspect of the present invention including the various preferred embodiments described above, electrons are emitted from the electron emission source by controlling the voltage applied to the anode electrode. It is preferable that the spacer collides with the fine particle layer of the spacer. Alternatively, the electron emission source is provided with a focusing electrode for controlling the trajectory of electrons emitted from the electron emission source, and the voltage applied to the focusing electrode is controlled. Thus, it is preferable to make it collide with the fine particle layer of the spacer.

The flat panel display according to the second aspect of the present invention for achieving the second object includes a first panel in which a plurality of electron emission sources for emitting electrons are formed on a support, an electron emission A phosphor layer on which the electrons emitted from the source collide and a second panel formed by forming an anode electrode on the substrate are joined at the periphery thereof, and a space sandwiched between the first panel and the second panel is formed. A flat display device maintained in a vacuum,
In the second panel, the phosphor layer is formed on the substrate surface, and the anode electrode is formed on the phosphor layer.
When the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate, the surface shape of the phosphor layer is substantially “V” -shaped.

  In the flat display device according to the second aspect of the present invention, when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate, the surface shape of the portion of the substrate is approximately. The surface ratio of the substantially “V” shape is preferably 0.29 or more (inclination angle of 30 degrees or more), preferably 0.87 or more (inclination angle of 60). It is desirable that it be at least.

  In the flat display device according to the first aspect of the present invention including the above various preferred embodiments, the assembling method of the flat display device of the present invention, and the flat display device according to the second aspect of the present invention. The flat display device can be a cold cathode field emission display device, or a flat display device incorporating a metal / insulating film / metal element (also referred to as an MIM element), surface conduction type A flat display device incorporating an electron-emitting device can also be provided.

  In the present invention, the spacer can be made of, for example, ceramics or glass. When the spacer is made of ceramics, the ceramics include mullite, alumina, barium titanate, lead zirconate titanate, zirconia, cordiolite, borosilicate barium, iron silicate, glass ceramic materials, titanium oxide and chromium oxide. Examples thereof include iron oxide, vanadium oxide, and nickel oxide added. In this case, the spacer can be manufactured by forming a so-called green sheet, firing the green sheet, and cutting the green sheet fired product. Moreover, soda-lime glass can be mentioned as glass which comprises a spacer. The spacer may be fixed by being sandwiched between the partition walls, for example. Alternatively, for example, a spacer holding part may be formed on the anode panel and fixed by the spacer holding part. A specific method for forming the fine particle layer on the surface of the spacer will be described later.

Here, when the flat display device is a cold cathode field emission display device, a cold cathode field emission device (hereinafter abbreviated as a field emission device) is:
(A) a strip-shaped cathode electrode formed on the support and extending in the first direction;
(B) an insulating layer formed on the cathode electrode and the support;
(C) a strip-shaped gate electrode formed on the insulating layer and extending in a second direction different from the first direction;
(D) an opening provided in a portion of the gate electrode and the insulating layer located in an overlapping region where the cathode electrode and the gate electrode overlap, and an exposed portion of the cathode electrode at the bottom; and
(E) an electron emission portion provided on the cathode electrode exposed at the bottom of the opening,
Consists of.

  The type of the field emission device is not particularly limited, and a Spindt-type field emission device (a field emission device in which a conical electron emission portion is provided on the cathode electrode positioned at the bottom of the opening) or a flat type field emission device (A field emission device in which a substantially planar electron emission portion is provided on a cathode electrode located at the bottom of an opening).

  From the viewpoint of simplifying the structure of the cold cathode field emission display, the projected image of the cathode electrode and the projected image of the gate electrode are orthogonal, that is, the first direction and the second direction are orthogonal. To preferred. In the cathode panel, the electron emission regions are arranged in a two-dimensional matrix, and each electron emission region is provided with one or a plurality of field emission elements.

A field emission device can be generally manufactured by the following method.
(1) forming a cathode electrode on a support;
(2) forming an insulating layer on the entire surface (on the support and the cathode electrode);
(3) forming a gate electrode on the insulating layer;
(4) forming an opening in a portion of the gate electrode and the insulating layer in a region where the cathode electrode and the gate electrode overlap, and exposing the cathode electrode at the bottom of the opening;
(5) A step of forming an electron emission portion on the cathode electrode located at the bottom of the opening.

Alternatively, the field emission device can be manufactured by the following method.
(1) forming a cathode electrode on a support;
(2) forming an electron emission portion on the cathode electrode;
(3) forming an insulating layer on the entire surface (on the support and the electron emission portion or on the support, the cathode electrode and the electron emission portion);
(4) forming a gate electrode on the insulating layer;
(5) A step of forming an opening in a portion of the gate electrode and the insulating layer in the overlapping region of the cathode electrode and the gate electrode, and exposing the electron emission portion at the bottom of the opening.

  As described above, the field emission device may be provided with a focusing electrode. That is, for example, a field emission element in which an interlayer insulating layer is further provided on the gate electrode and the insulating layer, and a focusing electrode is provided on the interlayer insulating layer, or a focusing electrode is provided above the gate electrode. It can also be a field emission device. Here, the focusing electrode is an electrode for converging the trajectory of emitted electrons that are emitted from the opening and directed toward the anode electrode, thereby improving the luminance and preventing optical crosstalk between adjacent pixels. It is. In a so-called high-voltage type cold cathode field emission display device in which the potential difference between the anode electrode and the cathode electrode is on the order of several kilovolts and the distance between the anode electrode and the cathode electrode is relatively long, the focusing electrode Is particularly effective. A relative negative voltage (for example, 0 volts) is applied to the focusing electrode from the focusing electrode control circuit. The focusing electrode is not necessarily provided for each field emission element. For example, by extending the field emission elements along a predetermined arrangement direction of the field emission elements, a convergence effect common to a plurality of field emission elements is exerted. You can also

  In the Spindt-type field emission device, as the material constituting the electron emission portion, molybdenum, molybdenum alloy, tungsten, tungsten alloy, titanium, titanium alloy, niobium, niobium alloy, tantalum, tantalum alloy, chromium, chromium alloy, and And at least one material selected from the group consisting of silicon (polysilicon and amorphous silicon) containing impurities. The electron emission portion of the Spindt-type field emission device can be formed by, for example, a sputtering method or a CVD method in addition to the vacuum evaporation method.

In the flat field emission device, it is preferable that the material constituting the electron emission portion is composed of a material having a work function Φ smaller than that of the material constituting the cathode electrode. What is necessary is just to determine based on the work function of the material which comprises a cathode electrode, the electric potential difference between a gate electrode and a cathode electrode, the magnitude | size of the emission electron current density requested | required, etc. As typical materials constituting the cathode electrode in the field emission device, tungsten (Φ = 4.55 eV), niobium (Φ = 4.02 to 4.87 eV), molybdenum (Φ = 4.53 to 4.95 eV), Examples include aluminum (Φ = 4.28 eV), copper (Φ = 4.6 eV), tantalum (Φ = 4.3 eV), and chromium (Φ = 4.5 eV). The electron emission portion preferably has a work function Φ smaller than these materials, and the value is preferably approximately 3 eV or less. As such materials, carbon (Φ <1 eV), cesium (Φ = 2.14 eV), LaB ₆ (Φ = 2.66-2.76 eV), BaO (Φ = 1.6-2.7 eV), SrO (Φ = 1.25 to 1.6 eV), Y ₂ O ₃ (Φ = 2.0 eV), CaO (Φ = 1.6 to 1.86 eV), BaS (Φ = 2.05 eV), TiN (Φ = 2. 92 eV) and ZrN (Φ = 2.92 eV). More preferably, the electron emission portion is made of a material having a work function Φ of 2 eV or less. In addition, the material which comprises an electron emission part does not necessarily need to be provided with electroconductivity.

Alternatively, in the flat type field emission device, as a material constituting the electron emission portion, a material in which the secondary electron gain δ of the material is larger than the secondary electron gain δ of the conductive material constituting the cathode electrode is used. You may select suitably. That is, silver (Ag), aluminum (Al), gold (Au), cobalt (Co), copper (Cu), molybdenum (Mo), niobium (Nb), nickel (Ni), platinum (Pt), tantalum (Ta) ), Metals such as tungsten (W), zirconium (Zr); semiconductors such as germanium (Ge); inorganic simple substances such as carbon and diamond; and aluminum oxide (Al ₂ O ₃ ), barium oxide (BaO), beryllium oxide ( BeO), calcium oxide (CaO), magnesium oxide (MgO), tin oxide (SnO ₂ ), barium fluoride (BaF ₂ ), calcium fluoride (CaF ₂ ) and other compounds can be selected as appropriate. . In addition, the material which comprises an electron emission part does not necessarily need to be provided with electroconductivity.

Alternatively, in the flat type field emission device, carbon, more specifically, amorphous diamond, graphite, carbon nanotube structure, ZnO whisker, MgO whisker, SnO ₂ whisker is particularly preferable as a constituent material of the electron emission part. , MnO whiskers, Y ₂ O ₃ whiskers, NiO whiskers, ITO whiskers, In ₂ O ₃ whiskers, and Al ₂ O ₃ whiskers. When the electron emission portion is composed of these, the emission electron current density required for the cold cathode field emission display device can be obtained with an electric field intensity of 5 × 10 ⁶ V / m or less. Further, if the material constituting the electron emission portion is an electric resistor, the emission electron current obtained from each electron emission portion can be made uniform, and accordingly, when incorporated in a cold cathode field emission display device. Luminance variation can be suppressed. Furthermore, since these materials have extremely high resistance to the sputtering effect by ions of residual gas in the cold cathode field emission display, the lifetime of the field emission device can be extended.

  Specific examples of the carbon nanotube structure include carbon nanotubes and / or graphite nanofibers. More specifically, the electron emission part may be composed of carbon nanotubes, the electron emission part may be composed of graphite nanofibers, or the electron emission is performed from a mixture of carbon nanotubes and graphite nanofibers. You may comprise a part. Macroscopically, carbon nanotubes and graphite nanofibers may be in the form of powder or thin film. In some cases, the carbon nanotube structure has a conical shape. It may be. Carbon nanotubes and graphite nanofibers are produced by various CVD methods such as the well-known arc discharge method and laser ablation method, such as PVD method, plasma CVD method, laser CVD method, thermal CVD method, vapor phase synthesis method, and vapor phase growth method. Can be manufactured and formed.

The constituent materials of the cathode electrode, gate electrode, and focusing electrode are aluminum (Al), tungsten (W), niobium (Nb), tantalum (Ta), molybdenum (Mo), chromium (Cr), copper (Cu), gold ( Metals such as Au), silver (Ag), titanium (Ti), nickel (Ni), cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn); these metal elements Alloys (eg, MoW) or compounds (eg, nitrides such as TiN, silicides such as WSi ₂ , MoSi ₂ , TiSi ₂ , TaSi ₂ ); semiconductors such as silicon (Si); carbon thin films such as diamond; ITO ( Examples thereof include conductive metal oxides such as indium oxide-tin oxide, indium oxide, and zinc oxide. In addition, as a method for forming these electrodes, for example, a vapor deposition method such as an electron beam vapor deposition method or a hot filament vapor deposition method, a sputtering method, a combination of a CVD method, an ion plating method and an etching method; a screen printing method; Plating method and electroless plating method); lift-off method; laser ablation method; sol-gel method and the like. According to the screen printing method or the plating method, for example, a strip-like cathode electrode or gate electrode can be formed directly.

As a material for constituting the insulating layer and the interlayer insulating _{layer, SiO 2, BPSG, PSG,} BSG, AsSG, PbSG, SiON, SOG ( spin on glass), low-melting glass, SiO ₂ based materials such glass paste; SiN-based materials; polyimide These insulating resins can be used alone or in appropriate combination. For forming the insulating layer or the interlayer insulating layer, a known process such as a CVD method, a coating method, a sputtering method, or a screen printing method can be used.

  Planar shape of the first opening (opening formed in the gate electrode) or the second opening (opening formed in the insulating layer) (shape when the opening is cut in a virtual plane parallel to the support surface) ) Can be any shape such as a circle, an ellipse, a rectangle, a polygon, a rounded rectangle, a rounded polygon. The formation of the first opening can be performed by, for example, anisotropic etching, isotropic etching, a combination of anisotropic etching and isotropic etching, or, depending on the method of forming the gate electrode, The first opening can also be formed directly. The second opening can also be formed by, for example, anisotropic etching, isotropic etching, or a combination of anisotropic etching and isotropic etching.

  In the field emission device, depending on the structure of the field emission device, one electron emission portion may exist in one opening, or a plurality of electron emission portions may exist in one opening. In addition, a plurality of first openings are provided in the gate electrode, one second opening communicating with the first opening is provided in the insulating layer, and one or more are provided in one second opening provided in the insulating layer. There may be an electron emission portion.

In the field emission device, a resistor layer may be provided between the cathode electrode and the electron emission portion. By providing the resistor layer, it is possible to stabilize the operation of the field emission device and make the electron emission characteristics uniform. As a material constituting the resistor layer, a carbon-based material such as silicon carbide (SiC) or SiCN, a semiconductor material such as SiN or amorphous silicon, or a refractory metal oxide such as ruthenium oxide (RuO ₂ ), tantalum oxide, or tantalum nitride. It can be illustrated. Examples of the method for forming the resistor layer include a sputtering method, a CVD method, and a screen printing method. The electrical resistance value per one electron emitting portion may be approximately 1 × 10 ⁶ to 1 × 10 ¹¹ Ω, preferably several tens of gigaΩ.

As a support constituting the cathode panel or as a substrate constituting the anode panel, a glass substrate, a glass substrate with an insulating film formed on the surface, a quartz substrate, a quartz substrate with an insulating film formed on the surface, and a surface Examples of the semiconductor substrate include an insulating film. From the viewpoint of reducing manufacturing costs, it is preferable to use a glass substrate or a glass substrate having an insulating film formed on the surface. As a glass substrate, high strain point glass, soda glass (Na ₂ O · CaO · SiO ₂ ), borosilicate glass (Na ₂ O · B ₂ O ₃ · SiO ₂ ), forsterite (2MgO · SiO ₂ ), lead glass (Na ₂ O · PbO · SiO ₂ ) can be exemplified.

  In the cold cathode field emission display device, as examples of the configuration of the anode electrode and the phosphor layer, (1) a configuration in which an anode electrode is formed on a substrate and a phosphor layer is formed on the anode electrode, (2) As described above, a configuration in which a phosphor layer is formed on a substrate and an anode electrode is formed on the phosphor layer can be exemplified. In the configuration (1), a so-called metal back film that is electrically connected to the anode electrode may be formed on the phosphor layer. In the configuration (2), a metal back film may be formed on the anode electrode.

The anode electrode may be composed of one anode electrode as a whole, or may be composed of a plurality of anode electrode units. In the latter case, the anode electrode unit and the anode electrode unit need to be electrically connected by a resistor film. Resistor films are made of carbon-based materials such as silicon carbide (SiC) and SiCN; SiN-based materials; refractory metal oxides such as ruthenium oxide (RuO ₂ ), tantalum oxide, tantalum nitride, chromium oxide, and titanium oxide. A semiconductor material such as amorphous silicon. Examples of the sheet resistance value of the resistor film include 1 × 10 ⁻¹ Ω / □ to 1 × 10 ¹⁰ Ω / □, preferably 1 × 10 ³ Ω / □ to 1 × 10 ⁸ Ω / □. The number (Q) of anode electrode units may be two or more. For example, when the total number of rows of phosphor layers arranged in a straight line is q, Q = q or q = k · Q (K is an integer of 2 or more, preferably 10 ≦ k ≦ 100, more preferably 20 ≦ k ≦ 50), or a number obtained by adding 1 to the number of spacers arranged at a constant interval. It can also be a number that matches the number of pixels or sub-pixels, or an integer fraction of the number of pixels or sub-pixels. The size of each anode electrode unit may be the same regardless of the position of the anode electrode unit, or may be different depending on the position of the anode electrode unit.

The anode electrode (including the anode electrode unit) may be formed using a conductive material layer. As a method for forming the conductive material layer, for example, various PVD methods such as an evaporation method such as an electron beam evaporation method and a hot filament evaporation method, a sputtering method, an ion plating method, and a laser ablation method; various CVD methods; a screen printing method; Method; sol-gel method and the like. That is, it is possible to form an anode electrode by forming a conductive material layer made of a conductive material and patterning the conductive material layer based on a lithography technique and an etching technique. Alternatively, the anode electrode can be obtained by forming a conductive material based on a PVD method or a screen printing method through a mask or screen having an anode electrode pattern. The resistor film can also be formed by the same method. That is, a resistor film may be formed from a resistor material, and the resistor film may be patterned based on a lithography technique and an etching technique, or the resistor material may be provided via a mask or screen having a resistor film pattern. A resistor film can be obtained by formation based on the PVD method or the screen printing method. 3 × 10 ⁻⁸ m (30 nm) to 1 as the average thickness of the anode electrode on the substrate (or above the substrate) (when the partition is provided as described later, the average thickness of the anode electrode on the top surface of the partition) And 5 × 10 ⁻⁷ m (150 nm), preferably 5 × 10 ⁻⁸ m (50 nm) to 1 × 10 ⁻⁷ m (100 nm).

The constituent material of the anode electrode may be appropriately selected depending on the configuration of the cold cathode field emission display. That is, when the cold cathode field emission display is a transmission type (the anode panel corresponds to the display surface), and the anode electrode and the phosphor layer are laminated in this order on the substrate, the substrate is Originally, the anode electrode itself needs to be transparent, and a transparent conductive material such as ITO (indium tin oxide) is used. On the other hand, when the cold cathode field emission display is of a reflective type (the cathode panel corresponds to the display surface), and even if it is a transmissive type, the phosphor layer and the anode electrode are laminated in this order on the substrate. In the case of molybdenum (Mo), aluminum (Al), chromium (Cr), tungsten (W), niobium (Nb), tantalum (Ta), gold (Au), silver (Ag), titanium (Ti), Metals such as cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn); alloys or compounds containing these metal elements (for example, nitrides such as TiN, WSi ₂ , MoSi _2, TiSi _2, silicides such as TaSi _2); thin carbon film such as diamond; silicon (Si) semiconductor such as ITO (indium - tin), indium oxide, conductive metal such as zinc oxide It can be exemplified oxides. When the resistor film is formed, the anode electrode is preferably made of a conductive material that does not change the resistance value of the resistor film. For example, when the resistor film is made of silicon carbide (SiC), the anode electrode is It is preferable to comprise from molybdenum (Mo).

  The phosphor layer may be composed of single-color phosphor particles or may be composed of three primary color phosphor particles. Moreover, the arrangement | sequence form of a fluorescent substance layer may be dot shape, or may be strip | belt shape. In the dot-like or strip-like arrangement pattern, a gap between adjacent phosphor layers may be embedded with a light absorption layer (black matrix) for the purpose of improving contrast.

  When the cold cathode field emission display device is a color display, one row of the phosphor layers arranged in a straight line is a row occupied by the red light emitting phosphor layer, a row occupied by the green light emitting phosphor layer. And a row occupied by the blue light-emitting phosphor layer, or a row in which the red light-emitting phosphor layer, the green light-emitting phosphor layer, and the blue light-emitting phosphor layer are sequentially arranged. It may be. Here, the phosphor layer is defined as a phosphor layer that generates one bright spot on the anode panel. Further, one pixel (one pixel) is composed of a set of one red light emitting phosphor layer, one green light emitting phosphor layer, and one blue light emitting phosphor layer, and one subpixel is one phosphor. It is composed of layers (one red-emitting phosphor layer, one green-emitting phosphor layer, or one blue-emitting phosphor layer). Furthermore, the size corresponding to one subpixel in the anode electrode unit means the size of the anode electrode unit surrounding one phosphor layer.

  The phosphor layer uses a luminescent crystal particle composition prepared from luminescent crystal particles (for example, phosphor particles having a particle size of about 5 to 10 nm), for example, a red photosensitive luminescent crystal particle composition. (Red phosphor slurry) is applied to the entire surface, exposed and developed to form a red light emitting phosphor layer, and then a green photosensitive luminescent crystal particle composition (green phosphor slurry) is applied to the entire surface. Then, it is exposed to light and developed to form a green light emitting phosphor layer. Further, a blue photosensitive luminescent crystal particle composition (blue phosphor slurry) is applied to the entire surface, exposed to light and developed to emit blue light. It can be formed by a method of forming a phosphor layer. The average thickness of the phosphor layer on the substrate is not limited, but is preferably 3 μm to 20 μm, preferably 5 μm to 10 μm.

The phosphor material constituting the luminescent crystal particles can be appropriately selected from conventionally known phosphor materials. In the case of color display, a phosphor material whose color purity is close to the three primary colors specified by NTSC, white balance is achieved when the three primary colors are mixed, the afterglow time is short, and the afterglow time of the three primary colors is almost equal. It is preferable to combine them. As phosphor materials constituting the red light emitting phosphor layer, (Y ₂ O ₃ : Eu), (Y ₂ O ₂ S: Eu), (Y ₃ Al ₅ O ₁₂ : Eu), (Y ₂ SiO ₅ : Eu) ) And (Zn ₃ (PO ₄ ) ₂ : Mn) can be exemplified, among which (Y ₂ O ₃ : Eu) and (Y ₂ O ₂ S: Eu) are preferably used. Further, as the phosphor material constituting the green light emitting phosphor layer, (ZnSiO ₂ : Mn), (Sr ₄ Si ₃ O ₈ Cl ₄ : Eu), (ZnS: Cu, Al), (ZnS: Cu, Au, Al), [(Zn, Cd) S: Cu, Al], (Y ₃ Al ₅ O ₁₂ : Tb), (Y ₂ SiO ₅ : Tb), [Y ₃ (Al, Ga) ₅ O ₁₂ : Tb] , (ZnBaO ₄ : Mn), (GbBO ₃ : Tb), (Sr ₆ SiO ₃ Cl ₃ : Eu), (BaMgAl ₁₄ O ₂₃ : Mn), (ScBO ₃ : Tb), (Zn ₂ SiO ₄ : Mn) , (ZnO: Zn), (Gd ₂ O ₂ S: Tb), and (ZnGa ₂ O ₄ : Mn), (ZnS: Cu, Al), (ZnS: Cu, Au, Al), [(Zn, Cd ) S: Cu, Al], (Y 3 Al 5 O 12: Tb), [Y 3 (A _{, Ga) 5 O 12: Tb} ], (Y 2 SiO 5: Tb) is preferably used. Further, as phosphor materials constituting the blue light emitting phosphor layer, (Y ₂ SiO ₅ : Ce), (CaWO ₄ : Pb), CaWO ₄ , YP _0.85 V _0.15 O ₄ , (BaMgAl ₁₄ O ₂₃ : Eu) , (Sr ₂ P ₂ O ₇ : Eu), (Sr ₂ P ₂ O ₇ : Sn), (ZnS: Ag, Al), (ZnS: Ag), ZnMgO, and ZnGaO _4. , (ZnS: Ag), (ZnS: Ag, Al) are preferably used.

  In the anode panel, electrons rebounding from the phosphor layer or secondary electrons emitted from the phosphor layer enter the other phosphor layer, and so-called optical crosstalk (color turbidity) is generated. When the electrons recoiled from the phosphor layer or the secondary electrons emitted from the phosphor layer enter the other phosphor layers through the barrier ribs, It is preferable that a plurality of partition walls are provided to prevent electrons from colliding with other phosphor layers.

  Examples of the planar shape of the barrier ribs include a lattice shape (cross-beam shape), that is, a shape corresponding to one subpixel, for example, a shape surrounding the four sides of the phosphor layer having a substantially rectangular shape (dot shape), or A belt-like shape extending in parallel with two opposing sides of the substantially rectangular or belt-like phosphor layer can be exemplified. In the case where the partition walls are formed in a lattice shape, the shape may be a shape that continuously surrounds one side of the region of one phosphor layer, or a shape that discontinuously surrounds. When the partition wall has a strip shape, it may have a continuous shape or a discontinuous shape. After the partition wall is formed, the partition wall may be polished to flatten the top surface of the partition wall.

  Examples of the partition wall forming method include a screen printing method, a dry film method, a photosensitive method, and a sandblast forming method. Here, in the screen printing method, an opening is formed in a portion of the screen corresponding to a portion where a partition is to be formed, and the partition forming material on the screen is passed through the opening using a squeegee, and the partition is formed on the substrate. In this method, after the formation material layer is formed, the partition wall formation material layer is fired. The dry film method is a method of laminating a photosensitive film on a substrate, removing the photosensitive film at the part where the partition wall is to be formed by exposure and development, embedding a material for forming the partition wall in the opening formed by the removal, and baking. is there. The photosensitive film is burned and removed by baking, and the partition wall-forming material embedded in the openings remains to form partition walls. The photosensitive method is a method in which a barrier rib-forming material layer having photosensitivity is formed on a substrate, the barrier rib-forming material layer is patterned by exposure and development, and then fired. The sand blast forming method is, for example, for forming partition walls on which a partition wall forming material layer is formed on a substrate by using screen printing, a roll coater, a doctor blade, a nozzle discharge type coater or the like and dried. In this method, the material layer portion is covered with a mask layer, and then the exposed partition wall forming material layer portion is removed by sandblasting.

  A light absorption layer that absorbs light from the phosphor layer is preferably formed between the partition wall and the substrate from the viewpoint of improving the contrast of the display image. Here, the light absorption layer functions as a so-called black matrix. As a material constituting the light absorption layer, it is preferable to select a material that absorbs 99% or more of light from the phosphor layer. Such materials include carbon, metal thin films (eg, chromium, nickel, aluminum, molybdenum, etc., or alloys thereof), metal oxides (eg, chromium oxide), metal nitrides (eg, chromium nitride), heat resistance Materials such as photosensitive organic resins, glass pastes, glass pastes containing conductive particles such as black pigments and silver, and specifically, photosensitive polyimide resins, chromium oxides, and chromium oxide / chromium laminated films Can be illustrated. In the chromium oxide / chromium laminated film, the chromium film is in contact with the substrate. For example, the light absorption layer is a combination of a vacuum vapor deposition method, a sputtering method and an etching method, a vacuum vapor deposition method, a sputtering method, a combination of a spin coating method and a lift-off method, a screen printing method, a lithography technique, etc. It can be formed by a method appropriately selected depending on the method.

  In the cold cathode field emission display, a strong electric field generated by a voltage applied to the cathode electrode and the gate electrode is applied to the electron emission portion, and as a result, electrons are emitted from the electron emission portion by the quantum tunnel effect. The electrons are attracted to the anode panel by the anode electrode provided on the anode panel, and collide with the phosphor layer. As a result of the collision of electrons with the phosphor layer, the phosphor layer emits light and can be recognized as an image.

In the cold cathode field emission display, the cathode electrode is connected to the cathode electrode control circuit, the gate electrode is connected to the gate electrode control circuit, and the anode electrode is connected to the anode electrode control circuit. Note that these control circuits can be constituted by known circuits. During actual operation, the output voltage v _A of the anode electrode control circuit is normally constant, and can be, for example, 5 kilovolts to 12 kilovolts. Alternatively, when the distance between the anode panel and the cathode panel is d (where 0.5 mm ≦ d ≦ 10 mm), the value of v _A / d (unit: kilovolt / mm) is 0.5 or more and 20 In the following, it is desirable to satisfy 1 or more and 10 or less, more preferably 5 or more and 10 or less.

In the actual operation of the cold cathode field emission display device, regarding the voltage v _C applied to the cathode electrode and the voltage v _G applied to the gate electrode, when the voltage modulation method is adopted as the gradation control method,
(1) A method of changing the voltage v _G applied to the gate electrode while keeping the voltage v _C applied to the cathode electrode constant (2) A voltage v _G applied to the gate electrode by changing the voltage v _C applied to the cathode electrode (3) There is a method in which the voltage v _C applied to the cathode electrode is changed and the voltage v _G applied to the gate electrode is also changed.

The cathode panel and the anode panel are joined at the peripheral edge, but the joining may be performed using an adhesive layer, or a frame made of an insulating rigid material such as glass or ceramics and an adhesive layer are used in combination. May be. When using a frame and an adhesive layer together, the opposing distance between the cathode panel and the anode panel is set longer than when only the adhesive layer is used by appropriately selecting the height of the frame. Is possible. As a constituent material of the adhesive layer, frit glass is generally used, but a so-called low melting point metal material having a melting point of about 120 to 400 ° C. may be used. Such low melting point metal materials include In (indium: melting point 157 ° C.); indium-gold based low melting point alloy; Sn ₈₀ Ag ₂₀ (melting point 220 to 370 ° C.), Sn ₉₅ Cu ₅ (melting point 227 to 370 ° C.) C) tin (Sn) type high temperature solder such as Pb _97.5 Ag _2.5 (melting point 304 ° C.), Pb _94.5 Ag _5.5 (melting point 304 to 365 ° C.), Pb _97.5 Ag _1.5 Sn _1.0 (melting point 309 ° C.), etc. Lead (Pb) high temperature solder; zinc (Zn) high temperature solder such as Zn ₉₅ Al ₅ (melting point 380 ° C.); Sn ₅ Pb ₉₅ (melting point 300 to 314 ° C.), Sn ₂ Pb ₉₈ (melting point 316 to 322) Tin-lead standard solder such as ° C); brazing material such as Au ₈₈ Ga ₁₂ (melting point 381 ° C) (the above subscripts all represent atomic%).

  When joining the three of the cathode panel, the anode panel and the frame, the three may be joined at the same time, or in the first stage, either the cathode panel or the anode panel and the frame are joined, In the second stage, the other of the cathode panel or the anode panel and the frame may be joined. When the three-party simultaneous bonding or the second-stage bonding is performed in a high vacuum atmosphere, the space surrounded by the cathode panel, the anode panel, the frame, and the adhesive layer becomes a vacuum simultaneously with the bonding. Alternatively, the space surrounded by the cathode panel, the anode panel, the frame body, and the adhesive layer can be exhausted and vacuumed after the completion of the joining of the three parties. When exhausting after joining, the pressure of the atmosphere at the time of joining may be normal pressure / depressurized, and the gas constituting the atmosphere may be air, or nitrogen gas or group 0 of the periodic table An inert gas containing a gas belonging to (for example, Ar gas) may be used.

  When exhaust is performed, exhaust can be performed through a tip tube connected in advance to the cathode panel and / or the anode panel. The tip tube is typically configured by using a glass tube, and an ineffective area of the cathode panel and / or the anode panel (a display area in the central portion that performs a practical function as a cold cathode field emission display device) It is joined to the periphery of the through-hole provided in the frame-like region) using frit glass or the above-mentioned low melting point metal material, and after the space has reached a predetermined degree of vacuum, it is sealed by thermal fusion. Cut off. In addition, if the entire cold cathode field emission display is once heated and then cooled before sealing, the residual gas can be released into the space, and the residual gas can be removed out of the space by exhaust. This is preferable.

  In the spacer of the present invention, the flat display device according to the first aspect of the present invention, or the assembling method of the flat display device of the present invention, a fine particle layer made of fine particles having a getter effect is formed on the surface of the spacer. Therefore, even if electrons collide with the spacer and the gas adsorbed on the spacer surface is released, the gas is immediately captured by the fine particle layer. Therefore, although the structure is simple, it is possible to reliably suppress the deterioration of the electron emission characteristics in the electron emission portion. In the flat display device according to the second aspect of the present invention, the surface shape of the phosphor layer when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate is substantially the same. Because of the “V” shape, it is possible to reliably reduce the amount of backscattered electrons that jump out of the phosphor layer, collide with the spacer, or enter the adjacent phosphor layer.

  Hereinafter, the present invention will be described based on examples with reference to the drawings.

  Example 1 relates to the spacer of the present invention, the flat display device according to the first aspect of the present invention, and the assembling method thereof. The flat display device in Example 1 is a cold cathode field emission display device (hereinafter abbreviated as a display device), and a first panel (cathode panel CP) and a second panel (anode panel AP) constituting the display device. ) Has the same configuration and structure as the cathode panel CP and anode panel AP in the display device described with reference to FIG. 2, FIG. 3 or FIG. In the following description, the first panel is called a cathode panel CP, and the second panel is called an anode panel AP. That is, in the display device according to the first embodiment, the first panel (cathode) formed by forming a plurality of Spindt type field emission devices and flat type field emission devices corresponding to an electron emission source for emitting electrons on the support 10. Panel CP), and a second panel (anode) in which a phosphor layer 22 and an anode electrode 24 with which electrons emitted from an electron emission source (Spindt type field emission device or flat type field emission device) collide are formed on the substrate 20. The panel AP) is joined at the periphery thereof, and the space sandwiched between the first panel (cathode panel CP) and the second panel (anode panel AP) is maintained in a vacuum.

FIG. 2 is a conceptual partial end view of the cathode panel CP and the anode panel AP in which the Spindt type field emission device is formed, and the conceptual diagram of the cathode panel CP and the anode panel AP in which the flat type field emission device is formed. A partial end view is shown in FIG.
(A) Support 10,
(B) a plurality of strip-like cathode electrodes 11 formed on the support 10 and extending in the first direction;
(C) an insulating layer 12 formed on the cathode electrode 11 and the support 10;
(D) a plurality of strip-shaped gate electrodes 13 formed on the insulating layer 12 and extending in a second direction different from the first direction;
(E) A plurality of openings 14 (provided in the gate electrode 13) that are provided in the gate electrode 13 and the insulating layer 12 located in the overlapping region where the cathode electrode 11 and the gate electrode 13 overlap and are exposed at the bottom. The first opening 14A and the second opening 14B provided in the insulating layer 12, and
(F) An electron emission region EA having electron emission portions 15 and 15A provided on the cathode electrode 11 located on the overlapping region where the cathode electrode 11 and the gate electrode 13 overlap and exposed at the bottom of the opening 14;
It has.

A cold cathode field emission device (hereinafter abbreviated as a field emission device)
(A) a strip-shaped cathode electrode 11 formed on the support 10 and extending in the first direction;
(B) an insulating layer 12 formed on the cathode electrode 11 and the support 10;
(C) a strip-shaped gate electrode 13 formed on the insulating layer 12 and extending in a second direction different from the first direction;
(D) An opening 14 (provided in the gate electrode 13) provided in the portion of the gate electrode 13 and the insulating layer 12 located in the overlapping region where the cathode electrode 11 and the gate electrode 13 overlap, with the cathode electrode 11 exposed at the bottom. 14A of 1st opening parts, 2nd opening part 14B provided in the insulating layer 12, and
(E) electron emission portions 15 and 15A provided on the cathode electrode 11 exposed at the bottom of the opening 14;
Consists of. Here, the electron emission part 15 is a cone-shaped electron emission part, and the electron emission part 15A is composed of, for example, a large number of carbon nanotubes partially embedded in a matrix.

  In the cathode panel CP, the cathode electrode 11 has a strip shape extending in the first direction (a direction parallel to the drawing sheet), and the gate electrode 13 has a second direction different from the first direction (perpendicular to the drawing sheet). (See also FIG. 3). In general, the cathode electrode 11 and the gate electrode 13 are each formed in a strip shape in a direction in which the projected images of both the electrodes 11 and 13 are orthogonal to each other. A plurality of field emission elements are provided in the electron emission area EA corresponding to one subpixel. Further, the focusing electrode 16 is provided on the interlayer insulating layer 17 along a predetermined arrangement direction of the field emission elements, and a common convergence effect can be exerted on the plurality of field emission elements.

The display device according to the first embodiment is formed by joining a cathode panel CP and an anode panel AP at their peripheral portions, and a space between the cathode panel CP and the anode panel AP is in a vacuum state (pressure: 10 ^−3, for example). Pa or less). A schematic exploded perspective view of a part of the cathode panel CP and the anode panel AP when the cathode panel CP and the anode panel AP are disassembled is the same as that shown in FIG.

  The anode panel AP includes a substrate 20 and a phosphor layer 22 formed on the substrate 20 (in the case of color display, a red light-emitting phosphor layer 22R, a green light-emitting phosphor layer 22G, and a blue light-emitting phosphor layer 22B), The anode electrode 24 covers the phosphor layer 22. That is, the anode panel AP is more specifically formed on the substrate 20 and the substrate 20 between the partition walls 21 formed on the substrate 20 and the phosphor layer 22 made of a large number of phosphor particles. (A red light emitting phosphor layer 22R, a green light emitting phosphor layer 22G, a blue light emitting phosphor layer 22B), and an anode electrode 24 formed on the phosphor layer 22. The anode electrode 24 is in the form of a thin sheet that covers the effective area, and is connected to the anode electrode control circuit 33. The anode electrode 24 is made of aluminum having a thickness of about 70 nm and is provided so as to cover the partition wall 21 and the phosphor layer 22. Between the phosphor layer 22 and the phosphor layer 22, and between the partition wall 21 and the substrate 20, a light absorption layer (black) is used to prevent the occurrence of color turbidity and optical crosstalk in the display image. Matrix) 23 is formed.

  A spacer 40 is disposed between the cathode panel CP as the first panel and the anode panel AP as the second panel.

  An example of the arrangement state of the barrier rib 21, the spacer 40, and the phosphor layer 22 is schematically shown in FIGS. The arrangement of the phosphor layers and the like in the schematic partial end view of the anode panel AP shown in FIG. 2 or FIG. 4 has the configuration shown in FIG. 6 or FIG. Also, the anode electrode is not shown in FIGS. The planar shape of the partition wall 21 is a lattice shape (cross-beam shape), that is, a shape corresponding to one subpixel, for example, a shape surrounding the four sides of the phosphor layer 22 having a substantially rectangular planar shape (FIGS. 5, 6, 7, and 7). 8), or a belt-like shape extending in parallel with two opposing sides of the substantially rectangular (or belt-like) phosphor layer 22 (see FIGS. 9 and 10). In the phosphor layer 22 shown in FIG. 9, the phosphor layers 22R, 22G, and 22B can be formed in a strip shape extending in the vertical direction of FIG. A part of the partition wall 21 also functions as a spacer holding part 25 for holding the spacer 40.

In the display device of Example 1, the cathode electrode 11 is connected to the cathode electrode control circuit 31, the gate electrode 13 is connected to the gate electrode control circuit 32, and the anode electrode 24 is connected to the anode electrode control circuit 33. These control circuits can be constituted by known circuits. During actual operation of the display device, the output voltage v _A of the anode electrode control circuit 33 is normally constant and can be set to, for example, 5 kilovolts to 12 kilovolts. On the other hand, regarding the voltage v _C applied to the cathode electrode 11 and the voltage v _G applied to the gate electrode 13 during actual operation of the display device,
(1) A method in which the voltage v _C applied to the cathode electrode 11 is constant and the voltage v _G applied to the gate electrode 13 is changed. (2) The voltage v _C applied to the cathode electrode 11 is changed and applied to the gate electrode 13. the voltage v _G changing the voltage v _C is applied to the method (3) a cathode electrode 11, fixed to, and may employ any voltage v method in which _G is also changed to be applied to the gate electrode 13.

During actual operation of the display device, a relatively negative voltage is applied to the cathode electrode 11 from the cathode electrode control circuit 31, a relatively positive voltage is applied to the gate electrode 13 from the gate electrode control circuit 32, and the anode electrode 24 A positive voltage higher than that of the gate electrode 13 is applied from the anode electrode control circuit 33. When performing display in such a display device, for example, a scanning signal is input to the cathode electrode 11 from the cathode electrode control circuit 31, and a video signal is input to the gate electrode 13 from the gate electrode control circuit 32. Note that a video signal may be input to the cathode electrode 11 from the cathode electrode control circuit 31, and a scanning signal may be input to the gate electrode 13 from the gate electrode control circuit 32. Electrons are emitted from the electron emission portions 15 and 15A based on the quantum tunnel effect due to an electric field generated when a voltage is applied between the cathode electrode 11 and the gate electrode 13, and the electrons are attracted to the anode electrode 24. It passes through 24 and collides with the phosphor layer 22. As a result, the phosphor layer 22 is excited to emit light, and a desired image can be obtained. That is, the operation of this display device is basically controlled by the voltage v _G applied to the gate electrode 13 and the voltage v _C applied to the cathode electrode 11.

FIG. 1 shows a schematic cross-sectional view of the spacer 40. In the first embodiment, the spacer 40 is selected from a material that can secure a dielectric breakdown voltage of, for example, 12 kV. Specifically, alumina (Al ₂ O ₃ , purity 99.8%). The spacer 40 has a length of 100 mm, a height of 3 mm, and a thickness of 50 μm. On the surface of the spacer 40, a fine particle layer 41 composed of fine particles 42 having a getter effect is formed. Specifically, the fine particles 42 are fine particles of a spherical powder manufactured by a gas atomization method, and a part of the surface of the fine particles 42 is covered with an oxide film 43 (shown as a coating film 43 in the drawing). More specifically, the fine particles 42 are made of titanium (Ti) having an average particle diameter of 0.5 μm and a purity of 99.98%. Contact electrodes 44 and 45 are provided on the top and bottom surfaces of the spacer 40. The contact electrode 44 is in contact with the anode electrode 24, and the contact electrode 45 is in contact with the focusing electrode 16, whereby the spacer 40 can be held at a predetermined potential.

  In FIG. 1, the entire surface of the fine particles 42 is illustrated as being covered with the coating 43, but actually, a part of the surface of the fine particles 42 is covered with the coating 43. In FIG. 1, the fine particle layer 41 is illustrated as if the fine particles 42 are stacked in a close-packed structure, but actually, the fine particles 42 are randomly distributed to some extent. Are stacked. Moreover, in drawings other than FIG. 1, illustration of the fine particle layer 41 grade | etc., Is abbreviate | omitted.

  Formation of the fine particle layer 41 on the surface of the spacer 40 was performed based on the plasma spraying method described below using a plasma arc apparatus whose conceptual diagram is shown in FIG.

The plasma arc apparatus includes a vacuum chamber 101 made of stainless steel, a turbo molecular pump 102 (exhaust capacity 3000 liters / second), and a dry pump 103. The ultimate vacuum in the vacuum chamber 101 is about 1 × 10 ⁻⁵ Pa. The plasma arc device is provided with a portion that causes arc discharge. Specifically, high voltage (0.8 kV) is applied from the arc discharge power supply 110 between the arc electrode cathode 108 and the arc electrode anode 109 to cause arc discharge. In order to stably maintain the arc discharge, an arc carrier gas (argon gas) is introduced between the arc electrode cathode 108 and the arc electrode anode 109 from the gas supply nozzle 111.

  On the other hand, the fine particles 42 are sealed in the fine particle / gas mixing tank 104. By introducing a raw material carrier gas made of argon gas into the fine particle / gas mixing tank 104, the fine particles 42 rise in the fine particle / gas mixing tank 104. A state in which the raw material carrier gas and the fine particles 42 are mixed is created. The mixture of the raw material carrier gas and the fine particles 42 is supplied from the fine particle supply nozzle 112 into the vacuum chamber 101. The fine particles 42 are heated to a high temperature by the arc plasma flow 113 and are transported toward the spacer 40.

  An induction coil 114 is wound around the vacuum chamber 101 for the purpose of uniformizing the arc / plasma flow over a wide area and transporting the fine particles 42 to the vicinity of the spacer 40 in a highly excited state. A high frequency (13.56 MHz) is applied from the power supply 115.

  The spacer 40 is disposed on the sample stage 105, and a heater 106 is installed so that the sample stage 105 can be heated to 800 ° C., and is controlled by the heater controller 107 so as to reach a constant temperature. About 20 spacers 40 can be placed on the sample stage 105.

  Hereinafter, a method for forming the fine particle layer 41 on the surface of the spacer 40 will be described. First, the fine particle layer 41 is formed on one surface of the spacer 40, and then the fine particle layer 41 is formed on the other surface of the spacer 40. To do. The process conditions for particulate coating are illustrated in Table 1 below.

[Table 1]

[Process-A] (Cleaning process)
First, the spacer 40 is carried into the vacuum chamber 101 and the turbo molecular pump 102 and the dry pump 103 are operated so that the vacuum chamber 101 is evacuated so that the fine particles 42 can adhere to the surface of the spacer 40 with good adhesion during plasma spraying. After that, the spacer 40 having the contact electrodes 44 and 45 provided on the top and bottom surfaces is washed in advance to remove the natural oxide film and organic contaminants on the surface of the spacer 40.

[Process-B] (plasma spraying process)
Next, a high voltage (0.8 kV) is applied from the arc discharge power source 110 to the arc electrode cathode 108 and the arc electrode anode 109 to cause arc discharge, and an arc carrier gas (argon gas) is supplied from the gas supply nozzle 111 to the arc electrode. It is introduced between the cathode 108 and the arc electrode anode 109, and a mixture of the raw material carrier gas and the fine particles 42 from the fine particle / gas mixing tank 104 is supplied into the vacuum chamber 101 from the fine particle supply nozzle 112. The fine particles 42 are heated to a high temperature by the arc plasma flow 113, transported toward the spacer 40, and are deposited on the surface of the spacer 40. By making the atmosphere of the plasma flow a hydrogen gas atmosphere, the thin natural oxide film existing on the surface of the fine particles 42 is reduced and removed. Further, the atmospheric gas prevents the fine particles 42 from being oxidized by a slight amount of oxygen. In this state, the fine particles 42 adhere to the surface of the spacer 40 with no oxide film present on the surfaces of the fine particles 42. The film formation rate is set to 0.05 nm / second. In this way, the fine particle layer 41 is formed on one surface of the spacer 40, and then the fine particle layer 41 is formed on the other surface of the spacer 40.

[Step-C] (evacuation)
Thereafter, gas such as atmospheric gas (hydrogen gas) adsorbed on the surface of the fine particles 42 is removed.

[Step-D] (Surface oxidation)
Next, an oxide film 43 is formed on the surface of the fine particles 42 by introducing oxygen gas as a process gas into the vacuum chamber 101. The oxidation rate at this time is set to about 0.1 nm / second. In this way, the surface of the fine particles 42 is inactivated by oxidizing the surface of the fine particles 42 to form the oxide film 43 on the surface of the fine particles 42. Thereby, when the fine particles 42 are exposed to the air, further progress of oxidation can be prevented.

[Step-E] (evacuation)
Thereafter, the vacuum chamber 101 is evacuated to desorb oxygen gas and hydrogen gas adsorbed on the surfaces of the fine particles 42. Next, after the temperature of the spacer 40 is lowered to about 50 ° C., the spacer 40 is unloaded from the vacuum chamber 101.

In the obtained spacer 40, the fine particle layer 41 had a thickness of 1 μm, a specific resistivity of about 10 ⁵ Ω / □, and a specific surface area measured by the BET method of about 500 m ² / gram.

  Hereinafter, a method for assembling the flat display device of Example 1 will be described.

[Step-100]
A first panel (cathode panel CP) in which a plurality of field emission elements corresponding to electron emission sources that emit electrons are formed on the support 10 and an electron emission source (Spindt type field emission element or flat type field emission element). And a second panel (anode panel AP) in which a phosphor layer 22 and an anode electrode 24 with which electrons emitted from the substrate collide are formed on the substrate 20 are prepared. A method for forming the field emission device will be described later. Further, as described above, the spacer 40 is prepared.

[Step-110]
Then, the display device is assembled. Specifically, the spacer 40 is attached to the spacer holding part 25 provided in the effective area of the anode panel AP, and the anode panel AP and the cathode panel CP are arranged so that the phosphor layer 22 and the electron emission area EA face each other. Then, the anode panel AP and the cathode panel CP (more specifically, the substrate 20 and the support body 10) are joined together at the peripheral edge via a frame body 26 made of ceramics or glass. At the time of joining, frit glass is applied to the joining portion between the frame body 26 and the anode panel AP and the joining portion between the frame body 26 and the cathode panel CP, and the anode panel AP, the cathode panel CP, and the frame body 26 are pasted. In addition, the frit glass is dried by preliminary baking, and then main baking is performed at about 450 ° C. for 10 to 30 minutes.

[Step-120]
Thereafter, the space surrounded by the anode panel AP, the cathode panel CP, the frame, and the frit glass (not shown) is exhausted through a through hole (not shown) and a tip tube (not shown), and the pressure in the space is reduced. When the ^pressure reaches about 10 ⁻⁵ Pa, the voltage shown in Table 2 is applied to the anode electrode 24, the cathode electrode 11, the gate electrode 13, and the convergence electrode 16, and the electron-emitting portions 15 constituting the field emission device, Electrons were emitted from 15A. Thus, by making the voltage applied to the anode electrode 24 lower than the voltage in a normal operation state (for example, 10 kilovolts to 12 kilovolts), the spread of the electron beam becomes larger than that during normal operation. A part of the electrons emitted from the electron emission portions 15 and 15A directly collide with the spacer 40. In this way, electrons directly collide with the spacer 40, whereby the oxide film 43 on the surface of the fine particles 42 in the fine particle layer 41 formed on the surface of the spacer 40 is gradually reduced, and the active surface of the fine particles 42 is changed. Exposed. At the same time, by controlling the voltage applied to the focusing electrode 16, electrons emitted from the electron emission portions 15 and 15A, which are electron emission sources, can collide with the fine particle layer 41 of the spacer 40 in a larger amount. . That is, the spread of the electron beam may be further increased by applying a positive voltage to the focusing electrode 16. Thus, the getter effect can be generated by activating the fine particles 42 using the electron beams emitted from the electron emission portions 15 and 15A. Therefore, an activation process such as a heat process for activating the fine particles 42 is unnecessary.

[Table 2]
Anode electrode: 0.8 kV Cathode electrode: 0 V Gate electrode: 25 V (rectangular wave with a duty of 0.3%)
Focusing electrode: 0 V (applied voltage during operation of the display device)

[Step-130]
Then, after exhausting through a through-hole (not shown) and a tip tube (not shown) through the space surrounded by the anode panel AP, the cathode panel CP, the frame and the frit glass (not shown). The tip tube is sealed by heating and melting. In this way, the space surrounded by the anode panel AP, the cathode panel CP, and the frame can be evacuated.

  Alternatively, for example, the frame, the anode panel AP, and the cathode panel CP may be bonded together in a high vacuum atmosphere. Alternatively, depending on the structure of the display device, the anode panel AP and the cathode panel CP may be bonded together by using only an adhesive layer without a frame. Thereafter, wiring connection with necessary external circuits is performed, and the display device of Example 1 is completed. It is to be noted that a getter room is separately arranged in the invalid area of the display device, and the Ba evaporation type getter is installed in the getter chamber, which is the same as the conventional display device.

  Although the getter effect is exhibited by forming the fine particle layer 41 on the surface of the spacer 40, the following actions and effects can be obtained.

  That is, micro unevenness based on the fine particle layer 41 can be formed on the surface of the spacer 40. The incident angle of electrons incident on the micro unevenness is smaller than that when no unevenness exists. Therefore, this micro unevenness reduces the value of the total secondary electron emission coefficient (TSEEY) of the spacer 40 and suppresses the occurrence of charge-up (charging) in the spacer 40 (see FIG. 13A). As shown in FIG. 28, the maximum value of the total secondary electron emission coefficient (TSEEY) is in the vicinity of the electron energy of 450 eV, and the maximum value is about when the fine particle layer 41 made of Ti is formed on the surface of the spacer 40. It has been reduced from 2.5 to 1.5. As a result, even if electrons collide with the surface of the spacer 40, charge-up is less likely to occur. Further, when the total secondary electron emission coefficient on the surface of the spacer 40 is 1 or more, the surface of the spacer 40 is positively charged, so that the electrons reflected on the surface of the spacer 40 are attracted to the surface of the spacer 40 again. , Collide and emit secondary electrons. In this way, the electrons propagate along the surface of the spacer 40 and simultaneously grow. That is, when a so-called secondary electron avalanche occurs and the secondary electron avalanche becomes prominent, creeping discharge is caused, and the withstand voltage of the spacer 40 is significantly reduced. The micro unevenness on the surface of the spacer 40 also functions to suppress the occurrence of secondary electron avalanche.

  A resistor can be formed by the aggregate of the fine particles 42. The resistance value when the fine particles 42 are layered (film-like) is determined by the contact area between the fine particles 42 and the fine particles 42, and the resistance value as a layer of the fine particles 42 is determined by the sum of the contact areas. Therefore, even if the resistance value of the fine particle 42 itself changes, the resistance value does not change unless the contact area changes. Therefore, the resistance value of the layer (thin film) due to the aggregate of the fine particles 42 is extremely stable against electron beam irradiation (collision).

The getter ability of the fine particle layer 41 formed on the surface of the spacer 40 was measured based on the method described below. For the measurement, a measuring device whose conceptual diagram is shown in FIG. 12 was used. This measuring apparatus includes a vacuum chamber 121, a turbo molecular pump 125 (exhaust capacity 3000 liters / second), and a dry pump 126, and the vacuum chamber 121 is evacuated to vacuum through a gate valve 124. The ultimate vacuum in the vacuum chamber 121 is measured by the BA vacuum gauge 127, and the ultimate vacuum in the vacuum chamber 121 is about 1 × 10 ⁻⁵ Pa. In order to suppress as much as possible the inside of the vacuum chamber 121 from being affected by the gas adsorbed on the wall surface of the vacuum chamber 121, the inside of the vacuum chamber 121 can be heated to 150 ° C. The spacer 40 is disposed on the heater 123 that also serves as a sample stage.

A capacitance manometer 128 (100 millitorr head) is also installed so that the pressure in the vacuum chamber 121 can be accurately measured regardless of the type of gas. In addition, a quadrupole mass spectrometer 129 is installed for the purpose of analyzing each gas. Furthermore, an electron beam gun 122 for irradiating the spacer 40 with an electron beam is installed. O ₂ gas, CH ₄ gas, CO gas, CO ₂ gas, and H ₂ gas can be separately introduced into the vacuum chamber 121 via a mass flow controller.

  Using such a measuring device, the getter ability of the fine particle layer 41 formed on the surface of the spacer 40 is measured.

First, the spacer 40 is placed on the heater 123 that also serves as a sample stage. Then, the vacuum chamber 121 is evacuated. The ultimate pressure of the vacuum chamber 121 is set to about 1 × 10 ⁻⁴ Pa. At the same time, the gas reservoir tank valve 134 is opened, and the gas reservoir tank 132 is also evacuated. Then, the vacuum chamber 121, the spacer 40, and the gas reservoir tank 132 are heated to exhaust the adsorbed gas such as moisture. Here, the heating temperature and heating time of the vacuum chamber 121 and the gas reservoir tank 132 were set to 150 ° C. for 5 hours, and the heating temperature and heating time of the spacer 40 were set to 300 ° C. for 5 hours. Thereafter, the vacuum chamber 121, the gas reservoir tank 132, and the spacer 40 are left until the temperature reaches substantially room temperature. The ultimate pressure of the vacuum chamber 121 in this state is about 1 × 10 ⁻⁵ Pa or less. Then, the zero point of the capacitance manometer 128 is adjusted. Further, the gas reservoir tank valve 134 is closed.

When measuring the adsorption performance for CH ₄ gas, and the gas valve 130 of CH ₄ gas in the open, it sets the mass flow controller 131 to 10 sccm, a CH ₄ gas introduced into the gas reservoir tank 132. Then, CH ₄ gas is introduced into the gas reservoir tank 132 until the pressure display of the capacitance manometer 133 for the gas reservoir tank reaches 133 Pa. After the gas reservoir tank 132 reaches this pressure, the gas valve 130 is closed. In this state, CH ₄ gas is stored in the gas storage tank 132.

Next, the electron beam gun 122 is operated in a state where the pressure in the vacuum chamber 121 is maintained at 1 × 10 ⁻⁵ Pa or less to irradiate the surface of the spacer 40 with electrons, and the fine particle layer formed on the surface of the spacer 40 The fine particles 42 are activated by causing electrons to collide with 41, thereby generating a getter effect. The electron beam irradiation conditions are exemplified in Table 3 below. Note that the electron beam energy and irradiation time are determined in advance by testing.

[Table 3]
Electron beam energy: 10 keV, 0.1 mA / cm ²
Irradiation time: 100 seconds

Thereafter, the operation of the electron beam gun 122 is stopped, and the irradiation of electrons onto the surface of the spacer 40 is stopped. Next, after evacuating for 10 minutes (vacuum degree 1 × 10 ⁻⁵ Pa), when the gate valve 124 is closed and the gas reservoir tank valve 134 is opened, the gas reservoir tank 132 is instantaneously placed in the vacuum chamber 121. CH ₄ gas is introduced and the vacuum chamber 121 reaches a certain equilibrium pressure. The state at this time is time t = 0 seconds, chamber pressure (reading value of capacitance manometer 128) = P ₀ [Pa]. The pressure in the vacuum chamber 121 decreases as the gas is adsorbed by the fine particles 42 having the getter effect with time. Assuming that the chamber pressure after the elapse of t seconds is a function P (t), the electron irradiation area to the spacer 40 is A (m ² ), and the volume of the vacuum chamber 121 is V (m ³ ), getter performance per unit area S (unit: m ³ · sec ^-1 · m ^-2 ) and getter gas amount L (unit: Pa · m ³ · m ^-2 ) per unit area can be expressed by the following equations.

S = {V / (A · t)} · ln (P ₀ / P (t))
L = V {P ₀ −P (t)} / A

During the measurement, the quadrupole mass spectrometer 129 monitors whether the vacuum chamber 121 is normally filled with the measurement gas (CH ₄ ) without impurities.

  In this way, the getter ability for other gases can also be measured.

  FIG. 13B shows an example of the relationship between the dose of the electron beam to the fine particle layer 41 and the getter ability S per unit area. From FIG. 13B, it can be seen that the fine particles 42 are sufficiently activated and a getter effect is produced with an electron beam dose of about 0.1 C / cm.

FIG. 14 shows a result of measuring the getter ability of the fine particle layer 41 formed on the surface of the spacer 40 based on the method described above. In the fine particle layer 41 composed of the Ti fine particles 42, the adsorption capacity increases in the order of O ₂ >CO> CO ₂ > N ₂ , and the adsorption capacity decreases as the adsorption amount increases. The H ₂ gas, shows a tendency that is different from the other gases.

FIG. 15 shows changes in the electron emission characteristics of the electron emitter 15 when the spacer 40 of Example 1 is incorporated in a display device including a Spindt-type field emission device in which the electron emitter 15 is made of Mo. Show. First, [Step-100] to [Step-130] are executed to change the electron emission characteristics of the electron emission portion 15 so that the space between the first panel and the second panel is 1 × 10 ⁻⁵ Pa. After evacuating, the chip tube is not sealed and a gas such as CH ₄ gas is introduced from the chip tube into the space sandwiched between the first panel and the second panel, and is sandwiched between the first panel and the second panel. The pressure in the created space is 1 × 10 ⁻³ Pa. Thereafter, the chip tube was sealed by heating and melting, and the obtained display device was actually operated to measure the luminance change. As is clear from FIG. 15, the influence of oxygen gas is particularly great, and the electron emission characteristics are significantly degraded even in the presence of a small amount of oxygen gas. The order in which the deterioration tendency is large is O ₂ >CO> CO ₂ . On the other hand, the CH ₄ gas has almost no effect, and the electron emission characteristics are activated by the H ₂ gas.

As shown in FIG. 16B, the spacer in the conventional display device (forming a Cr ₂ O ₃ film having a thickness of 10 nm on the surface) is adsorbed on the surface of the spacer when electrons collide with the surface. Gas is released. On the other hand, as shown in FIG. 16A, when electrons collide with the spacer 40 of the first embodiment, the gas released from the spacer 40 is the largest amount of H ₂ gas, but O ₂ gas or CO 2. The emission of gas, such as gas, that degrades the electron emission characteristics is decreasing. Note that the measured values shown in FIGS. 16A and 16B show the state in which the first panel (cathode panel CP) and the second panel (anode panel AP) are opposed to each other by incorporating the spacer 40 in the vacuum vessel. Obtained by applying a voltage during actual operation to the cathode electrode 11, the gate electrode 13, and the anode electrode 24, and analyzing the gas using a quadrupole mass spectrometer connected to a vacuum vessel. Value.

In the conventional technique, the electron emission characteristic deterioration of the electron emission portion due to the gas from the spacer is larger as it is closer to the spacer and becomes smaller as it is farther from the spacer. Therefore, there is a difference in the electron emission characteristics between the field emission device located near the spacer and the field emission device located away from the spacer, and this difference increases as the operation time of the display device becomes longer. (See the schematic diagram in FIG. 17B). The difference in the electron emission characteristics causes a problem that the luminance is dark in the vicinity of the spacer in the display device. In the present invention, since the fine particle layer 41 functioning as a gas adsorption layer (getter layer) exists on the surface of the spacer 40, the gas released from the spacer 40 when the electrons collide with the spacer 40 is surely reduced. A difference in electron emission characteristics hardly occurs between the field emission device located near the spacer and the field emission device located away from the spacer (see the schematic diagram of FIG. 17A). ). In particular, emission gases such as oxygen (O ₂ ) gas and carbon monoxide (CO) gas that degrade the field emission device can be significantly reduced (see FIGS. 14 and 16A). As a result, a uniform image can be provided on the entire surface, and a change in the uniformity of the image over time can be suppressed.

  The second embodiment is a modification of the first embodiment. In Example 1, the formation of the fine particle layer 41 on the surface of the spacer 40 was performed based on the plasma spraying method. On the other hand, in Example 2, it performs using the commercially available conductive ink for fine wiring.

Specifically, fine particles 42 made of titanium (Ti) having an average particle diameter of 100 nm, manufactured and purified based on a gas evaporation method, are dispersed in an organic solvent in an independent state and aggregated in the organic solvent. Use conductive ink that is not in use. In the gas evaporation method, helium gas is introduced into a vacuum atmosphere chamber, the metal is evaporated therein, cooled by collision with an inert gas, and condensed metal fine particles 42 are in an isolated state. This is a method of coating the surface of the metal fine particles 42 by introducing vapor of an organic solvent at a certain stage, and is disclosed in, for example, Japanese Patent Application Laid-Open No. 2000-219901. Then, the conductive ink is applied on the spacer 40 to a thickness of 1.5 μm by a spin coating method. In addition, examples of the application method include an ink jet method, a slit coating method, and a dispenser method. Next, the spacer 40 is placed on a hot plate at 100 ° C., and the conductive ink is dried for 3 minutes, and then carried into a vacuum baking furnace (attainable pressure: 5 × 10 ⁻⁵ Pa) at 350 ° C. The conductive ink is baked at a vacuum degree of 1 × 10 ⁻⁴ Pa for 30 minutes. Such an operation is performed on both sides of the spacer, and the fine particle layer 41 can be formed on both sides of the spacer.

  Except for the above points, the spacer, the flat display device and the assembling method thereof in the second embodiment can be substantially the same as the spacer, the flat display device and the assembling method thereof in the first embodiment. Is omitted.

  The third embodiment is also a modification of the first embodiment. In Example 3, the fine particles 42 are made of silicon (Si), and a part of the surface of the fine particles 42 is covered with a coating 43 that is an oxide film. More specifically, the fine particles 42 are made of silicon (Si) having an average particle diameter of 0.5 μm and a purity of 99.99%. Hereinafter, an outline of a method for producing such fine particles 42 will be described. The formation of the fine particle layer 41 on the surface of the spacer 40 was performed based on the same plasma spraying method as in Example 1, using the plasma arc apparatus whose conceptual diagram is shown in FIG.

  Using commercially available silicon (Si) powder having a purity of 99.99% (average particle size: 200 mesh or less), the process conditions illustrated in Table 1 were followed by [Step-A] to [Step-E] of Example 1. Based on this, a spacer was prepared. In the obtained spacer 40, the film thickness of the fine particle layer 41 was 3 μm, the average particle diameter of the fine particles was 0.5 μm, and the thickness of the oxide film covering the surface of the fine particles was about 20 nm.

  Except for the above points, the spacer, the flat display device, and the assembly method thereof according to the third embodiment can be substantially the same as the spacer, the flat display device, and the assembly method thereof according to the first embodiment. Is omitted.

  The fourth embodiment is also a modification of the first embodiment. In Example 4, the fine particles 42 are made of carbon (C), and a part of the surface of the fine particles 42 is covered with a coating 43 that is an organic film. More specifically, the fine particles 42 are made of spheroidized graphite powder having an average particle diameter of 0.5 μm and a purity of 99.99%. Hereinafter, an outline of a method for producing such fine particles 42 will be described. The formation of the fine particle layer 41 on the surface of the spacer 40 was performed based on the plasma spraying method based on the process conditions exemplified in Table 4 below using the plasma arc apparatus whose conceptual diagram is shown in FIG.

[Table 4]

[Process-A '] (Cleaning process)
First, in the same manner as in [Step-A] in the first embodiment, the natural oxide film and organic contaminants on the surface of the spacer 40 are removed.

[Step-B ′] (plasma spraying step)
Next, in the same manner as in [Step-B] in Example 1, fine particles 42 are deposited on the surface of the spacer 40.

[Step-C '] (evacuation)
Thereafter, gas such as atmospheric gas (hydrogen gas) adsorbed on the surface of the fine particles 42 is removed.

[Step-D '] (organic film coating)
Next, a film 43 made of an organic film is formed on the surfaces of the fine particles 42 by introducing C ₆ H ₆ gas as a process gas into the vacuum chamber 101. In this manner, the surface of the fine particles 42 is inactivated by coating the surfaces of the fine particles 42 with the film 43 made of an organic film. Thus, when the fine particles 42 are exposed to air, the progress of oxidation can be prevented.

[Step-E '] (evacuation)
Thereafter, the vacuum chamber 101 is evacuated to desorb oxygen gas and hydrogen gas adsorbed on the surfaces of the fine particles 42. Next, after the temperature of the spacer 40 is lowered to about 50 ° C., the spacer 40 is unloaded from the vacuum chamber 101.

  In the obtained spacer 40, the particle layer 41 had a thickness of 3 μm, the average particle size of the particles was 0.5 μm, and the thickness of the oxide film covering the surface of the particles was about 10 nm.

  Except for the above points, the spacer, the flat display device and the assembling method thereof in the fourth embodiment can be substantially the same as the spacer, the flat display device and the assembling method thereof in the first embodiment. Is omitted.

  Example 5 relates to a flat display device according to the second aspect of the present invention. In the flat display device according to the fifth embodiment, as in the flat display devices according to the first to fourth embodiments, a Spindt type field emission device or a flat type field emission device corresponding to an electron emission source that emits electrons. A first panel (cathode panel CP) in which a plurality of elements are formed on the support 10 and a phosphor layer 22 in which electrons emitted from an electron emission source (a Spindt type field emission element or a flat type field emission element) collide with each other. And a second panel (anode panel AP) in which the anode electrode 24 is formed on the substrate 20 are joined at the periphery thereof, and the first panel (cathode panel CP) and the second panel (anode panel AP) The sandwiched space is held in a vacuum. In the second panel (anode panel AP), the phosphor layer 22 is formed on the surface of the substrate 20, and the anode electrode 24 is formed on the phosphor layer 22.

However, as shown in a schematic partial end view in FIG. 18 or FIG. 19, unlike the anode panel in Examples 1 to 4, the portion of the substrate 20 on which the phosphor layer 22 is formed is perpendicular to the substrate 20. The surface shape of the phosphor layer 22 when cut along a virtual plane is substantially “V” -shaped. More specifically, the surface shape of the portion of the substrate 20 when the portion of the substrate 20 on which the phosphor layer 22 is formed is cut along a virtual plane perpendicular to the substrate 20 is substantially “V” -shaped. In Example 5, the aspect ratio (D ₀ / L ₀ ) of the substantially “V” -shaped surface shape was 0.87. That is, when the portion of the substrate 20 on which the phosphor layer 22 is formed is cut along a virtual plane perpendicular to the substrate 20, the inclination angle of the portion of the substrate 20 is 60 degrees. Here, the planar shape of the portion of the substrate 20 having a substantially “V” -shaped surface shape is circular. That is, the shape of the portion of the substrate 20 is a concave cone shape. In the example shown in FIG. 18, one section having a substantially “V” -shaped surface shape is formed in the region of the phosphor layer constituting one subpixel. On the other hand, in the example shown in FIG. 19, three sections having a substantially “V” -shaped surface shape are formed in the region of the phosphor layer constituting one subpixel. That is, the number of partitions per unit area of the phosphor layer constituting one subpixel is 25 / mm ² when the subpixel size is 200 μm × 600 μm. In the partition wall 21, the partition wall aspect ratio (H ₁ / L ₁ ), which is a value of (partition wall height H ₁ ) / (distance L ₁ between the partition walls), is 0.5, The difference in height from the top surface 22A of the phosphor layer 22 to the top surface of the partition wall 21A is 100 μm.

  FIG. 20 shows the behavior of backscattered electrons when the incident angle of the electron beam incident on the phosphor layer is 0 degrees, 30 degrees, and 60 degrees. As is clear from FIG. 20, as the incident angle (indicated by the tilt angle in FIG. 20) increases, the number of electrons scattered to the cathode panel decreases, but scatters in a direction parallel to the surface of the anode panel. Electrons increase.

  Backscattered electron distribution when the surface shape of the phosphor layer 22 is substantially “V” shape when the portion of the substrate 20 on which the phosphor layer 22 is formed is cut along a virtual plane perpendicular to the substrate 20. It shows in FIG. It is assumed that the primary electrons are incident on the surface of the substrate 20 evenly and vertically. As the tilt angle increases, the emission of backscattered electrons is suppressed. The emission of backscattered electrons is reduced by about 10% at an inclination angle of 30 degrees and by about 40% at 60 degrees. Since the opposed inclined surfaces shield the backscattered electrons from each other, the emission of backscattered electrons can be reduced.

Furthermore, the scattered electron emission ratio when the partition wall 21 is used in combination is shown in FIG. In the prior art, the partition wall aspect ratio for shielding 90% of backscattered electrons was about 5 as shown in FIG. 31, but from FIG. When the aspect ratio (D ₀ / L ₀ ) of the substantially “V” -shaped surface shape is 0.87 (inclination angle 60 degrees), the partition wall aspect ratio is reduced to about 2 as shown by the curve “C”. can do.

  In the example shown in FIG. 18 and FIG. 19, a concave conical shape is provided on the surface of the substrate 20. Such a surface shape is obtained by processing a glass substrate by photolithography and sandblasting, It can be obtained based on a method such as processing of a glass substrate by lithography, sandblasting, and wet etching.

  Further, instead of providing a concave conical shape on the surface of the substrate 20, the surface of the substrate 20 may be made flat to form a concave conical shape or the like on the surface of the phosphor layer 22. The concave conical shape on the surface of the phosphor layer 22 can be obtained, for example, by applying a glass paste based on a printing method or the like and then processing based on a combination of a photolithography technique and a sandblasting method.

  Furthermore, the anode electrode 24 may be formed in direct contact with the phosphor layer 22, or may be formed above the phosphor layer 22 with a gap. Specifically, for example, an anode panel may be manufactured based on a method disclosed in JP-A-2002-338959.

  The features of the spacer 40 described in the first to fourth embodiments and the anode panel AP described in the fifth embodiment may be combined.

[Method of manufacturing Spindt-type field emission device]
Hereinafter, a method for manufacturing a Spindt-type field emission device will be described with reference to FIGS. 23A and 23B and FIGS. 24A and 24A, which are schematic partial end views of the support 10 and the like constituting the cathode panel CP. A description will be given with reference to (B).

  This Spindt-type field emission device can be basically obtained by a method of forming the conical electron emission portion 15 by vertical vapor deposition of a metal material. That is, the vapor deposition particles are perpendicularly incident on the first opening 14A provided in the gate electrode 13, but use the shielding effect by the overhanging deposit formed near the opening end of the first opening 14A. Thus, the amount of vapor deposition particles reaching the bottom of the second opening 14B is gradually reduced, and the electron emission portion 15 that is a conical deposit is formed in a self-aligning manner. Here, a method of forming the separation layer 18 in advance over the gate electrode 13 and the insulating layer 12 in order to facilitate removal of unnecessary overhang-like deposits will be described. In the drawing for explaining the method of manufacturing the field emission device, only one electron emission portion is shown.

[Step-A0]
First, a cathode electrode conductive material layer made of, for example, polysilicon is formed on the support 10 made of, for example, a glass substrate by a plasma CVD method, and then the cathode electrode conductive material layer is formed based on a lithography technique and a dry etching technique. Is patterned to form a strip-like cathode electrode 11. Thereafter, an insulating layer 12 made of SiO _{2 is} formed on the entire surface by a CVD method.

[Step-A1]
Next, a gate electrode conductive material layer (for example, an Al layer) is formed on the insulating layer 12 by a sputtering method, and then the gate electrode conductive material layer is patterned by a lithography technique and a dry etching technique. Thus, the strip-shaped gate electrode 13 can be obtained. The strip-shaped cathode electrode 11 extends in the left-right direction in the drawing, and the strip-shaped gate electrode 13 extends in the direction perpendicular to the drawing.

  The gate electrode 13 is formed by a well-known thin film formation method such as a PVD method such as a vacuum deposition method, a CVD method, a plating method such as an electroplating method or an electroless plating method, a screen printing method, a laser ablation method, a sol-gel method, a lift-off method. If necessary, it may be formed by a combination with an etching technique. According to the screen printing method or the plating method, for example, a strip-shaped gate electrode can be directly formed.

[Step-A2]
Thereafter, a resist layer is formed again, the first opening 14A is formed in the gate electrode 13 by etching, the second opening 14B is formed in the insulating layer, and the cathode electrode 11 is formed at the bottom of the second opening 14B. After the exposure, the resist layer is removed. Thus, the structure shown in FIG. 23A can be obtained.

[Step-A3]
Next, the peeling layer 18 is formed by obliquely vacuum-depositing nickel (Ni) on the insulating layer 12 including the gate electrode 13 while rotating the support 10 (see FIG. 23B). At this time, by selecting a sufficiently large incident angle of the vapor deposition particles with respect to the normal of the support 10 (for example, an incident angle of 65 to 85 degrees), nickel is hardly deposited on the bottom of the second opening 14B. A release layer 18 can be formed on the gate electrode 13 and the insulating layer 12. The release layer 18 protrudes in a bowl shape from the opening end of the first opening 14A, whereby the diameter of the first opening 14A is substantially reduced.

[Step-A4]
Next, for example, molybdenum (Mo) is vertically deposited on the entire surface as an electrically conductive material (incident angle: 3 to 10 degrees). At this time, as shown in FIG. 24A, as the conductive material layer 19 having an overhang shape grows on the release layer 18, the substantial diameter of the first opening 14A is gradually reduced. The vapor deposition particles that contribute to the deposition at the bottom of the second opening 14B are gradually limited to those that pass near the center of the first opening 14A. As a result, a conical deposit is formed at the bottom of the second opening 14 </ b> B, and this conical deposit becomes the electron emitting portion 15.

[Step-A5]
Thereafter, as shown in FIG. 24B, the peeling layer 18 is peeled off from the surfaces of the gate electrode 13 and the insulating layer 12 by a lift-off method, and the conductive material layer 19 above the gate electrode 13 and the insulating layer 12 is selected. To remove. Next, it is preferable to recede the side wall surface of the second opening 14B provided in the insulating layer 12 by isotropic etching from the viewpoint of exposing the opening end of the gate electrode 13. The isotropic etching can be performed by dry etching using radicals as a main etching species, such as chemical dry etching, or wet etching using an etchant. As the etching solution, for example, a 1: 100 (volume ratio) mixed solution of 49% hydrofluoric acid aqueous solution and pure water can be used. Thus, a Spindt type field emission device can be obtained.

  In the case of providing the focusing electrode 16, following [Step-A1], an interlayer insulating layer 17 is further provided on the gate electrode 13 and the insulating layer 12, and the focusing electrode 16 is provided on the interlayer insulating layer 17. Good. Specifically, the convergence electrode 16 is formed by, for example, forming the strip-shaped gate electrode 13 on the insulating layer 12 in [Step-A1], forming the interlayer insulating layer 17 on the entire surface, and then forming the interlayer insulating layer. After the patterned focusing electrode 16 is formed on the gate electrode 17, a third opening is provided in the focusing electrode 16 and the interlayer insulating layer 17, and a first opening 14 A is provided in the gate electrode 13 [Step-A 2]. Just do it. Depending on the patterning of the focusing electrode, it may be a focusing electrode of a type in which one or a plurality of electron emission portions or a focusing electrode unit corresponding to one or a plurality of pixels is assembled, or an effective area. Can be a converging electrode of the type covered with a sheet of conductive material.

  As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to these Examples. The configurations and structures of the flat display device, cathode panel and anode panel, cold cathode field emission display device and cold cathode field emission device described in the embodiments are examples, and can be changed as appropriate. Also, methods for manufacturing a cathode panel, a cold cathode field emission display, and a cold cathode field emission device are examples, and can be changed as appropriate. Furthermore, various materials used in the manufacture of the anode panel and the cathode panel are also examples, and can be changed as appropriate. The display device has been described by taking color display as an example, but it may also be a single color display.

  In the field emission device, a mode in which one electron emission portion corresponds to one opening has been described. However, depending on the structure of the field emission device, a mode in which a plurality of electron emission portions correspond to one opening. Alternatively, one electron emission portion may correspond to a plurality of openings. Alternatively, a plurality of first openings are provided in the gate electrode, a plurality of second openings connected to the plurality of first openings related to the insulating layer are provided, and one or a plurality of electron emission portions are provided. You can also.

An electron emission source may be constituted by a field emission element commonly called a surface conduction type field emission element. This surface conduction type field emission device is formed on a support made of glass, for example, tin oxide (SnO ₂ ), gold (Au), indium oxide (In ₂ O ₃ ) / tin oxide (SnO ₂ ), carbon, palladium oxide ( A pair of electrodes made of a conductive material such as PdO), having a very small area, and arranged at a predetermined interval (gap) are formed in a matrix. A carbon thin film is formed on each electrode. The row direction wiring is connected to one electrode of the pair of electrodes, and the column direction wiring is connected to the other electrode of the pair of electrodes. By applying a voltage to the pair of electrodes, an electric field is applied to the carbon thin films facing each other across the gap, and electrons are emitted from the carbon thin film. By causing the electrons to collide with the phosphor layer on the anode panel, the phosphor layer is excited to emit light, and a desired image can be obtained. Alternatively, the electron emission source can be constituted by a metal / insulating film / metal type element.

FIG. 1 is a schematic cross-sectional view of a spacer according to the first embodiment. FIG. 2 is a conceptual partial end view of a cold cathode field emission display having a Spindt type cold cathode field emission device. FIG. 3 is a schematic exploded perspective view of a part of a cathode panel and an anode panel in a cold cathode field emission display. FIG. 4 is a conceptual partial end view of a cold cathode field emission display having a flat type cold cathode field emission device. FIG. 5 is a layout diagram schematically showing the layout of the barrier ribs, spacers, and phosphor layers in the anode panel constituting the cold cathode field emission display. FIG. 6 is an arrangement diagram schematically showing the arrangement of the barrier ribs, spacers and phosphor layers in the anode panel constituting the cold cathode field emission display. FIG. 7 is a layout diagram schematically showing the layout of the barrier ribs, spacers, and phosphor layers in the anode panel constituting the cold cathode field emission display. FIG. 8 is a layout diagram schematically showing the layout of the barrier ribs, spacers, and phosphor layers in the anode panel constituting the cold cathode field emission display. FIG. 9 is a layout diagram schematically showing the layout of barrier ribs, spacers, and phosphor layers in an anode panel constituting a cold cathode field emission display. FIG. 10 is a layout diagram schematically showing the layout of barrier ribs, spacers and phosphor layers in an anode panel constituting a cold cathode field emission display. FIG. 11 is a conceptual diagram of a plasma arc apparatus suitable for performing a plasma spraying method for forming a fine particle layer on the surface of a spacer in the first embodiment. FIG. 12 is a conceptual diagram of a measuring apparatus suitable for measuring the getter ability of the fine particle layer formed on the surface of the spacer. FIG. 13A shows the total secondary electron emission coefficient (TSEEY) when the micro unevenness is formed on the surface of the spacer, that is, when the fine particle layer is formed, and the total 2 when the fine particle layer is not formed. FIG. 13B is a graph showing the value of the secondary electron emission coefficient (TSEEY), and FIG. 13B is a graph showing an example of the relationship between the dose of the electron beam to the fine particle layer and the getter ability S per unit area. . FIG. 14 is a graph showing the results of measuring the getter ability of the fine particle layer formed on the surface of the spacer based on the method described in Example 1. FIG. 15 shows the electron emission characteristics of the electron emission portion when the spacer of Example 1 is incorporated in a cold cathode field emission display device including a Spindt type cold cathode field emission device in which the electron emission portion is made of Mo. It is a graph which shows a change. FIGS. 16A and 16B are graphs showing the results of measuring the amount of gas released from the spacer when electrons collide with the surface of the spacer in Example 1 and the conventional technique, respectively. 17A and 17B show the electron emission characteristics of the cold cathode field emission device located near the spacer and the cold cathode field emission device located away from the spacer, respectively. It is a figure which shows the difference which arises typically. FIG. 18 is a schematic partial end view of the second panel (anode panel) constituting the flat display device according to the fifth embodiment. FIG. 19 is a schematic partial end view of a modified example of the second panel (anode panel) constituting the flat display device according to the fifth embodiment. FIG. 20 is a diagram illustrating the behavior of backscattered electrons when the incident angle of the electron beam incident on the phosphor layer is set to 0 degrees, 30 degrees, and 60 degrees. FIG. 21 shows the backscattered electron distribution when the surface shape of the phosphor layer is substantially “V” when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate. FIG. FIG. 22 is a diagram showing the scattered electron emission ratio in Example 5 when a partition wall is used in combination. 23A and 23B are schematic partial end views of a support and the like for explaining a method for manufacturing a Spindt-type cold cathode field emission device. FIGS. 24A and 24B are schematic partial end views of a support and the like for explaining the manufacturing method of the Spindt-type cold cathode field emission device following FIG. 23B. . FIG. 25 is a diagram schematically showing the trajectory of the electron beam in the vicinity of the spacer. FIG. 26 is a diagram schematically showing the trajectory of the electron beam in the vicinity of the spacer. FIG. 27 is a diagram schematically showing the trajectory of the electron beam in the vicinity of the spacer. FIG. 28 is a graph showing the relationship between the energy of the electron beam and the total secondary electron emission coefficient (TSEEY). FIGS. 29A and 29B are graphs showing the energy distribution of electrons that collide with the spacer and the angular distribution of electrons that collide with the spacer. 30A is a graph showing the energy distribution of backscattered electrons, and FIG. 30B is a graph showing the scattering angle distribution of backscattered electrons. FIG. 31 is a graph showing the relationship between the partition wall aspect ratio and the backscattered electron emission ratio when the energy of the electrons emitted from the electron emitting portion and colliding with the phosphor layer is 9 keV.

Explanation of symbols

CP ... cathode panel, AP ... anode panel, 10 ... support, 11 ... cathode electrode, 12 ... insulating layer, 13 ... gate electrode, 14, 14A, 14B ... Opening part, 15, 15A ... Electron emission part, 16 ... Converging electrode, 17 ... Interlayer insulating layer, 18 ... Release layer, 19 ... Conductive material layer, 20 ... Substrate, 21 ..., partition walls, 22, 22R, 22G, 22B ... phosphor layer, 23 ... black matrix, 24 ... anode electrode, 25 ... spacer holding part, 26 ... frame, 31 ..Cathode electrode control circuit, 32 ... Gate electrode control circuit, 33 ... Anode electrode control circuit, 40 ... Spacer, 41 ... Particle layer, 42 ... Particle, 43 ... Oxide film (Coating), 44, 45 ... contact electrodes, 101 -Vacuum chamber, 102 ... Turbo molecular pump, 103 ... Dry pump, 104 ... Fine particle / gas mixing tank, 105 ... Sample stage, 106 ... Heater, 107 ... Heater controller, 108 ... Arc electrode cathode, 109 ... Arc electrode anode, 110 ... Arc discharge power source, 111 ... Gas supply nozzle, 112 ... Fine particle supply nozzle, 113 ... Arc plasma flow, 114 ..Inductive coil, 115... High frequency power source, 121... Vacuum chamber, 122... Electron beam gun, 123. Pump, 126 ... Dry pump, 127 ... BA vacuum gauge, 128 ... Capacitance manometer, 129 ... Quadrupole mass Device, 130 ... gas valve, 131 ... mass flow controller, 132 ... gas reservoir tank, 133 ... capacitance manometer, 134 ... gas reservoir tank valve

Claims (32)

A first panel in which a plurality of electron emission sources for emitting electrons are formed on a support; a second panel in which a phosphor layer and an anode electrode with which electrons emitted from the electron emission source collide are formed on a substrate; Are used in a flat panel display device in which a space sandwiched between the first panel and the second panel is held in a vacuum, and is disposed between the first panel and the second panel. A spacer,
A spacer, wherein a fine particle layer made of fine particles having a getter effect is formed on a surface.   The spacer according to claim 1, wherein the fine particles are made of a metal or an alloy.   The fine particles are lead (Pb), platinum (Pt), ruthenium (Ru), silver (Ag), gold (Au), titanium (Ti), indium (In), copper (Cu), chromium (Cr), iron ( Fe), zinc (Zn), tin (Sn), tantalum (Ta), tungsten (W), aluminum (Al), vanadium (V), manganese (Mn), zirconium (Zr), nickel (Ni), cobalt ( The spacer according to claim 2, wherein the spacer is made of at least one metal selected from the group consisting of Co) and molybdenum (Mo) or an alloy thereof.   4. The spacer according to claim 3, wherein a part of the surface of the fine particle is covered with an oxide film or a nitride film. The spacer according to claim 3, wherein the average particle diameter of the fine particles is 1 × 10 ⁻⁸ m to 1 × 10 ⁻⁵ m.   The spacer according to claim 1, wherein the fine particles are made of silicon (Si).   The spacer according to claim 6, wherein a part of the surface of the fine particle is covered with an oxide film or a nitride film.   The spacer according to claim 1, wherein the fine particles are made of carbon (C).   The spacer according to claim 8, wherein a part of the surface of the fine particle is covered with an organic film. The spacer according to claim 1, wherein the fine particle layer is porous and has a specific resistance of 10 ⁵ Ω / □ to 10 ¹² Ω / □. A first panel in which a plurality of electron emission sources for emitting electrons are formed on a support; a second panel in which a phosphor layer and an anode electrode with which electrons emitted from the electron emission source collide are formed on a substrate; Is a flat display device in which the space sandwiched between the first panel and the second panel is held in a vacuum, and is joined at their peripheral edges.
A flat display device, wherein a spacer having a fine particle layer made of fine particles having a getter effect formed on a surface thereof is disposed between a first panel and a second panel.   The flat display device according to claim 11, wherein the fine particles are made of a metal or an alloy.   The fine particles are lead (Pb), platinum (Pt), ruthenium (Ru), silver (Ag), gold (Au), titanium (Ti), indium (In), copper (Cu), chromium (Cr), iron ( Fe), zinc (Zn), tin (Sn), tantalum (Ta), tungsten (W), aluminum (Al), vanadium (V), manganese (Mn), zirconium (Zr), nickel (Ni), cobalt ( The flat display device according to claim 12, comprising at least one metal selected from the group consisting of Co) and molybdenum (Mo) or an alloy thereof.   14. The flat display device according to claim 13, wherein a part of the surface of the fine particles is covered with an oxide film or a nitride film. The flat display device according to claim 13, wherein the average particle diameter of the fine particles is 1 × 10 ⁻⁸ m to 1 × 10 ⁻⁵ m.   The flat display device according to claim 11, wherein the fine particles are made of silicon (Si).   The flat display device according to claim 16, wherein a part of the surface of the fine particles is covered with an oxide film or a nitride film.   The flat display device according to claim 11, wherein the fine particles are made of carbon (C).   19. The flat display device according to claim 18, wherein a part of the surface of the fine particles is covered with an organic film. The flat display device according to claim 11, wherein the fine particle layer is porous and has a specific resistance of 10 ⁵ Ω / □ to 10 ¹² Ω / □.   12. The flat display device according to claim 11, wherein the getter effect is generated by activating the fine particles by colliding electrons emitted from the electron emission source with the fine particle layer.   12. The flat panel display according to claim 11, wherein the flat panel display is a cold cathode field emission display. In the second panel, the phosphor layer is formed on the substrate surface, and the anode electrode is formed on the phosphor layer.
The surface shape of the phosphor layer when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate is substantially “V” -shaped. Flat display device.   The surface shape of the portion of the substrate when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate is substantially “V” -shaped. Flat display device.   25. The flat display device according to claim 24, wherein the aspect ratio of the substantially “V” -shaped surface shape is 0.87 or more. A first panel having a plurality of electron emission sources that emit electrons and a second panel having a phosphor layer and an anode electrode that collide with electrons emitted from the electron emission source are joined at the peripheral edge thereof. An assembly method of a flat panel display device comprising a spacer on the surface of which a fine particle layer made of fine particles having a getter effect is formed,
Spacers are arranged between the first panel and the second panel, the first panel and the second panel are joined at their peripheral edges, and the space sandwiched between the first panel and the second panel is exhausted. A method for assembling a flat panel display device, wherein after obtaining a vacuum, electrons are emitted from an electron emission source and collided with a fine particle layer of a spacer to activate fine particles, thereby producing a getter effect.   27. The method of assembling a flat display device according to claim 26, wherein the voltage applied to the anode electrode is controlled to emit electrons from the electron emission source and collide with the fine particle layer of the spacer. The electron emission source is provided with a focusing electrode that controls the trajectory of electrons emitted from the electron emission source,
27. The method of assembling a flat display device according to claim 26, wherein the flat electrode display device is caused to collide with the fine particle layer of the spacer by controlling a voltage applied to the focusing electrode. A first panel in which a plurality of electron emission sources for emitting electrons are formed on a support; a second panel in which a phosphor layer and an anode electrode with which electrons emitted from the electron emission source collide are formed on a substrate; Is a flat display device in which the space sandwiched between the first panel and the second panel is held in a vacuum, and is joined at their peripheral edges.
In the second panel, the phosphor layer is formed on the substrate surface, and the anode electrode is formed on the phosphor layer.
A flat display device, wherein a surface shape of the phosphor layer when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate is substantially “V” -shaped.   30. The surface shape of the portion of the substrate when the portion of the substrate on which the phosphor layer is formed is cut along a virtual plane perpendicular to the substrate is substantially “V” -shaped. Flat display device.   31. The flat display device according to claim 30, wherein the aspect ratio of the substantially V-shaped surface shape is 0.87 or more. 30. The flat display device according to claim 29, wherein the flat display device is a cold cathode field emission display.

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