JP2006190834A - Semiconductor package and flexible circuit board - Google Patents

Semiconductor package and flexible circuit board Download PDF

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Publication number
JP2006190834A
JP2006190834A JP2005001728A JP2005001728A JP2006190834A JP 2006190834 A JP2006190834 A JP 2006190834A JP 2005001728 A JP2005001728 A JP 2005001728A JP 2005001728 A JP2005001728 A JP 2005001728A JP 2006190834 A JP2006190834 A JP 2006190834A
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rectangular parallelepiped
reinforcing member
circuit board
fpc
semiconductor chip
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JP4556671B2 (en
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Katsushi Ono
勝史 大野
Yasushi Kaiume
靖 貝梅
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of manufacturing working hours by forming a BGA easily when forming the BGA by combining an FPC with a chip part, such as a semiconductor chip and a silicon substrate. <P>SOLUTION: The FPC 25 is formed by sticking a planar reinforcing member 33 to the back of lead sections at both the sides of the FPC 25, and by sticking a center reinforcing member 35 to the back of a pad 34 for packaging a silicon substrate at the center of the FPC 25. The FPC 25 is bent individually and is machined in the shape of a rectangular parallelepiped, a chip part, such as the semiconductor chip 23 and the silicon substrate 21, is packaged on the FPC 25 to form a BGA type semiconductor package 20. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、FPC(フレキシブルサーキット基板)を半導体チップに組み合わせて形成したBGA(Ball Grid Array)型の半導体パッケージに関し、例えば携帯端末機、パソコン、カメラ等のディジタル機器に搭載される半導体パッケージ及びフレキシブルサーキット基板に関する。   The present invention relates to a BGA (Ball Grid Array) type semiconductor package formed by combining an FPC (flexible circuit board) with a semiconductor chip, for example, a semiconductor package mounted on a digital device such as a portable terminal, a personal computer, and a camera, and a flexible package. The circuit board.

FPCは、柔軟性のある回路基板であり、薄く、軽く、自由に曲がるという特性を有することから、エレクトロニクス機器のデザインの多様化、形状の複雑化に対応すると共に、設計時の自由度を高める材料として多用されている。このFPCを、ベアチップや小型パッケージ(CSP)等の半導体チップに組み合わせてBGAの半導体パッケージを構成する技術として、特許文献1に記載のものがある。   FPC is a flexible circuit board and has the characteristics of being thin, light, and freely bent. Therefore, it can cope with the diversification of design and the complexity of the shape of electronic equipment and increase the degree of freedom in designing. Widely used as a material. Japanese Patent Application Laid-Open No. H10-228707 discloses a technique for configuring a BGA semiconductor package by combining this FPC with a semiconductor chip such as a bare chip or a small package (CSP).

この特許文献1の半導体パッケージは、図5に示すように、上面に複数のチップのパッド3aが設けられた半導体チップ1と、この半導体チップ1の少なくとも上面、1側面及び下面の一部を覆い半導体チップ1の少なくとも下面に接着され、半導体チップ1の稜に沿って折り曲げられ、半導体チップ1の上面を覆う部分に上記のパッド3aに電気的に接続された上面のパッド3bが設けられ、半導体チップ1の下面を覆う部分の外側の面に上面のパッド3bに電気的に接続された下面のパッド3cが設けられたFPC2と、下面のパッド3c上に設けられた下面の半田ボール6とを備えて構成されている。但し、7は接着シート、9は樹脂封止用穴、11は封止用樹脂である。   As shown in FIG. 5, the semiconductor package of Patent Document 1 covers a semiconductor chip 1 having a plurality of chip pads 3 a on the upper surface, and at least the upper surface, one side surface, and a part of the lower surface of the semiconductor chip 1. A pad 3b on the upper surface, which is bonded to at least the lower surface of the semiconductor chip 1 and bent along the edge of the semiconductor chip 1 and covers the upper surface of the semiconductor chip 1, is electrically connected to the pad 3a. The FPC 2 provided with the lower surface pad 3c electrically connected to the upper surface pad 3b on the outer surface of the portion covering the lower surface of the chip 1, and the lower surface solder ball 6 provided on the lower surface pad 3c. It is prepared for. However, 7 is an adhesive sheet, 9 is a resin sealing hole, and 11 is a sealing resin.

この半導体パッケージを形成する場合、図6に示すように、半導体チップ1の上面のパッド3aにバンプ4を設け、このバンプ4の表面を導電性物質5で覆う。半導体チップ1の上面にFPC2の中央部を位置合わせして載せ、両者を押し付け加熱してバンプ4にFPC2のパッド3bを接続し、FPC2を溝10で折り曲げて半導体チップ1の上面、側面及び下面をFPC2で覆い、接着シート7で接着する。
特許2570628号公報
When forming this semiconductor package, as shown in FIG. 6, bumps 4 are provided on the pads 3 a on the upper surface of the semiconductor chip 1, and the surfaces of the bumps 4 are covered with a conductive material 5. The center portion of the FPC 2 is aligned and placed on the upper surface of the semiconductor chip 1, both are pressed and heated to connect the pads 3 b of the FPC 2 to the bumps 4, and the FPC 2 is bent at the groove 10 to Is covered with an FPC 2 and bonded with an adhesive sheet 7.
Japanese Patent No. 2570628

上記のように特許文献1の半導体パッケージにおいては、FPC2を半導体チップ1の外形に沿って、電気的な接続が必要な部分は電気的に接続しながら外面に密着して包み込んで裏側に折り曲げていた。
しかし、この構造では、図7に示すように、半導体チップ1の上にこれよりも小さい第2の半導体チップ12が載置されて2層(又は2層以上)に積層されると、FPC2と半導体チップ1との重なり合う部分の距離Lが小さくなり、また接続後に折り曲げ加工を行うため、FPC2を折り曲げる作業が難しいという問題がある。
As described above, in the semiconductor package of Patent Document 1, the FPC 2 is wrapped along the outer shape of the semiconductor chip 1 so that the portion that needs to be electrically connected is closely connected to the outer surface while being electrically connected, and is folded back. It was.
However, in this structure, as shown in FIG. 7, when the second semiconductor chip 12 smaller than this is placed on the semiconductor chip 1 and stacked in two layers (or two or more layers), the FPC 2 The distance L of the overlapping portion with the semiconductor chip 1 is reduced, and the bending process is performed after the connection, and therefore there is a problem that the operation of bending the FPC 2 is difficult.

この他、ベースとなる半導体チップ1に代え、ベースにシリコン基板等のチップ部品を用い、これよりも小さい半導体チップを載置して積層し、この積層型半導体チップを上記同様にFPCに組み合わせる場合でも、同様の問題が生じる。
本発明は、このような課題に鑑みてなされたものであり、半導体チップ又はシリコン基板等のチップ部品上にこれと外形の異なる半導体チップが2層以上に積層されて外面に段差を有する積層型半導体部品に、FPCを組み合わせてBGAを形成する際に、容易に形成可能とした半導体パッケージ及びフレキシブルサーキット基板を提供することを目的としている。
In addition, in place of the semiconductor chip 1 serving as the base, a chip component such as a silicon substrate is used for the base, a smaller semiconductor chip is placed and stacked, and the stacked semiconductor chip is combined with the FPC in the same manner as described above. But similar problems arise.
The present invention has been made in view of such problems, and is a stacked type in which two or more semiconductor chips having different external shapes are stacked on a chip component such as a semiconductor chip or a silicon substrate and a step is formed on the outer surface. An object of the present invention is to provide a semiconductor package and a flexible circuit board that can be easily formed when a BGA is formed by combining FPC with a semiconductor component.

上記目的を達成するために、本発明の請求項1による半導体パッケージは、電気回路が形成されたシリコン基板あるいは第1の半導体チップ等の第1の部材を、フレキシブルサーキット基板に実装した半導体パッケージにおいて、前記フレキシブルサーキット基板は、中央部分に枠形状あるいは離隔平行状に配置した棒形状の第1の補強部材が接着され、端部が折り曲げられて前記第1の補強部材の前記接着面とは反対側の面に接着されることにより直方体形状に構成され、前記直方体の上面に設けた実装用パッドと前記第1の部材に設けられたパッドとが接続されるように前記直方体の上面に前記第1の部材が取り付けられ、前記直方体の下面に半田ボールが設けられることを特徴とする。   In order to achieve the above object, a semiconductor package according to claim 1 of the present invention is a semiconductor package in which a first member such as a silicon substrate or a first semiconductor chip on which an electric circuit is formed is mounted on a flexible circuit substrate. In the flexible circuit board, a rod-shaped first reinforcing member arranged in a frame shape or spaced apart in parallel is bonded to the central portion, and an end portion is bent to be opposite to the bonding surface of the first reinforcing member. A rectangular parallelepiped shape is formed by adhering to the side surface, and the mounting pad provided on the top surface of the rectangular parallelepiped and the pad provided on the first member are connected to the top surface of the rectangular parallelepiped. 1 member is attached, and solder balls are provided on the lower surface of the rectangular parallelepiped.

この構成によれば、フレキシブルサーキット基板に第1の補強部材を接着したので、このフレキシブルサーキット基板を単独で、表面が露出するように、第1の補強部材が内部に位置するように折り曲げ、直方体形状に加工しておき、この加工された基板にシリコン基板あるいは第1の半導体チップ等を実装することによりBGA型の半導体パッケージを形成することが容易に可能となる。また、第1の補強部材の上方でシリコン基板あるいは第1の半導体チップ等を固定するようにすれば、シリコン基板あるいは第1の半導体チップ等を強固に固定することができる。   According to this configuration, since the first reinforcing member is bonded to the flexible circuit board, the flexible circuit board is bent so that the surface of the flexible circuit board is exposed so that the first reinforcing member is positioned inside, and a rectangular parallelepiped. It is possible to easily form a BGA type semiconductor package by processing into a shape and mounting the silicon substrate or the first semiconductor chip on the processed substrate. Further, if the silicon substrate or the first semiconductor chip or the like is fixed above the first reinforcing member, the silicon substrate or the first semiconductor chip or the like can be firmly fixed.

また、本発明の請求項2による半導体パッケージは、電気回路が形成されたシリコン基板あるいは第1の半導体チップ等の第1の部材上に第2の半導体チップを積層した積層型半導体部品を、フレキシブルサーキット基板に実装した半導体パッケージにおいて、前記フレキシブルサーキット基板は、中央部分に開口部を有し、該開口部の周囲に枠形状あるいは離隔平行状に配置した棒形状の第1の補強部材が接着され、端部が折り曲げられて前記第1の補強部材の前記接着面とは反対側の面に接着されることにより直方体形状に構成され、前記第2の半導体チップが前記開口部を通って前記直方体の内部に位置し、前記直方体の上面に設けた実装用パッドと前記第1の部材に設けられたパッドとが接続されるように前記直方体の上面に前記第1の部材が取り付けられ、前記直方体の下面に半田ボールが設けられることを特徴とする。
この構成によれば、さらに、実装の際、積層型半導体部品の第2の半導体チップが、第1の補強部材の枠内または平行な棒状の間に縦横高さとも収まるようろこすることが可能なので、実装が容易になる。
According to a second aspect of the present invention, there is provided a semiconductor package in which a laminated semiconductor component in which a second semiconductor chip is laminated on a first member such as a silicon substrate on which an electric circuit is formed or a first semiconductor chip is flexible. In the semiconductor package mounted on the circuit board, the flexible circuit board has an opening at the center, and a rod-shaped first reinforcing member arranged in a frame shape or spaced apart parallel to the periphery of the opening is bonded. The end portion is bent and bonded to the surface of the first reinforcing member opposite to the bonding surface to form a rectangular parallelepiped shape, and the second semiconductor chip passes through the opening to form the rectangular parallelepiped. The mounting pad provided on the top surface of the rectangular parallelepiped and the pad provided on the first member are connected to the top surface of the rectangular parallelepiped. Attached member, characterized in that solder balls are provided on the lower surface of the rectangular parallelepiped.
According to this configuration, when mounting, the second semiconductor chip of the stacked semiconductor component can be strained so as to fit within the frame of the first reinforcing member or between the vertical and horizontal heights. So it is easy to implement.

また、本発明の請求項3による半導体パッケージは、請求項1または2において、前記フレキシブルサーキット基板は、前記半田ボールが設けられた部分の内部側に板状の第2の補強部材が接着されてなることを特徴とする。
この構成によれば、半田ボールが設けられた部分の内部側に板状の第2の補強部材を接着したので、多数のボールが溶着されるプリント基板への実装面を、容易かつ正確に平坦とすることができる。
According to a third aspect of the present invention, there is provided the semiconductor package according to the first or second aspect, wherein the flexible circuit board has a plate-like second reinforcing member bonded to the inner side of the portion where the solder balls are provided. It is characterized by becoming.
According to this configuration, since the plate-like second reinforcing member is adhered to the inner side of the portion where the solder balls are provided, the mounting surface on the printed circuit board on which a large number of balls are welded can be easily and accurately flattened. It can be.

また、本発明の請求項4によるフレキシブルサーキット基板は、電気回路が形成されたシリコン基板あるいは第1の半導体チップ等の第1の部材を実装するフレキシブルサーキット基板において、中央部分に枠形状あるいは離隔平行状に配置した棒形状の第1の補強部材が接着され、端部が折り曲げられて前記第1の補強部材の前記接着面とは反対側の面に接着されることにより直方体形状に構成されることを特徴とする。
この構成によれば、BGA型の半導体パッケージを形成する場合、まず、フレキシブルサーキット基板を単独で折り曲げて、表面が露出するに、第1の補強部材に接着することにより、直方体形状に加工しておく。そして、その加工された基板にシリコン基板あるいは第1の半導体チップを実装することにより、BGA型の半導体パッケージを形成することが可能になる。
The flexible circuit board according to claim 4 of the present invention is a flexible circuit board on which a first member such as a silicon substrate on which an electric circuit is formed or a first semiconductor chip is mounted. A rod-shaped first reinforcing member arranged in a shape is bonded, and an end portion is bent and bonded to a surface opposite to the bonding surface of the first reinforcing member, thereby forming a rectangular parallelepiped shape. It is characterized by that.
According to this configuration, when forming a BGA type semiconductor package, first, the flexible circuit board is bent alone, and the surface is exposed, and then bonded to the first reinforcing member to be processed into a rectangular parallelepiped shape. deep. A BGA type semiconductor package can be formed by mounting the silicon substrate or the first semiconductor chip on the processed substrate.

また、本発明の請求項5によるフレキシブルサーキット基板は、請求項4において、前記第1の部材が実装された際に、第1の部材上に実装された第2の半導体チップが前記直方体の内部に位置するように、前記中央部分に開口部が設けられ、前記第1の補強部材は、前記開口部の周囲に接着されることを特徴とする。
この構成によれば、実装の際、積層型半導体部品の第2の半導体チップが、第1の補強部材の枠内または平行な棒状の間に縦横高さとも収まるようにすることが可能なので、実装が容易になる。
A flexible circuit board according to claim 5 of the present invention is the flexible circuit board according to claim 4, wherein when the first member is mounted, the second semiconductor chip mounted on the first member is inside the rectangular parallelepiped. An opening is provided in the central portion so that the first reinforcing member is bonded to the periphery of the opening.
According to this configuration, at the time of mounting, the second semiconductor chip of the stacked semiconductor component can be accommodated in the vertical and horizontal heights within the frame of the first reinforcing member or between the parallel bar shapes. Easy to implement.

また、本発明の請求項6によるフレキシブルサーキット基板は、請求項4または5において、前記直方体の下面の内部側に板状の第2の補強部材が接着されてなることを特徴とする。
この構成によれば、本フレキシブルサーキット基板をBGA型の半導体パッケージ形成に用いる場合、直方体の下面の内部側に板状の第2の補強部材を接着したので、多数のボールが溶着されるプリント基板への実装面を、容易かつ正確に平坦にすることができるので、これによって、半導体パッケージをプリント基板に適正に実装することができる。
A flexible circuit board according to claim 6 of the present invention is characterized in that, in claim 4 or 5, a plate-like second reinforcing member is bonded to the inner side of the lower surface of the rectangular parallelepiped.
According to this configuration, when the flexible circuit board is used for forming a BGA type semiconductor package, the plate-like second reinforcing member is bonded to the inner side of the lower surface of the rectangular parallelepiped, so that a printed board on which a large number of balls are welded. Since the mounting surface can be easily and accurately flattened, the semiconductor package can be appropriately mounted on the printed board.

以上説明したように本発明によれば、FPCを直方体形状に加工するようにしたので、FPCを組み合わせてBGAを形成することが容易になる。また、半導体チップ又はシリコン基板等のチップ部品上にこれと外形の異なる半導体チップが2層以上に積層されて外面に段差を有する積層型半導体部品に、FPCを組み合わせてBGAを形成する際に、容易に形成可能として製造工数を低くすることができるという効果がある。   As described above, according to the present invention, since the FPC is processed into a rectangular parallelepiped shape, it becomes easy to form a BGA by combining the FPC. Further, when a BGA is formed by combining an FPC with a laminated semiconductor component in which two or more semiconductor chips having different external shapes are laminated on a chip component such as a semiconductor chip or a silicon substrate and having a step on the outer surface, There is an effect that the number of manufacturing steps can be reduced because it can be easily formed.

以下、本発明の実施の形態を、図面を参照して説明する。
図1は、本発明の実施の形態に係る半導体パッケージの構成を示す断面図である。
図1に示す半導体パッケージ20は、BGA形状を成し、所定の配線回路が形成されたシリコン基板21と、このシリコン基板21の配線回路にバンプ22、パッド22a,22bを介したフリップチップ接続により実装された半導体チップ23と、後述で説明するように折り曲げられ、シリコン基板21の配線回路にバンプ24、シリコン基板実装用パッド34及び半導体チップ実装用パッド37を介したフリップチップ接続によって接続されたFPC25とを備えて構成されている。但し、半導体チップ23は、半田ボールを持ったパッケージ又は半田ボールの無いむき出しのベアチップそのもの等である。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor package according to an embodiment of the present invention.
A semiconductor package 20 shown in FIG. 1 has a BGA shape, a silicon substrate 21 on which a predetermined wiring circuit is formed, and a flip-chip connection to the wiring circuit of the silicon substrate 21 via bumps 22 and pads 22a and 22b. The mounted semiconductor chip 23 is bent as described later, and connected to the wiring circuit of the silicon substrate 21 by flip chip connection via the bump 24, the silicon substrate mounting pad 34, and the semiconductor chip mounting pad 37. And an FPC 25. However, the semiconductor chip 23 is a package having a solder ball or an exposed bare chip itself without a solder ball.

FPC25は、図2(a)のFPC表面図及び(b)の裏面図に示すように、中央部分に積層される半導体チップが通過できる大きさの開口部38が設けられた長方形の柔軟なシート状を成し、この長方形両側の所定幅領域に多数の半田ボール実装用パッド31を形成したリード部32の裏面に、当該リード部32と略同じ長方形の板状補強部材33を貼り付け、また、FPC25の開口部38の周囲に形成されたシリコン基板実装用パッド34の裏面に、四角枠形状の中央補強部材35を貼り付けて構成されている。   The FPC 25 is a rectangular flexible sheet provided with an opening 38 having a size through which a semiconductor chip stacked at the center can pass, as shown in the FPC front view in FIG. 2A and the back view in FIG. 2B. A plate-like reinforcing member 33 having the same rectangular shape as the lead portion 32 is attached to the back surface of the lead portion 32 in which a large number of solder ball mounting pads 31 are formed in a predetermined width region on both sides of the rectangle. A square frame-shaped central reinforcing member 35 is attached to the back surface of the silicon substrate mounting pad 34 formed around the opening 38 of the FPC 25.

但し、板状補強部材33及び中央補強部材35は、丈夫な絶縁材料を用いたものである。また、中央補強部材35の高さは、ベースとなるシリコン基板21に実装される半導体チップ23の高さよりも高いサイズとする。
なお、半田ボール実装用パッド31とシリコン基板実装用パッド34は、所定の配線回路によりそれぞれ接続されている。
However, the plate-like reinforcing member 33 and the central reinforcing member 35 are made of a strong insulating material. Further, the height of the central reinforcing member 35 is set to be higher than the height of the semiconductor chip 23 mounted on the silicon substrate 21 serving as a base.
The solder ball mounting pad 31 and the silicon substrate mounting pad 34 are connected to each other by a predetermined wiring circuit.

このような構成のFPC25を、電気的に接続されて積層されるシリコン基板21及び半導体チップ23に組み合わせてBGA型の半導体パッケージ20を製造する工程を説明する。
まず、図2(a)に示すように、FPC25の表面が露出する状態で、柔軟なシート状部分を中央補強部材35の角々で折り曲げ、更に、図1に示すように、中央補強部材35の下方に両側の板状補強部材33が平坦に配置されるように折り曲げて中央補強部材35と板状補強部材33とを接着剤にて固定し、FPCを直方体形状に加工する。
A process of manufacturing the BGA type semiconductor package 20 by combining the FPC 25 having such a configuration with the silicon substrate 21 and the semiconductor chip 23 that are electrically connected and stacked will be described.
First, as shown in FIG. 2A, with the surface of the FPC 25 exposed, the flexible sheet-like portion is bent at the corners of the central reinforcing member 35. Further, as shown in FIG. The center reinforcing member 35 and the plate-like reinforcing member 33 are fixed with an adhesive so that the plate-like reinforcing members 33 on both sides are arranged flat below, and the FPC is processed into a rectangular parallelepiped shape.

これによって、両側の板状補強部材33が平坦に配置された状態で固定されるので、シリコン基板実装用パッド34に多数の半田ボール36を溶着させた際に、多数の半田ボール36も平坦状に配置される状態となる。
次に、シリコン基板21にフリップチップ接続により半導体チップ23を実装した積層型半導体部品を、当該半導体チップ23が開口部38を通って直方体の内部に入るように合わせてFPC25に載置し、パッド34,37とバンプ24とによりフリップチップ接続することによって実装する。これによって、BGA型の半導体パッケージ20が完成する。
As a result, since the plate-like reinforcing members 33 on both sides are fixed in a flat state, when the large number of solder balls 36 are welded to the silicon substrate mounting pad 34, the large number of solder balls 36 are also flat. It will be in the state where it is arranged.
Next, the laminated semiconductor component in which the semiconductor chip 23 is mounted on the silicon substrate 21 by flip chip connection is placed on the FPC 25 so that the semiconductor chip 23 enters the inside of the rectangular parallelepiped through the opening 38, and the pad Mounting is performed by flip-chip connection between the pins 34 and 37 and the bumps 24. As a result, the BGA type semiconductor package 20 is completed.

以上説明したように本実施の形態の半導体パッケージ20によれば、FPC25を、当該FPC25の両側リード部32の裏面に板状補強部材33を貼り付け、また、FPC25の開口部38の周囲に設けられたシリコン基板実装用パッド34の裏面に中央補強部材35を貼り付けて形成する。その板状補強部材33と中央補強部材35の貼り付けはシート部材に接着剤によって貼り付けるだけなので、容易に行うことができる。   As described above, according to the semiconductor package 20 of the present embodiment, the FPC 25 is attached to the back surface of the side lead portions 32 of the FPC 25 with the plate-like reinforcing member 33 and provided around the opening 38 of the FPC 25. A central reinforcing member 35 is attached to the back surface of the silicon substrate mounting pad 34 thus formed. Since the plate-like reinforcing member 33 and the central reinforcing member 35 are simply attached to the sheet member with an adhesive, it can be easily performed.

このFPC25を、シリコン基板21に半導体チップ23を実装した積層型半導体部品とは別に単独で折り曲げて直方体形状に加工しておき、このFPC25に積層型半導体部品を組み合わせてフリップチップによって実装することによりBGA型の半導体パッケージ20を形成するようにした。
FPC25と積層型半導体部品との組合せの際、積層型半導体部品の2層目の半導体チップ23は、FPC25の中央補強部材35の枠内に縦横高さ方向とも収まるので、組合せが容易となる。これによって、形成が容易なFPC25に、積層型半導体部品を容易に組み合わせて実装可能としたので、容易にBGA型の半導体パッケージ20を形成することができる。
The FPC 25 is separately bent and processed into a rectangular parallelepiped shape separately from the laminated semiconductor component in which the semiconductor chip 23 is mounted on the silicon substrate 21, and the FPC 25 is combined with the laminated semiconductor component and mounted by flip chip. A BGA type semiconductor package 20 was formed.
When the FPC 25 and the stacked semiconductor component are combined, the second-layer semiconductor chip 23 of the stacked semiconductor component is accommodated in the vertical and horizontal height directions within the frame of the central reinforcing member 35 of the FPC 25, so that the combination becomes easy. As a result, the FPC 25 that can be easily formed can be easily combined with the stacked semiconductor components and mounted, so that the BGA type semiconductor package 20 can be easily formed.

従って、シリコン基板21又は半導体チップ等のチップ部品上にこれと外形の異なる半導体チップ23が2層以上に積層されて外面に段差を有する積層型半導体部品に、FPC25を組み合わせてBGA型の半導体パッケージ20を形成する際に、容易に形成することが可能なので、製造工数を低くすることができる。
また、中央補強部材35の上方にシリコン基板21が固定されるので、積層型半導体部品を強固に固定することができる。
Accordingly, a BGA type semiconductor package in which two or more layers of semiconductor chips 23 having different external shapes are stacked on a chip component such as a silicon substrate 21 or a semiconductor chip and the FPC 25 is combined with a stacked semiconductor component having a step on the outer surface. Since 20 can be easily formed, the number of manufacturing steps can be reduced.
Moreover, since the silicon substrate 21 is fixed above the central reinforcing member 35, the stacked semiconductor component can be firmly fixed.

また、両側のリード部32の裏面に板状補強部材33を貼り付けたので、リード部32の多数の半田ボール36が溶着される図示せぬプリント基板への実装面を容易且つ正確に平坦とできる。これによって、半導体パッケージ20をプリント基板に適正に実装することができる。
また、中央補強部材35は、図2ではシリコン基板実装用パッド34が開口部38の周囲全てに形成されているので、四角枠状のものを用いた。しかし、図3に示すように、シリコン基板実装用パッド41が、例えば開口部38の2辺にのみ設けられている場合、当該2辺の裏面に角棒状の中央補強部材42を用いる。この構成のFPC43を用いても上記FPC25と同様の効果を得ることができる。
Further, since the plate-like reinforcing members 33 are attached to the back surfaces of the lead portions 32 on both sides, the mounting surface of the lead portion 32 on the printed circuit board (not shown) on which the numerous solder balls 36 are welded can be easily and accurately flattened. it can. Thereby, the semiconductor package 20 can be appropriately mounted on the printed circuit board.
Further, the center reinforcing member 35 has a rectangular frame shape because the silicon substrate mounting pad 34 is formed all around the opening 38 in FIG. However, as shown in FIG. 3, when the silicon substrate mounting pads 41 are provided only on two sides of the opening 38, for example, square bar-shaped central reinforcing members 42 are used on the back surfaces of the two sides. Even if the FPC 43 having this configuration is used, the same effects as those of the FPC 25 can be obtained.

また、上記実施の形態では、シリコン基板21に2層目部品として1つの半導体チップ23が実装されるケースを例に挙げたが、シリコン基板21に2層目部品として複数の半導体チップが実装されている場合でも、中央補強部材35の枠を、それら半導体チップが全て収まるサイズとすれば、上記同様の効果を得ることができる。
また、以上の実施の形態では、FPCは両端のみを折り曲げて直方体形状に加工する例を示したが、特許2570628号に記載されているように、図4に示す通り4方向から折り曲げて直方体形状に加工しても良いことは勿論である。図4(a)はFPCの構成を示しており、中央部分に設けられた開口部38の4辺方向にリード部32が設けられている。これらの4つのリード部32を折り曲げることにより、図4(b)の加工後の上面図に示すように直方体形状に加工されたFPCを構成することができる。
In the above embodiment, the case where one semiconductor chip 23 is mounted on the silicon substrate 21 as the second layer component is taken as an example. However, a plurality of semiconductor chips are mounted on the silicon substrate 21 as the second layer component. Even in this case, if the frame of the central reinforcing member 35 has a size that can accommodate all the semiconductor chips, the same effect as described above can be obtained.
In the above embodiment, the FPC has been shown in an example in which only both ends are bent into a rectangular parallelepiped shape. However, as described in Japanese Patent No. 2570628, the rectangular parallelepiped shape is bent from four directions as shown in FIG. Of course, it may be processed into. FIG. 4A shows the configuration of the FPC, in which lead portions 32 are provided in the directions of the four sides of the opening 38 provided in the central portion. By bending these four lead portions 32, an FPC processed into a rectangular parallelepiped shape can be configured as shown in the top view after processing in FIG. 4B.

更には、FPC25又は43において、両側のリード部32に板状補強部材33が無く、中央補強部材35又は42のみが貼り付けられた構造のものであってもよい。この場合、半導体パッケージをプリント基板に実装する際に、リード部32を平坦に保持しながら実装する手間が上記構成に比べると掛かるが、この他の効果は同様に得ることができる。   Further, the FPC 25 or 43 may have a structure in which the plate-like reinforcing member 33 is not provided on the lead portions 32 on both sides, and only the central reinforcing member 35 or 42 is attached. In this case, when mounting the semiconductor package on the printed circuit board, it takes time to mount the lead portion 32 while holding it flat compared to the above configuration, but other effects can be similarly obtained.

本発明の実施の形態に係る半導体パッケージの構成を示す断面図である。It is sectional drawing which shows the structure of the semiconductor package which concerns on embodiment of this invention. 上記実施の形態に係るFPCの構成を示し、(a)は表面図、(b)は裏面図である。The structure of FPC which concerns on the said embodiment is shown, (a) is a front view, (b) is a back view. 上記実施の形態に係る他のFPCの構成を示し、(a)は表面図、(b)は裏面図である。The structure of the other FPC which concerns on the said embodiment is shown, (a) is a front view, (b) is a back view. 本発明の他の実施の形態に係るFPCの構成を示し、(a)はFPCの表面図、(b)は加工後の上面図である。The structure of FPC which concerns on other embodiment of this invention is shown, (a) is the surface view of FPC, (b) is the top view after a process. 従来の半導体パッケージの構成を示す断面図である。It is sectional drawing which shows the structure of the conventional semiconductor package. 従来の半導体パッケージ形成時の説明図である。It is explanatory drawing at the time of conventional semiconductor package formation. 従来の半導体パッケージの問題点を説明するための図である。It is a figure for demonstrating the problem of the conventional semiconductor package.

符号の説明Explanation of symbols

20 半導体パッケージ
21 シリコン基板
22 バンプ
23 半導体チップ
24 バンプ
25,43 FPC
31 半田ボール実装用パッド
32 リード部
33 板状補強部材
34,41 シリコン基板実装用パッド
35,42 中央補強部材
38 開口部
20 Semiconductor Package 21 Silicon Substrate 22 Bump 23 Semiconductor Chip 24 Bump 25, 43 FPC
31 Solder ball mounting pad 32 Lead portion 33 Plate-like reinforcing member 34, 41 Silicon substrate mounting pad 35, 42 Center reinforcing member 38 Opening

Claims (6)

電気回路が形成されたシリコン基板あるいは第1の半導体チップ等の第1の部材を、フレキシブルサーキット基板に実装した半導体パッケージにおいて、
前記フレキシブルサーキット基板は、中央部分に枠形状あるいは離隔平行状に配置した棒形状の第1の補強部材が接着され、端部が折り曲げられて前記第1の補強部材の前記接着面とは反対側の面に接着されることにより直方体形状に構成され、
前記直方体の上面に設けた実装用パッドと前記第1の部材に設けられたパッドとが接続されるように前記直方体の上面に前記第1の部材が取り付けられ、前記直方体の下面に半田ボールが設けられる
ことを特徴とする半導体パッケージ。
In a semiconductor package in which a first member such as a silicon substrate on which an electric circuit is formed or a first semiconductor chip is mounted on a flexible circuit board,
The flexible circuit board has a rod-shaped first reinforcing member arranged in a frame shape or spaced apart in parallel at the center portion, and an end portion thereof is bent to be opposite to the bonding surface of the first reinforcing member. It is configured in a rectangular parallelepiped shape by being bonded to the surface of
The first member is attached to the upper surface of the rectangular parallelepiped so that the mounting pad provided on the upper surface of the rectangular parallelepiped and the pad provided on the first member are connected, and solder balls are provided on the lower surface of the rectangular parallelepiped. A semiconductor package characterized by being provided.
電気回路が形成されたシリコン基板あるいは第1の半導体チップ等の第1の部材上に第2の半導体チップを積層した積層型半導体部品を、フレキシブルサーキット基板に実装した半導体パッケージにおいて、
前記フレキシブルサーキット基板は、中央部分に開口部を有し、該開口部の周囲に枠形状あるいは離隔平行状に配置した棒形状の第1の補強部材が接着され、端部が折り曲げられて前記第1の補強部材の前記接着面とは反対側の面に接着されることにより直方体形状に構成され、
前記第2の半導体チップが前記開口部を通って前記直方体の内部に位置し、前記直方体の上面に設けた実装用パッドと前記第1の部材に設けられたパッドとが接続されるように前記直方体の上面に前記第1の部材が取り付けられ、前記直方体の下面に半田ボールが設けられる
ことを特徴とする半導体パッケージ。
In a semiconductor package in which a laminated semiconductor component in which a second semiconductor chip is laminated on a silicon substrate on which an electric circuit is formed or a first member such as a first semiconductor chip is mounted on a flexible circuit board,
The flexible circuit board has an opening at a central portion, and a rod-shaped first reinforcing member arranged in a frame shape or spaced apart parallel to the periphery of the opening is bonded, and an end portion thereof is bent to form the first circuit. 1 is formed into a rectangular parallelepiped shape by being bonded to the surface opposite to the bonding surface of the reinforcing member,
The second semiconductor chip is located inside the rectangular parallelepiped through the opening, and the mounting pad provided on the upper surface of the rectangular parallelepiped and the pad provided on the first member are connected to each other. A semiconductor package, wherein the first member is attached to an upper surface of a rectangular parallelepiped, and solder balls are provided on a lower surface of the rectangular parallelepiped.
前記フレキシブルサーキット基板は、前記半田ボールが設けられた部分の内部側に板状の第2の補強部材が接着されてなる
ことを特徴とする請求項1または2に記載の半導体パッケージ。
The semiconductor package according to claim 1, wherein the flexible circuit board is formed by bonding a plate-like second reinforcing member to an inner side of a portion where the solder ball is provided.
電気回路が形成されたシリコン基板あるいは第1の半導体チップ等の第1の部材を実装するフレキシブルサーキット基板において、
中央部分に枠形状あるいは離隔平行状に配置した棒形状の第1の補強部材が接着され、端部が折り曲げられて前記第1の補強部材の前記接着面とは反対側の面に接着されることにより直方体形状に構成される
ことを特徴とするフレキシブルサーキット基板。
In a flexible circuit board on which a first member such as a silicon substrate on which an electric circuit is formed or a first semiconductor chip is mounted,
A rod-shaped first reinforcing member arranged in a frame shape or spaced apart in parallel is bonded to the central portion, and the end is bent and bonded to the surface of the first reinforcing member opposite to the bonding surface. A flexible circuit board characterized by having a rectangular parallelepiped shape.
前記第1の部材が実装された際に、第1の部材上に実装された第2の半導体チップが前記直方体の内部に位置するように、前記中央部分に開口部が設けられ、前記第1の補強部材は、前記開口部の周囲に接着される
ことを特徴とする請求項4に記載のフレキシブルサーキット基板。
When the first member is mounted, an opening is provided in the central portion so that the second semiconductor chip mounted on the first member is located inside the rectangular parallelepiped, and the first member The flexible circuit board according to claim 4, wherein the reinforcing member is bonded to the periphery of the opening.
前記直方体の下面の内部側に板状の第2の補強部材が接着されてなる
ことを特徴とする請求項4または5に記載のフレキシブルサーキット基板。
The flexible circuit board according to claim 4 or 5, wherein a plate-like second reinforcing member is bonded to the inner side of the lower surface of the rectangular parallelepiped.
JP2005001728A 2005-01-06 2005-01-06 Semiconductor package and flexible circuit board Expired - Fee Related JP4556671B2 (en)

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