JP2006179508A - Method for preventing degrading of nitride-based group iii-v compound semiconductor light-emitting device - Google Patents

Method for preventing degrading of nitride-based group iii-v compound semiconductor light-emitting device Download PDF

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JP2006179508A
JP2006179508A JP2003059926A JP2003059926A JP2006179508A JP 2006179508 A JP2006179508 A JP 2006179508A JP 2003059926 A JP2003059926 A JP 2003059926A JP 2003059926 A JP2003059926 A JP 2003059926A JP 2006179508 A JP2006179508 A JP 2006179508A
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nitride
compound semiconductor
emitting device
substrate
semiconductor light
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Inventor
Keiji Ito
啓司 伊藤
Yoshiteru Hasegawa
義晃 長谷川
Toshiya Yokogawa
俊哉 横川
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to PCT/JP2004/002589 priority patent/WO2004079830A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/32Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
    • H01S5/32341Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2231Buried stripe structure with inner confining structure only between the active layer and the upper electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/0233Mounting configuration of laser chips
    • H01S5/0234Up-side down mountings, e.g. Flip-chip, epi-side down mountings or junction down mountings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2205Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Led Devices (AREA)
  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To prevent degradation due to stress in a nitride-based group III-V compound semiconductor light-emitting device using a nitride-based group III-V compound semiconductor as a substrate, and to improve its service life. <P>SOLUTION: The method is used to prevent the degradation of a semiconductor light-emitting device using a nitride-based group III-V compound semiconductor as a substrate. In this case, the strain of each of multilayer structure layers grown on the substrate is controlled. In concrete, the substrate of the semiconductor light-emitting device is made to be 65-500 μm in thickness, and mounting temperature is set to between 190-260°C, and then the semiconductor light-emitting device is mounted by a junction-up method or junction-down method. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、窒化物系III‐V族化合物半導体を基板とする半導体発光素子において、前記基板の上に成長した多層構造各層の応力を制御することを特徴とする前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法に関する。
【0002】
【従来の技術】
波長400nm帯の窒化ガリウム系発光素子は次世代のデジタルビデオディスク(DVD)用の光源として最も期待される光源のひとつであり、高温時に高出力動作可能な発光素子の開発が活発に議論されている。しかし、前記窒化ガリウム系発光素子を構成する窒化物系III‐V族化合物半導体の結晶成長は極めて困難であり、素子特性は実用上要求されるレベルを満足していない。特に、素子の劣化防止は、量産化に向けて前記窒化ガリウム系発光素子の抱える最大の課題である。
【0003】
前記窒化ガリウム系発光素子の劣化を促進する要因のひとつは、前記窒化ガリウム系発光素子の活性層に働く応力である。前記活性層に強い引張り応力が働いている場合、素子劣化が著しく、寿命時間は極度に低下する。前記応力は▲1▼素子を形成する基板の種類と、▲2▼素子を構成する前記窒化物系III‐V族化合物半導体の結晶成長時および接合材料による実装時の熱履歴に強く依存する。
【0004】
従来用いられている代表的な前記基板は、サファイア基板、もしくはELO技術を用いたサファイア上低転位基板であるが、これらは前記窒化物系III‐V族化合物半導体との熱膨張係数差が大きいということ、また前記窒化ガリウム系発光素子の端面形成が容易でないなどの欠点を有する。
【0005】
一方、最近、前記欠点を克服する基板として窒化物系III‐V族化合物半導体を基板とする窒化物系III‐V族化合物半導体発光素子の形成が試みられている。非特許文献1では、窒化ガリウムを基板とする発光素子の検討を行っている。しかしながら、窒化ガリウム基板を用いた発光素子に関して、実用上要求される寿命時間レベルを満たす素子は得られていない。
【0006】
これまでのところ、窒化物系III‐V族化合物半導体を基板とする窒化物系III‐V族化合物半導体発光素子に関して、活性層の応力に起因する素子劣化を防止する有力な方法は提案されていない。
【0007】
【特許文献1】
特開2000−22283号公報(特に段落番号0013および0033)
【特許文献2】
特開2002−299769号公報
【非特許文献1】
Technical report of IEICE LQE2001-29, 73 (2001)
【0008】
【発明が解決しようとする課題】
本発明は、前記従来の問題を解決し、前記窒化物系III‐V族化合物半導体を基板とする窒化物系III‐V族化合物半導体発光素子において、応力に起因する劣化を防止し、寿命時間の改善を図ることを目的とする。
【0009】
【課題を解決するための手段】
前記の目的を達成するため、請求項1に記載の発明は、窒化物系III‐V族化合物半導体を基板とする半導体発光素子の劣化を防止する方法において、前記基板の上に成長した多層構造各層の応力を制御することを特徴とする前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法である。
【0010】
請求項2に記載の発明は、前記基板の厚さを調整することにより前記多層構造各層の応力を制御することを特徴とする請求項1に記載の窒化物系III‐V族化合物半導体発光素子の劣化防止方法である。
【0011】
請求項3に記載の発明は、前記窒化物系III‐V族化合物半導体素子をパッケージへ実装する際に、実装温度を調整することにより、前記窒化物系III‐V族化合物半導体素子の各層の応力を制御することを特徴とする請求項1あるいは請求項2に記載の窒化物系III‐V族化合物半導体発光素子の劣化防止方法である。
【0012】
請求項4に記載の発明は、前記窒化物系III‐V族化合物半導体素子を前記パッケージへ実装する際に、サブマウントを用いる場合、前記サブマウントの熱膨張係数、および前記実装温度に応じて前記基板厚を調整することを特徴とする請求項1〜3のいずれかに記載の窒化物系III‐V族化合物半導体発光素子の劣化防止方法である。
【0013】
請求項5に記載の発明は、前記サブマウントの材質が窒化アルミニウムであり、前記窒化物系III‐V族化合物半導体発光素子の前記基板の厚さが65μm以上であることを特徴とする請求項1〜4のいずれかに記載の前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法である。
【0014】
請求項6に記載の発明は、前記サブマウントの材質が炭化珪素であり、前記窒化物系III‐V族化合物半導体発光素子の前記基板の厚さが100μm以上であることを特徴とする請求項1〜4のいずれかに記載の前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法である。
【0015】
【発明の実施の形態】
(第1の実施形態)
以下、本発明の第1の実施形態について図面を参照しながら説明する。
【0016】
図1は本発明の第1の実施形態に係る窒化物系III‐V族化合物半導体発光素子の構成断面図の一例を示している。図1に示すように、n型の窒化ガリウムからなる基板11の上に、n型の窒化ガリウム基板11の上に成長するn型バッファ層12と、n型クラッド層13と、n型ガイド層14と、活性層15と、p型ガイド層16と、p型クラッド層17と、p型コンタクト層18と、電流狭窄絶縁層19と、窒化ガリウム基板11裏面のn型電極20と、p型コンタクト層の上部のp型電極21からなる。
【0017】
図2は第1の実施形態に係る窒化ガリウム系発光素子をジャンクションダウン法により実装した様子を示している。図2に示すように、第1の実施形態に係る窒化ガリウム系発光素子が、導電性および放熱性に優れた窒化アルミニウムからなるサブマウント22の主面上にp型電極21側で接合されている。
【0018】
また図3は第1の実施形態に係る窒化ガリウム系発光素子をジャンクションアップ法により実装した様子を示している。図3に示すように、第1の実施形態に係る窒化ガリウム系発光素子が、導電性および放熱性に優れた窒化アルミニウムからなるサブマウント22の主面上に、n型電極20側で接合されている。
【0019】
以下の表1は第1の実施形態に係る窒化ガリウム系発光素子を図2および図3に示すように窒化アルミニウムからなるサブマウント22に、ジャンクションダウン法もしくはジャンクションアップ法により実装した状態において、素子の活性層に働く応力を計算した結果の一例である。
【0020】
【表1】

Figure 2006179508
【0021】
表1に示すように、ジャンクションダウン法で実装した場合、活性層に働く応力は基板の厚さよらずに引張り応力であり、その応力は基板厚が増加するにつれて減少している。一方、ジャンクションアップ法で実装した場合、活性層に働く応力は基板厚が増加するにつれて引張り応力から圧縮応力へと変化している。
【0022】
同様の応力計算を、実装時の典型的な温度190℃〜260℃の範囲において行った。ここで設定した実装の温度範囲は、実装に用いるはんだ材料の特性から制約される温度範囲である。
【0023】
窒化アルミニウムからなるサブマウントを用いた実装の場合、窒化ガリウム基板11の厚さが65μm以上500μm以下であれば、図2に示すジャンクションダウン法、もしくは図3に示すジャンクションアップ法のいずれかにおいて、実装温度を190℃〜260℃の範囲で適当に設定することにより、活性層に働く応力の範囲を0.1GPa以下の引張り応力、あるいは0.05GPa以下の圧縮応力に制御することが出来る。過度の応力は素子の信頼性に重大な障害をもたらすことから、活性層に働く応力は出来る限り上記の範囲内に抑えることが望ましい。
【0024】
基板厚が65μm以下の場合には、活性層に働く応力が増大するのみならず、素子が割れやすいためにハンドリングが困難である。
【0025】
一方、窒化ガリウム基板11を用いた窒化ガリウム系発光素子の場合、活性層に働く応力を低減するという観点では、基板が厚くなれば厚くなるほど、引張り応力による素子劣化の防止には有利である。しかしながら、500μmを越えるような過度な窒化ガリウム基板厚は、へき開による発光素子の端面形成を困難にする。したがって、窒化ガリウム基板の厚さは、活性層に働く応力が低いレベル抑制され、なおかつ、へき開が容易である厚さに設定されることが好ましい。この具体的な厚み(窒化ガリウム基板11の厚み)が65μm以上500μm以下である。
【0026】
なお、窒化ガリウム基板が過度に厚い場合においても、端面形成が容易にするように基板形状を加工することが好ましい。例えば、端面を形成する部分のみ、窒化ガリウム基板の裏面側をストライプ状に除去するなどして、へき開による端面形成を容易に保つことも出来る。
【0027】
素子を構成する各層に働く上記応力の指標のひとつとして、素子の反り量がある。素子の反り量は、例えば干渉計を用いることにより測定することができる。
【0028】
以下の表2は、第1の実施形態に係る窒化ガリウム系発光素子を、窒化アルミニウムからなるサブマウントを用いて、図2に示すようにジャンクションダウン法で実装した場合について、素子の反り量を測定した結果である。
【0029】
【表2】
Figure 2006179508
【0030】
表2に示すように、窒化ガリウム基板の厚さが100μmの場合、素子の反り量は0.028μm、窒化ガリウム基板の厚さが200μmの場合、素子の反り量は0.033μmであった。表2中の実線は、上記の応力計算から求められる素子の反り量である。応力計算から求められた素子の反り量と実測の反り量の良い一致がは、窒化ガリウム基板の厚さを制御することにより、素子の活性層に働く応力を制御が可能であることを示す。
【0031】
以上では活性層に働く応力を例に述べたが、素子を構成するすべての層について、同様の手法を用いることにより応力の制御が可能である。
【0032】
(第2の実施形態)
以下、本発明の第2の実施形態について図面を参照しながら説明する。
【0033】
図1は本発明の第2の実施形態に係る窒化物系III‐V族化合物半導体発光素子の構成断面図の一例を示している。図2は第2の実施形態に係る窒化ガリウム系発光素子をジャンクションダウン法により実装した様子を示している。図3は第2の実施形態に係る窒化ガリウム系発光素子をジャンクションアップ法により実装した様子を示している。図1、図2、および図3は、本発明の実施形態1と同様であるので、説明を省略する。
【0034】
以下の表3は第2の実施形態において、窒化アルミニウムからなるサブマウント22を、炭化珪素からなるサブマウントに置き換えて、ジャンクションダウン法もしくはジャンクションアップ法により実装した状態において、素子の活性層に働く応力を計算した結果の一例である。
【0035】
【表3】
Figure 2006179508
【0036】
表3に示すように、ジャンクションダウン法で実装した場合、活性層に働く応力は基板の厚さよらずに引張り応力であり、その応力は基板厚が増加するにつれて減少している。一方、ジャンクションアップ法で実装した場合、活性層に働く応力は基板厚が増加するにつれて引張り応力から圧縮応力へと変化している。
【0037】
同様の応力計算を、実装時の典型的な温度190℃〜260℃の範囲において行った。ここで設定した実装の温度範囲は、実装に用いるはんだ材料の特性から制約される温度範囲である。
【0038】
炭化珪素からなるサブマウントを用いた実装の場合、窒化ガリウム基板の厚さが100μm以上500μm以下であれば、図2に示すジャンクションダウン法、もしくは図3に示すジャンクションアップ法のいずれかにおいて、実装温度を190℃〜260℃の範囲で適当に設定することにより、活性層に働く応力の範囲を0.2GPa以下の引張り応力、あるいは0.03GPa以下の圧縮応力に制御することが出来る。過度の応力は素子の信頼性に重大な障害をもたらすことから、活性層に働く応力は出来る限り上記の範囲内に抑えることが望ましい。
【0039】
上記の範囲を超える厚みの基板を用いた素子では、活性層に働く応力が過度になるのみならず、素子のハンドリングや端面形成を困難にするため好ましくない。
【0040】
素子を構成する各層に働く上記応力の指標のひとつとして、素子の反り量がある。素子の反り量は、例えば干渉計を用いることにより測定することができる。
【0041】
以下の表4は、第1の実施形態に係る窒化ガリウム系発光素子を、炭化珪素からなるサブマウントを用いて、図2に示すようにジャンクションダウン法で実装した場合について、素子の反り量を測定した結果である。
【0042】
【表4】
Figure 2006179508
【0043】
表4に示すように、窒化ガリウム基板の厚さが100μmの場合、素子の反り量は0.038μm、窒化ガリウム基板の厚さが200μmの場合、素子の反り量は0.047μmであった。表4中の実線は、上記の応力計算から求められる素子の反り量である。応力計算から求められた素子の反り量と実測の反り量の良い一致がは、窒化ガリウム基板の厚さを制御することにより、素子の活性層に働く応力を制御が可能であることを示す。
【0044】
以上、本発明の第2の実施形態では活性層に働く応力を例に述べたが、素子を構成するすべての層について、同様の手法を用いることにより応力の制御が可能である。
【0045】
【発明の効果】
以上に説明したように、本発明の窒化物系III‐V族化合物半導体発光素子の劣化防止方法によると、窒化物系III‐V族化合物半導体を基板とする発光素子の活性層の応力を基板厚の調整により制御することができ、応力に起因する素子の劣化を防止する極めて有効な方法が得られる。
【図面の簡単な説明】
【図1】本発明の第1・第2の実施形態に係る窒化物系III‐V族化合物半導体発光素子の構成断面図
【図2】本発明の第1・第2の実施形態に係る窒化物系III‐V族化合物半導体発光素子が実装された状態を示す構成断面図
【図3】本発明の第1・第2の実施形態に係る窒化物系III‐V族化合物半導体発光素子が実装された状態を示す構成断面図
【符号の説明】
11 n型窒化ガリウム基板
12 n型バッファ層
13 n型クラッド層
14 n型ガイド層
15 活性層
16 p型ガイド層
17 p型クラッド層
18 p型コンタクト層
19 電流狭窄絶縁層
20 n型電極
21 p型電極
22 サブマウント[0001]
BACKGROUND OF THE INVENTION
The present invention provides a semiconductor light emitting device using a nitride III-V compound semiconductor as a substrate, wherein the stress of each layer of the multilayer structure grown on the substrate is controlled. The present invention relates to a method for preventing deterioration of a compound semiconductor light emitting device.
[0002]
[Prior art]
Gallium nitride-based light-emitting devices with a wavelength of 400 nm are one of the most promising light sources for next-generation digital video discs (DVDs), and active development of light-emitting devices capable of high-power operation at high temperatures is actively discussed. Yes. However, crystal growth of the nitride-based III-V compound semiconductor constituting the gallium nitride-based light-emitting device is extremely difficult, and the device characteristics do not satisfy the practically required level. In particular, prevention of deterioration of the element is the greatest problem of the gallium nitride-based light emitting element for mass production.
[0003]
One factor that promotes the deterioration of the gallium nitride-based light emitting device is a stress acting on the active layer of the gallium nitride-based light emitting device. When a strong tensile stress is applied to the active layer, the device is remarkably deteriorated and the lifetime is extremely reduced. The stress strongly depends on (1) the type of substrate on which the element is to be formed, and (2) the thermal history during the crystal growth of the nitride III-V compound semiconductor constituting the element and during mounting with the bonding material.
[0004]
The typical substrate used in the past is a sapphire substrate or a low dislocation substrate on sapphire using ELO technology, but these have a large difference in thermal expansion coefficient from the nitride III-V compound semiconductor. In addition, the gallium nitride-based light emitting device has disadvantages such as difficulty in forming an end face.
[0005]
Recently, an attempt has been made to form a nitride III-V compound semiconductor light emitting device using a nitride III-V compound semiconductor as a substrate to overcome the above-mentioned drawbacks. Non-Patent Document 1 examines a light-emitting element using gallium nitride as a substrate. However, regarding a light-emitting element using a gallium nitride substrate, an element that satisfies a practically required life time level has not been obtained.
[0006]
So far, with respect to nitride-based III-V compound semiconductor light-emitting devices using nitride-based III-V compound semiconductors as substrates, effective methods for preventing device deterioration due to active layer stress have been proposed. Absent.
[0007]
[Patent Document 1]
JP 2000-22283 A (particularly paragraphs 0013 and 0033)
[Patent Document 2]
JP 2002-299769 A [Non-Patent Document 1]
Technical report of IEICE LQE2001-29, 73 (2001)
[0008]
[Problems to be solved by the invention]
The present invention solves the above-mentioned conventional problems, prevents deterioration due to stress in a nitride-based III-V compound semiconductor light-emitting device using the nitride-based III-V compound semiconductor as a substrate, and reduces the lifetime. The purpose is to improve.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, the invention described in claim 1 is a method of preventing deterioration of a semiconductor light emitting device having a nitride III-V compound semiconductor as a substrate, and a multilayer structure grown on the substrate. The method of preventing deterioration of the nitride-based III-V compound semiconductor light emitting device, wherein the stress of each layer is controlled.
[0010]
2. The nitride-based III-V compound semiconductor light emitting device according to claim 1, wherein the stress of each layer of the multilayer structure is controlled by adjusting the thickness of the substrate. This is a method for preventing deterioration of the material.
[0011]
According to a third aspect of the present invention, when the nitride-based III-V compound semiconductor device is mounted on a package, by adjusting a mounting temperature, each layer of the nitride-based III-V compound semiconductor device is adjusted. 3. The method for preventing deterioration of a nitride III-V compound semiconductor light emitting device according to claim 1, wherein stress is controlled.
[0012]
According to a fourth aspect of the present invention, when a submount is used when mounting the nitride-based III-V compound semiconductor device to the package, depending on the thermal expansion coefficient of the submount and the mounting temperature. 4. The method for preventing deterioration of a nitride III-V compound semiconductor light emitting device according to claim 1, wherein the thickness of the substrate is adjusted.
[0013]
The invention according to claim 5 is characterized in that the material of the submount is aluminum nitride, and the thickness of the substrate of the nitride-based III-V compound semiconductor light emitting device is 65 μm or more. 5. The method for preventing deterioration of the nitride-based III-V compound semiconductor light-emitting device according to any one of 1 to 4.
[0014]
The invention according to claim 6 is characterized in that the material of the submount is silicon carbide, and the thickness of the substrate of the nitride-based III-V compound semiconductor light emitting device is 100 μm or more. 5. The method for preventing deterioration of the nitride-based III-V compound semiconductor light-emitting device according to any one of 1 to 4.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.
[0016]
FIG. 1 shows an example of a sectional view of a nitride III-V compound semiconductor light emitting device according to the first embodiment of the present invention. As shown in FIG. 1, an n-type buffer layer 12 grown on an n-type gallium nitride substrate 11, an n-type cladding layer 13, and an n-type guide layer on a substrate 11 made of n-type gallium nitride. 14, active layer 15, p-type guide layer 16, p-type cladding layer 17, p-type contact layer 18, current confinement insulating layer 19, n-type electrode 20 on the back surface of gallium nitride substrate 11, p-type The p-type electrode 21 is formed on the contact layer.
[0017]
FIG. 2 shows a state in which the gallium nitride light emitting device according to the first embodiment is mounted by the junction down method. As shown in FIG. 2, the gallium nitride-based light emitting device according to the first embodiment is bonded on the main surface of a submount 22 made of aluminum nitride having excellent conductivity and heat dissipation on the p-type electrode 21 side. Yes.
[0018]
FIG. 3 shows a state in which the gallium nitride-based light emitting device according to the first embodiment is mounted by the junction-up method. As shown in FIG. 3, the gallium nitride light emitting device according to the first embodiment is bonded to the main surface of the submount 22 made of aluminum nitride having excellent conductivity and heat dissipation on the n-type electrode 20 side. ing.
[0019]
Table 1 below shows the device in the state in which the gallium nitride based light emitting device according to the first embodiment is mounted on the submount 22 made of aluminum nitride by the junction down method or the junction up method as shown in FIGS. It is an example of the result of having calculated the stress which acts on the active layer of.
[0020]
[Table 1]
Figure 2006179508
[0021]
As shown in Table 1, when mounted by the junction down method, the stress acting on the active layer is a tensile stress regardless of the thickness of the substrate, and the stress decreases as the substrate thickness increases. On the other hand, when mounted by the junction-up method, the stress acting on the active layer changes from tensile stress to compressive stress as the substrate thickness increases.
[0022]
Similar stress calculations were performed at a typical temperature range of 190 ° C. to 260 ° C. during mounting. The mounting temperature range set here is a temperature range restricted by the characteristics of the solder material used for mounting.
[0023]
In the case of mounting using a submount made of aluminum nitride, if the thickness of the gallium nitride substrate 11 is 65 μm or more and 500 μm or less, either the junction down method shown in FIG. 2 or the junction up method shown in FIG. By appropriately setting the mounting temperature in the range of 190 ° C. to 260 ° C., the range of stress acting on the active layer can be controlled to a tensile stress of 0.1 GPa or less or a compressive stress of 0.05 GPa or less. Since excessive stress causes a serious obstacle to the reliability of the device, it is desirable to suppress the stress acting on the active layer within the above range as much as possible.
[0024]
When the substrate thickness is 65 μm or less, not only the stress acting on the active layer is increased, but also the device is easily cracked, so that handling is difficult.
[0025]
On the other hand, in the case of a gallium nitride-based light emitting device using the gallium nitride substrate 11, from the viewpoint of reducing the stress acting on the active layer, the thicker the substrate, the more advantageous the prevention of device deterioration due to tensile stress. However, an excessive gallium nitride substrate thickness exceeding 500 μm makes it difficult to form an end face of the light emitting element by cleavage. Therefore, the thickness of the gallium nitride substrate is preferably set to such a thickness that the stress acting on the active layer is suppressed to a low level and that cleavage is easy. The specific thickness (the thickness of the gallium nitride substrate 11) is 65 μm or more and 500 μm or less.
[0026]
Even when the gallium nitride substrate is excessively thick, it is preferable to process the substrate shape so as to facilitate the end face formation. For example, it is possible to easily maintain the end face formation by cleaving by removing the back surface side of the gallium nitride substrate only in a portion where the end face is to be formed.
[0027]
One of the indices of the stress acting on each layer constituting the element is the amount of warping of the element. The amount of warping of the element can be measured by using, for example, an interferometer.
[0028]
Table 2 below shows the amount of warpage of the element when the gallium nitride light emitting device according to the first embodiment is mounted by a junction down method as shown in FIG. 2 using a submount made of aluminum nitride. It is the result of measurement.
[0029]
[Table 2]
Figure 2006179508
[0030]
As shown in Table 2, when the thickness of the gallium nitride substrate was 100 μm, the warpage amount of the element was 0.028 μm, and when the thickness of the gallium nitride substrate was 200 μm, the warpage amount of the element was 0.033 μm. The solid line in Table 2 represents the amount of warping of the element obtained from the above stress calculation. The good agreement between the warpage amount of the element obtained from the stress calculation and the actual warpage amount indicates that the stress acting on the active layer of the element can be controlled by controlling the thickness of the gallium nitride substrate.
[0031]
Although the stress acting on the active layer has been described above as an example, the stress can be controlled by using the same method for all layers constituting the element.
[0032]
(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.
[0033]
FIG. 1 shows an example of a sectional view of a nitride III-V compound semiconductor light emitting device according to a second embodiment of the present invention. FIG. 2 shows a state in which the gallium nitride-based light emitting device according to the second embodiment is mounted by a junction down method. FIG. 3 shows a state in which the gallium nitride based light emitting device according to the second embodiment is mounted by the junction-up method. 1, 2, and 3 are the same as those of the first embodiment of the present invention, and thus description thereof is omitted.
[0034]
Table 3 below shows that, in the second embodiment, the submount 22 made of aluminum nitride is replaced with a submount made of silicon carbide, and works in the active layer of the element when mounted by the junction down method or the junction up method. It is an example of the result of having calculated stress.
[0035]
[Table 3]
Figure 2006179508
[0036]
As shown in Table 3, when mounted by the junction down method, the stress acting on the active layer is a tensile stress regardless of the thickness of the substrate, and the stress decreases as the substrate thickness increases. On the other hand, when mounted by the junction-up method, the stress acting on the active layer changes from tensile stress to compressive stress as the substrate thickness increases.
[0037]
Similar stress calculations were performed at a typical temperature range of 190 ° C. to 260 ° C. during mounting. The mounting temperature range set here is a temperature range restricted by the characteristics of the solder material used for mounting.
[0038]
In the case of mounting using a submount made of silicon carbide, if the thickness of the gallium nitride substrate is not less than 100 μm and not more than 500 μm, either the junction down method shown in FIG. 2 or the junction up method shown in FIG. By appropriately setting the temperature in the range of 190 ° C. to 260 ° C., the range of stress acting on the active layer can be controlled to a tensile stress of 0.2 GPa or less or a compressive stress of 0.03 GPa or less. Since excessive stress causes a serious obstacle to the reliability of the device, it is desirable to suppress the stress acting on the active layer within the above range as much as possible.
[0039]
An element using a substrate having a thickness exceeding the above range is not preferable because not only the stress acting on the active layer becomes excessive, but also it becomes difficult to handle the element and form an end face.
[0040]
One of the indices of the stress acting on each layer constituting the element is the amount of warping of the element. The amount of warping of the element can be measured by using, for example, an interferometer.
[0041]
Table 4 below shows the amount of warpage of the element when the gallium nitride based light emitting element according to the first embodiment is mounted by a junction down method as shown in FIG. 2 using a submount made of silicon carbide. It is the result of measurement.
[0042]
[Table 4]
Figure 2006179508
[0043]
As shown in Table 4, when the thickness of the gallium nitride substrate was 100 μm, the warpage amount of the element was 0.038 μm, and when the thickness of the gallium nitride substrate was 200 μm, the warpage amount of the element was 0.047 μm. The solid line in Table 4 represents the amount of warpage of the element obtained from the above stress calculation. The good agreement between the warpage amount of the element obtained from the stress calculation and the actual warpage amount indicates that the stress acting on the active layer of the element can be controlled by controlling the thickness of the gallium nitride substrate.
[0044]
As described above, in the second embodiment of the present invention, the stress acting on the active layer has been described as an example. However, the stress can be controlled by using the same method for all layers constituting the element.
[0045]
【The invention's effect】
As described above, according to the method for preventing deterioration of a nitride III-V compound semiconductor light emitting device of the present invention, the stress of the active layer of the light emitting device having the nitride III-V compound semiconductor as a substrate is applied to the substrate. It can be controlled by adjusting the thickness, and a very effective method for preventing deterioration of the element due to stress can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a nitride III-V compound semiconductor light emitting device according to first and second embodiments of the present invention. FIG. 2 is a nitridation according to first and second embodiments of the present invention. FIG. 3 is a structural cross-sectional view showing a state in which a compound III-V compound semiconductor light emitting device is mounted. FIG. 3 shows a nitride III-V compound semiconductor light emitting device mounted according to the first and second embodiments of the present invention. Cross-sectional view of the structure showing the state [Explanation of symbols]
11 n-type gallium nitride substrate 12 n-type buffer layer 13 n-type cladding layer 14 n-type guide layer 15 active layer 16 p-type guide layer 17 p-type cladding layer 18 p-type contact layer 19 current confinement insulating layer 20 n-type electrode 21 p Type electrode 22 Submount

Claims (6)

窒化物系III‐V族化合物半導体を基板とする半導体発光素子の劣化を防止する方法において、前記基板の上に成長した多層構造各層の応力を制御することを特徴とする前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法。  In the method for preventing deterioration of a semiconductor light emitting device using a nitride III-V compound semiconductor as a substrate, the stress of each layer of the multilayer structure grown on the substrate is controlled. A method for preventing deterioration of a Group V compound semiconductor light emitting device. 前記基板の厚さを調整することにより前記多層構造各層の応力を制御することを特徴とする請求項1に記載の窒化物系III‐V族化合物半導体発光素子の劣化防止方法。  2. The method for preventing deterioration of a nitride-based III-V compound semiconductor light emitting device according to claim 1, wherein the stress of each layer of the multilayer structure is controlled by adjusting the thickness of the substrate. 前記窒化物系III‐V族化合物半導体素子を接合材料によりパッケージへ実装する際に、実装温度を調整することにより、前記窒化物系III‐V族化合物半導体素子の各層の応力を制御することを特徴とする請求項1あるいは請求項2に記載の窒化物系III‐V族化合物半導体発光素子の劣化防止方法。  Controlling the stress of each layer of the nitride III-V compound semiconductor element by adjusting the mounting temperature when the nitride III-V compound semiconductor element is mounted on the package with a bonding material. The method for preventing deterioration of a nitride-based III-V compound semiconductor light-emitting device according to claim 1 or 2, characterized in that: 前記窒化物系III‐V族化合物半導体素子を接合材料を用いて前記パッケージへ実装する際に、サブマウントを用いる場合、前記サブマウントの熱膨張係数、および前記実装温度に応じて前記基板厚を調整することを特徴とする請求項1〜3のいずれかに記載の窒化物系III‐V族化合物半導体発光素子の劣化防止方法。  When the nitride-based III-V compound semiconductor device is mounted on the package using a bonding material, when a submount is used, the substrate thickness is set according to the thermal expansion coefficient of the submount and the mounting temperature. The method for preventing deterioration of a nitride-based III-V compound semiconductor light-emitting device according to any one of claims 1 to 3, wherein adjustment is performed. 前記サブマウントの材質が窒化アルミニウムであり、前記窒化物系III‐V族化合物半導体発光素子の前記基板の厚さが65μm以上であることを特徴とする請求項1〜4のいずれかに記載の前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法。  The material of the submount is aluminum nitride, and the thickness of the substrate of the nitride-based III-V compound semiconductor light-emitting element is 65 μm or more. A method for preventing deterioration of the nitride III-V compound semiconductor light emitting device. 前記サブマウントの材質が炭化珪素であり、前記窒化物系III‐V族化合物半導体発光素子の前記基板の厚さが100μm以上であることを特徴とする請求項1〜4のいずれかに記載の前記窒化物系III‐V族化合物半導体発光素子の劣化防止方法。  The material of the submount is silicon carbide, and the thickness of the substrate of the nitride-based III-V compound semiconductor light emitting element is 100 μm or more. A method for preventing deterioration of the nitride III-V compound semiconductor light emitting device.
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