WO2004079830A1 - Iii-v nitride compound semiconductor light-emitting device and method for manufacturing same - Google Patents

Iii-v nitride compound semiconductor light-emitting device and method for manufacturing same Download PDF

Info

Publication number
WO2004079830A1
WO2004079830A1 PCT/JP2004/002589 JP2004002589W WO2004079830A1 WO 2004079830 A1 WO2004079830 A1 WO 2004079830A1 JP 2004002589 W JP2004002589 W JP 2004002589W WO 2004079830 A1 WO2004079830 A1 WO 2004079830A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
emitting device
semiconductor light
compound semiconductor
nitride
Prior art date
Application number
PCT/JP2004/002589
Other languages
French (fr)
Japanese (ja)
Inventor
Keiji Ito
Yoshiaki Hasegawa
Toshiya Yokogawa
Original Assignee
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co., Ltd. filed Critical Matsushita Electric Industrial Co., Ltd.
Publication of WO2004079830A1 publication Critical patent/WO2004079830A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/32Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
    • H01S5/32341Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2231Buried stripe structure with inner confining structure only between the active layer and the upper electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/0233Mounting configuration of laser chips
    • H01S5/0234Up-side down mountings, e.g. Flip-chip, epi-side down mountings or junction down mountings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2205Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers

Definitions

  • Nitride III-V compound semiconductor light emitting device and method of manufacturing the same
  • the present invention relates to a nitride-based III-V compound semiconductor light emitting device formed using a nitride-based III-V compound semiconductor substrate such as a GaN-based semiconductor substrate.
  • the technology relates to controlling the stress generated in the structure.
  • red semiconductor lasers having a wavelength of 660 nm.
  • This red semiconductor laser is, for example, a GaAs compound semiconductor made of InGaAlP-based compound semiconductor. Manufactured by epitaxial growth on a substrate.
  • next-generation optical disks have been actively developed to expand the storage capacity of DVDs.
  • Light sources for such next-generation optical discs are required to stably emit blue-violet laser light (wavelength 4 OO nm band) whose wavelength is even shorter than that of red light.
  • 400 nm wavelength GaN-based semiconductor lasers are most expected as light sources for recording and reproduction of next-generation optical disks such as B1u-ray disks (trademark).
  • B1u-ray disks trademark
  • a sapphire substrate or a low dislocation-on-sapphire substrate has been used in the manufacture of a GaN-based semiconductor light-emitting device.However, such a substrate is thermally expanded with a nitride III-V compound semiconductor. It has the disadvantage that the coefficient difference is large and that it is not easy to form the end face of the GaN-based semiconductor laser.
  • the present inventor believes that one of the factors that promotes the deterioration of the GaN-based semiconductor laser and the light emitting die is the force acting on the active layer. According to the studies made by the present inventors, when a large tensile force acts on the active layer, the element is significantly deteriorated, and the life time is extremely reduced. Such force depends on the type of substrate that forms the device and the nitride III-V group that forms the device. It depends strongly on the thermal history during crystal growth of compound semiconductors and during mounting with bonding materials.
  • the present invention has been made in order to solve the above problems, and an object of the present invention is to provide a semiconductor light emitting device which prevents device deterioration due to force and has an improved life time, and a method for manufacturing the same. . Disclosure of the invention
  • the nitride-based II I-V compound semiconductor light-emitting device of the present invention comprises a nitride-based
  • a III-V compound semiconductor substrate a semiconductor laminated structure provided on a main surface of the substrate, a first electrode formed on a back surface of the substrate, and a second electrode formed on the semiconductor laminated structure.
  • the semiconductor light-emitting element emits light by a current flowing between the first electrode and the second electrode, and has a radius of curvature that defines the amount of warpage of the semiconductor light-emitting element. Adjusted to ⁇ cm or more.
  • the radius of curvature is greater than or equal to 83 cm and, if necessary, is greater than or equal to 89 cm.
  • the thickness of the substrate is more than 100 171 and not more than 5 ⁇ m.
  • the thickness of the substrate is more than 15 jum.
  • the substrate is a GaN-based compound semiconductor group. ⁇ ⁇ .
  • the semiconductor light-emitting element module includes any one of the nitride-based III-V compound semiconductor light-emitting elements and a support member to which the nitride-based in-V compound semiconductor light-emitting element is fixed.
  • the semiconductor light emitting elements are joined by a molten metal.
  • a method of manufacturing a nitride III-V compound semiconductor device module includes: forming a nitride III-V compound semiconductor substrate; a semiconductor laminated structure provided on a main surface of the substrate; and a back surface of the substrate. Preparing a semiconductor light emitting device having a first electrode formed on the semiconductor laminated structure and a second electrode formed on the semiconductor laminated structure ( ⁇ ); and using a bonding material to form the nitride III-V compound semiconductor device.
  • a method of manufacturing a nitride-based III-V compound semiconductor device module including the step of mounting on a package ( ⁇ ), wherein the thickness of the substrate of the semiconductor light emitting element and the mounting temperature in the step ( ⁇ ) are adjusted. By doing so, the absolute value of the J force generated in the semiconductor multilayer structure is controlled to 0.22 GPa or less.
  • the step (B) includes a step of mounting the semiconductor light-emitting device on a submount, and adjusting a thickness of the substrate according to a coefficient of thermal expansion of the submount and the mounting temperature.
  • FIG. 1 is a cross-sectional view showing a configuration of a nitride-based II I-V compound semiconductor light emitting device according to the present invention.
  • FIG. 2 is a cross-sectional view showing a state in which the elements of FIG. 1 are mounted on a submount in a junction-up arrangement.
  • FIG. 3 is a cross-sectional view showing a state in which the device of FIG. 1 is mounted on a submount in a junction-down arrangement.
  • FIG. 4 is a graph showing the relationship between the narcotic force applied to the active layer of the light emitting device and the substrate thickness in the embodiment of the present invention.
  • FIG. 5 is a drawing showing the relationship between the amount of warpage of the element and the radius of curvature of the warp.
  • the GaN substrate has higher thermal conductivity and better heat dissipation than the sapphire substrate, but it should be used as thin as possible in order to minimize the rise in device temperature during laser operation. It is considered favorable.
  • the element life greatly varies depending on the thickness of the substrate. It has been considered that the thinner the substrate used for a light emitting element such as a semiconductor laser, the better the heat dissipation, and the thinner the GaN substrate, the longer the life of the element. The inventors have found that when the substrate thickness is small, the life of the element is rather deteriorated, and have arrived at the present invention.
  • the thickness of the GaN substrate larger than the substrate thickness (approximately 50 to 65 m) which has been considered to be preferable in the past, the life of the element can be reduced. Deterioration can be suppressed.
  • FIG. ⁇ 1 is a nitride-based material according to the present embodiment I I I
  • FIG. 2 is a sectional view of a group V compound semiconductor laser.
  • this laser has a substrate 11 made of n-type gallium nitride and a laminated structure formed on the substrate 11.
  • the stacked structure has an n-type buffer layer 12, an n-type cladding layer 13, an n-type guide layer 14, an active layer (multiple electron well layer) 15, and a p-type guide layer in order from the side closer to the substrate 11.
  • a p-type cladding layer 1 a p-type contact layer 18, and a current confinement insulating layer 19.
  • the p-type contact layer 18 has a ridge extending along the cavity length direction, and a region other than the upper surface of the ridge is covered with the current confinement insulating layer 19.
  • a 0-type electrode 2 ⁇ ⁇ b is provided on the current confinement insulating layer 19, and a P-type electrode 20a is arranged between the p-type electrode 2 ⁇ b and the p-type contact layer 18.
  • This p-type electrode 20a is a portion of the upper surface of the type contact layer 18 that is not covered with the current confinement insulating layer 19 (Upper surface of the ridge).
  • an n-type electrode 21 is provided on the back surface of the substrate 11.
  • composition and thickness of each layer constituting the above laminated structure can be set, for example, as shown in Table 1 below.
  • FIG. 2 shows the laser of FIG. 1 mounted on a submount 22 by a junction-up arrangement.
  • the submount 22 is made of aluminum nitride having excellent conductivity and heat dissipation, and is arranged on a heat sink in a package (not shown).
  • a support member an object to which a chip of a semiconductor light emitting element is fixed may be referred to as a “support member” regardless of whether it is a submount or a heat sink.
  • a package in which a semiconductor light emitting element is fixed on such a support member is referred to as a “semiconductor light emitting element module”.
  • the n-type electrode 21 is sub-mounted
  • the heat generated in the active layer 15 mainly flows to the submount 22 via the GaN substrate 11 and is diffused to the heat sink.
  • FIG. 3 shows the laser of FIG. 1 mounted on a submount 22 with a junction-down arrangement.
  • the p-type electrode 21 is bonded to the main surface of the submount 22 and the substrate 11 is not located between the PN junction of the laser and the submount 22. .
  • Table 2 below shows the results of calculating the narcotic force generated in the active layer of the semiconductor laser of the present embodiment mounted as shown in FIG. 2 or FIG.
  • the minus sign of ⁇ force in Table 2 means “pulling force” and the plus sign means “compression force”.
  • the thickness of the gallium nitride substrate 11 If it is more than 100 m and less than 500 m, the range of the force acting on the active layer can be adjusted to a range of more than 0.12 GPa and less than +0.03 GPa. It is preferable to keep these 15 forces within the above range, because an increase in the power applied to the active layer causes a serious impairment in the reliability of the device.
  • the substrate thickness is 65 n or more and 500 m or less, the power of the active layer can be suppressed within the range of 0.12 GPa or more and +0.03 GPa or less.
  • the substrate thickness is within the range of 200 m or more and 500 um or less] ⁇ Minimize the absolute value of the force Value exists. From the viewpoint of reducing the tensile force acting on the active layer, it is advantageous to increase the thickness of the substrate. However, with a substrate having a thickness exceeding 500 m, it becomes difficult to form the end face of the light emitting element by cleavage. Therefore, the thickness of the gallium nitride substrate is suppressed to a low level of collicity acting on the active layer. It is preferable that the thickness is set so that cleavage is easy.
  • the board thickness is preferably more than 100 m and not more than 500 m to keep the absolute value of the force generated in the active layer in a smaller range. It is even more preferred to exceed
  • the preferable size of the substrate thickness is more than 100 m, and more preferably more than 150 m.
  • the substrate shape is processed so that the substrate thickness is large (/ U easily, and the end surface of the element is easily formed.
  • a stripe is formed on the back surface side of the substrate where the element end surface is formed). If a lip groove is formed, the end face can be easily formed by cleavage.
  • the amount of warpage of an element that is warped can be measured by using, for example, an interferometer.
  • FIG. 5 shows the relationship between the amount of warpage of the element measured in the present embodiment and the radius of curvature of the warp. If the cavity length is set, the amount of warpage of the chip is d, and the radius of curvature of the warp is R, the following equation is established.
  • the amount of warp d of the tip and the radius of curvature R are related.
  • Table 3 shows the amount of device warpage obtained when the device of FIG. 1 is mounted in a junction-down arrangement on a submount made of aluminum nitride.
  • Table 3 shows the warpage ⁇ of the element obtained from the narcotic power calculation in Table 2, which agrees well with the measured values in the lower part.
  • Table 3 when the thickness of the gallium nitride substrate is 100 Aim, the warpage of the device is 0. ⁇ 79 im, and when the thickness of the gallium nitride substrate is 200 m, the warpage of the device is ⁇ . 076 im.
  • Table 4 below shows the radius of curvature obtained by setting L to 75 m ( Table 4).
  • the radius of curvature of the element is in the range of about 89 to 93 cm.
  • the preferable lower limit of the radius of curvature in the junction-down arrangement is 89 cm.
  • the present embodiment is different from the first embodiment only in that the above-described submount 22 made of aluminum nitride is used, and instead of using the submount made of silicon carbide. .
  • the device shown in Fig. 1 is mounted on a submount made of silicon carbide by the junction down method or the junction up method. And calculated the narcotic force acting on the active layer of the device. Some of the results are shown in Table 5 below.
  • the relationship between the J force and the substrate thickness in the present embodiment also shows the same tendency as in the first embodiment.
  • the mounting temperature in the range of 190 ° C to 260 ° C,
  • the range of the narcotic force acting on the active layer is reduced by 1 ⁇ .22 GPa or more + ⁇ 03
  • An element using a substrate having a thickness exceeding the above range is not preferable because not only the excessive force acting on the active layer becomes excessive, but also it becomes difficult to form an end face of the element.
  • Table 6 shows the results of measuring the amount of warpage of the device when the device of FIG. 1 was mounted on a submount made of silicon carbide by the junction down method.
  • the upper part of Table 6 shows the calculated value of the warpage of the element obtained from the ⁇ force calculation, and the lower part shows the measured value of the warpage fogging.
  • Table 6 when the thickness of the gallium nitride substrate is 100 m, the warpage of the device is 0.085 m, and when the thickness of the gallium nitride substrate is 200 m, the warpage of the device Ha ⁇ . 080 im.
  • the radius of curvature in the junction down arrangement is smaller than when the submount is formed from aluminum nitride. Therefore, in this embodiment, The preferred lower limit of the radius of curvature is 83 cm, more preferably 85 cm or more. However, from the viewpoint of heat conduction, the thickness of the substrate is made thin, and in order to make it easier, the radius of curvature should be 80 cm or more.
  • the optimum substrate thickness in consideration of the material (thermal expansion coefficient, etc.) of the supporting member such as a submount or the like using a gallium nitride substrate.
  • the force generated in the active layer of a light-emitting element having a nitride III-V compound semiconductor as a substrate can be controlled by adjusting the substrate thickness, thereby preventing the element from deteriorating due to the force. It becomes possible.

Abstract

A semiconductor light-emitting device comprising a III-V nitride compound semiconductor substrate, a semiconductor multilayer structure formed on the major surface of the substrate, a first electrode formed on the back surface of the substrate, and a second electrode formed on the semiconductor multilayer structure is disclosed. This semiconductor light-emitting device emits a light due to a current flowing between the first electrode and the second electrode. The radius of curvature which defines the amount of bending of the semiconductor light-emitting device is adjusted to be not less than 80 cm.

Description

明 細 書  Specification
窒化物系 III - V族化合物半導体発光素子およびその製造方法 技術分野  Nitride III-V compound semiconductor light emitting device and method of manufacturing the same
本発明は、 G a N系半導体基板などの窒化物系 I I I - V族化合物 半導体基板を用いて形成される窒化物系 I I I - V族化合物半導体発 光素子に関し、 特に、 基板上に成長させ 多層構造に発生する応力 を制御する技術に関している。 背景技術  The present invention relates to a nitride-based III-V compound semiconductor light emitting device formed using a nitride-based III-V compound semiconductor substrate such as a GaN-based semiconductor substrate. The technology relates to controlling the stress generated in the structure. Background art
光ディスクの記憶容量を拡大する めには、 データの読み出し/ 書き込みに必要なレーザ光の波長を短くすることが求められる。 現 在普及している DVDのプレーヤゆレコーダでは、 波長 660 nm 帯の赤色半導体レーザが広く用いられており、 この赤色半導体レ一 ザは、 例えぱ I nGaA l P系化合物半導体を G a A s基板上にェ ピタキシャル成長させることによって製造される。  In order to increase the storage capacity of optical discs, it is necessary to shorten the wavelength of laser light required for reading / writing data. At present, DVD player recorders for DVDs widely use red semiconductor lasers having a wavelength of 660 nm. This red semiconductor laser is, for example, a GaAs compound semiconductor made of InGaAlP-based compound semiconductor. Manufactured by epitaxial growth on a substrate.
近年、 DVDよりも記憶容量を拡大するため、 次世代の光デイス クが活発に開発されている。 そのような次世代光ディスク用の光源 としては、 赤色の光よりも波長が更に短い青紫色レーザ光 (波長 4 OOnm帯) を安定に放射することが要求される。 波長 400nm 帯の G a N系半導体レーザは、 B 1 u— r a yディスク (商標) な どの次世代光ディスクの記録再生用光源として最ち期待されている が、 実用化のために解決しなければならない幾つかの課題を有して し、る。 In recent years, next-generation optical disks have been actively developed to expand the storage capacity of DVDs. Light sources for such next-generation optical discs are required to stably emit blue-violet laser light (wavelength 4 OO nm band) whose wavelength is even shorter than that of red light. 400 nm wavelength GaN-based semiconductor lasers are most expected as light sources for recording and reproduction of next-generation optical disks such as B1u-ray disks (trademark). However, there are some problems that must be solved for practical use.
G a N系半導体レ一ザは、 1 996年に初めてレーザ発振が報告 されて以来、 駆動電流および電圧の低減ゆ、 半導体結晶の欠陥低減 などにより、 その素子寿命を改善する試みがなされてきた。 しかし、 G a N系半導体レーザを構成している G a N系化合物半導体の結晶 品質は充分ではなく、 その素子特性ち実用上要求されるレベルを満 足していない。  Since the first report of laser oscillation in 996, attempts have been made to improve the device life of GaN-based semiconductor lasers by reducing drive current and voltage and reducing defects in semiconductor crystals. . However, the crystal quality of the GaN-based compound semiconductor constituting the GaN-based semiconductor laser is not sufficient and does not satisfy the element characteristics or the level required for practical use.
従来、 G a N系半導体発光素子の製造には、 サファイア基板、 ま たはサファイア上低転位基板が用いられてきたが、 このような基板 は窒化物系 I I I - V族化合物半導体との熱膨張係数差が大きいとい う欠点、 および G a N系半導体レーザの端面形成が容易でないとい う欠点などを有している。  Conventionally, a sapphire substrate or a low dislocation-on-sapphire substrate has been used in the manufacture of a GaN-based semiconductor light-emitting device.However, such a substrate is thermally expanded with a nitride III-V compound semiconductor. It has the disadvantage that the coefficient difference is large and that it is not easy to form the end face of the GaN-based semiconductor laser.
このため 最近は サファイア基板に代えて G a N基板を用いる ことが検討されている (例えば、 Technical report of IEICE For this reason, the use of GaN substrates instead of sapphire substrates has recently been studied (for example, Technical Report of IEICE).
LQE2001-29, 73 (2001)) 。 しかしながら、 G a N基板を用い 発 光素子に関して、 実用上要求される寿命時間レベルを満 す素子は 得られていない。 LQE2001-29, 73 (2001)). However, for a light emitting device using a GaN substrate, no device that satisfies the practically required life time level has been obtained.
本発明者は、 G a N系半導体レーザゆ発光ダイ才一ドの劣化を促 進する要因のひとつが活性層に働く 力であると考え 。 本発明者 の検討によると、 活性層に大きな引張り麻力が働し、ている場合、 素 子劣化が著しく、 寿命時間は極度に低下する。 このような 力は、 素子を形成する基板の種類と、 素子を構成する窒化物系 I I I - V族 化合物半導体の結晶成長時および接合材料による実装時の熱履歴に 強く依存する。 The present inventor believes that one of the factors that promotes the deterioration of the GaN-based semiconductor laser and the light emitting die is the force acting on the active layer. According to the studies made by the present inventors, when a large tensile force acts on the active layer, the element is significantly deteriorated, and the life time is extremely reduced. Such force depends on the type of substrate that forms the device and the nitride III-V group that forms the device. It depends strongly on the thermal history during crystal growth of compound semiconductors and during mounting with bonding materials.
これまでのところ、 G a N基板を用いる発光素子について、 その 活性層の^力に起因する素子劣化を防止する有力な方法は提案され ていない。  So far, no effective method has been proposed for preventing the deterioration of a light emitting device using a GaN substrate due to the force of the active layer.
本発明は、 上記課題を解決するためになされたちのであり、 その 目的は、 ¾力に起因する素子劣化を防止し、 寿命時間を改善した半 導体発光素子およびその製造方法を提供することにある。 発明の開示  The present invention has been made in order to solve the above problems, and an object of the present invention is to provide a semiconductor light emitting device which prevents device deterioration due to force and has an improved life time, and a method for manufacturing the same. . Disclosure of the invention
本発明の窒化物系 I I I - V族化合物半導体発光素子は、 窒化物系 The nitride-based II I-V compound semiconductor light-emitting device of the present invention comprises a nitride-based
I I I - V族化合物半導体基板と、 前記基板の主面に設けられだ半導 体積層構造と、 前記基板の裏面に形成された第 1電極と、 前記半導 体積層構造上に形成され 第 2電極とを有する半導体発光素子であ つて、 前記半導体発光素子は、 前記第 1電極と前記第 2電極との間 を流れる電流によって発光し、 前記半導体発光素子の反り量を規定 する曲率半径が 8〇 c m以上に調節されている。 A III-V compound semiconductor substrate, a semiconductor laminated structure provided on a main surface of the substrate, a first electrode formed on a back surface of the substrate, and a second electrode formed on the semiconductor laminated structure. Wherein the semiconductor light-emitting element emits light by a current flowing between the first electrode and the second electrode, and has a radius of curvature that defines the amount of warpage of the semiconductor light-emitting element. Adjusted to 〇 cm or more.
好ましい実施形態において、 曲率半径は 8 3 c m以上であり、 必 要に じて 8 9 c m以上に設定される。  In a preferred embodiment, the radius of curvature is greater than or equal to 83 cm and, if necessary, is greater than or equal to 89 cm.
好ましい実施形態において、 前記基板の厚さは、 1 0 0 171を超 え、 5〇〇 m以下である。  In a preferred embodiment, the thickness of the substrate is more than 100 171 and not more than 5 μm.
好ましい実施形態において、 前記基板の厚さは、 1 5〇 ju mを超 える。  In a preferred embodiment, the thickness of the substrate is more than 15 jum.
好ましい実施形態において、 前記基板は G a N系化合物半導体基 板であ ·©。 In a preferred embodiment, the substrate is a GaN-based compound semiconductor group. · ©.
半導体発光素子モジュールは、 上記いずれかの窒化物系 III - V 族化合物半導体発光素子と、 前記窒化物系 in - V族化合物半導体 発光素子が固着された支持部材とを備え、 前記支持部材および前記 半導体発光素子は溶融金属によって接合されている。  The semiconductor light-emitting element module includes any one of the nitride-based III-V compound semiconductor light-emitting elements and a support member to which the nitride-based in-V compound semiconductor light-emitting element is fixed. The semiconductor light emitting elements are joined by a molten metal.
窒化物系 III - V族化合物半導体素子モジュールの製造方法は、 窒化物系 ΙΠ - V族化合物半導体基板と、 前記基板の主面に設けら れた半導体積層構造と、 前記基板の裏面に形成された第 1電極と、 前記半導体積層構造上に形成された第 2電極とを有する半導体発光 素子を用意する工程 (Α) と、 接合材料を用いて前記窒化物系 III - V族化合物半導体素子をパッケージへ実装する工程 (Β) とを含 窒化物系 III - V族化合物半導体素子モジュールの製造方法であ つて 前記半導体発光素子の基板の厚さおよび前記工程 (Β) にお ける実装温度を調節することにより、 前記半導体積層構造に発生す る J 力の絶対値を 0, 22GP a以下に制御する。  A method of manufacturing a nitride III-V compound semiconductor device module includes: forming a nitride III-V compound semiconductor substrate; a semiconductor laminated structure provided on a main surface of the substrate; and a back surface of the substrate. Preparing a semiconductor light emitting device having a first electrode formed on the semiconductor laminated structure and a second electrode formed on the semiconductor laminated structure (Α); and using a bonding material to form the nitride III-V compound semiconductor device. A method of manufacturing a nitride-based III-V compound semiconductor device module including the step of mounting on a package (Β), wherein the thickness of the substrate of the semiconductor light emitting element and the mounting temperature in the step (Β) are adjusted. By doing so, the absolute value of the J force generated in the semiconductor multilayer structure is controlled to 0.22 GPa or less.
好ましい実施形態において、 前記工程 (B) は、 前記半導体発光 素子をサブマウン卜に載せる工程を含んでおり、 前記サブマウン卜 の熱膨張係数および前記実装温度に^じて前記基板の厚さを調整す る。  In a preferred embodiment, the step (B) includes a step of mounting the semiconductor light-emitting device on a submount, and adjusting a thickness of the substrate according to a coefficient of thermal expansion of the submount and the mounting temperature. You.
図面の簡単な説明 BRIEF DESCRIPTION OF THE FIGURES
図 1は、 本発明による窒化物系 I I I - V族化合物半導体発光素子 の構成を示す断面図である。  FIG. 1 is a cross-sectional view showing a configuration of a nitride-based II I-V compound semiconductor light emitting device according to the present invention.
図 2は、 図 1 の素子がジャンクションアップ配置でサブマウン卜 上に実装された状態を示す断面図である。 図 3は、 図 1 の素子がジャンクションダウン配置でサブマウン卜 上に実装された状態を示す断面図である。 FIG. 2 is a cross-sectional view showing a state in which the elements of FIG. 1 are mounted on a submount in a junction-up arrangement. FIG. 3 is a cross-sectional view showing a state in which the device of FIG. 1 is mounted on a submount in a junction-down arrangement.
囡 4は、 本発明の実施形態における発光素子の活性層に印加され る麻力と、 基板厚さとの関係を示すグラフである。  FIG. 4 is a graph showing the relationship between the narcotic force applied to the active layer of the light emitting device and the substrate thickness in the embodiment of the present invention.
図 5は、 素子の反り量と反りの曲率半径との関係を示す図面であ る。  FIG. 5 is a drawing showing the relationship between the amount of warpage of the element and the radius of curvature of the warp.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
G a N基板は、 サファイア基板に比べて熱伝導率が高く、 放熱性 に優れているが、 レーザ動作時における素子温度の上昇をできるか ぎり低く抑えるため、 可能な限り薄くして用いることが好ましいと 考えられている。 The GaN substrate has higher thermal conductivity and better heat dissipation than the sapphire substrate, but it should be used as thin as possible in order to minimize the rise in device temperature during laser operation. It is considered favorable.
しかし、 本発明者の検討によると、 G a N基板を用いた場合、 そ の基板厚によって素子寿命が大きく変動することがわかった。 半導 体レーザなどの発光素子に使用する基板は、 薄 Ι ほど放熱に有利で あるため、 G a N基板ち薄いちのほど素子寿命の向上に寄与すると 考えられてきたが、 本発明者は、 基板厚が薄いと却つて素子寿命が 劣化することを見出し、 本発明を想到するにい った。  However, according to the study by the present inventors, it has been found that when a GaN substrate is used, the element life greatly varies depending on the thickness of the substrate. It has been considered that the thinner the substrate used for a light emitting element such as a semiconductor laser, the better the heat dissipation, and the thinner the GaN substrate, the longer the life of the element. The inventors have found that when the substrate thickness is small, the life of the element is rather deteriorated, and have arrived at the present invention.
G a N基板を用いる場合は、 チップ状態の発光素子をサブマウン 卜などを介してパッケージのヒー卜シンクに実装するに際して、 G a A s系半導体レーザでは問題にならなかったような小さな歪が発 生しても、 素子寿命が劣化する傾向がある。 これは、 おそらく G a N系半導体の硬度が G a A s系半導体の硬度に比べて高く、 同じ大 きさの歪が発生しても、 より大きな内部 i力が生じるためであると 考えられる。 そして、 そのような 力が活性層に印加されると、 結 晶性の劣化が進行するなどして素子寿命を短縮させてしま と推定 でぎる。 When a GaN substrate is used, when mounting a light emitting element in a chip state on a heat sink of a package via a submount or the like, a small distortion that does not pose a problem with a GaAs semiconductor laser is generated. Even if it is produced, the element lifetime tends to be degraded. This is probably because the hardness of the GaN-based semiconductor is higher than the hardness of the GaAs-based semiconductor, and even if the same magnitude of strain occurs, a larger internal i force is generated. Conceivable. Then, it is estimated that when such a force is applied to the active layer, the deterioration of crystallinity proceeds and the device life is shortened.
後述する実験によると、 G a N基板の厚さを、 従来好ましし、と考 えられてきた基板厚さ (5 0〜6 5 m程度) よりも大きく設定す ることにより、 素子寿命の劣化を抑制することが可能になる。  According to the experiments described later, by setting the thickness of the GaN substrate larger than the substrate thickness (approximately 50 to 65 m) which has been considered to be preferable in the past, the life of the element can be reduced. Deterioration can be suppressed.
(第 1実施形態)  (First Embodiment)
以下、 図面を参照しながら、 本発明による半導体発光素子の第 1 の実施形態を説明する。  Hereinafter, a first embodiment of a semiconductor light emitting device according to the present invention will be described with reference to the drawings.
まず 図 1 を参照する。 囡1 は、 本実施形態に係る窒化物系 I I I First, refer to FIG.囡 1 is a nitride-based material according to the present embodiment I I I
- V族化合物半導体レーザの断面図である。 FIG. 2 is a sectional view of a group V compound semiconductor laser.
このレーザは、 図 1 に示すように、 n型の窒化ガリウムからなる 基板 1 1 と、 基板 1 1上に形成された積層構造とを有している。 こ の積層構造は 基板 1 1 に近い側から順に n型バッファ層 1 2、 n型クラッド層 1 3、 n型ガイド層 1 4、 活性層 (多重璗子井戸 層) 1 5、 p型ガイド層 1 6、 p型クラッド層 1 了、 p型コンタク ト層 1 8、 および電流狭窄絶縁層 1 9を含んでいる。  As shown in FIG. 1, this laser has a substrate 11 made of n-type gallium nitride and a laminated structure formed on the substrate 11. The stacked structure has an n-type buffer layer 12, an n-type cladding layer 13, an n-type guide layer 14, an active layer (multiple electron well layer) 15, and a p-type guide layer in order from the side closer to the substrate 11. 16, a p-type cladding layer 1, a p-type contact layer 18, and a current confinement insulating layer 19.
p型コンタクト層 1 8は、 共振器長方向に沿って延びるリッジを 有しており、 このリッジの上面以外の領域が電流狭窄絶縁層 1 9に よって覆われている。 電流狭窄絶縁層 1 9上には 0型電極 2〇 bが 設けられ、 p型電極 2〇 bと p型コンタク卜層 1 8との間には P型 電極 2 0 aが配置されている。 この p型電極 2 0 aは 型コンタク 卜層 1 8の上面の ち、 電流狭窄絶縁層 1 9で覆われていない部分 (リッジの上面) と電気的にコンタク卜している。 なお、 基板 1 1 の裏面には n型電極 2 1が設けられている。 The p-type contact layer 18 has a ridge extending along the cavity length direction, and a region other than the upper surface of the ridge is covered with the current confinement insulating layer 19. A 0-type electrode 2 絶 縁 b is provided on the current confinement insulating layer 19, and a P-type electrode 20a is arranged between the p-type electrode 2〇b and the p-type contact layer 18. This p-type electrode 20a is a portion of the upper surface of the type contact layer 18 that is not covered with the current confinement insulating layer 19 (Upper surface of the ridge). Note that an n-type electrode 21 is provided on the back surface of the substrate 11.
上記の積層構造を構成している各層の組成および厚さは、 例えば 以下の表 1 に示すように設定され得る。  The composition and thickness of each layer constituting the above laminated structure can be set, for example, as shown in Table 1 below.
【表 1】  【table 1】
Figure imgf000009_0001
図 1のレーザでは、 p型電極 2 0 a、 2〇 bと n型電極 2 1 との 間を電流が縦方向に流れることにより、 活性層 1 5の近傍で発光が 生じる。 図 2は、 ジャンクションアップ配置によってサブマウン卜 2 2上 に実装された図 1 のレーザを示している。 サブマウント 2 2は、 導 電性および放熱性に優れる窒化アルミニウムから形成されており、 不図示のパッケージ内のヒー卜シンク上に配置される。 なお、 本明 細書では、 半導体発光素子のチップが固着される対象物を、 サブマ ゥン卜かヒ一卜シンクかによらず、 「支持部材」 と称する場合があ る。 また、 本明細書では、 このような支持部材上に半導体発光素子 が固着されたパッケージを 「半導体発光素子モジュール」 と称する こととする。
Figure imgf000009_0001
In the laser shown in FIG. 1, a current flows in the vertical direction between the p-type electrodes 20 a and 2 〇 b and the n-type electrode 21, so that light emission occurs near the active layer 15. FIG. 2 shows the laser of FIG. 1 mounted on a submount 22 by a junction-up arrangement. The submount 22 is made of aluminum nitride having excellent conductivity and heat dissipation, and is arranged on a heat sink in a package (not shown). In this specification, an object to which a chip of a semiconductor light emitting element is fixed may be referred to as a “support member” regardless of whether it is a submount or a heat sink. In this specification, a package in which a semiconductor light emitting element is fixed on such a support member is referred to as a “semiconductor light emitting element module”.
ジャンクションアップ実装の場合 n型電極 2 1 がサブマウン卜 In the case of junction-up mounting, the n-type electrode 21 is sub-mounted
2 2の主面に接合され、 レーザの P N接合部とサブマウント 2 2と の間に G a N基板 1 1が介在している。 活性層 1 5で発生した熱は、 主として G a N基板 1 1 を介してサブマウン卜 2 2に流れ、 ヒー卜 シンクに拡散される。 22 and a GaN substrate 11 is interposed between the laser PN junction and the submount 22. The heat generated in the active layer 15 mainly flows to the submount 22 via the GaN substrate 11 and is diffused to the heat sink.
図 3は、 ジャンクションダウン配置によってサプマウント 2 2上 に実装された図 1のレーザを示している。 ジャンクションダウン実 装の場合、 p型電極 2 1がサブマウン卜 2 2の主面に接合され、 レ —ザの P N接合部とサブマウント 2 2との間に基板 1 1 は位置して いなし、。  FIG. 3 shows the laser of FIG. 1 mounted on a submount 22 with a junction-down arrangement. In the case of junction-down mounting, the p-type electrode 21 is bonded to the main surface of the submount 22 and the substrate 11 is not located between the PN junction of the laser and the submount 22. .
図 2および図 3に示す実装は、 いずれの場合でち、 典型的には 1 The implementations shown in Figures 2 and 3 are either case, typically 1
9 0 °C~ 2 6 0 °Cの温度で行なわれる。 これは、 通常、 サブマウン ト 2 2とレーザの電極との結合 ·固着がはんだづけによって行なわ れるからである。 このよラな温度で実装工程が行なわれる結果、 接 合後に室温に戻ったときの半導体発光素子とサブマウントとの間に は、 両者の熱膨張率差に起因して歪および内部 力が発生すること になる。 This is performed at a temperature of 90 ° C to 260 ° C. This is because the bonding and fixing between the submount 22 and the electrode of the laser are usually performed by soldering. As a result of the mounting process being performed at such a high temperature, Strain and internal force are generated between the semiconductor light emitting element and the submount when the temperature returns to room temperature after the combination, due to the difference in thermal expansion coefficient between the two.
以下の表 2は、 図 2または図 3に示す実装を行なった本実施形態 の半導体レーザについて、 その活性層に生じる麻力を計算し 結果 を示してし、る。  Table 2 below shows the results of calculating the narcotic force generated in the active layer of the semiconductor laser of the present embodiment mounted as shown in FIG. 2 or FIG.
【表 2】  [Table 2]
Figure imgf000011_0001
表 2に示す^力のマイナス符号は、 「引っ張り麻力」 を意味して おり、 プラス符号は 「圧縮麻力」 を意味している。
Figure imgf000011_0001
The minus sign of ^ force in Table 2 means "pulling force" and the plus sign means "compression force".
表 2からわかるように、 ジャンクションダウン法で実装した場合 には、 活性層に働く応力は基板の厚さよらずに引張り応力である。 また、 基板厚が増加するにつれて 力の 「絶対値」 が減少している c 一方、 ジャンクションアップ法で実装し 場合、 活性層に働く 力の正負符号は、 基板厚が 5 0〜 2 0 0 Ai mのとき、 マイナスであ り、 基板厚さが増加するにつれて 力の絶対値は減少している。 そ して、 基板厚が 2 0 O i mと 5 0 0 mとの間のある値において、 活性層に働く麻力の絶対値は略〇となり、 その後、 力の正負符号 がブラスに転じている。 図 4は、 上記の表 2の内容をグラフ化し 図面である。 図 4のグ ラフの縦軸は 力であり、 横軸は基板厚である。 ジャンクションァ ップ実装で得られるデータは、 「酾」 のポイン卜が対廂し、 ジヤン クシヨンダウン実装で得られるデータは、 「▲」 のポイントが対 ¾ する。 As can be seen from Table 2, when mounted by the junction-down method, the stress acting on the active layer is a tensile stress regardless of the thickness of the substrate. Moreover, whereas c "absolute value" of the force is reduced as the substrate thickness increases, when mounted in a junction-up method, the sign of the force acting on the active layer, the substrate thickness is 5 0~ 2 0 0 Ai At m, it is negative, and the absolute value of the force decreases as the substrate thickness increases. Then, at a certain substrate thickness between 20 Oim and 500 m, the absolute value of the narcotic force acting on the active layer becomes substantially 、, and then the sign of the force changes to brass. . Figure 4 is a graph of the contents of Table 2 above. The vertical axis of the graph in Fig. 4 is force, and the horizontal axis is substrate thickness. The data obtained by the junction-up implementation is the point of “酾”, and the data obtained by the junction-down implementation is the point of “▲”.
表 2および図 4からわかるように、 窒化アルミニウムからなるサ ブマウントを用いた実装の場合において、 実装温度を 1 90°C〜2 60°Cの範囲に設定するとき、 窒化ガリウム基板 1 1の厚さが 1 0 0 m超 500 m以下であれば、 活性層に働く 力の範囲を一 0. 1 2GP a以上 +0. 03 G P a以下の範囲に調節することができ る。 活性層に印加される麻力が大きくなると、 素子の信頼性に重大 な障害をもたらすため、 この 15力は上記の範囲内に抑えることが好 まし 、。  As can be seen from Table 2 and Fig. 4, in the case of mounting using a submount made of aluminum nitride, when the mounting temperature is set in the range of 190 to 260 ° C, the thickness of the gallium nitride substrate 11 If it is more than 100 m and less than 500 m, the range of the force acting on the active layer can be adjusted to a range of more than 0.12 GPa and less than +0.03 GPa. It is preferable to keep these 15 forces within the above range, because an increase in the power applied to the active layer causes a serious impairment in the reliability of the device.
なお ジャンクションアップ配置の場合、 基板厚さが 65n 以上 500 m以下であれば、 活性層の ¾力を一 0. 1 2GP a以 上 +0. 03G P a以下の範囲に抑制することができる。 表 2には 示されていないが、 図 4に基づいて推察すると、 ジャンクションァ ップ配置の場合、 基板厚さが 200 m以上 500 u m以下の範囲 内に] ^力の絶対値を最も小さくする値が存在している。 活性層に働 く引っ張り ¾力を低減するという観点では、 基板厚さを大きくする ほど有利である。 しかし、 500 mを越えるような厚さの基板で は、 へき開による発光素子の端面形成が困難になる。 し がって、 窒化ガリウム基板の厚さは、 活性層に働く疝力が低いレベルに抑制 され、 なおかつ、 へき開が容易である厚さに設定されることが好ま しい。 In the case of the junction-up arrangement, if the substrate thickness is 65 n or more and 500 m or less, the power of the active layer can be suppressed within the range of 0.12 GPa or more and +0.03 GPa or less. Although not shown in Table 2, it is inferred based on Fig. 4 that, in the case of the junction-up arrangement, the substrate thickness is within the range of 200 m or more and 500 um or less] ^ Minimize the absolute value of the force Value exists. From the viewpoint of reducing the tensile force acting on the active layer, it is advantageous to increase the thickness of the substrate. However, with a substrate having a thickness exceeding 500 m, it becomes difficult to form the end face of the light emitting element by cleavage. Therefore, the thickness of the gallium nitride substrate is suppressed to a low level of collicity acting on the active layer. It is preferable that the thickness is set so that cleavage is easy.
ジャンクションアツプ実装の場合、 活性層に生じる^力の絶対値 を更に小さい範囲に抑えるには、 基板厚は 1 0 0 m超 5 0 0 m 以下であることが好ましく、 基板厚は 1 5 〇 mを超えることが更 に好ましい。  In the case of junction-up mounting, the board thickness is preferably more than 100 m and not more than 500 m to keep the absolute value of the force generated in the active layer in a smaller range. It is even more preferred to exceed
表 2および図 4から明らかなように、 基板厚が同じであれば、 ジ ヤンクションダウン実装の場合に方がジヤンクシヨンアツプ実装の 場合に比べて活性層に働く 力の絶対値が大きい傾向がある。 し がって、 基板厚を大きくする設定することによる効果は、 ジャンク シヨンダウン実装の場合において、 より顕著である。  As is clear from Table 2 and Fig. 4, when the board thickness is the same, the absolute value of the force acting on the active layer tends to be larger in the junction-down mounting than in the junction-up mounting. is there. Therefore, the effect of setting the board thickness large is more remarkable in the case of junk-down mounting.
ジャンクションダウン実装の場合も、 基板厚の好ましい大きさは, 1 0 0 m超であり、 より好ましくは 1 5 0 m超である。  Also in the case of junction-down mounting, the preferable size of the substrate thickness is more than 100 m, and more preferably more than 150 m.
なお、 基板厚が大き (/U昜合、 素子の端面形成が容易になるように 基板形状を加工することが好ましい。 例えぱ、 基板において素子端 面が形成される部位の裏面側にス卜ライプ溝を形成しておけば、 へ き開による端面形成が容易に行なえるようになる。  In addition, it is preferable that the substrate shape is processed so that the substrate thickness is large (/ U easily, and the end surface of the element is easily formed. For example, a stripe is formed on the back surface side of the substrate where the element end surface is formed). If a lip groove is formed, the end face can be easily formed by cleavage.
なお、 半導体発効素子を構成する各層に働く廂力を実際に測定す ることは難しし、が、 廂力に対! ^する素子の反り量を測定することは 比較的容易である。 このため、 素子の反り量は、 例えば干渉計を用 いることにより測定することができる。  In addition, it is difficult to actually measure the cooling force acting on each layer constituting the semiconductor effect element. It is relatively easy to measure the amount of warpage of an element that is warped. Therefore, the amount of warpage of the element can be measured by using, for example, an interferometer.
図 5は、 本実施形態で測定した素子の反り量と、 反りの曲率半径 との関係を示している。 共振器長をし、 チップの反り量を d、 反りの曲率半径を Rとする と、 以下の式が成立する。 FIG. 5 shows the relationship between the amount of warpage of the element measured in the present embodiment and the radius of curvature of the warp. If the cavity length is set, the amount of warpage of the chip is d, and the radius of curvature of the warp is R, the following equation is established.
d = R - ( 1 - c o s Θ)  d = R-(1-c os Θ)
上記の式は、 近似的に R— R · (1 -Θ2/2) に等しい。 The above equation is equal to approximately R- R · (1 -Θ 2/ 2).
d = R-R · (1— Θ2 2) d = RR · (1— Θ 2 2)
=R · Θ2/2 = R · Θ 2/2
ここで、 L = 2R〇の関係を用いると、  Here, using the relation of L = 2R〇,
d = L2/8Rが得られる。 d = L 2 / 8R is obtained.
この関係式を用いると、 チップの反り量 dと曲率半径 Rとが関係 付けられる。  Using this relational expression, the amount of warp d of the tip and the radius of curvature R are related.
以下の表 3は、 図 1の素子を、 窒化アルミニウムからなるサブマ ゥン卜上にジャンクションダウン配置で実装し 場合に得られる素 子の反り量を示してし、る。  Table 3 below shows the amount of device warpage obtained when the device of FIG. 1 is mounted in a junction-down arrangement on a submount made of aluminum nitride.
【表 3]  [Table 3]
Figure imgf000014_0001
Figure imgf000014_0001
表 3の上段は、 表 2の麻力計算から求められる素子の反り璗を示 しており、 下段の実測値と良く一致している。 表 3に示すように、 窒化ガリウム基板の厚さが 1 00 Aimの場合、 素子の反り量は 0. 〇79 im、 窒化ガリウム基板の厚さが 200 mの場合、 素子の 反り量は〇. 076 imであっ 。 Lを 7 5 0 mとして求めた曲率半径を以下の表 4に示す ( 【表 4】 The upper part of Table 3 shows the warpage 璗 of the element obtained from the narcotic power calculation in Table 2, which agrees well with the measured values in the lower part. As shown in Table 3, when the thickness of the gallium nitride substrate is 100 Aim, the warpage of the device is 0.〇79 im, and when the thickness of the gallium nitride substrate is 200 m, the warpage of the device is 〇. 076 im. Table 4 below shows the radius of curvature obtained by setting L to 75 m ( Table 4).
Figure imgf000015_0001
表 4からわかるように、 基板厚が 1 0 0〜2 0 0 mの範囲にあ るとき、 素子の曲率半径は、 およそ 8 9〜9 3 c mの範囲に入って いる。 サブマウントが窒化アルミニウムからなる場合、 ジャンクシ ョンダウン配置における曲率半径の好ましい下限値は、 8 9 c mで 上記の説明からわかるように、 窒化ガリウム基板の厚さを調節す ることにより 素子の活性層に働く庙カを制御することが可能であ る。
Figure imgf000015_0001
As can be seen from Table 4, when the substrate thickness is in the range of 100 to 200 m, the radius of curvature of the element is in the range of about 89 to 93 cm. When the submount is made of aluminum nitride, the preferable lower limit of the radius of curvature in the junction-down arrangement is 89 cm. As can be seen from the above description, by adjusting the thickness of the gallium nitride substrate, the active layer of the element can be formed. It is possible to control the working lights.
(第 2実施形態)  (Second embodiment)
以下、 本発明の第 2の実施形態を説明する。  Hereinafter, a second embodiment of the present invention will be described.
本実施形態が第 1の実施形態と異なる点は、 前述の窒化アルミ二 ゥムからなるサブマウン卜 2 2を用し、る代わりに、 炭化珪素からな るサブマウン卜を用いている点のみにある。  The present embodiment is different from the first embodiment only in that the above-described submount 22 made of aluminum nitride is used, and instead of using the submount made of silicon carbide. .
ジャンクションダウン法ま はジャンクションアップ法によって 図 1 の素子を炭化珪素からなるサブマウン卜上に実装した状態にお いて、 素子の活性層に働く麻力を計算した。 その結果の一部を下記 の表 5に記載する。 The device shown in Fig. 1 is mounted on a submount made of silicon carbide by the junction down method or the junction up method. And calculated the narcotic force acting on the active layer of the device. Some of the results are shown in Table 5 below.
【表 5】  [Table 5]
Figure imgf000016_0001
表 5からわかるように、 本実施形態における J 力と基板厚さとの 関係も 第 1の実施形態における場合と同様の傾向を示している。 炭化珪素からなるサブマウン卜を用いた実装の場合においてち、 実装温度を 1 90°C〜260°Cの範囲に設定するとき、 基板厚を 1
Figure imgf000016_0001
As can be seen from Table 5, the relationship between the J force and the substrate thickness in the present embodiment also shows the same tendency as in the first embodiment. In the case of mounting using a submount made of silicon carbide, when setting the mounting temperature in the range of 190 ° C to 260 ° C,
OO i m以上 500 m以下の範囲内で適切な値に設定することに より 活性層に働く麻力の範囲を一 ◦ . 22GP a以上 +◦. 03By setting an appropriate value within the range of OO i m or more and 500 m or less, the range of the narcotic force acting on the active layer is reduced by 1 ◦ .22 GPa or more + ◦ 03
G P a以下の範囲に抑制することができる。 It can be suppressed to the range of GPa or less.
上記の範囲を超える厚さの基板を用いた素子では、 活性層に働く 廂力が過度になるのみならず、 素子の八ンドリングゆ端面形成を困 難にする め好ましくない。  An element using a substrate having a thickness exceeding the above range is not preferable because not only the excessive force acting on the active layer becomes excessive, but also it becomes difficult to form an end face of the element.
以下の表 6は、 図 1の素子をジャンクションダウン法により炭化 珪素からなるサブマウン卜上に実装した場合について、 素子の反り 量を測定し 結果を示してし、る。 【表 6】 Table 6 below shows the results of measuring the amount of warpage of the device when the device of FIG. 1 was mounted on a submount made of silicon carbide by the junction down method. [Table 6]
Figure imgf000017_0001
表 6の上段は、 ^力計算から求められる素子の反り量の計算値を 示しており 下段は 反り曇の実測値を示している。 表 6に示され るように、 窒化ガリウム基板の厚さが 1 OO mの場合、 素子の反 り量は 0. 085 m、 窒化ガリウム基板の厚さが 200 mの揚 合、 素子の反り量は〇. 080 imであつだ。
Figure imgf000017_0001
The upper part of Table 6 shows the calculated value of the warpage of the element obtained from the ^ force calculation, and the lower part shows the measured value of the warpage fogging. As shown in Table 6, when the thickness of the gallium nitride substrate is 100 m, the warpage of the device is 0.085 m, and when the thickness of the gallium nitride substrate is 200 m, the warpage of the device Ha〇. 080 im.
以上の結果からわかるように、 炭化珪素からなるサブマウン卜を 用いる場合は、 窒化アルミニウムからなるサブマウン卜を用いる場 合よりも、 基板厚を大きめに設定することが好ましし、。 なお、 サブ マウン卜が炭化珪素から形成されている場合、 ジャンクションダウ ン配置における曲率半径は、 サブマウン卜が窒化アルミニウムから 形成されている場合に比べて小さくなる。 この め、 本実施形態に おける曲率半径の好ましい下限値は 8 3 c mであり、 より好ましく は 8 5 c m以上である。 ただし、 熱伝導の観点などから、 基板を薄 く形成したし U昜合は、 曲率半径が 8 0 c m以上になるようにすれば よし、。 As can be seen from the above results, when using a submount made of silicon carbide, it is preferable to set a larger substrate thickness than when using a submount made of aluminum nitride. When the submount is formed from silicon carbide, the radius of curvature in the junction down arrangement is smaller than when the submount is formed from aluminum nitride. Therefore, in this embodiment, The preferred lower limit of the radius of curvature is 83 cm, more preferably 85 cm or more. However, from the viewpoint of heat conduction, the thickness of the substrate is made thin, and in order to make it easier, the radius of curvature should be 80 cm or more.
このよ に、 窒化ガリウム基板を用いる揚合、 サブマウン卜など の支持部材の材質 (熱膨張係数など) を考慮して最適な基板厚を決 定することが好ましい。 産業上の利用可能性  As described above, it is preferable to determine the optimum substrate thickness in consideration of the material (thermal expansion coefficient, etc.) of the supporting member such as a submount or the like using a gallium nitride substrate. Industrial applicability
本発明によれぱ、 窒化物系 I I I - V族化合物半導体を基板とする 発光素子の活性層に生じる 力を、 基板厚の調整によって制御する ことができ、 力に起因する素子の劣化を防止することが可能にな る。  According to the present invention, the force generated in the active layer of a light-emitting element having a nitride III-V compound semiconductor as a substrate can be controlled by adjusting the substrate thickness, thereby preventing the element from deteriorating due to the force. It becomes possible.

Claims

請 求 の 範 囲 The scope of the claims
1. 窒化物系 in - V族化合物半導体基板と、 前記基板の主面 に設けられた半導体積層構造と、 前記基板の裏面に形成され 第 1 電極と、 前記半導体積層構造上に形成された第 2電極とを有する半 導体発光素子であって、 1. a nitride-based in-V compound semiconductor substrate, a semiconductor laminated structure provided on a main surface of the substrate, a first electrode formed on a back surface of the substrate, and a first electrode formed on the semiconductor laminated structure. A semiconductor light emitting device having two electrodes,
前記半導体発光素子は、 前記第 1電極と前記第 2電極との間を to  The semiconductor light emitting device may include: a space between the first electrode and the second electrode;
Λ し れる電流によって発光し、  発 光 The light is emitted by the current
前記半導体発光素子の反り量を規定する曲率半径が 80 c m以上 に調節されている窒化物系 III - V族化合物半導体発光素子。  A nitride-based III-V compound semiconductor light-emitting device, wherein a radius of curvature defining a warpage of the semiconductor light-emitting device is adjusted to 80 cm or more.
2. 前記基板の厚さは、 1 00 mを超え、 500jum以下で ある請求項 1に記載の窒化物系 III - V族化合物半導体発光素子。 2. The nitride III-V compound semiconductor light emitting device according to claim 1, wherein the thickness of the substrate is more than 100 m and not more than 500 jum.
3. 前記基板の厚さは 1 5〇 mを超える請求項 2に記載の 窒化物系 III - V族化合物半導体発光素子。 3. The nitride-based III-V compound semiconductor light-emitting device according to claim 2, wherein the thickness of the substrate exceeds 15 m.
4. 前記基板は G a N系化合物半導体基板である、 請求項 1か ら 3のいずれかに記載の窒化物系 III - V族化合物半導体発光素子 ( 4. The substrate is a G a N-based compound semiconductor substrate, the nitride according to claim 1 or et 3 III - V group compound semiconductor light emitting device (
5. 請求項 1から 4のいずれかに記載の窒化物系 III - V族化 合物半導体発光素子と、 5. A nitride III-V compound semiconductor light emitting device according to any one of claims 1 to 4,
前記窒化物系 III - V族化合物半導体発光素子が固着されだ支持 部材、  A support member to which the nitride III-V compound semiconductor light emitting device is fixed;
を備え、 前記支持部材および前記半導体発光素子は溶融金属によって接合 されている、 半導体発光素子モジュール。 With The semiconductor light emitting device module, wherein the support member and the semiconductor light emitting device are joined by a molten metal.
6. 窒化物系 III - V族化合物半導体基板と、 前記基板の主面 に設けられだ半導体積層構造と、 前記基板の裏面に形成された第 1 電極と、 前記半導体積層構造上に形成された第 2電極とを有する半 導体発光素子を用意する工程 (A) と、 6. a nitride III-V compound semiconductor substrate, a semiconductor laminated structure provided on a main surface of the substrate, a first electrode formed on a back surface of the substrate, and a semiconductor electrode formed on the semiconductor laminated structure. A step (A) of preparing a semiconductor light emitting device having a second electrode;
接合材料を用いて前記窒化物系 M l - V族化合物半導体素子をパ ッケージへ実装する工程 (B) と、  (B) mounting the nitride-based Ml-V compound semiconductor device in a package using a bonding material;
を含 窒化物系 II I - V族化合物半導体素子モジュールの製造方法 であって、 A method for manufacturing a nitride-based II I-V compound semiconductor device module, comprising:
前記半導体発光素子の基板の厚さおよび前記工程 (B) における 実装温度を調節することにより、 前記半導体積層構造に発生する 力の絶対値を 0, 22G P a以下に制御する、 窒化物系 II I - V族 化合物半導体素子モジュールの製造方法。  By controlling the thickness of the substrate of the semiconductor light emitting device and the mounting temperature in the step (B), the absolute value of the force generated in the semiconductor laminated structure is controlled to 0.22 GPa or less. A method for manufacturing an I-V compound semiconductor element module.
7. 前記工程 (B) は、 前記半導体発光素子を支持部材に載せ る工程を含んでおり、 7. The step (B) includes a step of mounting the semiconductor light emitting device on a support member,
前記支持部材の熱膨張係数および前記実装温度に麻じて前記基板 の厚さを調整する、 請求項 6に記載の窒化物系 M l - V族化合物半 導体素子モジュールの製造方法。  The method for producing a nitride-based Ml-V compound semiconductor device module according to claim 6, wherein the thickness of the substrate is adjusted in accordance with the thermal expansion coefficient of the support member and the mounting temperature.
PCT/JP2004/002589 2003-03-06 2004-03-02 Iii-v nitride compound semiconductor light-emitting device and method for manufacturing same WO2004079830A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003059926A JP2006179508A (en) 2003-03-06 2003-03-06 Method for preventing degrading of nitride-based group iii-v compound semiconductor light-emitting device
JP2003-059926 2003-03-06

Publications (1)

Publication Number Publication Date
WO2004079830A1 true WO2004079830A1 (en) 2004-09-16

Family

ID=32958865

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2004/002589 WO2004079830A1 (en) 2003-03-06 2004-03-02 Iii-v nitride compound semiconductor light-emitting device and method for manufacturing same

Country Status (2)

Country Link
JP (1) JP2006179508A (en)
WO (1) WO2004079830A1 (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168445A (en) * 1999-09-30 2001-06-22 Denso Corp Semiconductor laser
JP2002043695A (en) * 2000-07-26 2002-02-08 Sharp Corp Light emitting element
JP2002175985A (en) * 2000-12-05 2002-06-21 Hitachi Cable Ltd Method for manufacturing nitride semiconductor epitaxial wafer and the nitride semiconductor epitaxial wafer
JP2002261376A (en) * 2001-03-02 2002-09-13 Sharp Corp Semiconductor light emitting device
JP2002299744A (en) * 2001-04-02 2002-10-11 Sony Corp Semiconductor laser assembly
JP2002299769A (en) * 2001-03-30 2002-10-11 Matsushita Electric Ind Co Ltd Semiconductor laser and method of manufacturing the same
JP2003101113A (en) * 2001-09-27 2003-04-04 Sharp Corp Nitride semiconductor laser

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168445A (en) * 1999-09-30 2001-06-22 Denso Corp Semiconductor laser
JP2002043695A (en) * 2000-07-26 2002-02-08 Sharp Corp Light emitting element
JP2002175985A (en) * 2000-12-05 2002-06-21 Hitachi Cable Ltd Method for manufacturing nitride semiconductor epitaxial wafer and the nitride semiconductor epitaxial wafer
JP2002261376A (en) * 2001-03-02 2002-09-13 Sharp Corp Semiconductor light emitting device
JP2002299769A (en) * 2001-03-30 2002-10-11 Matsushita Electric Ind Co Ltd Semiconductor laser and method of manufacturing the same
JP2002299744A (en) * 2001-04-02 2002-10-11 Sony Corp Semiconductor laser assembly
JP2003101113A (en) * 2001-09-27 2003-04-04 Sharp Corp Nitride semiconductor laser

Also Published As

Publication number Publication date
JP2006179508A (en) 2006-07-06

Similar Documents

Publication Publication Date Title
US7830930B2 (en) Semiconductor laser device
JP2007103814A (en) Nitride semiconductor light emitting device and its manufacturing method
US6895029B2 (en) Nitride semiconductor laser device
JP2009076730A (en) Nitride semiconductor laser device
JP4966283B2 (en) Semiconductor laser device and manufacturing method thereof
JP3659621B2 (en) Method of manufacturing nitride semiconductor laser device
JP2002111134A (en) Semiconductor laser device
JP2004335530A (en) Ridge waveguide semiconductor laser
JP2007027572A (en) Semiconductor light emitting device and its manufacturing method
JP2004319987A (en) Semiconductor laser element
JP4439463B2 (en) Semiconductor laser device
JP2007184316A (en) Semiconductor device
JP2006196505A (en) Semiconductor laser device
JP4573882B2 (en) Semiconductor laser device
US8130805B2 (en) Semiconductor laser apparatus
JP4757634B2 (en) Semiconductor light emitting device and manufacturing method thereof
JP4036658B2 (en) Nitride-based compound semiconductor laser device and manufacturing method thereof
US8121163B2 (en) Semiconductor laser diode apparatus and method of fabricating the same
JP2003092450A (en) Semiconductor light emitting unit
US6967982B2 (en) Semiconductor laser device with a strain reduction cushion function, semiconductor laser module, and semiconductor laser device fabrication method
WO2004079830A1 (en) Iii-v nitride compound semiconductor light-emitting device and method for manufacturing same
JPS6359278B2 (en)
JP2001102675A (en) Semiconductor light-emitting element
JP5431441B2 (en) Nitride semiconductor light emitting device
JP2002141617A (en) Nitride semiconductor light emitting element and optical device comprising it

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP

122 Ep: pct application non-entry in european phase
DPEN Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed from 20040101)