JP2006155220A5 - - Google Patents

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Publication number
JP2006155220A5
JP2006155220A5 JP2004344524A JP2004344524A JP2006155220A5 JP 2006155220 A5 JP2006155220 A5 JP 2006155220A5 JP 2004344524 A JP2004344524 A JP 2004344524A JP 2004344524 A JP2004344524 A JP 2004344524A JP 2006155220 A5 JP2006155220 A5 JP 2006155220A5
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JP
Japan
Prior art keywords
built
function processing
memory
access bus
memories
Prior art date
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Application number
JP2004344524A
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English (en)
Japanese (ja)
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JP4726187B2 (ja
JP2006155220A (ja
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Publication date
Application filed filed Critical
Priority to JP2004344524A priority Critical patent/JP4726187B2/ja
Priority claimed from JP2004344524A external-priority patent/JP4726187B2/ja
Publication of JP2006155220A publication Critical patent/JP2006155220A/ja
Publication of JP2006155220A5 publication Critical patent/JP2006155220A5/ja
Application granted granted Critical
Publication of JP4726187B2 publication Critical patent/JP4726187B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2004344524A 2004-11-29 2004-11-29 半導体集積回路 Expired - Fee Related JP4726187B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004344524A JP4726187B2 (ja) 2004-11-29 2004-11-29 半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004344524A JP4726187B2 (ja) 2004-11-29 2004-11-29 半導体集積回路

Publications (3)

Publication Number Publication Date
JP2006155220A JP2006155220A (ja) 2006-06-15
JP2006155220A5 true JP2006155220A5 (enExample) 2008-01-17
JP4726187B2 JP4726187B2 (ja) 2011-07-20

Family

ID=36633446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004344524A Expired - Fee Related JP4726187B2 (ja) 2004-11-29 2004-11-29 半導体集積回路

Country Status (1)

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JP (1) JP4726187B2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7966469B2 (en) 2006-08-14 2011-06-21 Qimonda Ag Memory system and method for operating a memory system
JP5375441B2 (ja) * 2009-08-27 2013-12-25 株式会社リコー 半導体集積回路、記憶制御方法、記憶制御プログラム及び記録媒体
JP2012014397A (ja) * 2010-06-30 2012-01-19 Fujitsu Ltd 入出力制御装置、及び情報処理装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211659A (en) * 1981-06-23 1982-12-25 Fujitsu Ltd Memory access controller
JP2680208B2 (ja) * 1991-07-17 1997-11-19 富士通株式会社 メモリアクセス制御装置

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