JP2006147907A - Method for manufacturing printed-wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a printed-wiring board capable of forming a bump having a top diameter not remarkably thinned even when the bump at a high aspect ratio is formed by an etching. <P>SOLUTION: In the method for manufacturing the printed-wiring board, a process in which a plating is precipitated on the surface of a metallic layer having a thickness, the process in which an etching resist pattern is formed to at least the bump forming section of the plated surface, the process in which the plating exposed from the etching resist pattern is removed by the etching, and the process in which the etching resist pattern is peeled, are conducted in required numbers as one set. The method has the process in which the final etching resist pattern is formed, the process in which the metallic layer exposed from the final etching resist pattern is removed, and the process in which the final etching resist pattern is peeled. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board having high aspect ratio bumps with reduced top diameter reduction.

  2. Description of the Related Art Conventionally, as a method for manufacturing a printed wiring board for mounting electronic components using solder balls as external connection terminals, a method as shown in FIG. 2 is known (for example, Patent Document 1).

  Explaining this manufacturing method, first, as shown in FIG. 2A, the first metal layer 1 made of copper having a thickness, for example, about 80 to 150 μm, or a copper alloy, and the first metal A second metal layer 2 made of the same material as the layer 1, a barrier metal layer 3 sandwiched between the first metal layer 1 and the second metal layer 2 and having different etching conditions from the metal layers 1 and 2; A metal substrate 4 having a three-layer structure is prepared.

  Next, as shown in FIG. 2B, the circuit forming substrate 6 in which the tip of the interlayer connection bump 7 protrudes from the insulating layer 10 is formed on the metal substrate 4 on which the wiring pattern 5 is formed by the photoetching process. The wiring pattern 5 and the interlayer connection bumps 7 are aligned and stacked (see FIG. 2C).

  Here, the circuit forming substrate 6 has a barrier of nickel or nickel alloy of about 0.1 to 2.0 μm on the fourth metal layer 8 of copper or copper alloy of about 1 to 20 μm, for example. A layer in which a third metal layer (not shown) is laminated through a metal layer 9 is prepared, and the third metal layer is selectively etched to form an interlayer connection bump 7, and then exposed from the interlayer connection bump 7. Then, the barrier metal layer 9 is removed by etching, and then an insulating layer 10 having a thickness exposing the tip of the interlayer connection bump 7 is laminated on the formation surface of the bump 7.

  Next, by performing photoetching on the fourth metal layer 8 to form the outer layer wiring pattern 5, an insulating film 11 having an opening 12 formed at a desired portion is formed, and then the insulating film 11 is formed. The surface of the outer layer wiring pattern 5 exposed from (1) is subjected to nickel plating and gold plating (not shown) (see FIG. 2D).

  Next, by performing photoetching on the first metal layer 1 to form the external connection terminal bumps 13 and the reinforcing portion 14, the barrier metal layer 3 exposed on the surface is removed by etching. The printed wiring board Pa shown in 2 (e) is obtained.

  Since the printed wiring board Pa thus obtained has a configuration in which the external connection terminal bumps 13 having a high aspect ratio are provided in the external connection terminal formation portion by the solder balls, connection failure due to deformation of the solder balls can be prevented, In addition, since the strength against pressurization when three-dimensionally stacking the printed wiring boards Pa on which the semiconductor elements (not shown) are mounted can be secured, damage to the semiconductor elements and the like located below can be avoided. is there.

However, in the manufacturing process of the printed wiring board Pa, since the external connection terminal bumps 13 are formed by a single etching process, the side etching becomes large, and as a result, the external connection The top diameter of the terminal bump 13 becomes extremely thin, and there is a problem that the above action cannot be obtained with certainty.
JP 2002-43506 A

  The present invention has been made to solve the above problems, and even when a high aspect ratio bump is formed by etching, a printed wiring board capable of forming a bump whose top diameter is not significantly reduced. It is an object to provide a manufacturing method.

  The present invention according to claim 1 is a method of manufacturing a printed wiring board in which a bump having a high aspect ratio is formed by etching a thick metal layer, the surface of the thick metal layer A step of depositing plating on the surface, a step of forming an etching resist pattern on at least a bump forming portion of the plating surface, a step of removing plating exposed from the etching resist pattern by etching, and peeling the etching resist pattern And the step of forming the final etching resist pattern, the step of removing the metal layer exposed from the final etching resist pattern, and the final etching resist pattern. A step of obtaining bumps by peeling. The method for manufacturing a printed wiring board formed in, which solves the above problems.

  Thereby, it is possible to obtain a bump having a high aspect ratio in which the top diameter is suppressed.

  The present invention according to claim 2 is the method for manufacturing a printed wiring board according to claim 1, wherein the plating is simultaneously performed on the wiring pattern forming surface opposite to the surface of the thick metal layer. It is formed and etched simultaneously with the formation of the wiring pattern.

  Thereby, since a wiring pattern can be formed on the opposite surface while forming a bump, a printed wiring board can be manufactured efficiently.

  A printed wiring board having high aspect ratio bumps with reduced top diameter reduction can be easily obtained.

  An embodiment of the present invention will be described with reference to FIG. In addition, the same code | symbol was attached | subjected to the site | part which is common in FIG. Also in this embodiment, the description will be made using the manufacturing process of the printed wiring board having the bumps for external connection terminals having a high aspect ratio as in FIG.

  First, as shown in FIG. 1 (a), the first metal layer 1 made of thick copper or copper alloy or the like, and the first metal layer 1 is made of nickel or nickel alloy or the like having different etching conditions. A metal substrate 4a composed of the barrier metal layer 3 (for example, 2 to 5 μm) is prepared.

  Here, the first metal layer 1 has a thickness obtained by subtracting the plating film thickness provided in each step from the required bump height, and has a thickness of about 250 to 300 μm, for example.

  Next, as shown in FIG.1 (b), the 1st plating 15 (for example, 10-30 micrometers) which consists of the same metal as the said 1st metal layer 1 on the surface of the 1st metal layer 1 and the barrier metal layer 3 is carried out. After the deposition, an etching resist pattern 16 is formed on the front and back surfaces of the first plating 15 including the bump forming portions, and then the exposed first plating 15 is removed by an etching process using an alkali etchant. The etching resist pattern 16 is peeled off to obtain the substrate of FIG. 1C in which the wiring pattern 5 is formed on one surface and the bump forming first plating 15a is formed on the bump forming portion on the other surface. .

  Here, since the first plating 15 is made of the same metal as the first metal layer 1 in the etching process when forming the bump forming first plating 15a, the etching conditions (first plating 15) for forming the wiring pattern 5 are used. 1), the first metal layer 1 located in the portion where the etching resist pattern 16 is not formed is slightly etched as shown in FIG. 1C. Is done.

  Next, the insulating layer 10a and the metal foil 17 are laminated on the surface on which the wiring pattern 5 is formed, or a resin-coated metal foil in which both are laminated in advance is laminated, and then the wiring pattern is formed from the metal foil 17 layer. 5 is drilled (see FIG. 1 (d)).

  Next, after performing a desmear process, the 2nd plating 18 is deposited on the front and back by a plating process, and then the etching resist pattern 16 is formed on the surface of the second plating 18 on the front and back (see FIG. 1 (e)). .

  Next, after the second plating 18 and the metal foil 17 exposed from the etching resist pattern 16 are removed by etching (ferric chloride solution, cupric chloride solution, etc.), the etching resist pattern 16 is peeled off. Thus, the substrate shown in FIG. 1F is obtained in which the wiring pattern 5 (in the drawing, the land portion of the via hole) is formed on one surface and the bump forming second plating 18a is formed on the other surface.

  Here, also in the etching process when forming the second bump forming plating 18a, the first metal located in the non-formation portion of the etching resist pattern 16 is the same as when the first bump forming plating 15a is formed. A part of layer 1 is slightly etched.

  Next, as shown in FIG. 1G, a desired etching resist pattern 16 is formed on the bump forming surface, and an etching resist 16a is formed on the entire surface on which the outer wiring pattern 5 is formed. After the exposed first metal layer 1 is removed by etching using an alkali etchant (actually, the first bump forming plating 15a and the second bump forming plating 18a are slightly etched from the side surfaces. The etching resist pattern 16 and the etching resist 16a are peeled off (see FIG. 2H).

  Finally, the barrier metal layer 3 exposed on the surface is removed to provide two wiring pattern layers and external connection terminal bumps 13 with reduced top diameter reduction as shown in FIG. A printed wiring board P is obtained.

  The most notable point in the present invention is that, as a method for forming a high aspect ratio bump, the etching process at the time of bump formation is divided into a plurality of times, and plating is deposited before the etching process is performed. is there.

  Thereby, since it will be in the form where plating is replenished to the side surface of the bump formation part in the middle of etching before each etching process, side etching can be suppressed.

  Further, as described above, in the etching process for forming the bump forming plating (15a and 18a in the figure), the first metal layer 1 is also slightly etched (FIG. 1 (c)). , (F)), the thickness of the first metal layer 1 to be finally removed is reduced.

  As a result, the etching process time can be shortened, so that side etching can be suppressed even in the final etching process for removing the remaining first metal layer 1.

  From the above, it is possible to suppress the reduction of the bump top diameter as compared with the conventional method of forming a high aspect ratio bump by a single etching process.

  In describing the present invention, a printed wiring board having two wiring pattern layers has been described as an example. However, the configuration is not limited to this, and the steps of FIGS. 1 (d) to 1 (f) are performed. By repeating the above and adjusting the thickness of the thick first metal layer, it is possible to increase the number of layers.

BRIEF DESCRIPTION OF THE DRAWINGS The schematic cross-sectional process explanatory drawing which shows the manufacturing method of the printed wiring board of this invention. Schematic cross-sectional process explanatory drawing which shows the manufacturing method of the conventional printed wiring board.

Explanation of symbols

1: first metal layer 2: second metal layer 3: barrier metal layer 4, 4a: metal substrate 5: wiring pattern 6: circuit forming substrate 7: bump for interlayer connection 8: fourth metal layer 9: barrier metal layer DESCRIPTION OF SYMBOLS 10, 10a: Insulating layer 11: Insulating film 12: Opening part 13: External connection terminal bump 14: Reinforcing part 15: First plating 15a: First plating for bump formation 16: Etching resist pattern 16a: Etching resist 17: Metal Foil 18: second plating 18a: second plating for bump formation 19: non-through hole P, Pa: printed wiring board

Claims (2)

  A method of manufacturing a printed wiring board in which a high aspect ratio bump is formed by etching a thick metal layer, the step of depositing plating on the surface of the thick metal layer, A necessary number of times, including a step of forming an etching resist pattern on at least a bump forming portion of the plating surface, a step of removing the plating exposed from the etching resist pattern by etching, and a step of removing the etching resist pattern as one set Printing, and then forming a final etching resist pattern, removing a metal layer exposed from the final etching resist pattern, and peeling the final etching resist pattern A method for manufacturing a wiring board.   2. The printed wiring board according to claim 1, wherein the plating is simultaneously formed on the wiring pattern forming surface opposite to the surface of the thick metal layer and is etched simultaneously with the wiring pattern formation. Manufacturing method.