JP2006128669A - Semiconductor device, electronic device incorporated with semiconductor device, and method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To integrate a circuit constituted of a thin film transistor and a multilayer element. <P>SOLUTION: The semiconductor device comprises a thin film transistor formed on an insulating substrate 101, an interlayer insulating film formed on the thin film transistor, and a multilayer element on which a contact electrode 305 is formed. An interconnect line connected with the thin film transistor is provided on the interlayer insulating film, a terminal 206 extending from the back of the insulating substrate 101 and penetrating the insulating substrate 101 and the interlayer insulating film before being connected with the interconnect line is provided, and the terminal 206 is connected electrically with the contact electrode 305 on the back side of the insulating substrate 101. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The invention disclosed in this specification relates to a structure in which a thin film transistor, a ceramic element, and a ferrite element are integrated. The invention disclosed in this specification can be used for, for example, a small and lightweight information terminal represented by a mobile phone.

  In recent years, a technique for manufacturing a transistor using a silicon thin film formed over a quartz substrate or a glass substrate has been studied. They are partly commercialized. This transistor is called a thin film transistor or a TFT.

  The main purpose of studying TFTs is to use them in liquid crystal display devices. This has a configuration in which a TFT is arranged as a switching element in each of a large number of pixels arranged in a matrix, and the charge held in the pixel electrode is controlled by the TFT.

  Further, as a further advanced configuration, a configuration in which a peripheral drive circuit for driving the circuit in addition to the active matrix circuit is also configured by TFTs and the degree of integration is further increased is also known.

  In addition to the peripheral drive circuit, it is also considered that a circuit for handling image information and a circuit for exchanging information with the outside are configured by thin film transistors to systemize the entire configuration.

  In recent years, information processing terminals having various information processing functions have attracted attention. This information processing terminal is called a mobile computer. The functions include a communication function such as a FAX function and a telephone function, storage of various information, and an arithmetic processing function.

  This information processing terminal is required to be small and light so as to be portable. Moreover, it is required to mount a thin film display (also referred to as a flat panel display) for handling image information.

  In addition, the information processing terminal naturally needs a circuit for exchanging information with the outside.

  In the future, it will be inevitable that cordless communication will progress as an information transmission means. Specifically, a function for exchanging information using a radio wave of GHz band or higher that can exchange high-density information is required.

  Therefore, the information processing terminal as described above is required to have a high-frequency circuit having a function capable of oscillating and receiving a GHz band radio wave in a light-weight and compact device.

  In general, the high-frequency circuit is configured by integrating a transistor using a single crystal silicon wafer, a transistor using a compound semiconductor, a chip-type inductor or capacitor, and a filter element such as a SAW element.

  However, in the future, it is difficult to further increase the integration in a technology trend that requires more and more functions in the future and further requires a reduction in size, weight, thickness, and cost.

  An object of the invention disclosed in this specification is to provide a novel configuration capable of integrating a high-frequency circuit capable of handling a high frequency such as a GHz band.

One of the inventions disclosed in this specification is:
A substrate having a thin film transistor formed on an insulating surface;
A terminal connected to the thin film transistor and formed through the substrate;
A laminated element connected to the terminal;
It is characterized by having.

Other aspects of the invention are:
A first substrate having a thin film transistor formed on an insulating surface;
A second substrate on which a laminated element is formed;
Has a laminated structure,
The thin film transistor and the stacked element are connected to each other by a terminal formed through the first substrate.

  As the laminated element, a laminated material of a magnetic material or a dielectric material can be used. Examples of the magnetic material include a configuration using ferrite which is a kind of ceramic material.

  As an embodiment of the above invention, there can be mentioned a configuration in which a high frequency circuit is configured by a thin film transistor and a filter circuit is configured by a laminated element.

  It is also effective to form a heat dissipation layer on the first substrate in order to dissipate heat generated by the thin film transistor. As the heat dissipation layer, it is desirable to use a material having high thermal conductivity such as aluminum nitride.

Other aspects of the invention are:
A first substrate having a thin film transistor formed on an insulating surface;
A second substrate on which passive elements are formed;
Has a laminated structure,
The thin film transistor and the passive element are connected to each other by a terminal formed through the first substrate.

  In addition to aluminum nitride (AlN), the material constituting the heat dissipation layer is a material made by adding oxygen to aluminum nitride (referred to as AlON), a crystal composed of Si, Al, O, and N elements collectively called sialon. It is also possible to use a material represented by a quality compound, AlONC.

  These materials are useful in terms of stress relaxation between the substrate and the element and control of thermal conductivity.

  Further, these materials have characteristics such as electrical insulation, high thermal conductivity, heat resistance, and translucency.

  By utilizing the invention disclosed in this specification, a novel structure capable of integrating a high-frequency circuit capable of handling a high frequency such as a GHz band can be provided.

  That is, a high-frequency module integrated in a small size by providing a connection terminal (connection wiring) penetrating the substrate on which the TFT is formed and connecting the connection terminal to a laminated element formed on another substrate. Can be obtained.

  By using a module using the invention disclosed in this specification, a portable information terminal can be further reduced in size and weight. Furthermore, the cost can be reduced.

  As shown in FIG. 3A, thin film transistors are integrated on a quartz substrate 301, ceramic elements (eg, a SAW filter) are integrated on another substrate 301, and the two substrates are bonded to each other. .

  A contact wiring 206 is formed through an opening formed in the quartz substrate 301, and the thin film transistor and the ceramic element are connected.

  By doing so, a module in which a thin film transistor and a passive element such as a ceramic filter as shown in FIG. 3B are integrated can be configured.

  As the passive element, an inductor, a capacitor, a resistor, or the like can be used. Moreover, an oscillation element etc. can also be integrated.

Employing a configuration in which thin film transistors are integrated on a quartz substrate has the following utility.
(1) The selectivity of the shape of the substrate is high.
(2) The area can be increased.
(3) An active matrix display or the like can be integrated on the same substrate.
(4) The problem of stress generation when the degree of integration is increased can be alleviated.

  1 to 3 show a manufacturing process of this embodiment. The present embodiment shows a configuration in which a thin film transistor circuit and a SAW filter (surface acoustic wave filter) are integrated. The SAW filter has a BPF (band pass filter) function.

  Here, a configuration including a CMOS circuit and a SAW filter connected to the output thereof is shown.

  First, as shown in FIG. 1A, thin film transistor active layers 103 and 106 made of a crystalline silicon film are formed on a quartz substrate 101. A method for forming the active layer will be described later.

  After the active layers 103 and 106 are formed, a gate insulating film 108 is formed. The gate insulating film is a laminated film of a silicon oxide film formed by a plasma CVD method and a thermal oxide film formed thereafter.

  After the gate insulating film 108 is formed, a pattern serving as a gate electrode made of aluminum is formed. Then, porous anodic oxide films 109 and 112 are first formed by anodic oxidation. Further, anodic oxide films 111 and 113 having a dense barrier type film quality are formed by anodic oxidation.

  The film quality of these two types of anodic oxide films can be determined by selecting the type of electrolytic solution used during anodic oxidation.

  In this way, the state shown in FIG. Next, the impurity element is doped under conditions for forming the source and drain regions.

  Here, a P-channel TFT is formed on the left side, and an N-channel TFT is formed on the right side.

  This step is performed by selectively masking the region where each TFT is formed with a resist mask and selectively doping with a dopant element for imparting P and N types using a plasma doping method. .

  In this step, the source region 102 and the drain region 104 of the P-channel TFT are formed in a self-aligned manner. Further, the source region 107 and the drain region 105 of the N-channel TFT are formed in a self-aligned manner.

  Next, the porous anodic oxide films 109 and 112 are selectively removed. In this way, the state shown in FIG.

  Doping is performed again in the state shown in FIG. Here, doping is performed with a lower dose than the previous doping (that is, under the condition of light doping).

  In this step, light doping is performed on the regions 115, 119, 122, and 126. The regions 115 and 119 become low-concentration impurity regions of the P-channel TFT. The regions 122 and 126 become low-concentration impurity regions of the N-channel TFT.

  In this way, the state shown in FIG. Next, a silicon nitride film 128 is formed as an interlayer insulating film by a plasma CVD method. Further, a polyimide resin film 129 is formed by spin coating.

  When a resin material is used for the interlayer insulating film, the surface can be flattened, which is advantageous when a wiring or the like is formed later. As the resin material, polyamide, polyimide amide, acrylic, epoxy, or the like can be used in addition to polyimide.

  In this way, the state shown in FIG. Next, contact holes are formed, and a source electrode (and source wiring extending therefrom) 130 of a P-channel TFT, a source electrode (and source wiring extending therefrom) 132 of an N-channel TFT, A common drain electrode (and a drain wiring extending therefrom) 31 is formed in the TFT.

  In this way, the state shown in FIG. Next, as shown in FIG. 2A, the back side of the quartz substrate 101 is polished to thin the quartz substrate.

  Next, as shown in FIG. 2B, an opening 201 is formed. This opening is formed so as to reach the drain electrode (and drain wiring) 203.

  When the state shown in FIG. 2B is obtained, an electrode terminal 206 penetrating the back surface side of the substrate 101 through the opening 201 is formed. (Fig. 2 (C))

  Next, an aluminum nitride film 205 is formed as shown in FIG. This aluminum nitride film has a function of radiating heat generated by the TFT.

  When the state shown in FIG. 2C is obtained, the quartz substrate 306 and the quartz substrate 301 on which the SAW filter is formed are bonded through an adhesive layer 306 as shown in FIG.

  As the adhesive layer 306, a layer in which conductive fine particles are dispersed in an adhesive binder and the conductive layer has conductivity in the thickness direction may be used.

  The SAW filter has a structure in which a barium titanate film 302 is formed on a quartz substrate 301 and comb-shaped electrodes 303 and 304 having a pattern shown in FIG. Have. Reference numeral 304 denotes an interlayer insulating film made of a resin material.

  One electrode 303 constituting the SAW filter is provided with a contact electrode 305, which comes into contact with an electrode terminal 206 provided through a quartz substrate 306 on which a TFT is formed. Yes.

  The structure shown in FIG. 3A is shown by an equivalent circuit in FIG. This circuit has a configuration in which a band-pass filter composed of a SAW filter is arranged at the output of the CMOS circuit.

  By adopting the configuration as shown in this embodiment, various circuits constituted by transistors and filter elements can be integrated into a module.

  With this configuration, a high-frequency module that can be used for a mobile phone or a portable information processing terminal can be obtained.

  By using such modularized components, the mobile phone and the portable information processing terminal can be further downsized and the cost can be reduced.

[Thin Film Transistor Manufacturing Process]
A manufacturing process of a thin film transistor until the state illustrated in FIG.

  First, as shown in FIG. 4A, an amorphous silicon film 402 is formed to a thickness of 500 mm on a quartz glass substrate 101 by low pressure thermal CVD. It is important that the surface of the quartz substrate is sufficiently flat.

  After the amorphous silicon film is formed, a mask 403 made of a silicon oxide film is formed. The mask 403 has an opening at a portion indicated by 404. In this opening 404 portion, the amorphous silicon film 402 is exposed.

  This opening is formed as having a longitudinal shape in the depth direction from the front side of the drawing.

  Next, a nickel acetate salt solution containing 100 ppm (weight conversion) nickel element is applied by spin coating. Thus, a state in which the nickel element is held in contact with the surface as indicated by 405 is obtained. (Fig. 4 (A))

  As a method for introducing nickel element, a CVD method, a sputtering method, a plasma treatment, an ion implantation method, or the like can be used.

  In addition to the nickel element, a material selected from Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au can be used.

  Next, heat treatment is performed at 600 ° C. for 8 hours in a normal-pressure nitrogen atmosphere. In this step, crystal growth proceeds in a direction parallel to the substrate as indicated by 405. (Fig. 4 (B))

  This heat treatment is performed in an electric furnace. By performing this heat treatment, it is possible to obtain a state in which a large number of cylindrical crystal structures having a diameter of several tens to several hundreds of nanometers are arranged in parallel. The longitudinal direction of this crystal structure coincides with the crystal growth direction indicated by 405. This crystal structure is partitioned by crystal grain boundaries extending in the extending direction. Moreover, it has been confirmed that this crystal grain boundary is inactive.

  The temperature of the heat treatment can be selected from about 450 ° C. to 1100 ° C.

  After the heat treatment for crystallization is completed, the mask 403 made of a silicon oxide film is removed. Then, heat treatment is performed at 950 ° C. for 20 minutes in an oxygen atmosphere containing 3% by volume of HCl. In this step, a thermal oxide film is formed to a thickness of 200 mm. Then, the thickness of the silicon film decreases from 500 mm to 400 mm.

  In this step, with the formation of the thermal oxide film, the number of dangling bonds of silicon atoms is reduced, and defects in the film are greatly reduced. This thermal oxide film formation process is important, and through this process, the high characteristics of the finally obtained thin film transistor are guaranteed.

  In this thermal oxide film, the contained nickel element has a relatively high concentration compared to the silicon film.

  By forming this thermal oxide film, a cylindrical crystal structure can be obtained in a prominent form. This has been confirmed by observation with an electron microscope.

  When the formation of the thermal oxide film is completed, the thermal oxide film is removed. By doing so, nickel element can be eliminated.

  Next, by patterning the obtained crystalline silicon film, patterns indicated by 103 and 106 in FIG. 4C are obtained.

  Here, the pattern 103 is a pattern that becomes an active layer of a P-channel type thin film transistor. Reference numeral 106 denotes a pattern serving as an active layer of a P-channel type thin film transistor.

  After the active layer is formed, a silicon oxide film (CVD oxide film) is first formed to a thickness of 200 mm by plasma CVD to form the gate insulating film 409. After the CVD oxide film is formed, thermal oxidation is performed again to form a thermal oxide film.

  In the step of forming the thermal oxide film, heat treatment is performed at 950 ° C. for 20 minutes in an oxygen atmosphere containing 3% by volume of HCl. In this step, a thermal oxide film is formed to a thickness of 200 mm.

  This thermal oxide film is formed inside the previously formed CVD oxide film, that is, in the vicinity of the interface with the active layer. In this way, the gate insulating film 409 made of the thermal oxide film and the CVD oxide film stacked in order from the inside is formed. The final active layer thickness is 300 mm. (Fig. 4 (C))

  After obtaining the state shown in FIG. 4C, an aluminum film containing a small amount of scandium is formed to a thickness of 400 nm (4000 mm) by sputtering. And by patterning this, the aluminum pattern shown by 410,411 of FIG.4 (D) is formed. This aluminum pattern is a pattern that becomes the basis of the gate electrode. In this way, the state shown in FIG.

  A thin film transistor as shown here exhibits characteristics equal to or better than those of a MOS transistor using a single crystal silicon wafer.

  A solid line in FIG. 8 shows an example of characteristics of a thin film transistor having a gate insulating film thickness of 30 nm (300 mm) and a channel length of 0.6 μm obtained according to the manufacturing method shown here.

  This thin film transistor is manufactured by a manufacturing process of the 2 μm rule. As a method for shortening the channel length, a technique of anodizing the side surface of the gate electrode is used.

  The horizontal axis of the figure is the power supply voltage, and the vertical axis is the delay time. Delay Time corresponds to the reciprocal of the operation speed, and the smaller the value, the higher the speed operation is possible.

  The other data indicated by the dotted line in FIG. 8 is comparative data indicating a MOS transistor using a single crystal silicon wafer.

  The comparison data shown in FIG. 8 shows the relationship between the dimension (channel length and the thickness of the gate insulating film) of the MOS transistor called “scaling law” and Delay Time (delay time).

  The scaling law is an idea that, as the size of a MOS transistor is reduced, its high frequency characteristics are increased according to a specific law. (Of course not exact)

  The plot points indicated by the dotted lines in FIG.

  Among them, it can be seen that the thin film transistor obtained by the manufacturing method disclosed in this specification has a higher rank than the high-frequency characteristics predicted from the conventional scaling law.

  If the scaling rule of a MOS transistor using a single crystal silicon wafer is followed, the plot point of the TFT indicated by the solid line has a larger Delay Time (delay time).

  For example, if the conventional scaling law is followed, the delay time of a MOS transistor having a channel length of 0.6 μm and a gate insulating film thickness (tox) of 30 nm is at least 0.5 μm, and the gate insulating film Should have a thickness (tox) greater than the 11 nm plot point.

  As described above, the thin film transistor disclosed in this specification exhibits characteristics superior to those of conventional MOS transistors.

  This embodiment is an example in which a ceramic substrate is used as a substrate in the structure shown in FIG.

in this case,
(1) All the substrates are ceramic substrates.
(2) A substrate on which a TFT substrate or SAW element is formed is a ceramic substrate.
There is an option.

  When a ceramic substrate is used, the degree of freedom of material selection is increased, which is advantageous in terms of productivity and cost.

  When a ceramic substrate is used as the substrate, it is important to select a substrate having excellent surface flatness. In particular, it is important to select a substrate on which TFTs are formed (TFT substrate) having no pinholes in addition to excellent surface flatness.

  The present embodiment is an example in which an inductor is arranged instead of a BPF (bandpass filter) formed of a SAW filter in the configuration shown in FIG.

  FIG. 5 shows a schematic configuration of the present embodiment. The same portion as FIG. 3 has the same structure as shown in FIG.

  In FIG. 5, reference numeral 502 denotes a conductive pattern constituting the inductor. Reference numeral 501 denotes a dielectric that exists between the conductive patterns. Reference numeral 504 denotes one terminal pattern of the inductor, which is connected to the output of an inverter composed of a P-channel TFT and an N-channel TFT. Reference numeral 503 denotes the other terminal pattern of the inductor, which extends to other elements and wirings (not shown). Reference numeral 500 denotes a substrate made of a ceramic material.

In this example, an inductor is arranged.
(1) Chip capacitor (2) An element using a piezoelectric material. (Eg voltage controlled oscillator (VCO))
(3) An element using ferrite.
Etc. can be arranged.

  This embodiment is a modification of the configuration shown in FIG. FIG. 6 shows a schematic configuration of the present embodiment. A feature of this embodiment is that an aluminum film is further formed on the aluminum nitride film 601.

  By doing so, the heat generated by the TFT can be dissipated with higher efficiency. This is a useful configuration when the TFT is operated at high speed.

  The present embodiment is an example in which the configuration shown in the fourth embodiment is further improved. A schematic configuration of the present embodiment is shown in FIG.

  The structure shown in this embodiment is characterized in that an aluminum nitride film 602 is provided on a quartz substrate 601. By so doing, heat generated in the active layer of the TFT can be effectively dissipated.

  This embodiment relates to the configuration of the module end in the configuration as shown in FIG. In other words, the present embodiment relates to a module mounting method when a module as shown in FIG.

  FIG. 9 shows a state of the end portion of the module as shown in FIG. In the configuration shown in FIG. 9, a wiring 130 extending from the source (or drain) of the TFT is connected to an extraction electrode (extraction terminal) 901 to the outside.

  A wiring 903 formed on the substrate 301 on which a ceramic element or the like is formed is connected to an extraction electrode (extraction terminal) 902 to the outside.

  The wiring 903 is connected to a SAW element or inductor formed on the substrate 301.

  With such a configuration, a modularized substrate can be directly inserted into a connection terminal provided in the apparatus.

  With such a configuration, the versatility of the apparatus can be increased, and the production cost can be reduced.

  In this embodiment, the quartz substrate 601 is completely polished and the aluminum nitride film 602 is used as a TFT substrate in the configuration shown in FIG. In this case, the aluminum nitride film 602 is required to be strong enough to be a single substrate (at least until it is bonded to the substrate 301).

  With such a configuration, the heat dissipation effect of the heat generated by the TFT can be enhanced.

  This embodiment shows an example in which an active matrix type liquid crystal display device is integrated in another portion (not shown) when the configuration shown in FIG. 3A is employed.

  In this case, an active matrix circuit (not shown) is formed on the quartz substrate 101 in FIG. 3A, and this quartz substrate is used as a TFT side substrate, and another light-transmitting substrate (not shown) is used as a counter substrate. . Then, an active matrix liquid crystal display device can be formed by bonding the two substrates through a liquid crystal layer.

  By adopting such a configuration, it is possible to obtain a configuration in which the display is also modularized in addition to the high-frequency circuit.

  In this embodiment, an example of an electronic device using a composite circuit in which a thin film transistor circuit as shown in FIG. 3 is combined with a passive element or a ceramic element is shown.

  (A) shows a portable information processing terminal, which has a communication function using a telephone line.

  This electronic device includes an integrated circuit 2006 formed of a composite circuit disclosed in this specification in a main body 2001. An active matrix liquid crystal display 2005, a camera unit 2002 for capturing an image, and an operation switch 2004 are provided.

  FIG. 10B illustrates an electronic device called a head mounted display. This device has a function of wearing a head and displaying an image in front of the eyes in a pseudo manner. In this electronic apparatus, a main body 2101 is attached to the head by a band 2103. The image is created by the liquid crystal display device 2102 corresponding to the left and right eyes.

  Since such an electronic device must be small and light, it is suitable for using the composite circuit disclosed in this specification.

  FIG. 10C has a function of displaying map information and various information based on a signal from an artificial satellite. Information from the satellite captured by the antenna 2204 is processed by an electronic circuit provided inside the main body 2201, and necessary information is displayed on the liquid crystal display device 2202.

  The operation of the apparatus is performed by an operation switch 2203. Even in such an apparatus, a device for miniaturizing the entire configuration is required. For that purpose, it is useful to use the composite circuit disclosed in this specification.

  A mobile phone is illustrated in FIG. This electronic device includes a main body 2301 that includes an antenna 2306, an audio output unit 2302, a liquid crystal display device 2304, operation switches 2305, and an audio input unit 2303.

  Even in such an electronic device, it is useful to use the composite circuit disclosed in this specification in order to reduce the overall configuration.

  FIG. 11 is a block diagram of an electronic device as shown in FIG. For example, in the reception state, radio waves received by the antenna 2002 are sent to the wireless input / output unit 2003. Then, the signal is transmitted to the audio processing unit 2006 through the side demodulation unit 2004 and the channel codec unit 2005 controlled by the wireless control unit 2007 and the CPU 2008. And it outputs as audio | voice information from the speaker 2010 driven by the audio | voice processing part 2006. FIG.

  In the oscillation state, audio information is input from the microphone 2009, and is output as a radio wave from the antenna 2002 via a path reverse to the above.

  An electronic device illustrated in FIG. 10E is a portable imaging device called a video camera. The electronic apparatus includes a liquid crystal display 2402 attached to an opening / closing member and an operation switch 2404 attached to the opening / closing member.

  Further, the main body 2401 includes an image receiving unit 2406, an integrated circuit 2407, an audio input unit 2403, operation switches 2404, and a battery 2405.

  Even in such an electronic device, it is useful to use the composite circuit disclosed in this specification in order to reduce the overall configuration.

  In particular, when a load function such as a communication function is added, it is necessary to incorporate a high-frequency circuit therefor, that is, to integrate it.

  For this purpose, it is useful to use the invention disclosed in this specification.

  An electronic device illustrated in FIG. 10F is a projection liquid crystal display device. This device includes a light source 2502, a liquid crystal display device 2503, and an optical system 2504 in a main body 2501, and has a function of projecting an image onto a screen 2505.

  Projection-type display devices are also required to be small and light. Therefore, it is useful to use the invention disclosed in this specification for that purpose.

  Further, as the liquid crystal display device in the electronic device described above, either a transmission type or a reflection type can be used. The transmissive type is advantageous in terms of display characteristics, and the reflective type is advantageous when pursuing low power consumption and reduction in size and weight.

  As a display device, a flat panel display such as an active matrix EL display or a plasma display can be used.

  The present embodiment shows an example in which a polycrystalline silicon wafer is used as a substrate in the configuration shown in the first embodiment.

  Polycrystalline silicon wafers can be obtained at a cost of a fraction of that of a quartz substrate. Therefore, a significant contribution can be made to reducing the cost of circuits and devices.

  In this embodiment, a silicon oxide film is first formed to a thickness of 1 μm on a polycrystalline silicon wafer by plasma CVD. Next, thermal oxidation is performed to form a thermal oxide film having a thickness of 50 nm (500 mm).

  By doing so, a silicon oxide film having a flat surface and excellent interface characteristics can be formed on the polycrystalline silicon wafer.

  Then, using this silicon oxide film as a base film (base), a TFT is fabricated thereon.

  It is not preferable to directly form a thermal oxide film on the polycrystalline silicon wafer and use this thermal oxide film as a base film. In this case, reflecting the polycrystalline structure of the substrate, the surface of the thermal oxide film becomes uneven, which adversely affects the fabrication of the TFT and its characteristics.

  In addition, a single crystal silicon wafer can be used instead of the polycrystalline silicon wafer, but in this case, the advantage of low cost is reduced.

10A and 10B illustrate a manufacturing process of a thin film transistor. 10A and 10B illustrate a manufacturing process of a thin film transistor. The figure which shows the structure which compounded the thin-film transistor and SAW folder, the detail, and its equivalent circuit. 10A and 10B illustrate a manufacturing process of a thin film transistor. The figure which shows the structure which compounded the thin-film transistor and the inductor. The figure which shows the structure which compounded the thin-film transistor and SAW folder. The figure which shows the structure which compounded the thin-film transistor and SAW folder. The figure which shows the relationship between the dimension of a MOS transistor, and a characteristic. The figure which shows the structure of the edge part of the compounded module. An electronic device incorporating a thin film transistor composite circuit. The block diagram which shows the structure of a mobile telephone.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Quartz substrate 102 Source region 103 Active layer 104 Drain region 105 Drain region 106 Active layer 107 Source region 108 Gate insulating film 109 Porous anodic oxide film (aluminum oxide film)
110 Gate electrode made of aluminum 111 Anodized film (aluminum oxide film) having a dense film quality
112 Porous anodic oxide film (aluminum oxide film)
113 Anodized film (aluminum oxide film) having a dense film quality
114 Gate electrode made of aluminum 115 Low concentration impurity region 116 Offset gate region 117 Channel formation region 118 Offset gate region 119 Low concentration impurity region 122 Low concentration impurity region 123 Offset gate region 124 Channel formation region 125 Offset gate region 126 Low concentration impurity region 128 Silicon nitride film 129 Polyimide resin film 130 Source electrode (source wiring)
131 Drain electrode (drain wiring)
132 Source electrode (source wiring)
201 Contact opening 205 Aluminum nitride film 206 Contact electrode 301 Quartz substrate 302 Dielectric 303 Electrode constituting SAW filter 304 Electrode constituting SAW filter 305 Contact electrode 306 Adhesive layer 402 Amorphous silicon film 403 Oxidation Mask made of silicon film 404 Opening 400 Nickel element held in contact with the surface 405 Crystal growth direction 406 Crystalline silicon film 409 Gate insulating film 410 Aluminum pattern serving as base of gate electrode 411 Aluminum pattern serving as base of gate electrode 500 Substrate 501 Dielectric 502 Conductive pattern constituting inductor 503 Inductor other wiring 504 Inductor one wiring

Claims (10)

An insulating substrate;
A thin film transistor formed on the insulating substrate;
An interlayer insulating film formed on the thin film transistor;
A laminated element on which an electrode for contact is formed,
A wiring connected to the thin film transistor is provided on the interlayer insulating film,
Terminals are provided through the insulating substrate and the interlayer insulating film from the back surface of the insulating substrate and connected to the wiring.
The semiconductor device, wherein the terminal and the contact electrode are electrically connected on the back side of the insulating substrate. In claim 1,
The laminated device has a configuration using a magnetic material or a dielectric material. In claim 1,
2. The semiconductor device according to claim 1, wherein the laminated element is made of a magnetic material or a dielectric material obtained by laminating ceramic materials. An insulating substrate;
A thin film transistor formed on the insulating substrate;
An interlayer insulating film formed on the thin film transistor;
A passive element on which an electrode for contact is formed,
A wiring connected to the thin film transistor is provided on the interlayer insulating film,
Terminals are provided through the insulating substrate and the interlayer insulating film from the back surface of the insulating substrate and connected to the wiring.
The semiconductor device, wherein the terminal and the contact electrode are electrically connected on the back side of the insulating substrate. In any one of Claims 1 thru | or 4,
A semiconductor device, wherein a heat dissipation film for dissipating heat from the thin film transistor is formed on the insulating substrate. An electronic device incorporating the semiconductor device according to claim 1. A thin film transistor is formed on an insulating substrate,
Forming an interlayer insulating film on the thin film transistor;
Forming a first contact hole in the interlayer insulating film;
Forming a wiring connected to the thin film transistor in the first contact hole on the interlayer insulating film;
Forming a second contact hole penetrating the insulating substrate and the interlayer insulating film from the back surface of the insulating substrate and exposing the wiring;
Forming a terminal connected to the wiring in the second contact hole;
Forming a laminated element having a contact electrode;
A method for manufacturing a semiconductor device, wherein the terminal and the contact electrode are electrically connected by bonding the insulating substrate and the multilayer element from the back surface of the insulating substrate. Forming a thin film transistor on the first insulating substrate;
Forming an interlayer insulating film on the thin film transistor;
Forming a first contact hole in the interlayer insulating film;
Forming a wiring connected to the thin film transistor in the first contact hole on the interlayer insulating film;
Forming a second contact hole penetrating the first insulating substrate and the interlayer insulating film from the back surface of the first insulating substrate and exposing the wiring;
Forming a terminal connected to the wiring in the second contact hole;
Forming a laminated element having a contact electrode on a second insulating substrate;
Fabricating a semiconductor device, wherein the terminal and the contact electrode are electrically connected by bonding the first insulating substrate and the laminated element from the back surface of the first insulating substrate. Method. A thin film transistor is formed on an insulating substrate,
Forming an interlayer insulating film on the thin film transistor;
Forming a first contact hole in the interlayer insulating film;
Forming a wiring connected to the thin film transistor in the first contact hole on the interlayer insulating film;
Forming a second contact hole penetrating the insulating substrate and the interlayer insulating film from the back surface of the insulating substrate and exposing the wiring;
Forming a terminal connected to the wiring in the second contact hole;
Forming a passive element having a contact electrode;
A method for manufacturing a semiconductor device, wherein the terminal and the contact electrode are electrically connected by bonding the insulating substrate and the passive element from a back surface of the insulating substrate. Forming a thin film transistor on the first insulating substrate;
Forming an interlayer insulating film on the thin film transistor;
Forming a first contact hole in the interlayer insulating film;
Forming a wiring connected to the thin film transistor in the first contact hole on the interlayer insulating film;
Forming a second contact hole penetrating the first insulating substrate and the interlayer insulating film from the back surface of the first insulating substrate and exposing the wiring;
Forming a terminal connected to the wiring in the second contact hole;
Forming a passive element having a contact electrode on a second insulating substrate;
Fabricating a semiconductor device, wherein the terminal and the contact electrode are electrically connected by bonding the first insulating substrate and the passive element from the back surface of the first insulating substrate. Method.

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