JPH10209466A - Composite circuit and electronic device incorporating composite circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a composite circuit by forming a thin film transistor circuit on the pasting face of a first substrate pasted to a second substrate while forming a ceramic element circuit on the second substrate and then connecting both circuits. SOLUTION: The active layer of a thin film transistor is formed on a quartz substrate 101 and then a P channel TFT and an N channel TFT are formed, respectively, on the left and right sides followed by formation of self-aligned source and drain regions. Subsequently, contact holes are made and the source electrodes and a common drain electrode of the P and N channel TFTs are formed. Thereafter, a counter substrate on which an SAW filter is formed is pasted to the substrate 101. An electrode 136 is formed of a dielectric material 135 on the counter substrate 134 and the SAW filter is formed of a dielectric material such that a pair electrode meshes the comb type electrode 136. Finally, the substrates 134 and 101 are pasted through an adhesive 138 and combined.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD [0001] The invention disclosed in the present specification is:
The present invention relates to a configuration in which a thin film transistor and a ceramic element or a ferrite element are integrated. The invention disclosed in this specification can be used, for example, for small and lightweight information terminals represented by mobile phones.

[0002]

2. Description of the Related Art In recent years, a technique for manufacturing a transistor using a silicon thin film formed on a quartz substrate or a glass substrate has been studied. They are partially commercialized.
This transistor is called a thin film transistor or a TFT.

The main purpose of research on TFTs is to use them for liquid crystal display devices. This is because a TFT is arranged as a switching element in each of a large number of pixels arranged in a matrix, and the electric charge to be held in the pixel electrode is T
It has a configuration controlled by FT.

Further, as a further advanced configuration, a configuration in which a peripheral driving circuit for driving the circuit other than the active matrix circuit is also configured by a TFT to further increase the integration degree is known.

[0005] In addition to the peripheral driving circuit, a circuit for handling image information and a circuit for exchanging information with the outside are configured by thin film transistors, and it is considered that the entire configuration is systematized.

In recent years, information processing terminals having various information processing functions have been receiving attention. This information processing terminal is called a mobile computer. The functions include a communication function such as a facsimile function and a telephone function, a storage of various information, and an arithmetic processing function.

[0007] This information processing terminal is required to be small and light enough to be portable. Further, it is required to mount a thin film display (also called a flat panel display) for handling image information.

Further, the information processing terminal naturally requires a circuit for exchanging information with the outside.

It is inevitable that cordless information transmission means will be developed in the future. Specifically, a function of exchanging information using a radio wave of a GHz band or higher capable of exchanging high-density information is required.

Therefore, the information processing terminal as described above requires a high-frequency circuit having a function of oscillating and receiving a radio wave in the GHz band in a lightweight and compact device.

In general, the above high-frequency circuit is configured by integrating a transistor using a single crystal silicon wafer or a transistor using a compound semiconductor, a chip type inductor or capacitor, and a filter element such as a SAW element. I have.

However, it is difficult to further increase the degree of integration in a technology trend that requires more and more functions in the future, and further requires a reduction in size, weight, thickness, and cost. is there.

[0013]

SUMMARY OF THE INVENTION An object of the invention disclosed in this specification is to provide a novel structure which can integrate a high-frequency circuit capable of handling a high frequency such as a GHz band.

[0014]

SUMMARY OF THE INVENTION One of the inventions disclosed in the present specification is a circuit comprising a first substrate and a second substrate which are bonded to each other, and a thin film transistor formed on a bonding surface of the first substrate. And a circuit formed of a ceramic element formed on the bonding surface side of the second substrate, wherein the circuit formed of the thin film transistor and the circuit formed of the ceramic element are connected to each other.

In the above structure, it is effective to dispose a heat radiation layer on the first substrate side in order to radiate heat generated in the thin film transistor.

In the above structure, the ceramic element may be formed using a dielectric material or a magnetic material.

As the ceramic element, an element utilizing ferrite can be used. As a material constituting the heat radiation layer, in addition to aluminum nitride (AlN), a material obtained by adding oxygen to aluminum nitride (AlON
), Si, Al,
A crystalline compound composed of O and N elements and a material represented by AlONC can also be used.

These materials are useful in terms of stress relaxation between a substrate and an element and control of thermal conductivity.

Further, these materials have characteristics such as electrical insulation, high thermal conductivity, heat resistance, and translucency.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG.
The thin film transistor circuit formed on the quartz substrate 13
The SAW filter element formed on the substrate 4 is bonded to both substrates to form a composite.

Thus, it is possible to obtain a configuration in which the thin film transistor circuit and the ceramic element are integrally integrated.

The use of a structure in which thin film transistors are integrated on a quartz substrate has the following utility. (1) The selectivity of the shape of the substrate is high. (2) The area can be increased. (3) Active matrix displays and the like can be integrated on the same substrate. (4) The problem of generation of stress when the degree of integration is increased can be mitigated.

[0023]

【Example】

[Embodiment 1] FIGS. 1 to 3 show the manufacturing steps of this embodiment.
This embodiment shows a configuration in which a thin film transistor circuit and a SAW filter (surface acoustic wave filter) are integrated. The SAW filter has a BPF (Band Pass Filter) function.

Here, a configuration comprising a CMOS circuit and a SAW filter connected to its output is shown.

First, as shown in FIG.
The active layers 103 and 106 of the thin film transistor formed of a crystalline silicon film are formed on the substrate 01. The method for forming the active layer will be described later.

After forming the active layers 103 and 106, a gate insulating film 108 is formed. The gate insulating film is a laminated film of a silicon oxide film formed by a plasma CVD method and a thermal oxide film formed thereafter.

After the gate insulating film 108 is formed, a pattern which is a base of a gate electrode made of aluminum is formed. Then, a porous anodic oxide film 1 is formed by anodic oxidation.
First, 09 and 112 are formed. Further, anodic oxide films 111 and 11 having dense barrier type film quality by anodizing method.
3 is formed.

The film quality of the two types of anodic oxide films can be determined by selecting the type of the electrolytic solution used at the time of anodic oxidation.

Thus, the state shown in FIG. 1A is obtained.
Next, doping of an impurity element is performed under conditions for forming source and drain regions.

Here, a P-channel TFT is formed on the left side, and an N-channel TFT is formed on the right side.

In this step, a region where each TFT is to be formed is selectively masked with a resist mask using a plasma doping method, and a dopant element for imparting P and N types is selectively doped. Done by

In this step, a P-channel type TFT is used.
The source region 102 and the drain region 104 are formed in a self-aligned manner. Further, the source region 107 and the drain region 105 of the N-channel TFT are formed in a self-aligning manner.

Next, the porous anodic oxide films 109 and 112
Is selectively removed. Thus, the state shown in FIG. 1B is obtained.

Doping is performed again in the state shown in FIG. Here, doping is performed with a lower dose than the previous doping (that is, under the condition of light doping).

In this step, 115, 119, 122,
Light doping is performed on the region 126. And one
Regions 15 and 119 are low-concentration impurity regions of the P-channel TFT. The regions 122 and 126 are low-concentration impurity regions of the N-channel TFT.

Thus, the state shown in FIG. 1B is obtained. Next, a silicon nitride film 128 is formed as an interlayer insulating film by plasma CVD.
The film is formed by the method. Further, a polyimide resin film 129 is formed by a spin coating method.

When a resin material is used for the interlayer insulating film, its surface can be flattened, which is advantageous when wiring and the like are formed later. As the resin material, besides polyimide, polyamide, polyimide amide, acrylic, epoxy, or the like can be used.

Thus, the state shown in FIG. 1C is obtained. Next, a contact hole is formed, and a P-channel type TF is formed.
T source electrode (and source wiring extending therefrom) 1
30, a source electrode (and a source wiring extending therefrom) 132 of the N-channel type TFT, and a common drain electrode (and a drain wiring extending therefrom) 31 for both TFTs are formed.

Thus, the state shown in FIG. 1D is obtained. Next, as shown in FIG.
An aluminum nitride film is formed to cover 32.

This aluminum nitride functions as a heat dissipation layer. It also functions as a protective layer.

When the state shown in FIG. 2A is obtained, a counter substrate on which a SAW filter is formed is formed, and this is
Paste with 01.

As the counter substrate, a dielectric material 135 made of barium titanate and an electrode 136 are formed on a substrate 134 made of a suitable material such as ceramics.

FIG. 3B shows the SAW filter viewed from above. As shown in FIG. 3B, the SAW filter has a configuration in which the comb-shaped electrodes 136 and 301 are formed on a dielectric material so as to mesh with each other.

The substrate 134 and the substrate 101 are bonded to the adhesive layer 1.
38, the TFT circuit and the S
A composite circuit including the AW filter is obtained. (Figure 2
(B))

FIG. 3 shows an equivalent circuit of the configuration shown in FIG.
It is shown in (A).

By employing the configuration as shown in this embodiment, various circuits composed of thin film transistors (TFTs) and filter elements can be integrated to form a module.

With such a configuration, a high-frequency module that can be used for a mobile phone or a portable information processing terminal can be obtained.

By using such modularized components, it is possible to further reduce the size and cost of a portable telephone or a portable information processing terminal.

Here, an example in which the SAW filter is integrated has been described, but an inductor, a chip capacitor, a filter using ferrite, and the like can be integrated.

[Process of Manufacturing Thin Film Transistor] FIG.
The steps for manufacturing a thin film transistor until the state shown in FIG.

First, as shown in FIG. 4A, an amorphous silicon film 40 is formed on a quartz glass substrate 101 by a low pressure thermal CVD method.
2 is formed to a thickness of 500 °. It is important that the surface of the quartz substrate has sufficient flatness.

After forming the amorphous silicon film, a mask 403 made of a silicon oxide film is formed. This mask 403 is 4
An opening is formed in a portion indicated by reference numeral 04. In this opening 404, the amorphous silicon film 402 is exposed.

This opening is formed to have a longitudinal shape in the depth direction from the front side of the drawing.

Next, 100 ppm was applied by spin coating.
A nickel acetate solution containing (by weight) nickel element is applied. Thus, a state in which the nickel element is held in contact with the surface as indicated by 405 is obtained.
(FIG. 4 (A))

As a method for introducing the nickel element, CVD is used.
Method, a sputtering method, a plasma treatment, an ion implantation method, or the like can be used.

In addition to the nickel element, Fe, Co, R
One selected from u, Rh, Pd, Os, Ir, Pt, Cu, and Au can be used.

Next, in a nitrogen atmosphere at normal pressure, 600
Heat treatment at 8 ° C. for 8 hours. In this step, as indicated by 405, crystal growth proceeds in a direction parallel to the substrate. (FIG. 4 (B))

This heat treatment is performed in an electric furnace. By performing this heat treatment, a state in which a large number of columnar crystal structures having a diameter of about several tens to several hundreds of nm are arranged in parallel can be obtained. The longitudinal direction of this crystal structure is 405
Coincides with the crystal growth direction indicated by. This crystal structure is partitioned by crystal grain boundaries extending in the direction in which the crystal structure extends. Further, it has been confirmed that the crystal grain boundaries are inert.

In the above heat treatment, the temperature is raised to 450 ° C.
It can be selected from the range of about 1100 ° C.

When the heat treatment for crystallization is completed, the mask 403 made of a silicon oxide film is removed. Then, in an oxygen atmosphere containing 3% by volume of HCl, 9%
A heat treatment is performed at 50 ° C. for 20 minutes. In this step, a thermal oxide film is formed to a thickness of 200 °. Then, the thickness of the silicon film decreases from 500 ° to 400 °.

The heating temperature during this thermal oxidation is from 800 ° C. to 1
It is important to carry out at a temperature of 100 ° C., preferably 900 ° C. to 1100 ° C.

In this step, dangling bonds of silicon atoms are reduced with the formation of the thermal oxide film, and defects in the film are greatly reduced. The process of forming this thermal oxide film is important,
Through this step, high characteristics of the finally obtained thin film transistor are guaranteed.

The nickel element contained in the thermal oxide film has a relatively high concentration as compared with the silicon film.

By forming this thermal oxide film,
A columnar crystal structure is obtained in a remarkable form.
This has been confirmed by observation with an electron microscope.

When the formation of the thermal oxide film is completed, the thermal oxide film is removed. By doing so, the nickel element can be eliminated.

Next, by patterning the obtained crystalline silicon film, 103 and 106 shown in FIG.
To obtain the pattern indicated by.

Here, the pattern 103 is a pattern to be an active layer of a P-channel type thin film transistor. Reference numeral 106 denotes a pattern to be an active layer of a P-channel thin film transistor.

After the formation of the active layer, the gate insulating film 409 is formed.
First, a silicon oxide film (CVD oxide film) is formed to a thickness of 200 ° by a plasma CVD method. CV
After forming the D oxide film, thermal oxidation is performed again to form a thermal oxide film.

In the step of forming this thermal oxide film, HCl
950 ° C. in an oxygen atmosphere containing 3% by volume of
A heat treatment for 20 minutes is performed. In this process, 200Å
A thermal oxide film is formed to a thickness of.

This thermal oxide film is formed inside the previously formed CVD oxide film, that is, near the interface with the active layer. Thus, a gate insulating film 409 composed of a thermal oxide film and a CVD oxide film sequentially stacked from the inside is formed. Then, the final thickness of the active layer is 300 °. (FIG. 4 (C))

After obtaining the state shown in FIG. 4C, an aluminum film containing a small amount of scandium is formed to a thickness of 400 nm (4000 °) by a sputtering method. By patterning this, an aluminum pattern indicated by 410 and 411 in FIG. 4D is formed. This aluminum pattern becomes a pattern that becomes the basis of the gate electrode. Thus, the state shown in FIG. 4D is obtained.

The thin film transistor shown here exhibits characteristics equal to or higher than those of a MOS transistor using a single crystal silicon wafer.

The solid line in FIG. 8 indicates that the thickness of the gate insulating film obtained according to the manufacturing method shown here is 30 nm.
(300 °), showing an example of characteristics of a thin film transistor having a channel length of 0.6 μm.

This thin film transistor is manufactured by a manufacturing process of a 2 μm rule. As a method of shortening the channel length, a technique of anodizing the side surface of the gate electrode is used.

The horizontal axis of the figure is the power supply voltage, and the vertical axis is the delay.
Time (delay time). The Delay Time corresponds to the reciprocal of the operation speed, and indicates that the smaller the value, the faster the operation is possible.

The other data indicated by the dotted line in FIG. 8 is comparison data indicating data of a MOS transistor using a single crystal silicon wafer.

The comparison data shown in FIG. 5 shows the relationship between the dimension (channel length and the thickness of the gate insulating film) of the MOS transistor called the scaling rule and the delay time (delay time).

The scaling law is an idea that as the size of a MOS transistor is reduced, its high-frequency characteristics increase in accordance with a specific law. (Of course not exactly)

The plot points shown by the dotted lines in FIG. 5 are in accordance with the scaling rule, although they are schematic.

It can be seen that the thin film transistor obtained by the manufacturing method disclosed in the present specification is several ranks higher than the high frequency characteristics predicted from the conventional scaling law.

MOS using single crystal silicon wafer
If the scaling rule of the type transistor is followed, the plot point of the TFT indicated by the solid line has a larger Delay Time (delay time).

For example, if the conventional scaling rule is followed, the channel length is 0.6 μm and the thickness (tox) of the gate insulating film is
The delay time (delay time) of a MOS transistor having a thickness of 30 nm should be at least larger than the plot point where the channel length is 0.5 μm and the thickness (tox) of the gate insulating film is 11 nm.

As described above, the thin film transistor disclosed in the present specification exhibits characteristics exceeding those of the conventional MOS transistor.

[Embodiment 2] This embodiment relates to a configuration having a function of more effectively dissipating the heat generated by a TFT in the configuration shown in FIG. 2B.

In this embodiment, as shown in FIG.
The structure is such that an aluminum nitride film is formed on a substrate on which an FT is formed.

With such a configuration, the active layer of the TFT has a structure in direct contact with the cooling layer, so that the heat radiation effect can be further enhanced.

[Embodiment 3] This embodiment relates to a configuration that can be used when the configuration as shown in FIG. 3A is used as a module.

FIG. 7 shows the state of the module end. In the figure, a wiring 710 extending from the source (or drain) of the TFT is provided with an extraction electrode (extraction terminal) 71 to the outside.
The state connected to 3 is shown.

The wiring 711 extending from the ceramic element or the like is connected to an extraction electrode (extraction terminal) 71 to the outside.
2 is shown.

With such a configuration, the modularized substrate can be directly inserted into the connection terminals provided in the device.

By adopting such a configuration, the versatility of the apparatus can be increased, and the production cost can be reduced.

[Embodiment 4] This embodiment is an example in which the configuration as shown in FIG. 2B is employed and an active matrix type liquid crystal display device is integrated in another portion (not shown). Show.

In this case, by providing a liquid crystal layer between the two substrates, a liquid crystal display device can be arranged in that portion.

Thus, a high-frequency circuit composed of TFTs and passive elements and an active matrix type liquid crystal display device can be integrated. This configuration is suitable as a component of a portable information processing terminal.

[Embodiment 5] In this embodiment, an example of an electronic device using a composite circuit in which a thin film transistor circuit is combined with a passive element or a ceramic element will be described.

FIG. 8A shows a portable information processing terminal, which has a communication function using a telephone line.

This electronic device includes an integrated circuit 2006, which is a composite circuit disclosed in this specification, inside a main body 2001. An active matrix type liquid crystal display 2005 and a camera unit 200 for capturing an image
2, further comprising an operation switch 2004.

FIG. 8B shows an electronic device called a head mounted display. This device has a function of being attached to the head and displaying an image in front of the eyes.

In this electronic device, a main body 2101 is mounted on a head by a band 2103. The image is created by the liquid crystal display device 2102 corresponding to the left and right eyes.

Since such an electronic device must be small and lightweight, it is suitable for using the composite circuit disclosed in this specification.

FIG. 8C has a function of displaying map information and various types of information based on signals from artificial satellites. Information from the satellite captured by the antenna 2204 is processed by an electronic circuit provided inside the main body 2201, and necessary information is displayed on the liquid crystal display device 2202.

The operation of the apparatus is performed by operating switches 2203. Even in such an apparatus, a device for miniaturizing the entire configuration is required. Then, it is useful to use the composite circuit disclosed in this specification.

FIG. 8D shows a mobile phone.
This electronic device includes an antenna 2306, an audio output unit 2302, a liquid crystal display device 2304, operation switches 2305, and an audio input unit 2303 in a main body 2301.

In such an electronic device, it is useful to use the composite circuit disclosed in this specification in order to reduce the size of the entire configuration.

FIG. 9 is a block diagram of an electronic device as shown in FIG.

In this configuration, for example, in a receiving state, a radio wave received by antenna 2002 is sent to radio input / output section 2003. Then, the data passes through the edge demodulation unit 2004 and the channel codec unit 2005 controlled by the wireless control unit 2007 and the CPU 2008, and passes through the audio processing unit 2
006. Then, the information is output as audio information from a speaker 2010 driven by the audio processing unit 2006.

In the oscillating state, audio information is input from the microphone 2009, and output as radio waves from the antenna 2002 via a path reverse to the above.

The electronic device shown in FIG. 10E is a portable imaging device called a video camera. This electronic device includes a liquid crystal display 2402 attached to an opening / closing member on a main body 2401, and an operation switch 2404 attached to the opening / closing member.

Further, the main body 2401 includes an image receiving section 2406, an integrated circuit 2407, and an audio input section 240.
3, an operation switch 2404, and a battery 2405 are provided.

In such an electronic device, it is useful to use the composite circuit disclosed in this specification in order to reduce the overall configuration.

In particular, when a load function such as a communication function is added, it is necessary to incorporate a high-frequency circuit therefor, that is, to integrate it.

To this end, it is useful to utilize the invention disclosed in this specification.

The electronic device shown in FIG. 8F is a projection type liquid crystal display device. This device includes a light source 2
502, a liquid crystal display device 2503, an optical system 2504,
It has a function of projecting an image on the screen 2505.

The projection type display device is also required to be smaller and lighter. Therefore, it is useful to utilize the invention disclosed in this specification for that purpose.

Further, as the liquid crystal display device in the electronic device described above, either a transmission type or a reflection type can be used. The transmission type is advantageous in terms of display characteristics, and the reflection type is advantageous in pursuit of low power consumption and reduction in size and weight.

As the display device, a flat panel display such as an active matrix type EL display or a plasma display can be used.

[Embodiment 6] This embodiment shows an example in which a polycrystalline silicon wafer is used as a substrate in the configuration shown in Embodiment 1.

A polycrystalline silicon wafer can be obtained at a fraction of the cost of a quartz substrate.
Therefore, it is possible to make a great contribution to reducing the cost of the circuit and the device.

In this embodiment, first, a silicon oxide film is formed on a polycrystalline silicon wafer by plasma CVD.
A film is formed to a thickness of μm. Next, thermal oxidation is performed to form a thermal oxide film 5.
A film is formed to a thickness of 0 nm (500 °).

Thus, a silicon oxide film having a flat surface and excellent interface characteristics can be formed on a polycrystalline silicon wafer.

Using this silicon oxide film as a base film (substrate), a TFT is formed thereon.

It is not preferable to form a thermal oxide film directly on a polycrystalline silicon wafer and use this thermal oxide film as a base film. In this case, the surface of the thermal oxide film becomes uneven, reflecting the polycrystalline structure of the substrate, and the fabrication of the TFT,
Further, the characteristics are adversely affected.

Although a single crystal silicon wafer can be used instead of a polycrystalline silicon wafer, the advantage of low cost is reduced in that case.

[0124]

By using the invention disclosed in this specification, it is possible to provide a novel structure capable of integrating a high-frequency circuit capable of handling a high frequency such as a GHz band.

That is, a connection terminal (connection wiring) is provided through the substrate on which the TFT is formed, and the connection terminal is connected to a laminated element formed on another substrate, thereby achieving compact integration. A high-frequency module can be obtained.

By using a module utilizing the invention disclosed in this specification, a portable information terminal can be made smaller and lighter. Furthermore, the cost can be reduced.

[Brief description of the drawings]

FIG. 1 illustrates a manufacturing process of a thin film transistor.

FIG. 2 is a view showing a step of manufacturing a configuration in which a thin film transistor and a SAW filter are combined.

3 is an equivalent circuit diagram of the configuration shown in FIG. 2 and an enlarged view of a part of the configuration shown in FIG. 2 as viewed from above.

FIG. 4 illustrates a manufacturing process of a thin film transistor.

FIG. 5 is a diagram showing a relationship between dimensions and characteristics of a MOS transistor.

FIG. 6 is a diagram showing a configuration in which a thin film transistor and a SAW filter are combined.

FIG. 7 is a diagram showing a configuration of an end portion of a combined module.

FIG. 8 is a diagram showing an electronic device including a thin film transistor composite circuit.

FIG. 9 is a block diagram illustrating a configuration of a mobile phone.

[Explanation of symbols]

Reference Signs List 101 quartz substrate 102 source region 103 active layer 104 drain region 105 drain region 106 active layer 107 source region 108 gate insulating film 109 porous anodic oxide film (aluminum oxide film) 110 gate electrode made of aluminum 111 having dense film quality Anodized film (aluminum oxide film) 112 Porous anodized film (aluminum oxide film) 113 Anodized film (aluminum oxide film) having dense film quality 114 Gate electrode made of aluminum 115 Low-concentration impurity region 116 Offset gate region 117 Channel formation region 118 Offset gate region 119 Low concentration impurity region 122 Low concentration impurity region 123 Offset gate region 124 Channel formation region 125 Offset gate region 126 Low concentration impurity Region 128 Silicon nitride film 129 Polyimide resin film 130 Source electrode (source wiring) 131 Drain electrode (drain wiring) 132 Source electrode (source wiring) 133 Aluminum nitride film 134 Quartz substrate 135 Zirconium titanate film 136 Electrode 137 Electrode for contact 138 Electrode paired with adhesive layer 301 136

Claims (8)

[Claims] 1. A circuit comprising a first substrate and a second substrate bonded together, a thin film transistor formed on a bonding surface side of the first substrate, and a ceramic formed on a bonding surface side of the second substrate. And a circuit comprising an element, wherein the circuit comprising the thin film transistor and the circuit comprising the ceramic element are connected to each other. 2. The composite circuit according to claim 1, wherein a heat radiation layer is provided on the first substrate side. 3. The composite circuit according to claim 1, wherein the ceramic element is formed using a dielectric material or a magnetic material. 4. The composite circuit according to claim 1, wherein the ceramic element is formed using ferrite. 5. A circuit comprising a first substrate and a second substrate bonded together, a thin film transistor formed on a bonding surface side of the first substrate, and a ceramic formed on a bonding surface side of the second substrate. An electronic device, comprising: a circuit including an element; and a composite circuit in which the circuit including the thin film transistor and the circuit including the ceramic element are connected. 6. The electronic device according to claim 5, wherein a heat radiation layer is provided on the first substrate side. 7. The electronic device according to claim 5, wherein the ceramic element is formed using a dielectric material or a magnetic material. 8. The electronic device according to claim 5, wherein the ceramic element is formed using ferrite.