JP2006100708A - Three-terminal laminate capacitor and circuit board mounted therewith - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To satisfactorily reduce the self-calorific value of a three-terminal laminate capacitor while holding low ESL. <P>SOLUTION: A conductor pattern 30 for signal is continuously formed at an input/output side, and conductor patterns 32 and 34 for GND are segmentation-formed so as to be faced with each other with the conductor pattern 30 for signal interposed. Then, a terminal electrode 26 for signal of the three-terminal laminate capacitor is connected to the conductor pattern 30 for signal, terminal electrodes 22A and 22B for GND are connected to the conductor pattern 32 for GND, and terminal electrodes 22C and 22D for GND are mounted so as to be connected to the conductor pattern 34 for GND. The resistance of the conductor pattern 30 for signal is connected in parallel with the resistance of an internal electrode 10 for signal and a terminal electrode 26 for signal inside the capacitor, so that a resistance to a signal can be set so as to be a low value. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a circuit board for mounting a three-terminal multilayer capacitor and a three-terminal multilayer capacitor related to the circuit board. Specifically, the present invention relates to an improvement in self-heating of the three-terminal multilayer capacitor.

  With recent increases in data processing and communication line speeds centering on information equipment, semiconductor devices such as LSIs tend to operate faster. A power supply circuit of such a semiconductor device supplies a DC (direct current) component necessary for the operation to the semiconductor device, but harmonics accompanying power switching and clock operation destabilize the operation and are radiated as unnecessary radio waves. Sometimes. Therefore, a large capacity capacitor for supplementing high-speed operation and a low ESL capacitor capable of attenuating a signal to a high frequency are used for the power supply circuit. As this low ESL capacitor, for example, a three-terminal multilayer capacitor having an input electrode, an output electrode, and a GND (ground) electrode as shown in Patent Document 1 below is used. The following Patent Document 2 discloses a structure in which a GND electrode on a side surface is made to make a full turn on the entire outer periphery.

  By the way, the internal electrode structure of the three-terminal multilayer capacitor has a structure in which a signal line from the input electrode to the output electrode penetrates the inside, and the signal always passes through the internal electrode. For this reason, there is a problem that self-heating occurs due to the resistance value inside the component, and there is an inconvenience that the energization amount is limited by this heat generation. Referring to FIG. 13, the three-terminal multilayer capacitor is formed by alternately stacking a GND pattern 900 and a signal pattern 902 as shown in FIG. 13A, as shown in FIG. The dielectric layer 904 is laminated. As shown in FIG. 3C, the signal pattern 902 is connected to the input electrode 910 and the output electrode 912, respectively, and the GND pattern 900 is connected to the GND electrodes 914 and 916, respectively.

  On the other hand, the input signal line 920 and the output signal line 922 are patterned on the substrate side so as to sandwich the GND line 924. The capacitor-side input electrode 910 and the input signal line 920, the output electrode 912 and the output signal line 922, the GND electrodes 914 and 916, and the GND line 924 are electrically connected.

  An equivalent circuit of the three-terminal multilayer capacitor in such a mounting form is as shown in FIG. That is, there is a capacitance C10 at the center of the element, a series circuit of a resistor R10 and an inductance L10 is connected between this and the input electrode 910, and a series circuit of a resistor R12 and an inductance L12 is connected between the output electrode 912. Has been. A series circuit of a resistor R14 and an inductance L14 is connected between the element center and the GND electrode 914, and a series circuit of a resistor R16 and an inductance L16 is connected between the GND electrode 916.

As described above, since the resistors R10 and R12 exist between the input / output signal lines 920 and 922, self-heating occurs due to their resistance components. FIG. 14B shows a measurement example of self-heating when the DC resistance value between the input and output electrodes of the conventional three-terminal multilayer capacitor is 10 mΩ. In the figure, the horizontal axis represents the direct current value [ADC], and the vertical axis represents the self-heating value ΔT [° C.]. As shown in the figure, a very large self-heating occurs at a DC current of 3 A and exceeding 40 ° C.
JP-A-55-80313 Japanese Patent Laid-Open No. 06-244058

  Conventional techniques for suppressing such self-heating during energization include providing a conductor pattern on the capacitor surface as described in Patent Document 3 below and an internal conductor pattern described in Patent Document 4 below. What is parallelized is known. However, any method has a limit, and further reduction in the amount of generated heat is required.

The present invention focuses on the above points, and its purpose is to satisfactorily reduce the amount of self-heating of the three-terminal multilayer capacitor. Another object is to maintain a low ESL even if the self-heating value is reduced.
Japanese Patent Laid-Open No. 06-349678 Japanese Utility Model Publication No. 61-129329

  In order to achieve the above object, the present invention provides a circuit board on which a three-terminal multilayer capacitor having a signal terminal electrode and a GND terminal electrode is mounted. The three-terminal multilayer capacitor is a prismatic multilayer capacitor. A signal internal electrode and a GND internal electrode are formed so as to overlap at least in the stacking direction with a dielectric layer sandwiched inside the element body, and the signal internal electrode is formed at the center in the longitudinal direction of the prismatic element body. A signal electrode lead-out portion exposed on a side surface parallel to the longitudinal direction of the element body, and the GND internal electrode is exposed on a side surface excluding the central portion in the longitudinal direction of the prismatic element body. An electrode lead-out portion, and the central portion in the longitudinal direction of the surface of the prismatic element body of the three-terminal multilayer capacitor surrounds a portion where the signal internal electrode and the GND internal electrode overlap in the stacking direction In addition, the signal terminal electrode that circulates around the surface of the element body and is connected to the signal electrode lead-out portion is formed near one end of the side surface parallel to the longitudinal direction of the surface of the prismatic element body and the other A GND terminal electrode connected to the GND electrode lead-out portion is formed in the vicinity of each end portion of the capacitor, and a signal that circulates the surface of the central portion in the longitudinal direction of the element body of the three-terminal multilayer capacitor A part of the terminal electrode is arranged and mounted in parallel on the signal conductor pattern.

  Another invention of a three-terminal multilayer capacitor-mounted circuit board is one in which a three-terminal multilayer capacitor having a signal terminal electrode and a GND terminal electrode is mounted. A plurality of the conductor patterns are mounted apart from each other along the longitudinal direction of the conductor pattern.

  The three-terminal multilayer capacitor of the present invention is formed so that the signal internal electrode and the GND internal electrode overlap at least in the stacking direction with the dielectric layer sandwiched inside the prismatic multilayer capacitor body. The internal electrode has a signal electrode lead-out portion exposed on a side surface parallel to the longitudinal direction of the prismatic body at the center in the longitudinal direction of the prismatic element, and the GND internal electrode is formed of the prismatic element. A GND electrode lead portion exposed on a side surface excluding the central portion in the longitudinal direction of the element body, and the signal inner electrode and the signal inner electrode at the center portion in the longitudinal direction of the surface of the prismatic element body of the three-terminal multilayer capacitor; A signal terminal electrode connected to the signal electrode lead-out portion is formed to surround the surface of the element body so as to surround a portion where the GND internal electrode overlaps in the stacking direction, and the surface of the prismatic element body is formed. Head of Each of the vicinity of one end and near the other end in a direction parallel to the side surface, wherein the GND terminal electrode connected to the GND electrode lead-out portion is formed.

  According to another invention of the three-terminal multilayer capacitor, the GND terminal electrode is formed continuously on a side surface excluding both end surfaces in the longitudinal direction of the prismatic element body and on both main surfaces in contact with the side surface. It is characterized by.

  Another invention of the three-terminal multilayer capacitor is characterized in that the GND internal electrode is provided continuously from one end side to the other end side in the longitudinal direction of the prismatic element body. .

  Furthermore, another invention of a three-terminal multilayer capacitor is characterized in that the GND internal electrode is divided into two at the longitudinal center of the prismatic element. The above and other objects, features and advantages of the present invention will become apparent from the following detailed description and the accompanying drawings.

  According to the present invention, it is possible to satisfactorily reduce the amount of self-heating of the three-terminal multilayer capacitor while keeping the ESL at a low value.

  Hereinafter, the best mode for carrying out the present invention will be described in detail based on several examples.

  First, Embodiment 1 of the present invention will be described with reference to FIGS. In the following description, the left and right end faces in FIG. 1C will be referred to as the front face and the rear face, respectively, and the paper face direction end face will be described as the side face. In the three-terminal multilayer capacitor 20 of Example 1, the signal internal electrodes 10 shown in FIG. 1A and the GND internal electrodes 14 shown in FIG. The signal internal electrode 10 is formed on a dielectric sheet 12 such as ceramics in a pattern shape having lead portions 10A and 10B in the side surface direction. On the other hand, the GND internal electrode 14 is formed on the dielectric sheet 16 as a pattern having the GND electrode lead portions 14A, 14B, 14C, and 14D.

  FIG. 1C shows the state of lamination, in which two layers of signal internal electrodes 10 and GND internal electrodes 14 are alternately laminated, and the upper and lower sides are sandwiched between dielectric layers 18 and 19. It has become. After sintering such a laminate, as shown in FIG. 1 (D), signal terminal electrodes 26 and GND terminal electrodes 22A, 22B and 22C, 22D are formed, respectively. The signal electrode lead portions 10A and 10B of the signal internal electrode 10 are respectively connected to signal terminal electrodes 26 provided so as to circulate around the surface of the central portion in the longitudinal direction of the prismatic multilayer capacitor body. The GND electrode lead portions 14A, 14B, 14C, and 14D of the GND internal electrode 14 are connected to the GND terminal electrodes 22A, 22B, 22C, and 22D, respectively.

As a specific example, a barium titanate-based dielectric material is used as a raw material, and this blended raw material is wet mixed with a ball mill, pulverized and dried, and calcined in air at 1100 ° C. for 2 hours to obtain a calcined product. It was. This calcined product is pulverized by a dry pulverizer to obtain a raw material powder having a particle size of 1 μm or less. To this raw material powder, a polyvinyl butyral binder and an organic solvent such as ethanol are added and wet mixed by a ball mill to prepare a ceramic slurry. Then, the ceramic slurry is formed into a sheet by a doctor blade method, and a rectangular green having a thickness of 2 to 3 μm. A sheet was obtained. Next, a conductive paste mainly composed of Ni was printed on the ceramic green sheet to form a conductive paste layer for constituting internal electrodes. A plurality of ceramic green sheets on which the conductive paste layer was formed were laminated so that the electrodes 10 and 14 shown in FIG. After the obtained laminate is cut, external electrodes (terminal electrodes) 22A, 22B, 22C, 22D and 26 are formed using an external electrode paste. Subsequently, it is fired at 1300 ° C. for 2 hours in a reducing atmosphere composed of H ₂ —N ₂ -air gas having an oxygen partial pressure of 10 ⁻⁹ to 10 ¹² MPa, to obtain a ceramic sintered body, thereby reaching a finished product.

  By the way, in this embodiment, as shown in FIG. 2, the signal conductor pattern 30 is continuously formed on the substrate side, and the GND conductor patterns 32 and 34 face each other with the signal conductor pattern 30 interposed therebetween. It is formed so as to be divided. Then, the three-terminal multilayer capacitor 20 shown in FIG. 1 is mounted on these conductor patterns by solder or the like. That is, the signal terminal electrode 26 is connected to the signal conductor pattern 30, the GND terminal electrodes 22A and 22B are connected to the GND conductor pattern 32, and the GND terminal electrodes 22C and 22D are connected to the GND conductor pattern 34, respectively. Implemented as:

  FIG. 2B shows a connection structure viewed in the signal line direction. In this embodiment, as shown in FIG. 2A, the signal terminal electrode 26 is provided in common for input and output over the entire circumference (four sides) of the surface of the laminate, and this is the signal conductor pattern 30 on the substrate side. Connected to. Therefore, the connection structure as seen in the signal conductor pattern 30 is as shown in FIG. 2B, and the equivalent circuit is shown in FIG. The resistance component RC of the signal internal electrode 10 and the signal terminal electrode 26 is connected in parallel. Therefore, the equivalent resistance RT between the input and output is 1 / RT = 1 / RA + 1 / RC. For example, when RA = 1 mΩ and RB = 3 mΩ, RT≈0.8 mΩ.

  On the other hand, in the case of the conventional three-terminal multilayer capacitor, as shown in FIG. 3A-1, the signal lines 920 and 922 are divided between the input and the output, and the signal current is indicated by the arrow FB. Flows inside. Therefore, when an equivalent circuit for resistance is shown, as shown in FIG. 2A-2, the resistance is only the signal internal electrode inside the capacitor. Therefore, if the resistance value of the internal conductor pattern is 10 mΩ, this becomes the resistance value between the input and output. As described above, according to this embodiment, the resistance value of the component itself is drastically reduced, and the combined resistance of the three-terminal multilayer capacitor 20 and the signal line 30 becomes lower than the resistance value of the signal line itself. The heat dissipation effect can be expected relatively.

  FIG. 3B shows a measurement example of the amount of self-heating when a direct current is passed. The graph G60 shows the heat generation amount of this embodiment, the graph G62 shows the heat generation amount of the conventional structure, and the graph G64 shows the heat generation amount only by the signal line 30. As is apparent from these graphs, the heat generation amount of the present embodiment is further reduced than the heat generation amount of only the signal line 30, and not only the heat generation amount is reduced but also the cooling effect is recognized. It was.

  FIG. 3C shows a measurement example of the relationship between the frequency and the inductance between the input and output. In the figure, the horizontal axis represents frequency and the vertical axis represents inductance. Graph G66 shows the present embodiment, graph G67 shows a conventional three-terminal structure, and graph G68 shows a two-terminal structure. As can be seen from these graphs, the inductance is greatly reduced in the case of the three-terminal structure as compared with the two-terminal structure. The graph G66 shows a slightly lower inductance value than the graph G67. This is due to a decrease in inductance due to the difference between the electrode distances La and Lb shown in FIGS. It is.

Next, the ESL reduction effect in the present embodiment will be described. In this example, the value of ESL was obtained using the following formula 1. In the equation, ESL is an abbreviation for Equivalent Series Inductance, ω is a phase angle, and ω = 2πf (f is a frequency). S ₂₁ represents the pass characteristics when measuring the S-parameters, much when put power from 1 side 2 side represents the amount that should be passed, wherein the signal conductor pattern and the GND conductor pattern The signal attenuation when mounted in parallel is shown. Z ₀ is a characteristic impedance, and since a measuring instrument is normally designed with an input / output of 50Ω, Z ₀ = 50Ω. When considering the actual frequency characteristics of ESL, this equation is often used, and this is an effective calculation method when comparing ESL at a high frequency. Generally, in a three-terminal multilayer capacitor, the inductance L is structurally connected in parallel in two GND directions, so that it becomes L / 2 as a whole, and by dividing the GND into two and pulling it out to both sides, This is because the direction of the current is reversed and the magnetic field is canceled. Together, these effects reduce ESL to about 10-25% compared to conventional two-terminal capacitors. Also in the present invention, since the GND is divided into two and pulled out to both sides, the same ESL reduction effect can be expected.

  FIGS. 4A to 4C show equivalent circuits in each case of the present embodiment, the conventional three-terminal structure, and the two-terminal structure. First, in the case of the present embodiment, as shown in FIG. 5A, a capacitor CAB is connected in parallel with the signal terminal electrode 26, and from this point toward the GND electrodes 22A, 22B, 22C, 22D. Thus, a series circuit of a resistor RGA and an inductance LA, a series circuit of a resistor RGB and an inductance LB, a series circuit of a resistor RGC and an inductance LC, and a series circuit of a resistor RGD and an inductance LD are connected to each other. On the other hand, the conventional three-terminal structure is as described above, as shown in FIG. Further, in the case of a two-terminal capacitor, a series circuit of a capacitor C100, a resistor R100, and an inductance L100 is connected between the input / output electrodes 920 and 922 and the GND electrode 924 as shown in FIG. It becomes an equivalent circuit. As shown in these equivalent circuits, in this embodiment also, the GND is divided and drawn in two directions, and an ESL reduction effect similar to that of the conventional three-terminal structure can be obtained.

  FIG. 4D shows a measurement example of the attenuation characteristics of a three-terminal capacitor and a two-terminal capacitor. In the figure, the horizontal axis represents frequency [MHz] and the vertical axis represents attenuation [dB]. Graph G40 is a case of a three-terminal type, and graph G42 is a case of a two-terminal type. As is apparent from these graphs, the three-terminal type has better attenuation characteristics.

  Further, in this embodiment, the distance La between the signal terminal electrode and the GND terminal electrode is shown in FIGS. 4 (E) and 4 (F) so as to show the relationship between the internal conductor pattern and the external electrode of this embodiment and the conventional structure. Is narrower than the interval Lb of the conventional structure. For this reason, the current path to GND is shortened, so that the effect of lowering ESL can be expected.

As described above, according to this embodiment, there are the following effects.
(1) The resistance value between the input and output is greatly reduced, and the amount of self-heating is favorably reduced.
(2) Since the GND connection is divided in two directions, the ESL is held at a low value.

  Next, Embodiment 2 of the present invention will be described with reference to FIGS. The internal electrodes for GND are continuously provided from one end side to the other end side in the longitudinal direction of the prismatic multilayer capacitor element body in the same manner as in the first embodiment. The GND internal electrode has a GND internal electrode 40 having GND electrode lead portions 40A and 40B in the vicinity of one end portion, and a GND internal electrode 40 having GND electrode lead portions 42A and 42B in the vicinity of the other end portion, respectively. The GND electrode lead portions 40A and 40B in the vicinity of the one end portion are connected to the GND terminal electrodes 22A and 22B in the vicinity of the one end portion, respectively, and the GND in the vicinity of the other end portion is provided. The electrode lead-out portions 42A and 42B are connected to the GND terminal electrodes 22C and 22D near the other end, respectively. In this embodiment, the direction of the flowing current is reversed between the GND internal electrodes 40 and 42 facing the signal internal electrode 10 inside the element body of the three-terminal multilayer ceramic capacitor 44, so that the magnetic field is canceled out. The

  Next, Embodiment 3 of the present invention will be described with reference to FIGS. 6 (A) to 6 (D). In the three-terminal multilayer capacitor 49 of Example 3, the GND internal electrode is divided into two at the longitudinal center of the prismatic element body, and the electrode lead-out of one of the divided GND internal electrodes 46 is extracted. The portions 46A and 46B are connected to the GND terminal electrodes 22A and 22B near one end, and the GND electrode lead portions 48A and 48B of the other GND internal electrode 48 are the GND terminals near the other end. It is connected to the electrodes 22C and 22D. In this embodiment, the internal electrode for GND faces the signal terminal electrode inside the multilayer capacitor element body and is divided into two at the center in the longitudinal direction of the multilayer capacitor element. Is mounted on the signal conductor pattern of the circuit board and the GND conductor pattern formed so as to be sandwiched therebetween, even if it is mounted with a slight displacement from the center in the longitudinal direction of the multilayer capacitor body. The current path from the terminal electrode 26 to the GND conductor patterns 32 and 34 via the signal internal electrode 10 is symmetrical, and a stable noise removal effect can be obtained without variation.

  In the first to third embodiments, the GND terminal electrodes 22A to 22D are formed only on the side surface parallel to the longitudinal direction of the prismatic three-terminal multilayer capacitor body and on both main surfaces in contact therewith. In addition, it has been released from a minimum of four electrode coating processes for coating electrodes on all six surfaces of a prismatic multilayer capacitor body, which has been indispensable with conventional three-terminal capacitors, and both side surfaces parallel to the longitudinal direction The coating can be performed at least twice on only the four main surfaces that are in contact with each other, and the variation in characteristics due to the reduction in the number of coatings can be reduced, and the production can be performed with the production equipment of a normal capacitor array.

  Next, Embodiment 4 of the present invention will be described with reference to FIG. In the three-terminal multilayer capacitor 50 according to the fourth embodiment, the GND internal electrode 54 is continuously provided from one end side to the other end side in the longitudinal direction of the prismatic element body, and the GND electrode lead-out portions 54A to 54A- 54F is a pair of GND terminal electrodes provided on both side surfaces and both end surfaces of the prismatic multilayer capacitor body excluding the central portion in the longitudinal direction, and provided in the vicinity of both longitudinal ends of the prismatic multilayer capacitor body. 56A and 56B. In this embodiment, the GND electrode lead portions 54A, 54B, 54D, and 54E are provided on the side surfaces parallel to the longitudinal direction of the prismatic element body, so that the ESL is reduced as compared with the conventional three-terminal multilayer capacitor. Although the effect is the same as in the previous embodiment, the GND electrode lead portions 54C and 54F are further provided, and the area of the GND terminal electrodes 56A and 56B is increased, so that the heat dissipation is improved. is there.

  Next, Embodiment 5 of the present invention will be described with reference to FIG. FIG. 8 is a circuit diagram showing a specific use example, where (A) is a circuit diagram in the case of the present invention, and (B) is a circuit diagram in the case of a conventional structure. In this example, a three-terminal multilayer capacitor having the same electrode configuration as that shown in Example 4 is used. Referring to FIG. 2A, the signal terminal electrode 100A of the three-terminal multilayer capacitor 100 is connected to the power source 102 via the signal conductor pattern on one side, and connected to the IC 104 to be supplied with power on the other side. . The GND terminal electrodes 100B and 100C of the three-terminal multilayer capacitor 100 are both grounded. On the other hand, in the conventional three-terminal multilayer capacitor 110 of (B), the power source 102 is connected to the input terminal electrode 110A, and the output terminal electrode 110B is connected to the IC 104. The GND terminal electrode 110C is grounded.

  Next, Embodiment 6 of the present invention will be described with reference to FIGS. In the above-described embodiment, a three-terminal multilayer capacitor, a signal conductor pattern, and the like are handled as lumped constants, but this embodiment is handled as a distributed constant. For example, when the frequency is 1 [GHz], the wavelength λ of the AC signal in free space is obtained by λ [m] = f [Hz] / V [m / s] (V is the speed of light), and is approximately 33 [cm]. ]. Since the wavelength is shortened by the dielectric constant in the dielectric, if the dielectric constant εr of the capacitor is 3000, the wavelength λb is about 0.6 [cm] from λb = λ / √ (εr). That is, when the frequency of the noise component and the harmonic component is 1 [GHz], a capacitor existing over a length of 0.15 [cm] or more that is λb / 4 is treated as a distributed constant circuit. FIG. 9 (A) shows such a state. FIG. 9 (A) shows the waveform of wavelength λ in free space, and FIG. 9 (B) shows the waveform of wavelength λb in the dielectric.

  The distributed constant circuit is an electric circuit having a function of a physical length, and each element of L, C, and R exists in a certain range. In general, if a capacitor expressed by a series circuit of L, C, and R elements has a length, the L, C, and R elements physically exist. A filter effect that attenuates in a wide band can be obtained by utilizing such a length.

  An example is shown in FIG. First, FIG. 1A-1 shows a state of mounting in the case of a single capacitor, and GND lines 204 and 206 are formed in parallel with the signal line 202 in between. The three-terminal multilayer capacitor 200 is mounted in the same manner as in the above-described embodiment. This can be represented by an equivalent circuit of distributed constants as shown in FIG. Next, when a plurality of three-terminal multilayer capacitors 200 are distributed and mounted in parallel as shown in FIG. 1B, the equivalent circuit is as shown in FIG. Of these, when the parallel capacitance and inductance are compared, C200 <C202, L200> L202. For this reason, as a whole, a filter effect that attenuates in a wide band can be obtained.

  FIG. 11 shows a specific example of the filter effect when a plurality of such three-terminal multilayer capacitors are used. FIG. 6A shows the case where the three-terminal multilayer capacitor 200 is mounted on the substrate without any interval (= 0 mm), and FIG. 6B shows the case where it is mounted with an interval = 1 mm. The used three-terminal multilayer capacitor 200 has a capacitance of 1 [uF] and dimensions of 2.0 mm × 0.85 mm × 1.25 mm. As a result of measuring the attenuation, a result as shown in FIG. In the figure, the horizontal axis is the frequency [MHz], the vertical axis is the attenuation [dB], the graph G11A is when there is no interval, and the graph G11B is when the interval is 1 mm. From these graphs, it can be seen that even when the same number of capacitors are used, a larger amount of attenuation can be obtained by separating the parts.

  Next, Example 7 will be described with reference to FIG. This embodiment is an example of a specific implementation. First, in the example shown in FIG. 6A, a power source 262 and an LSI 263 are provided on a main board 260, and appropriate signal lines 266 and GND lines 268 and 270 provided in parallel between them are provided. This is an example in which a plurality of three-terminal multilayer capacitors 264 are provided at intervals. In order to effectively remove the high frequency component, the three-terminal multilayer capacitor 264 is disposed in the vicinity of the power source 262 and the LSI 263. The example of FIG. 5B is an example of mounting in a semiconductor package. An LSI 282 is provided at the center of the sub-board 280, and the three-terminal multilayer capacitor 284 of the present invention is provided so as to surround the LSI 282. ing. The example of FIG. 5B is also a similar example, and the three-terminal multilayer capacitor 294 of the present invention is provided around the LSI 292 on the sub-substrate 290. These embodiments are particularly suitable when it is necessary to perform precise power control while operating at high speed. By surrounding the LSI with a capacitor, it is difficult to supply a capacitor capacity, lower ESL, and wide bandwidth. Decoupling is possible.

Here, the effects of the above-described embodiment will be summarized.
(1) Since the conventional three-terminal multilayer capacitor has terminal electrodes on both end faces in the longitudinal direction of the columnar multilayer capacitor body and both side faces parallel to the longitudinal direction, the conventional two-terminal type terminal electrode forming equipment In addition, a special process and electrode forming equipment for forming terminal electrodes on both sides are required. On the other hand, in Examples 1 to 3, 6 and 7, the GND terminal electrode and the signal terminal electrode are provided on both side surfaces excluding the end surface in the longitudinal direction of the multilayer capacitor. Forming equipment can be used, and it has the merit that a plurality of terminal electrodes can be collectively formed on both side surfaces with less man-hours.

  (2) Also, in the conventional 3-terminal multilayer capacitor mounting circuit board, the GND line and signal line of the mounting circuit board on which the capacitor is mounted are different from the line shape when mounting a normal 2-terminal capacitor, A special line pattern having a location where the signal line intersects must be created, and it is difficult to move or add a location where the three-terminal multilayer capacitor is attached. On the other hand, in the three-terminal multilayer capacitor mounting circuit board of the above-described embodiment, no special line pattern is required such as a location where the GND line and the signal line intersect. It can be easily moved and expanded.

  (3) In the above-described first to seventh embodiments, in order to reduce the power consumption by flowing a large current through the signal line by extending the signal electrode lead-out portion or reducing the signal line resistance value In a mounting circuit board employing a wide signal line, the width of the signal terminal electrode can be made wider than the width of the GND terminal electrode. This shortens the current path to the signal terminal electrode, signal electrode lead-out portion, signal internal electrode, GND internal electrode, GND electrode lead-out portion, GND terminal electrode, and lowers the ESL. Can do.

  (4) In the three-terminal multilayer capacitors described in Examples 1 to 3, 6 and 7 of the present invention, when mounted on a mounting circuit board, a solder fillet is formed along the longitudinal direction of the signal line. It does n’t require a special land. For this reason, even when other mounting parts are mounted in the vicinity, it is possible to avoid these parts and mount them in a slight gap parallel to the signal line.

In addition, this invention is not limited to the Example mentioned above, A various change can be added in the range which does not deviate from the summary of this invention. For example, the following are also included.
(1) The materials and dimensions shown in the above embodiments are examples, and may be appropriately changed as necessary.
(2) The shapes of the signal electrode lead-out portion, the GND electrode lead-out portion, the signal terminal electrode, and the GND terminal electrode shown in the above embodiment are also examples, and can be appropriately changed so as to achieve the same effect.
(3) The number of laminated signal internal electrodes and GND internal electrodes is also an example, and may be appropriately increased or decreased as necessary.
(4) The manufacturing procedure and manufacturing conditions shown in the above embodiment are examples, and the present invention is not limited to the above embodiment.
(5) The above-described mounting example of the three-terminal multilayer capacitor shown in the seventh embodiment is also an example, and the arrangement may be changed as appropriate so as to achieve the same effect.

  According to the present invention, the amount of self-heating is reduced while maintaining a low ESL value, which is suitable for a power supply circuit of an integrated circuit.

It is a figure which shows the 3 terminal type | mold multilayer capacitor of Example 1 of this invention. It is a figure which shows the mode of mounting of the 3 terminal type | mold multilayer capacitor of the said Example 1. FIG. It is a figure which shows the structure along the signal line of the said Example 1, an equivalent circuit, and a heat generation characteristic. It is a figure which shows the mode of ESL reduction in the said Example 1. FIG. It is a figure which shows the 3 terminal type | mold multilayer capacitor of Example 2 of this invention. It is a figure which shows the 3 terminal type | mold multilayer capacitor of Example 3 of this invention. It is a figure which shows the 3 terminal type | mold multilayer capacitor of Example 4 of this invention. It is a figure which shows the comparison of the mounting state of the 3 terminal type multilayer capacitor of Example 5 of this invention, and the conventional 3 terminal type multilayer capacitor. It is a figure which shows the mode of the wavelength change in Example 6 of this invention. It is a figure which shows the mode of mounting in the said Example 6, and the equivalent circuit of a distributed constant circuit. It is a figure which shows the mode of mounting of the said Example 6, and an attenuation | damping characteristic. It is a figure which shows Example 7 of this invention. It is a figure which shows the conductor pattern of a conventional 3 terminal type | mold multilayer capacitor, a lamination | stacking state, and the mode of mounting. It is a figure which shows the equivalent circuit and heat generation characteristic of the said prior art example.

Explanation of symbols

10: Signal internal electrodes 10A, 10B: Lead part 12: Dielectric sheet 14: GND internal electrode 14A, 14B: Lead part 16: Dielectric sheet 18, 19: Dielectric layer 20: Three-terminal multilayer capacitor 22A- 22D: GND terminal electrode 26: Signal terminal electrode 30: Signal conductor pattern 32, 34: GND conductor pattern 40, 42: GND internal electrodes 40A, 40B, 42A, 42B: Lead portions 44, 49, 50: Three-terminal multilayer capacitor 52: Dielectric sheet 54: GND internal electrodes 54A to 54F: Lead portions 56A, 56B: GND terminal electrode 100: Three-terminal multilayer capacitor 100A: Signal terminal electrode 100B, 100C: GND terminal Electrode 102: Power supply 104: IC
110: Three-terminal multilayer capacitor 110A: Input terminal electrode 110B: Output terminal electrode 110C: GND terminal electrode 130, 132: Signal conductor pattern 134, 136: GND conductor pattern 140, 142: Signal conductor pattern 144 : GND conductor pattern 150, 152: Signal conductor pattern 160, 162: GND conductor pattern 200: Three-terminal multilayer capacitor 202: Signal line 204, 206: GND line 260: Main board 262: Power supply 263: LSI
264: Three-terminal multilayer capacitor 266: Signal line 268, 270: GND line 280: Sub-board 282: LSI
284: Three-terminal multilayer capacitor 290: Sub-board 292: LSI
294: Three-terminal multilayer capacitor

Claims (6)

A circuit board on which a three-terminal multilayer capacitor having a signal terminal electrode and a GND terminal electrode is mounted,
A signal conductor pattern to which the signal terminal electrode is connected is continuously formed on the surface of the circuit board as the same line, and a GND conductor to which the GND electrode is connected across the signal conductor pattern. The pattern is divided,
The three-terminal multilayer capacitor is formed so that the signal internal electrode and the GND internal electrode overlap at least in the stacking direction with the dielectric layer sandwiched inside the prismatic multilayer capacitor body,
The signal internal electrode has a signal electrode lead-out portion exposed on a side surface parallel to the longitudinal direction of the element body at a central portion in the longitudinal direction of the prismatic element body,
The GND internal electrode has a GND electrode lead portion exposed on a side surface excluding a central portion in the longitudinal direction of the prismatic element.
In the central part of the longitudinal direction of the surface of the prismatic element body of the three-terminal multilayer capacitor, the surface of the element body is circulated so as to surround a portion where the signal internal electrode and the GND internal electrode overlap in the stacking direction. And a signal terminal electrode connected to the signal electrode lead portion is formed,
A GND terminal electrode connected to the GND electrode lead-out portion is formed in the vicinity of one end portion of the side surface parallel to the longitudinal direction of the surface of the prismatic element body and in the vicinity of the other end portion, respectively. ,
A part of the signal terminal electrode that circulates on the surface of the central portion in the longitudinal direction of the element body of the three-terminal multilayer capacitor is arranged and mounted in parallel on the signal conductor pattern. Type multilayer capacitor mounting circuit board.   The three-terminal multilayer capacitor mounting circuit board according to claim 1, wherein a plurality of the three-terminal multilayer capacitors are mounted apart from each other along the longitudinal direction of the signal conductor pattern. The signal internal electrode and the GND internal electrode are formed so as to overlap at least in the stacking direction with the dielectric layer sandwiched inside the prismatic multilayer capacitor body,
The signal internal electrode has a signal electrode lead-out portion exposed on a side surface parallel to the longitudinal direction of the element body at a central portion in the longitudinal direction of the prismatic element body,
The GND internal electrode has a GND electrode lead portion exposed on a side surface excluding a central portion in the longitudinal direction of the prismatic element.
In the central part of the longitudinal direction of the surface of the prismatic element body of the three-terminal multilayer capacitor, the surface of the element body is circulated so as to surround a portion where the signal internal electrode and the GND internal electrode overlap in the stacking direction. And a signal terminal electrode connected to the signal electrode lead portion is formed,
A GND terminal electrode connected to the GND electrode lead portion is formed in the vicinity of one end of the side surface parallel to the longitudinal direction of the surface of the prismatic element body and in the vicinity of the other end, respectively. A three-terminal multilayer capacitor.   4. The three-terminal laminate according to claim 3, wherein the GND terminal electrode is continuously formed on a side surface excluding both end surfaces in the longitudinal direction of the prismatic element body and on both main surfaces in contact with the side surface. Capacitor.   4. The three-terminal multilayer capacitor according to claim 3, wherein the GND internal electrode is provided continuously from one end side to the other end side in the longitudinal direction of the prismatic element body. .   4. The three-terminal multilayer capacitor according to claim 3, wherein the GND internal electrode is divided into two at the longitudinal center of the prismatic element.

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