JP2006049693A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To attain the shortening of a switching operation time, the reduction of a saturating voltage, and the improvement of hFE linearity; and to prevent the risk of the generation of inter-electrode short circuit due to migration by making micro-fine the semiconductor substrate of a bi-polar transistor having a mesh emitter mechanism without being restricted by electrode wiring. <P>SOLUTION: As for the width and pitch of an emitter region 2 in an X direction where an emitter electrode 4 and a base electrode 5 are running and a Y direction crossing the X direction, the X direction is sized following the width 4 and 5 of the emitter electrode 4 and the base electrode 5 and a clearance 6 between the emitter electrode 4 and the base electrode 5, and the Y direction is made micro-fine without being restricted by the emitter electrode 4 and the base electrode 5. Thus, electric characteristics is improved, and the risk of inter-electrode short-circuit generation due to migration is prevented. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a bipolar transistor.

  In general, in order to increase the current amplification factor as an essential characteristic of a bipolar transistor, the emitter area must be increased. In addition, in order to shorten the switching time and lower the saturation voltage as characteristics of the bipolar transistor, it is necessary to secure a long plane peripheral length of the emitter and increase the junction surface between the side surface of the emitter region and the base region. .

  As a conventional bipolar transistor, in order to obtain high area efficiency with a limited size, in consideration of the above-mentioned principle, the planar shape of the emitter region is shaded in a lattice pattern in the base region of the transistor element. A so-called mesh emitter structure, a transistor semiconductor structure in which a lower layer of the mesh emitter is a common layer, and an outer periphery surrounding the mesh emitter and a gap of the mesh emitter are continuously integrated into a base region, and a main structure of the semiconductor structure The surface of the mesh emitter is formed in a comb-like shape on the surface of the mesh emitter, has an emitter electrode connected by the emitter region and the emitter contact region, has a comb-teeth shape meshed with the emitter electrode, and an emitter An electrode is formed continuously on the outer base surface surrounding the electrode, and the outer periphery surrounding the emitter electrode and the mesh emitter. Were those having a base electrode connected with the base region surface and the base contact region in a scattered and the gap (e.g., see Patent Document 1).

  2 and 3 show a conventional bipolar transistor described in Patent Document 1. FIG. 2 and 3, 100 is a semiconductor substrate, 101 is a collector region, 102 is a base region, 102a is a base contact region, 103 is an emitter region, 103a is an emitter contact region, 104 is a base electrode, and 104a is a base bonding pad. FIG. 2A is a top view of the semiconductor substrate, FIG. 2B is a cross section taken along line I-I in FIG. 2A, FIG. C is a cross section taken along line II-II in FIG. 2-A, FIG. 3-A is a state in which the electrode wiring on the emitter bonding pad region 105a side is removed from the III-III line on the semiconductor substrate, and FIG. This shows a state where the electrode wiring on the base bonding pad region 104a side is removed from the IV-IV line.

  FIG. 2A is a top view showing the main surface of the semiconductor substrate 100, and a base region 102 having a region surrounding the outer periphery of the lattice-like emitter region 103 and a region occupying the gap of the lattice-like emitter region 103. Is shown. 2B shows a cross section taken along line II in FIG. 2-A, and FIG. 2-C shows a cross section taken along line II-II in FIG. 2-A. The semiconductor substrate 100 has a collector region 101 in the bottom layer. The base region 102 is provided on the upper layer of the collector region 101, and the region extending from the surface of the base region 102 into the layer and leaving the inner side along the outer peripheral edge of the base region 102 is shaded. Thus, the structure has a grid-like emitter region 103 (hereinafter referred to as a mesh emitter structure).

  3A and 3B show the relationship between the main surface of the semiconductor substrate 100 having the mesh emitter structure shown in FIG. 2 and the electrode wiring, and FIG. FIG. 3B shows a state in which the electrode wiring on the base bonding pad region 104a side is removed from the IV-IV line on the semiconductor substrate. .

  3A and 3B, an emitter electrode 105 formed in a continuous comb-like shape on the surface of the emitter region 103 occupying the main surface of the semiconductor substrate 100 having a mesh emitter structure, and the emitter The base electrode 104 has a comb-teeth shape that meshes with the electrode 105 and is continuously formed on the outer surface of the base region 102 that surrounds the emitter electrode 105. The emitter electrode 105 and the emitter region 103 are the emitters. In the contact region 103a, the base electrode 104 and the base region 102 are bipolar transistors connected by the base contact region 102a.

According to this, within the limited size of the semiconductor substrate 100, the side surface area of the emitter region 103 can be increased to improve the current amplification capability, and the mesh emitter structure can be miniaturized to form a lattice-like emitter. As the number of pitches in the region 103 is increased, the electrical characteristics such as shortening of the switching time and lowering of the saturation voltage can be improved as the characteristics of the bipolar transistor.
JP 2001-267329 A

  However, in the conventional configuration, when the mesh emitter structure is miniaturized, the influence of the electrical resistance component of the electrode wiring on the main surface of the semiconductor substrate, which requires miniaturization, can not be ignored. The voltage drop in the current region leads to a decrease in hFE linearity and the gap between the electrode wirings becomes narrow, so that there is a problem that the risk of a short circuit between the electrodes due to migration increases.

  The present invention solves the above-described conventional problems, and even when the mesh emitter structure is miniaturized, it does not require the miniaturization of the electrode wiring and the complexity of the multi-layer wiring, etc. An object of the present invention is to provide a bipolar transistor that does not have a risk of short-circuit between electrodes due to improvement or migration.

  In order to solve the above-mentioned conventional problems, the bipolar transistor of the present invention has a semiconductor substrate as a collector region, a base region on the collector region, and extends from the surface of the base region into the layer. A semiconductor substrate having a mesh-like mesh emitter structure in the form of a mesh, which is located in a region leaving the inner side along the outer peripheral edge of the base region, the emitter region having a main surface of the semiconductor substrate Then, an electrode is formed on the surface of the emitter in a continuous comb-like shape, and has an emitter electrode connected by the emitter region and the emitter contact region. The base region surface is connected to the base contact region, the base region surface surrounding the emitter region is connected to the base contact region, and the electrodes are continuously integrated. In a bipolar transistor having a base electrode formed, in the lattice-shaped mesh emitter region of the mesh emitter structure semiconductor substrate, the direction in which the comb-shaped portion between the base electrode and the emitter electrode peels, the base electrode and the emitter The bipolar transistor is characterized in that the mesh width and the mesh pitch are different in the direction in which the comb-like portion with the electrode peels off and in the intersecting direction.

  With this configuration, the mesh emitter structure can be further miniaturized without being limited by the width and pitch of the electrode wiring, and the characteristics of the bipolar transistor can be improved.

  As described above, according to the configuration of the present invention, a bipolar transistor having a short switching operation time, a low saturation voltage, a high hFE linearity, and no risk of a short circuit between electrodes due to migration is provided according to the configuration of the present invention. I can do it.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a top view showing a relationship between a semiconductor substrate of a bipolar transistor having a mesh emitter structure according to an embodiment of the present invention and electrode wirings on a main surface of the semiconductor substrate.

  In FIG. 1, 1 is a semiconductor substrate having a mesh emitter structure, 2 is an emitter region, 2a is an emitter contact region, 2b is a mesh width in the X direction, 2c is a mesh width in the Y direction, 2d is a mesh pitch in the X direction, 2e is a mesh pitch in the Y direction, 3 is a base region, 3a is a base contact region, 4 is an emitter electrode, 4a is an emitter electrode width, 5 is a base electrode, 5a is a base electrode width, and 6 is an emitter electrode 4 and a base. Each gap with the electrode 5 is shown.

  The configuration of FIG. 1 is a semiconductor substrate 1 having a mesh emitter structure, and the widths and pitches of the X direction and the Y direction, which are mutually intersecting directions, are different. An emitter electrode 4 and a base electrode 5 are formed in the X direction on the main surface of the substrate. The emitter electrode 4 is formed in a plurality of rows on the emitter region 2 and connected to the emitter region in the emitter contact region 2a. Reference numeral 5 denotes an island-like base region 3 that is arranged in a row and is formed in a plurality of rows in parallel with the emitter electrode 4 and connected to the base region 3 by the base contact region 3a. The width 5a of the base electrode and the gap 6 between the base electrode 5 and the emitter electrode 4 do not adversely affect the electrical characteristics of the bipolar transistor and are effective in migration. The mesh width 2b in the X direction and the mesh pitch 2d in the X direction of the semiconductor substrate 1 having a mesh emitter structure are reduced in consideration of the risk of a short circuit between the emitter electrode 4 and the base electrode 5 and the above-described electrode wiring. On the other hand, the Y direction intersecting the emitter electrode 4 and the base electrode 5 which are electrode wirings with respect to the X direction has a mesh width 2c in the Y direction and a mesh pitch 2e in the Y direction of 5 μm respectively. Alternatively, it is miniaturized to less than 10 μm or less.

  According to this configuration, when the mesh emitter structure of the semiconductor substrate 1 having the mesh emitter structure is miniaturized, the width 4a of the emitter electrode and the width 5a of the base electrode and the gap 6 between the emitter electrode 4 and the base electrode 5 are reduced. Since there is no limit, it is possible to improve the electrical characteristics such as shortening the switching time, reducing the saturation voltage, and improving the hFE linearity without requiring the miniaturization of the electrode wiring and the complexity of the multilayer wiring. A bipolar transistor without risk of short-circuit between electrodes due to migration can be obtained.

  In this embodiment, the bonding pad region on the electrode wiring is omitted. However, the structure of the bonding pad region conforms to the conventional structure, and the structure of the semiconductor substrate may be a mesh structure directly below the bonding pad region. It is not necessary to have a mesh structure.

  It is useful as a bipolar transistor and is particularly suitable for a high-speed and high-output type.

The top view of the bipolar transistor which concerns on embodiment of this invention Semiconductor substrate structure diagram of conventional bipolar transistor Top view of conventional bipolar transistor

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,100 Semiconductor substrate 2 of mesh emitter structure, 103 Emitter region 2a, 103a Emitter contact region 2b Mesh width 2c in X direction Mesh width 2d in Y direction Mesh pitch 2e in X direction 2e Mesh pitch 3, Y direction Mesh pitch 3, 102 Base region 3a , 102a Base contact region 4, 105 Emitter electrode 4a Emitter electrode width 5, 104 Base electrode 5a Base electrode width 6 Gap between emitter electrode 4 and base electrode 101 Collector region 104a Base bonding pad region 105a Emitter bonding pad region

Claims (2)

The bottom layer of the semiconductor substrate is a collector region, a base region is provided above the collector region, an emitter region is extended from the surface of the base region into the layer, and the emitter region is located on the outer periphery of the base region. The semiconductor substrate having a mesh-like mesh emitter structure like a mesh located in a region left along the inner side,
On the main surface of the semiconductor substrate, an electrode is formed in a continuous comb shape on the surface of the emitter region, and has an emitter electrode connected by the emitter region and the emitter contact region,
Comb teeth meshing with the emitter electrode, connected by the base region surface and the base contact region scattered in the gap of the emitter region, the base region surface and the base contact region surrounding the outer periphery of the emitter region In a bipolar transistor having a base electrode connected and continuously formed as an electrode,
In the lattice-shaped mesh emitter region of the semiconductor substrate having the mesh emitter structure,
The direction in which the comb-shaped portion between the base electrode and the emitter electrode peels;
A bipolar transistor characterized in that a mesh width and a mesh pitch are different in a direction intersecting a direction in which a comb-like portion of the base electrode and the emitter electrode is peeled. The mesh width and mesh pitch size of the grid-like mesh emitter region are:
The direction in which the comb-like portion between the base electrode and the emitter electrode peels is a size according to the width of the base electrode and the emitter electrode and the gap between the base electrode and the emitter electrode,
The crossing direction of the comb-like portion between the base electrode and the emitter electrode is that the mesh width and mesh pitch size of the lattice mesh emitter region are 5 μm or less and 10 μm or less, respectively. The bipolar transistor according to claim 1, wherein there is a certain characteristic.

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