JP2006024815A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of embedding a wiring layer well at relatively low temperatures. <P>SOLUTION: The method for manufacturing the semiconductor device comprises the steps of forming the wiring layer in approximately parallel on a semiconductor substrate, forming a silicon layer on at least the side wall of the wiring layer, forming an insulating film so as to cover the wiring layer to leave a void in the region sandwiched by the wiring layer, and letting the silicon layer cubically expand by oxidizing to crush the void between the insulating films. Further, the method may include a step for forming a catalitic layer to accelerate an oxidation of the insulating layer on the insulating layer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which a wiring layer is embedded with an interlayer insulating layer.

Conventionally, in the case of embedding between a plurality of gate electrodes provided on a semiconductor substrate, after forming a BPSG film, a high temperature heat treatment is performed to reflow the BPSG film to embed between the gate electrodes. Further, when the embedding is insufficient, the coverage of the BPSG film is improved by increasing the concentration of boron or phosphorus in the BPSG film (see, for example, Patent Document 1).
JP-A-6-85118

However, such a burying method has a problem that, when the gate electrode has a T-shaped or inverted triangle vertical cross section, the BPSG film is not sufficiently embedded, voids are formed, and the insulating property is lowered.
On the other hand, it has been studied to increase the reflow temperature of the BPSG film to improve the embedding property, but there is a problem that the characteristics of the transistor and the like formed on the semiconductor substrate deteriorate.
Further, it has been studied to further increase the concentration of boron and phosphorus in the BPSG film, but there are problems such as precipitation of P ₂ O _{5 and the} like.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device capable of satisfactorily filling a wiring layer at a relatively low temperature.

  That is, the present invention includes a step of forming a wiring layer substantially parallel on a semiconductor substrate, a step of forming a silicon layer on at least a side wall of the wiring layer, and forming an insulating film so as to cover the wiring layer. A method for manufacturing a semiconductor device, comprising: a step of leaving a void in a region sandwiched between and a step of oxidizing a silicon layer to expand its volume and crushing a void between insulating films.

  Furthermore, a step of forming a catalyst layer that promotes oxidation of the insulating layer on the insulating layer may be included.

  By using the method for manufacturing a semiconductor device according to the present invention, the wiring layer can be satisfactorily embedded, and a semiconductor device having excellent insulation characteristics can be obtained.

Embodiment 1 FIG.
FIG. 1 is a cross-sectional view of the manufacturing process of the semiconductor device according to the first embodiment.
In such a manufacturing method, first, a silicon substrate 1 is prepared as shown in FIG. Although omitted here, an element isolation region, a channel region, and the like are already formed in the silicon substrate 1.

  Next, a gate oxide film 2 made of a silicon oxide film is formed on the surface of the silicon substrate 1 by a thermal oxidation method.

  Next, a gate electrode 3 made of, for example, polycrystalline silicon is formed on the gate oxide film 2. In FIG. 1A, three gate electrodes 3 are formed substantially parallel to a direction perpendicular to the paper surface. Further, the side surface of the gate electrode 3 has a shape recessed inward.

  Next, an antioxidant film 4 made of, for example, a silicon nitride film is formed so as to cover the entire surface. The antioxidant film 4 is formed using, for example, a CVD method. The interval between the antioxidant layers 4 provided on the side walls of the gate electrode 3 is about 100 nm.

Next, for example, an oxide film 5 made of polycrystalline silicon is formed by a CVD method. The film thickness of the oxidized film 5 is about 10 to 15 nm.
The oxidized film 5 may be made of single crystal silicon or amorphous silicon in addition to polycrystalline silicon.

  Next, an interlayer insulating film 6 made of BPSG (Boro-phosphosilicate glass) is formed on the film to be oxidized 5 by the CVD method. In this state, voids 7 are formed in the BPSG film 6 as shown in FIG.

  As described above, in the first embodiment, the interval between the antioxidant layers 4 made of the silicon nitride film is about 100 nm, and the void 7 having a width of about 20 nm exists in the interlayer insulating film 6 for filling. On the other hand, an oxidized film 5 having a thickness of about 10 to 15 nm is formed.

Next, by performing a heat treatment in an atmosphere containing oxygen and moisture, the oxidized layer 5 is oxidized to form a silicon oxide film 5A. Oxidation is performed in a gas atmosphere containing water vapor obtained by burning a mixed gas of hydrogen and oxygen in a furnace at a temperature of 850 ° C. for 1 hour.
By completely oxidizing the film to be oxidized 5, the volume of the film to be oxidized 5 theoretically expands to about 2.2 times. As shown in FIG. 1B, the void 7 existing in the interlayer insulating film 6 is crushed by the volume expansion.

  Through the above steps, the semiconductor device shown in FIG. 1B is obtained.

Embodiment 2. FIG.
FIG. 2 is a cross-sectional view of the manufacturing process of the semiconductor device according to the second embodiment. 2, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.
In this manufacturing method, after performing the same steps as in FIG. 1A, a catalyst layer 8 made of, for example, platinum is formed on the interlayer insulating film 6 by sputtering (FIG. 2A). The film thickness of the catalyst layer 8 is about 20 nm and may be thinner. Further, the lower interlayer insulating film 6 may be partially exposed.

  Next, for example, heat treatment is performed at 750 ° C. for 30 minutes in an atmosphere containing oxygen and moisture to oxidize the oxidized layer 5. As a result, the oxidized layer 5 is oxidized to form a silicon oxide film 5A. The volume of the film to be oxidized 5 expands, and the voids 7 existing in the interlayer insulating film 6 are crushed (FIG. 2B).

  Finally, the catalyst layer 8 is removed using aqua regia, for example, to obtain the semiconductor device shown in FIG.

  In the method according to the present embodiment, since the oxidized film 5 is oxidized using the catalyst layer 8, the heat treatment temperature can be lowered and the heat treatment time can be shortened. For this reason, the void 7 can be crushed without deteriorating the characteristics of a transistor or the like formed in advance on the semiconductor substrate 1.

Embodiment 3 FIG.
FIG. 3 is a cross-sectional view of the manufacturing process of the semiconductor device according to the third embodiment. 3, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.
In this manufacturing method, as shown in FIG. 3A, the gate oxide film 2 and the gate electrode 3 are formed on the silicon substrate 1 in the same process as in the first embodiment, and further, the entire surface is covered. For example, an antioxidant film 4 made of a silicon nitride film is formed. The side surface of the gate electrode 3 has a shape recessed inward.

  Next, after an oxide layer 5 made of polysilicon is formed as shown in FIG. 1A, the entire surface is etched back by a dry etching method, and the polysilicon covered layer is formed only in the concave portion on the side surface of the gate electrode 3. The oxide layer 5 is left.

  Next, in the same process as in the first embodiment, a buried interlayer insulating film 6 made of BPSG is formed, heat treatment is performed in water vapor, and the oxidized film 5 is oxidized to form a silicon oxide film 5B. As a result, the volume of the film to be oxidized 5 expands, and the void 7 existing in the interlayer insulating film 6 is crushed (FIG. 3B).

  As described above, in the method of manufacturing a semiconductor device according to the first to third embodiments, the oxidizable layer 5 made of polysilicon or the like is formed in advance and is oxidized through the interlayer insulating film 6 to thereby provide interlayer insulation. The voids 7 present in the film 6 can be crushed. As a result, the void 7 can be sufficiently embedded even in a low temperature process in which the side surface shape of the gate electrode 3 is a concave shape or deformation due to heat treatment is not expected so much, and the manufacturing yield of the semiconductor device can be improved.

  In the first to third embodiments, polysilicon is used as the layer 5 to be oxidized. However, polysilicon added with phosphorus or the like may be used to increase the oxidation rate. In addition to polysilicon, amorphous silicon or single crystal silicon may be used.

  In addition, wet oxidation using a diffusion furnace is assumed as an oxidation method of the layer 5 to be oxidized, but dry oxidation including nitrogen and oxygen may be used. Alternatively, lamp oxidation using a lamp annealing apparatus may be used.

  Further, the description has mainly been given of the gate wiring 5 of the transistor, but the present invention can also be applied to other heat-resistant wiring.

It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 1 of this invention. It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 2 of this invention. It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 3 of this invention.

Explanation of symbols

1 silicon substrate, 2 gate oxide film, 3 gate electrode, 4 antioxidant film, 5 oxidizable film, 6 BPSG film, 7 void.

Claims (4)

Forming a wiring layer substantially parallel on the semiconductor substrate;
Forming a silicon layer at least on the sidewall of the wiring layer;
Forming an insulating film so as to cover the wiring layer, and leaving a void in a region sandwiched between the wiring layers;
And a step of oxidizing the silicon layer to expand the volume and crushing the voids between the insulating films.   Furthermore, the manufacturing method of Claim 1 including the process of forming the catalyst layer which accelerates | stimulates the oxidation of this insulating layer on the said insulating layer.   3. The manufacturing method according to claim 1, wherein the silicon layer is made of a material selected from the group consisting of polysilicon, amorphous silicon, and single crystal silicon. The manufacturing method according to claim 1, wherein the silicon layer is a silicon layer to which phosphorus and / or boron is added.

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