JP2004119754A - Wire, manufacturing method of wire, semiconductor device, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wire and a manufacturing method thereof whereby the production of particles is suppressed when wires are formed so as to enhance an yield and suppress an increase in contact resistance, and to provide a semiconductor device and a manufacturing method thereof. <P>SOLUTION: The manufacturing method of the semiconductor device includes steps of: forming an insulation film 2 on a silicon substrate 1; forming a contact hole 2a in the insulation film 2 located on the silicon substrate 1; forming a Ti layer 3 in the contact hole and on the insulation film; introducing oxygen 6 to the Ti layer 3; forming a TiN layer 4 on the surface of the Ti layer; applying heat treatment to the TiN and Ti layers to form a TiO<SB>2</SB>layer 3b under the TiN layer; removing the TiN layer 4; and forming an Al alloy layer 5 on the TiO<SB>2</SB>layer 3b and in the contact hole. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring, a method of manufacturing the same, a semiconductor device, and a method of manufacturing the same. In particular, the present invention relates to a wiring, a method of manufacturing the same, a semiconductor device, and a method of manufacturing the same, which suppress generation of particles when forming the wiring to improve yield and suppress increase in contact resistance.
[0002]
[Prior art]
FIG. 5 is a cross-sectional view for explaining a conventional method for manufacturing a semiconductor device.
First, an insulating film 102 such as a silicon oxide film is formed on a silicon substrate 101. Next, a photoresist film (not shown) is applied on the insulating film 102, and the photoresist film is exposed and developed to form a resist pattern on the insulating film 102.
[0003]
Next, by using the resist pattern as a mask, the insulating film 102 is etched to form a contact hole 102a located on the silicon substrate 101 in the insulating film 102. Next, a Ti layer 103 is formed in the contact hole 102a and on the insulating film 102 by sputtering. Next, a TiN layer 104 is formed on the Ti layer 103 by reactive sputtering while supplying Ar plasma. The TiN layer 104 and the Ti layer 103 function as a barrier.
[0004]
Next, oxygen is introduced into the TiN layer 104 by subjecting the TiN layer 104 to O ₂ plasma treatment. Next, the TiN layer 104, the Ti layer 103, and the silicon substrate 101 are subjected to a heat treatment (sintering) at about 600 ° C. Thereby, Ti of the Ti layer 103 diffuses into the silicon substrate 101, Ti silicide 103a is formed between the silicon substrate 101 and the Ti layer 103, and an ohmic contact between the silicon substrate and the Ti layer is formed. .
[0005]
Next, an Al alloy layer 105 is deposited by sputtering in the contact hole 102a and on the TiN layer 104. Next, by patterning the Al alloy layer 105, an Al alloy wiring electrically connected to the silicon substrate 101 is formed on the insulating film 102. This Al alloy wiring has an Al alloy layer 105, a TiN layer 104, and a Ti layer 103.
[0006]
[Problems to be solved by the invention]
By the way, in the conventional method for manufacturing a semiconductor device, the TiN layer 104 is formed by reactive sputtering in which Ti and N ₂ are reacted while introducing nitrogen gas using a Ti target. For this reason, particles are likely to be generated in this step, and there is a problem that the yield is reduced due to the particles remaining on the Ti layer 103 or the TiN layer 104. Further, since the Al alloy wiring has the TiN layer 104, the TiN layer 104 causes an increase in contact resistance with the silicon substrate 101.
[0007]
The present invention has been made in view of the above circumstances, and an object of the present invention is to improve the yield by suppressing the generation of particles when forming a wiring, and to suppress the increase in contact resistance while suppressing the increase in contact resistance. An object of the present invention is to provide a manufacturing method, a semiconductor device, and a manufacturing method thereof.
[0008]
[Means for Solving the Problems]
In order to solve the above problems, a method for manufacturing a semiconductor device according to the present invention includes a step of forming an insulating film on a base made of silicon,
Forming a connection hole located on the base in the insulating film;
Forming a Ti layer in the connection hole and on the insulating film;
Introducing oxygen into the Ti layer;
Forming a TiN layer on the surface of the Ti layer;
Performing a heat treatment on the TiN layer and the Ti layer to form a TiO ₂ layer under the TiN layer;
Removing the TiN layer;
Forming a conductive layer on the TiO ₂ layer and in the connection hole;
It is characterized by having.
[0009]
According to the method of manufacturing a semiconductor device described above, there is no step of forming a TiN layer by reactive sputtering unlike the related art. For this reason, no particles are generated in this step, so that the generation of particles when forming the wiring can be suppressed and the yield can be improved. Further, since the method includes the step of removing the TiN layer, it does not include a high-resistance TiN layer unlike the related art. Therefore, an increase in contact resistance can be suppressed, and a good contact can be obtained.
[0010]
In the method for manufacturing a semiconductor device according to the present invention, it is preferable that the conductive layer is an Al alloy layer or an Al layer. The TiO ₂ layer is formed between the Al alloy layer or Al layer and the insulating film, the TiO ₂ layer has a high barrier property against outgassing such as H _{2 O} from the insulating film. Therefore, when forming the Al alloy layer or the Al layer, it is possible to suppress the outgas from entering the Al alloy layer or the Al layer. Thereby, good coverage of the Al alloy layer or the Al layer can be obtained without obstructing the fluidity of Al.
[0011]
In the method of manufacturing a semiconductor device according to the present invention, the step of introducing oxygen may include the step of introducing oxygen by supplying O ₂ plasma to the Ti layer, or the step of introducing oxygen by releasing the Ti layer to the atmosphere. Can be introduced.
[0012]
Further, in the method of manufacturing a semiconductor device according to the present invention, the step of forming the TiN layer includes the step of exposing the surface of the Ti layer to a nitriding atmosphere under reduced pressure to form a TiN layer on the surface of the Ti layer. It is preferable that
[0013]
In the method of manufacturing a semiconductor device according to the present invention, the step of forming the TiO ₂ layer is a step of forming the TiO ₂ layer and forming Ti silicide between the TiO ₂ layer and the base. Is preferred. An ohmic contact between the underlayer and the TiO ₂ layer is formed by this Ti silicide, and the contact resistance can be reduced.
[0014]
Further, in the method for manufacturing a semiconductor device according to the present invention, after the step of forming the conductive layer, the Al alloy layer or the Al layer and the TiO ₂ layer are patterned to form an Al alloy wiring on the insulating film. Alternatively, the method may further include a step of forming an Al wiring.
[0015]
A semiconductor device according to the present invention includes a base made of silicon,
An insulating film formed on the base,
A connection hole formed in the insulating film and located on the base;
A TiO ₂ layer formed in the connection hole and on the insulating film;
An Al alloy layer or an Al layer formed on the TiO ₂ layer and in the connection hole;
With
A wiring is constituted by the Al alloy layer or the Al layer and the TiO ₂ layer.
[0016]
Further, the semiconductor device according to the present invention preferably further comprises a Ti silicide formed between the TiO ₂ layer and the base.
[0017]
A method for manufacturing a wiring according to the present invention includes the steps of: forming a Ti layer on an insulating film;
Introducing oxygen into the Ti layer;
Forming a TiN layer on the surface of the Ti layer;
Performing a heat treatment on the TiN layer and the Ti layer to form a TiO ₂ layer under the TiN layer;
Removing the TiN layer;
Forming an Al alloy layer or an Al layer on the TiO ₂ layer;
It is characterized by having.
[0018]
The wiring according to the present invention includes: a TiO ₂ layer formed on an insulating film;
An Al alloy layer or an Al layer formed on the TiO ₂ layer,
It is characterized by having.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. This method of manufacturing a semiconductor device includes a step of manufacturing a wiring.
[0020]
First, as shown in FIG. 1A, an insulating film 2 such as a silicon oxide film or a boro-phosphosilicate glass (BPSG) film is formed on a silicon substrate 1 by a CVD (chemical vapor deposition) method. Next, a photoresist film (not shown) is applied on the insulating film 2, and the photoresist film is exposed and developed, whereby a resist pattern is formed on the insulating film 2.
[0021]
Next, by using the resist pattern as a mask, the insulating film 2 is etched to form a contact hole 2 a as a connection hole located on the silicon substrate 1 in the insulating film 2. The etching at this time may be wet etching or dry etching. Next, a Ti layer 3 is formed in the contact hole 2a and on the insulating film 2 by sputtering.
[0022]
Next, oxygen 6 is introduced into the Ti layer 3. As an introduction method at this time, for example, oxygen may be introduced by supplying O ₂ plasma to the surface of the Ti layer 3 or oxygen may be introduced by opening the Ti layer 3 to the atmosphere.
[0023]
Thereafter, as shown in FIG. 1B, the surface of the Ti layer is exposed to a nitriding atmosphere under reduced pressure, for example, a temperature of about 400 ° C. and an N ₂ atmosphere, so that a thin TiN layer 4 is formed on the surface of the Ti layer. It is formed. Then, Ti layer and the temperature of the TiN layer 700 to 800 ° C., heat treatment such as annealing in _{N 2} atmosphere (e.g. lamp annealing or furnace annealing) performed. As a result, the Ti of the Ti layer diffuses into the silicon substrate 1, Ti silicide 3a is formed between the silicon substrate and the Ti layer, an ohmic contact between the silicon substrate and the Ti layer is formed, and the contact resistance is reduced. Can be lowered. At the same time, a TiO ₂ layer 3b having a high barrier property is formed under the TiN layer 4, and the TiN layer 4 is stabilized. In this case, there is no introduction of extra oxygen to the TiO ₂ layer 3b by TiN layer 4 becomes a barrier, it is possible to form a favorable TiO ₂ layer 3b.
[0024]
Next, as shown in FIG. 1C, the TiN layer 4 is removed by dry etching. Since the TiN layer 4 is a high-resistance layer, the removal of the TiN layer 4 can suppress an increase in contact resistance with the wiring.
[0025]
Next, an Al alloy layer 5 as a conductive layer is deposited by sputtering in the contact hole 2a and on the TiO ₂ layer 3b. Next, by patterning the Al alloy layer 5 and the TiO ₂ layer 3b, an Al alloy wiring electrically connected to the silicon substrate 1 is formed on the insulating film 2. This Al alloy wiring has an Al alloy layer 5 and a TiO ₂ layer 3b.
[0026]
The method for manufacturing a semiconductor device according to the above-described embodiment does not include a step of forming a TiN layer by reactive sputtering in which Ti reacts with N ₂ while introducing nitrogen gas using a Ti target as in the related art. For this reason, no particles are generated in this step, so that the generation of particles when forming the wiring can be suppressed and the yield can be improved.
[0027]
Further, in the present embodiment, since a high-resistance TiN layer is not included in the Al alloy wiring unlike the related art, an increase in contact resistance can be suppressed, and a good contact can be obtained. The contact resistance is reduced because the Ti silicide 3a formed in the contact portion is a silicide having a low-resistance crystal structure (C54).
[0028]
Further, in the present embodiment, a TiO ₂ layer 3b is formed between the Al alloy layer 5 and the insulating film 2, and this TiO ₂ layer 3b has a high barrier against outgassing of H ₂ O or the like from the insulating film. Have the property. Therefore, when the Al alloy layer 5 is formed, it is possible to suppress the outgas from entering the Al alloy layer. Thereby, good coverage of the Al alloy layer can be obtained without hindering the fluidity of Al. Therefore, a highly reliable Al alloy wiring can be formed.
[0029]
It should be noted that the present invention is not limited to the above embodiment, and can be implemented with various modifications without departing from the spirit of the present invention. For example, in the present embodiment, the present invention is applied to the case where an Al alloy wiring is connected to a silicon substrate, but the case where the Al alloy wiring is connected to a silicon base (for example, a polysilicon film or an amorphous silicon film). It is also possible to apply the present invention.
[0030]
In this embodiment, the Al alloy layer 5 is used, but an Al layer can be used instead of the Al alloy layer.
[0031]
【Example】
2A to 2C, 3D, 3E, and 4 are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
First, as shown in FIG. 2A, a device isolation film (not shown) is formed on the surface of the silicon substrate 1, and a gate oxide film 7 serving as a gate insulating film is formed on the silicon substrate 1 between the device isolation films. Is formed by a thermal oxidation method. As the element isolation film, a structure such as LOCOS, semi-recess LOCOS, and shallow trench can be used.
[0032]
Thereafter, a polycrystalline silicon film is deposited on gate oxide film 7 by a CVD method. Next, a photoresist film (not shown) is applied on the polycrystalline silicon film, and the photoresist film is exposed and developed to form a resist pattern on the polycrystalline silicon film. Thereafter, the polysilicon film is etched using this resist pattern as a mask, thereby forming gate electrode 10 made of polysilicon on gate oxide film 7.
[0033]
Next, impurity ions are implanted into the silicon substrate 1 using the gate electrode 10 and the element isolation film as a mask, and the silicon substrate 1 is subjected to a heat treatment. Thereby, diffusion layers 8 and 9 of the source / drain regions are formed in the source / drain regions of the silicon substrate 1 in a self-aligned manner.
[0034]
Next, as shown in FIG. 2B, an interlayer insulating film 11 made of a silicon oxide film and a BPSG film is formed on the entire surface including the gate electrode 10, the diffusion layers 8 and 9 of the source / drain regions and the element isolation film by CVD. It is deposited by the method. Thereafter, a photoresist film is applied on the interlayer insulating film 11, and the photoresist film is exposed and developed, so that a resist pattern 12 is formed on the interlayer insulating film 11.
[0035]
Next, as shown in FIG. 2C, the interlayer insulating film 11 and the gate oxide film 7 are etched using the resist pattern 12 as a mask, so that the gate electrode 10 and the source / drain regions Contact holes 11a to 11c located on diffusion layers 8 and 9 are formed. As a specific etching method at this time, an RIE type magnetron plasma etching apparatus shown in FIG. 8 is used, and a mixed gas of C ₄ F ₈ , O ₂ , Ar, and CO is used as a process gas. Here, the flow rate of C ₄ F ₈ is preferably 5 to 30 sccm, the flow rate of O ₂ is preferably 2 to 15 sccm, the flow rate of Ar is preferably 100 to 500 sccm, and the flow rate of CO is preferably 10 to 100 sccm.
[0036]
Next, as shown in FIG. 2D, after removing the resist pattern 12, a Ti layer 13 is formed in the contact holes 11a to 11c and on the interlayer insulating film 11 by sputtering. Next, oxygen 16 is introduced into the Ti layer 13. As an introduction method at this time, for example, oxygen may be introduced by supplying O ₂ plasma to the surface of the Ti layer 13, or oxygen may be introduced by opening the Ti layer 13 to the atmosphere.
[0037]
Thereafter, as shown in FIG. 2E, the surface of the Ti layer is exposed to a nitriding atmosphere under reduced pressure, for example, a temperature of about 400 ° C. and an N ₂ atmosphere, so that a thin TiN layer 14 is formed on the surface of the Ti layer. It is formed. Then, Ti layer and the temperature of the TiN layer 700 to 800 ° C., heat treatment such as annealing in _{N 2} atmosphere (e.g. lamp annealing or furnace annealing) performed. Thereby, Ti in the Ti layer diffuses into the silicon substrate 1, Ti silicide 13a is formed between the silicon substrate and the Ti layer, an ohmic contact between the silicon substrate and the Ti layer is formed, and the contact resistance is reduced. Can be lowered. At the same time, a TiO ₂ layer 13b having a high barrier property is formed under the TiN layer 14, and the TiN layer 14 is stabilized. In this case, there is no introduction of extra oxygen to the TiO ₂ layer 13b by TiN layer 14 serves as a barrier, it is possible to form a favorable TiO ₂ layer 13b.
[0038]
Next, as shown in FIG. 4, the TiN layer 14 is removed by dry etching. Since the TiN layer 14 is a high-resistance layer, the removal of the TiN layer 14 can suppress an increase in contact resistance with the wiring.
[0039]
Next, an Al alloy layer 15 is deposited by sputtering in the contact hole and on the TiO ₂ layer 13b. Next, by patterning the Al alloy layer 15 and the TiO ₂ layer 13b, an Al alloy wiring (not shown) electrically connected to the silicon substrate 1 is formed on the interlayer insulating film 11. This Al alloy wiring has an Al alloy layer and a TiO ₂ layer.
[0040]
The method of manufacturing a semiconductor device according to the above embodiment does not include a step of forming a TiN layer by reactive sputtering in which Ti reacts with N ₂ while introducing nitrogen gas using a Ti target as in the related art. For this reason, no particles are generated in this step, so that generation of particles when forming a wiring can be suppressed.
[0041]
Further, in this embodiment, since the Al alloy wiring does not include the high-resistance TiN layer as in the related art, it is possible to suppress an increase in the contact resistance and obtain a good contact. The contact resistance is reduced because the Ti silicide 13a formed in the contact portion is a silicide having a low-resistance crystal structure (C54).
[0042]
In this embodiment, a TiO ₂ layer 13 b is formed between the Al alloy layer 15 and the interlayer insulating film 11, and this TiO ₂ layer 13 b is resistant to outgassing of H ₂ O or the like from the interlayer insulating film 11. Has high barrier properties. Therefore, when the Al alloy layer 15 is formed, it is possible to suppress the outgas from entering the Al alloy layer. Thereby, good coverage of the Al alloy layer can be obtained without hindering the fluidity of Al. Therefore, a highly reliable Al alloy wiring can be formed.
[0043]
It should be noted that the present invention is not limited to the above embodiment, and can be implemented with various modifications without departing from the gist of the present invention.
[Brief description of the drawings]
FIG. 1 is a sectional view showing a method of manufacturing a semiconductor device according to an embodiment.
FIGS. 2A to 2C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment.
FIGS. 3D and 3E are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment.
FIG. 4 is a sectional view showing the method of manufacturing the semiconductor device according to the embodiment.
FIG. 5 is a cross-sectional view for explaining a conventional method for manufacturing a semiconductor device.
[Explanation of symbols]
1, 101: silicon substrate, 2, 102: insulating film, 2a, 102a: contact hole, 3, 13, 103: Ti layer, 3a, 13a, 103a: Ti silicide, 3b, 13b: TiO ₂ layer, 4, 14 , 104 ... TiN layer,
5, 15, 105: Al alloy layer, 6, 16: oxygen, 7: gate oxide film,
8, 9: diffusion layer of source / drain region, 10: gate electrode, 11: interlayer insulating film, 11a to 11c: contact hole, 12: resist pattern

Claims (10)

Forming an insulating film on a base made of silicon;
Forming a connection hole located on the base in the insulating film;
Forming a Ti layer in the connection hole and on the insulating film;
Introducing oxygen into the Ti layer;
Forming a TiN layer on the surface of the Ti layer;
Performing a heat treatment on the TiN layer and the Ti layer to form a TiO ₂ layer under the TiN layer;
Removing the TiN layer;
Forming a conductive layer on the TiO ₂ layer and in the connection hole;
A method for manufacturing a semiconductor device, comprising: 2. The method according to claim 1, wherein the conductive layer is an Al alloy layer or an Al layer. Introducing said oxygen claims, characterized in that the Ti layer step introducing oxygen by supplying O ₂ plasma or a step of introducing oxygen by opening the Ti layer to the air 3. The method for manufacturing a semiconductor device according to 1 or 2. 4. The method according to claim 1, wherein the step of forming the TiN layer is a step of forming a TiN layer on the surface of the Ti layer by exposing the surface of the Ti layer to a nitriding atmosphere under reduced pressure. 13. The method for manufacturing a semiconductor device according to claim 1. The step of forming the TiO ₂ layer are both of the preceding claims, characterized in that a step of forming a Ti silicide between said underlayer and said TiO ₂ layer so as to form the TiO ₂ layer 9. The method for manufacturing a semiconductor device according to claim 1. After the step of forming the conductive layer, the method further includes a step of forming an Al alloy wiring or an Al wiring on the insulating film by patterning the Al alloy layer or the Al layer and the TiO ₂ layer. The method for manufacturing a semiconductor device according to claim 2, wherein A base made of silicon,
An insulating film formed on the base,
A connection hole formed in the insulating film and located on the base;
A TiO ₂ layer formed in the connection hole and on the insulating film;
An Al alloy layer or an Al layer formed on the TiO ₂ layer and in the connection hole;
With
A semiconductor device, wherein a wiring is constituted by the Al alloy layer or the Al layer and the TiO ₂ layer. The semiconductor device according to claim 7, characterized in that it comprises further a Ti silicide formed between the base and the TiO ₂ layer. Forming a Ti layer on the insulating film;
Introducing oxygen into the Ti layer;
Forming a TiN layer on the surface of the Ti layer;
Performing a heat treatment on the TiN layer and the Ti layer to form a TiO ₂ layer under the TiN layer;
Removing the TiN layer;
Forming an Al alloy layer or an Al layer on the TiO ₂ layer;
A method for manufacturing a wiring, comprising: A TiO ₂ layer formed on the insulating film,
An Al alloy layer or an Al layer formed on the TiO ₂ layer,
A wiring comprising:

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