JP2006024653A - Through substrate and manufacturing method thereof - Google Patents
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- JP2006024653A JP2006024653A JP2004199871A JP2004199871A JP2006024653A JP 2006024653 A JP2006024653 A JP 2006024653A JP 2004199871 A JP2004199871 A JP 2004199871A JP 2004199871 A JP2004199871 A JP 2004199871A JP 2006024653 A JP2006024653 A JP 2006024653A
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Abstract
Description
この発明は、貫通基板およびその製造方法に関し、特に、信号伝達経路としても利用可能な、貫通基板およびその製造方法に関する。 The present invention relates to a through-hole substrate and a manufacturing method thereof, and more particularly, to a through-hole substrate that can be used as a signal transmission path and a manufacturing method thereof.
従来の、多層配線回路基板は、配線層が高密度化されることにより、信号線が近接することでお互いの信号配線間にクロストークノイズが生じ、回路の駆動素子に動作不良を発生させるという問題があった。このような問題を解決する一つの方法が、たとえば、特開2004−63725号公報(特許文献1)に記載されている。 In the conventional multilayer wiring circuit board, when the wiring layer is densified, the signal lines are close to each other, so that crosstalk noise is generated between the signal wirings, and the circuit drive element is caused to malfunction. There was a problem. One method for solving such a problem is described in, for example, Japanese Patent Application Laid-Open No. 2004-63725 (Patent Document 1).
同公報によれば、基板の内部に同軸構造の同軸線を形成して、信号配線層として利用している。
従来のクロストークノイズを排除する方法は上記のように行なわれていた。特許文献1においては、同軸構造を基板に平行に配置して、それを接地電位や電源電位の層の近傍に配置することによって、ノイズの排除を行なっているため、基板内の構成が複雑になるという問題があった。
Conventional methods for eliminating crosstalk noise have been performed as described above. In
この発明は、上記のような課題に鑑みてなされたもので、クロストークによるノイズを排除できる貫通基板およびその製造方法を提供することを目的とする。 The present invention has been made in view of the above-described problems, and an object thereof is to provide a through-hole substrate that can eliminate noise due to crosstalk and a method for manufacturing the same.
この発明にかかる貫通基板は、表裏面とを貫通する貫通孔を有する基板と、貫通孔の内壁面に沿って設けられ、内部に内壁面を有する第1導電層と、第1導電層の内壁面に沿って、間に絶縁層を介して設けられた第2導電層とを有する。 A through substrate according to the present invention includes a substrate having a through hole penetrating the front and back surfaces, a first conductive layer provided along an inner wall surface of the through hole, and having an inner wall surface therein, and an inner portion of the first conductive layer. A second conductive layer is provided along the wall surface with an insulating layer interposed therebetween.
好ましくは、第1導電層はシールド線として作動し、第2導電層は、信号線として作動する。 Preferably, the first conductive layer operates as a shield line, and the second conductive layer operates as a signal line.
基板は絶縁物基板であってもよいし、半導体基板であってもよい。 The substrate may be an insulator substrate or a semiconductor substrate.
基板が半導体基板の場合は、貫通孔の内壁面と第1導電層との間に絶縁層をさらに含む。 When the substrate is a semiconductor substrate, an insulating layer is further included between the inner wall surface of the through hole and the first conductive layer.
貫通孔はインターポーザの貫通孔であってもよい。 The through hole may be a through hole of an interposer.
この発明の他の局面においては、貫通基板の製造方法は、表裏面とを有する基板を準備するステップと、基板に貫通孔を形成するステップと、貫通孔の内壁面に沿って、内部に内壁面を有する第1導電層を形成するステップと、第1導電層の内壁面に沿って、間に絶縁層を介して第2導電層を形成するステップとを含む。 In another aspect of the present invention, a method for manufacturing a through-hole substrate includes a step of preparing a substrate having front and back surfaces, a step of forming a through-hole in the substrate, and an inner wall along the inner wall surface of the through-hole. Forming a first conductive layer having a wall surface, and forming a second conductive layer along an inner wall surface of the first conductive layer with an insulating layer therebetween.
好ましくは、表裏面とを有する基板を準備するステップは、半導体基板を準備するステップ含み、貫通孔の内壁面に沿って、内部に内壁面を有する第1導電層を形成する前に、貫通孔の内壁面に沿って、内部に内壁面を有する絶縁層を形成するステップをさらに含み、その後、絶縁層の内壁面に沿って第2導電層を形成するステップを含む。 Preferably, the step of preparing the substrate having the front and back surfaces includes the step of preparing a semiconductor substrate, and before forming the first conductive layer having the inner wall surface along the inner wall surface of the through hole. The method further includes forming an insulating layer having an inner wall surface along the inner wall surface, and then forming a second conductive layer along the inner wall surface of the insulating layer.
この発明に係る貫通基板は、表裏面とを貫通する貫通孔の内壁面に沿って設けられた第1導電層と、第1導電層の内壁面に沿って、間に絶縁層を介して設けられた第2導電層とを有する。貫通孔の内部に第2導電層が絶縁層を介して第1導電層で囲われ構成が形成されるため、遮蔽性の向上した同軸ケーブルの構成が得られる。その結果、クロストークによるノイズを排除できる貫通基板を提供できる。 The through substrate according to the present invention is provided with a first conductive layer provided along the inner wall surface of the through hole penetrating the front and back surfaces, and an insulating layer interposed along the inner wall surface of the first conductive layer. A second conductive layer. Since the second conductive layer is surrounded by the first conductive layer through the insulating layer inside the through hole, a configuration of a coaxial cable with improved shielding is obtained. As a result, it is possible to provide a through substrate that can eliminate noise due to crosstalk.
以下、図面を参照して、この発明の一実施形態を図面を参照して説明する。図1は、この発明の一実施の形態に係る貫通基板の製造工程をステップごとに示す図である。ここで貫通基板とは、基板の表面から裏面に渡って貫通孔を有している基板のことをいい、プリント基板(フレキシブルを含む)およびインターポーザ(シリコンインターポーザを含む)を含む。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a step of manufacturing a through-hole substrate according to an embodiment of the present invention. Here, the through substrate refers to a substrate having a through hole from the front surface to the back surface of the substrate, and includes a printed circuit board (including flexible) and an interposer (including a silicon interposer).
図1を参照して、まず、表面11および裏面12を有し両面間を貫通する複数の貫通孔19が設けられたシリコンの基板(貫通基板)10を準備する。なお、基板10全体はシリコン酸化膜13で覆われているものとする。次いで、たとえば、無電解メッキで貫通孔19の内部および表面および裏面の周囲にZnの層14を形成する(図1(A))。次いで、Znの層14の上にCuの層15を同じく無電解メッキで形成する(図1(B)、これらの層が第1導電層となる)。次に、Cuの層15の上に、たとえば、スパッタリングで絶縁層16を形成する。この絶縁層16は、スパッタリングに限らず、CVDによりシリコン酸化膜やシリコン窒化膜を形成してもよいし、電着樹脂形成してもよい。ここで電着樹脂としては、PTFEや、レジストや、ポリイミドや、ポリアミド等がある。
Referring to FIG. 1, first, a silicon substrate (penetrating substrate) 10 having a
なお、スパッタリングやCVDは、真空装置を準備する必要があるが、電着樹脂はそのような必要が無いため、好ましい。 In addition, although sputtering and CVD need to prepare a vacuum apparatus, since electrodeposition resin does not need such, it is preferable.
次に、貫通孔19の裏面12側において、たとえばCuのシード層17を設け、これを電界または無電解メッキの電極として形成し、この電極から、表面11側に向けて絶縁層16で構成された貫通孔の内部にメッキの層を成長させて貫通した導電層(第2導電層)18を形成する(図1(D))。
Next, on the
これによって、基板10の貫通孔19は、その中心から導電層18、絶縁層16、導電層15および14で充填され、遮蔽性の向上した、同軸ケーブルの形状が得られる。この形状は、ノイズが低減できるとともに、寄生容量を減らすとともに、信号の高速伝送が可能な、同軸ケーブルの形状を有したビアホールであるので、以下、この形状を同軸ビアという。
As a result, the
次にこの発明の他の実施の形態について説明する。上記実施の形態においては、シリコンの基板を用いた例について説明したが、この実施の形態においては、貫通基板として、ガラス基板やサファイヤ基板のような、絶縁基板を用いる。 Next, another embodiment of the present invention will be described. In the above embodiment, an example in which a silicon substrate is used has been described. However, in this embodiment, an insulating substrate such as a glass substrate or a sapphire substrate is used as the through substrate.
図2は、そのような、絶縁基板を用いた場合の図1に対応する図である。図2を参照して、この実施の形態においては、貫通基板が絶縁基板であるため、先の実施の形態のように、貫通孔の内壁に沿って酸化膜のような絶縁層13を設ける必要がない。
FIG. 2 is a diagram corresponding to FIG. 1 when such an insulating substrate is used. Referring to FIG. 2, in this embodiment, since the through substrate is an insulating substrate, it is necessary to provide an
それ以外の部分については、先の実施の形態と同様であるので、その説明は省略する。 The other parts are the same as those in the previous embodiment, and the description thereof is omitted.
なお、この貫通基板は、複数の貫通孔を有する、インターポーザに適用されてもよい。 In addition, this through substrate may be applied to an interposer having a plurality of through holes.
以上、図面を参照してこの発明の実施形態を説明したが、この発明は、図示した実施形態のものに限定されない。図示された実施形態に対して、この発明と同一の範囲内において、あるいは均等の範囲内において、種々の修正や変形を加えることが可能である。 As mentioned above, although embodiment of this invention was described with reference to drawings, this invention is not limited to the thing of embodiment shown in figure. Various modifications and variations can be made to the illustrated embodiment within the same range or equivalent range as the present invention.
この発明に係る貫通基板は、同軸ケーブルと同様の機能を有する基板として、有利に利用されうる。 The through substrate according to the present invention can be advantageously used as a substrate having a function similar to that of a coaxial cable.
10 基板、11 表面、12 裏面、13 酸化膜、14 Znメッキ層、15 Cuメッキ層、16 絶縁層、17 シード層、18 導電層、19 貫通孔。
10 substrate, 11 surface, 12 back surface, 13 oxide film, 14 Zn plating layer, 15 Cu plating layer, 16 insulating layer, 17 seed layer, 18 conductive layer, 19 through-hole.
Claims (7)
前記貫通孔の内壁面に沿って設けられ、内部に内壁面を有する第1導電層と、
前記第1導電層の内壁面に沿って、間に絶縁層を介して設けられた第2導電層とを有する、貫通基板。 A substrate having a through hole penetrating the front and back surfaces;
A first conductive layer provided along an inner wall surface of the through-hole and having an inner wall surface inside;
A through substrate having a second conductive layer provided along an inner wall surface of the first conductive layer with an insulating layer interposed therebetween.
前記貫通孔の内壁面と前記第1導電層との間に絶縁層をさらに含む、前記請求項1または2に記載の貫通基板。 The substrate includes a semiconductor substrate;
The through substrate according to claim 1, further comprising an insulating layer between an inner wall surface of the through hole and the first conductive layer.
前記基板に貫通孔を形成するステップと、
前記貫通孔の内壁面に沿って、内部に内壁面を有する第1導電層を形成するステップと、
前記第1導電層の内壁面に沿って、間に絶縁層を介して第2導電層を形成するステップとを含む、貫通基板の製造方法。 Preparing a substrate having front and back surfaces;
Forming a through hole in the substrate;
Forming a first conductive layer having an inner wall surface along the inner wall surface of the through hole;
Forming a second conductive layer along an inner wall surface of the first conductive layer via an insulating layer therebetween.
前記貫通孔の内壁面に沿って、内部に内壁面を有する第1導電層を形成する前に、前記貫通孔の内壁面に沿って、内部に内壁面を有する絶縁層を形成するステップをさらに含み、その後、絶縁層の内壁面に沿って前記第2導電層を形成するステップを含む、請求項6に記載の貫通基板の製造方法。
Preparing the substrate having the front and back surfaces comprises preparing a semiconductor substrate;
Forming an insulating layer having an inner wall surface along the inner wall surface of the through hole before forming the first conductive layer having the inner wall surface along the inner wall surface of the through hole; The manufacturing method of the penetration substrate of Claim 6 including the step of forming the said 2nd conductive layer along the inner wall face of an insulating layer including after that.
Priority Applications (7)
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JP2004199871A JP2006024653A (en) | 2004-07-06 | 2004-07-06 | Through substrate and manufacturing method thereof |
PCT/JP2005/012425 WO2006004128A1 (en) | 2004-07-06 | 2005-07-05 | Through substrate and interposer, and method for manufacturing through substrate |
KR1020087003018A KR100858075B1 (en) | 2004-07-06 | 2005-07-05 | Interposer |
US11/631,638 US7866038B2 (en) | 2004-07-06 | 2005-07-05 | Through substrate, interposer and manufacturing method of through substrate |
CNB2005800221520A CN100505178C (en) | 2004-07-06 | 2005-07-05 | Through substrate and interposer, and method for manufacturing through substrate |
EP05765497A EP1775761A4 (en) | 2004-07-06 | 2005-07-05 | Through substrate and interposer, and method for manufacturing through substrate |
TW094122866A TW200616503A (en) | 2004-07-06 | 2005-07-06 | Through substrate and interposer, and method for manufacturing through substrate |
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JP2004199871A JP2006024653A (en) | 2004-07-06 | 2004-07-06 | Through substrate and manufacturing method thereof |
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JP2006024653A5 JP2006024653A5 (en) | 2007-04-05 |
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Cited By (10)
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JP2007173856A (en) * | 2007-02-05 | 2007-07-05 | Matsushita Electric Works Ltd | Forming method of through-hole wiring to semiconductor wafer |
KR100916771B1 (en) * | 2007-10-08 | 2009-09-14 | 성균관대학교산학협력단 | Method for forming a through hole electrode |
KR101031134B1 (en) | 2008-09-11 | 2011-04-27 | 주식회사 동부하이텍 | Contact of semiconductor device and manufacturing method thereof |
EP2388814A2 (en) | 2010-05-21 | 2011-11-23 | Napra co.,Ltd | Electronic device and manufacturing method therefor |
US8288772B2 (en) | 2008-10-16 | 2012-10-16 | Dai Nippon Printing Co., Ltd. | Through hole electrode substrate with different area weighted average crystal grain diameter of metal in the conductive part and semiconductor device using the through hole electrode substrate |
JP2013161910A (en) * | 2012-02-03 | 2013-08-19 | Osaka Prefecture Univ | Semiconductor device manufacturing method, semiconductor device, infrared sensor manufacturing method and infrared sensor |
JP2014093406A (en) * | 2012-11-02 | 2014-05-19 | Toppan Printing Co Ltd | Wiring board with through electrode and manufacturing method of the same |
JP2017509154A (en) * | 2014-03-04 | 2017-03-30 | クアルコム,インコーポレイテッド | Substrate with conductive vias |
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CN105390475A (en) * | 2015-10-20 | 2016-03-09 | 北京大学 | Capacitor integration structure inside substrate, and manufacturing method thereof |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2007173856A (en) * | 2007-02-05 | 2007-07-05 | Matsushita Electric Works Ltd | Forming method of through-hole wiring to semiconductor wafer |
KR100916771B1 (en) * | 2007-10-08 | 2009-09-14 | 성균관대학교산학협력단 | Method for forming a through hole electrode |
KR101031134B1 (en) | 2008-09-11 | 2011-04-27 | 주식회사 동부하이텍 | Contact of semiconductor device and manufacturing method thereof |
US8288772B2 (en) | 2008-10-16 | 2012-10-16 | Dai Nippon Printing Co., Ltd. | Through hole electrode substrate with different area weighted average crystal grain diameter of metal in the conductive part and semiconductor device using the through hole electrode substrate |
US8637397B2 (en) | 2008-10-16 | 2014-01-28 | Dai Nippon Printing Co., Ltd | Method for manufacturing a through hole electrode substrate |
EP2388814A2 (en) | 2010-05-21 | 2011-11-23 | Napra co.,Ltd | Electronic device and manufacturing method therefor |
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JP2013161910A (en) * | 2012-02-03 | 2013-08-19 | Osaka Prefecture Univ | Semiconductor device manufacturing method, semiconductor device, infrared sensor manufacturing method and infrared sensor |
JP2014093406A (en) * | 2012-11-02 | 2014-05-19 | Toppan Printing Co Ltd | Wiring board with through electrode and manufacturing method of the same |
JP2017509154A (en) * | 2014-03-04 | 2017-03-30 | クアルコム,インコーポレイテッド | Substrate with conductive vias |
JP2019507960A (en) * | 2016-03-07 | 2019-03-22 | マイクロン テクノロジー,インク. | Low capacitance through substrate via structure |
US9930779B2 (en) | 2016-04-28 | 2018-03-27 | Tdk Corporation | Through wiring substrate |
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CN100505178C (en) | 2009-06-24 |
CN1977365A (en) | 2007-06-06 |
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