JP2005539404A - サブパターン転写ナノスケールメモリ構造 - Google Patents

サブパターン転写ナノスケールメモリ構造 Download PDF

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Publication number
JP2005539404A
JP2005539404A JP2005501049A JP2005501049A JP2005539404A JP 2005539404 A JP2005539404 A JP 2005539404A JP 2005501049 A JP2005501049 A JP 2005501049A JP 2005501049 A JP2005501049 A JP 2005501049A JP 2005539404 A JP2005539404 A JP 2005539404A
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JP
Japan
Prior art keywords
wiring
nanoscale
microscale
memory array
memory
Prior art date
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Pending
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JP2005501049A
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English (en)
Japanese (ja)
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JP2005539404A5 (enExample
Inventor
デオン，アンドレ
エム リーバー，チャールズ
ディー リンカーン，パトリック
サヴェージ，ジョン
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SRI International Inc
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SRI International Inc
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Publication date
Application filed by SRI International Inc filed Critical SRI International Inc
Publication of JP2005539404A publication Critical patent/JP2005539404A/ja
Publication of JP2005539404A5 publication Critical patent/JP2005539404A5/ja
Pending legal-status Critical Current

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G11C13/025—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N99/00—Subject matter not provided for in other groups of this subclass
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/81—Array wherein the array conductors, e.g. word lines, bit lines, are made of nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/762—Nanowire or quantum wire, i.e. axially elongated structure having two dimensions of 100 nm or less
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/943—Information storage or retrieval using nanostructure

Landscapes

  • Engineering & Computer Science (AREA)
  • Nanotechnology (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Micro-Organisms Or Cultivation Processes Thereof (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Silicon Compounds (AREA)
  • Prostheses (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Ropes Or Cables (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Read Only Memory (AREA)
JP2005501049A 2002-07-25 2003-07-24 サブパターン転写ナノスケールメモリ構造 Pending JP2005539404A (ja)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US39894302P 2002-07-25 2002-07-25
US40039402P 2002-08-01 2002-08-01
US41517602P 2002-09-30 2002-09-30
US42901002P 2002-11-25 2002-11-25
US44199503P 2003-01-23 2003-01-23
US46535703P 2003-04-25 2003-04-25
US46738803P 2003-05-02 2003-05-02
PCT/US2003/023199 WO2004034467A2 (en) 2002-07-25 2003-07-24 Sublithographic nanoscale memory architecture

Publications (2)

Publication Number Publication Date
JP2005539404A true JP2005539404A (ja) 2005-12-22
JP2005539404A5 JP2005539404A5 (enExample) 2006-09-07

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
JP2005501049A Pending JP2005539404A (ja) 2002-07-25 2003-07-24 サブパターン転写ナノスケールメモリ構造
JP2005508519A Pending JP2006512782A (ja) 2002-07-25 2003-07-24 サブパターン転写ナノスケールインターフェースの確率的組立体

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2005508519A Pending JP2006512782A (ja) 2002-07-25 2003-07-24 サブパターン転写ナノスケールインターフェースの確率的組立体

Country Status (7)

Country Link
US (2) US6900479B2 (enExample)
EP (3) EP1525585A2 (enExample)
JP (2) JP2005539404A (enExample)
AT (2) ATE421147T1 (enExample)
AU (2) AU2003298529A1 (enExample)
DE (2) DE60325903D1 (enExample)
WO (2) WO2004034467A2 (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009525193A (ja) * 2006-01-27 2009-07-09 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． ミックススケール電子界面
KR101409310B1 (ko) * 2007-03-28 2014-06-18 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 3차원 크로스바 어레이 접합에 저장된 정보를 판독 및 기록하기 위한 3차원 크로스바 어레이 시스템 및 방법
JP2018006757A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ 半導体素子
JP2018006755A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ ナノトランジスタ
JP2018006756A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ ナノヘテロ接合構造
JP2018006754A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ ナノヘテロ接合構造

Families Citing this family (69)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060175601A1 (en) * 2000-08-22 2006-08-10 President And Fellows Of Harvard College Nanoscale wires and related devices
US7301199B2 (en) * 2000-08-22 2007-11-27 President And Fellows Of Harvard College Nanoscale wires and related devices
WO2002017362A2 (en) * 2000-08-22 2002-02-28 President And Fellows Of Harvard College Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors and fabricating such devices
EP1342075B1 (en) * 2000-12-11 2008-09-10 President And Fellows Of Harvard College Device contaning nanosensors for detecting an analyte and its method of manufacture
EP1468423A2 (en) * 2002-01-18 2004-10-20 California Institute Of Technology Array-based architecture for molecular electronics
WO2004010552A1 (en) 2002-07-19 2004-01-29 President And Fellows Of Harvard College Nanoscale coherent optical components
WO2004034467A2 (en) 2002-07-25 2004-04-22 California Institute Of Technology Sublithographic nanoscale memory architecture
DE60212118T2 (de) * 2002-08-08 2007-01-04 Sony Deutschland Gmbh Verfahren zur Herstellung einer Kreuzschienenstruktur von Nanodrähten
KR101191632B1 (ko) 2002-09-30 2012-10-17 나노시스, 인크. 대형 나노 인에이블 매크로전자 기판 및 그 사용
US7135728B2 (en) * 2002-09-30 2006-11-14 Nanosys, Inc. Large-area nanoenabled macroelectronic substrates and uses therefor
US7242601B2 (en) 2003-06-02 2007-07-10 California Institute Of Technology Deterministic addressing of nanoscale devices assembled at sublithographic pitches
WO2004109706A2 (en) 2003-06-02 2004-12-16 California Institute Of Technology Nanoscale wire-based sublithographic programmable logic arrays
US7692952B2 (en) * 2003-07-24 2010-04-06 California Institute Of Technology Nanoscale wire coding for stochastic assembly
WO2005084164A2 (en) * 2003-08-13 2005-09-15 Nantero, Inc. Nanotube-based switching elements and logic circuits
US7018549B2 (en) * 2003-12-29 2006-03-28 Intel Corporation Method of fabricating multiple nanowires of uniform length from a single catalytic nanoparticle
US20090227107A9 (en) * 2004-02-13 2009-09-10 President And Fellows Of Havard College Nanostructures Containing Metal Semiconductor Compounds
US7049626B1 (en) * 2004-04-02 2006-05-23 Hewlett-Packard Development Company, L.P. Misalignment-tolerant electronic interfaces and methods for producing misalignment-tolerant electronic interfaces
US7310004B2 (en) * 2004-05-28 2007-12-18 California Institute Of Technology Apparatus and method of interconnecting nanoscale programmable logic array clusters
US20070264623A1 (en) * 2004-06-15 2007-11-15 President And Fellows Of Harvard College Nanosensors
CN101010793B (zh) * 2004-06-30 2011-09-28 Nxp股份有限公司 制造具有通过纳米线接触的导电材料层的电子器件的方法
US7495942B2 (en) 2004-08-13 2009-02-24 University Of Florida Research Foundation, Inc. Nanoscale content-addressable memory
US7365632B2 (en) * 2004-09-21 2008-04-29 Nantero, Inc. Resistive elements using carbon nanotubes
JP2008523590A (ja) * 2004-12-06 2008-07-03 プレジデント・アンド・フェロウズ・オブ・ハーバード・カレッジ ナノスケールワイヤベースのデータ格納装置
US8883568B2 (en) * 2008-06-10 2014-11-11 Brown University Research Foundation Method providing radial addressing of nanowires
US8072005B2 (en) * 2005-02-04 2011-12-06 Brown University Research Foundation Apparatus, method and computer program product providing radial addressing of nanowires
US7211503B2 (en) * 2005-02-24 2007-05-01 Hewlett-Packard Development Company, L.P. Electronic devices fabricated by use of random connections
DE102005016244A1 (de) * 2005-04-08 2006-10-19 Infineon Technologies Ag Speicherzelle, Speichereinrichtung und Verfahren zu deren Herstellung
US7786467B2 (en) * 2005-04-25 2010-08-31 Hewlett-Packard Development Company, L.P. Three-dimensional nanoscale crossbars
US20100227382A1 (en) 2005-05-25 2010-09-09 President And Fellows Of Harvard College Nanoscale sensors
WO2006132659A2 (en) 2005-06-06 2006-12-14 President And Fellows Of Harvard College Nanowire heterostructures
US7439731B2 (en) * 2005-06-24 2008-10-21 Crafts Douglas E Temporary planar electrical contact device and method using vertically-compressible nanotube contact structures
US7786465B2 (en) * 2005-12-20 2010-08-31 Invention Science Fund 1, Llc Deletable nanotube circuit
US9159417B2 (en) * 2005-12-20 2015-10-13 The Invention Science Fund I, Llc Deletable nanotube circuit
US7721242B2 (en) * 2005-12-20 2010-05-18 The Invention Science Fund 1, Llc Nanotube circuit analysis system and method
US7989797B2 (en) * 2005-12-20 2011-08-02 The Invention Science Fund I, Llc Connectible nanotube circuit
US7576565B2 (en) * 2006-04-03 2009-08-18 Blaise Laurent Mouttet Crossbar waveform driver circuit
US8183554B2 (en) * 2006-04-03 2012-05-22 Blaise Laurent Mouttet Symmetrical programmable memresistor crossbar structure
US7302513B2 (en) * 2006-04-03 2007-11-27 Blaise Laurent Mouttet Programmable crossbar signal processor
US9965251B2 (en) * 2006-04-03 2018-05-08 Blaise Laurent Mouttet Crossbar arithmetic and summation processor
US20070233761A1 (en) * 2006-04-03 2007-10-04 Mouttet Blaise L Crossbar arithmetic processor
AU2007309660A1 (en) 2006-06-12 2008-05-02 President And Fellows Of Harvard College Nanosensors and related technologies
US7763932B2 (en) * 2006-06-29 2010-07-27 International Business Machines Corporation Multi-bit high-density memory device and architecture and method of fabricating multi-bit high-density memory devices
TWI307677B (en) * 2006-07-18 2009-03-21 Applied Res Lab Method and device for fabricating nano-structure with patterned particle beam
US7393739B2 (en) * 2006-08-30 2008-07-01 International Business Machines Corporation Demultiplexers using transistors for accessing memory cell arrays
WO2008033303A2 (en) 2006-09-11 2008-03-20 President And Fellows Of Harvard College Branched nanoscale wires
EP2064744A2 (en) * 2006-09-19 2009-06-03 QuNano AB Assembly of nanoscaled field effect transistors
US8130007B2 (en) * 2006-10-16 2012-03-06 Formfactor, Inc. Probe card assembly with carbon nanotube probes having a spring mechanism therein
US7778061B2 (en) * 2006-10-16 2010-08-17 Hewlett-Packard Development Company, L.P. Crossbar-memory systems and methods for writing to and reading from crossbar memory junctions of crossbar-memory systems
JP5009993B2 (ja) 2006-11-09 2012-08-29 ナノシス・インク． ナノワイヤの配列方法および堆積方法
EP2095100B1 (en) 2006-11-22 2016-09-21 President and Fellows of Harvard College Method of operating a nanowire field effect transistor sensor
US9806273B2 (en) * 2007-01-03 2017-10-31 The United States Of America As Represented By The Secretary Of The Army Field effect transistor array using single wall carbon nano-tubes
US7608854B2 (en) * 2007-01-29 2009-10-27 Hewlett-Packard Development Company, L.P. Electronic device and method of making the same
US7872334B2 (en) * 2007-05-04 2011-01-18 International Business Machines Corporation Carbon nanotube diodes and electrostatic discharge circuits and methods
US7492624B2 (en) * 2007-06-29 2009-02-17 Stmicroelectronics S.R.L. Method and device for demultiplexing a crossbar non-volatile memory
JP2011523200A (ja) * 2008-04-15 2011-08-04 クナノ アーベー ナノワイヤラップゲートデバイス
WO2010048127A2 (en) * 2008-10-20 2010-04-29 The Regents Of The University Of Michigan A silicon based nanoscale crossbar memory
US8390323B2 (en) 2009-04-30 2013-03-05 Hewlett-Packard Development Company, L.P. Dense nanoscale logic circuitry
WO2010138506A1 (en) 2009-05-26 2010-12-02 Nanosys, Inc. Methods and systems for electric field deposition of nanowires and other devices
WO2011038228A1 (en) 2009-09-24 2011-03-31 President And Fellows Of Harvard College Bent nanowires and related probing of species
KR101161060B1 (ko) * 2009-11-30 2012-06-29 서강대학교산학협력단 나노입자를 기둥형태로 조직화시키기 위한 배열장치 및 그 배열방법
WO2011088340A2 (en) 2010-01-15 2011-07-21 Board Of Regents, The University Of Texas System A carbon nanotube crossbar based nano-architecture
US7982504B1 (en) 2010-01-29 2011-07-19 Hewlett Packard Development Company, L.P. Interconnection architecture for multilayer circuits
WO2011093863A1 (en) 2010-01-29 2011-08-04 Hewlett-Packard Development Company, L.P. Three dimensional multilayer circuit
US9368599B2 (en) 2010-06-22 2016-06-14 International Business Machines Corporation Graphene/nanostructure FET with self-aligned contact and gate
US8872176B2 (en) 2010-10-06 2014-10-28 Formfactor, Inc. Elastic encapsulated carbon nanotube based electrical contacts
US9273004B2 (en) 2011-09-29 2016-03-01 International Business Machines Corporation Selective placement of carbon nanotubes via coulombic attraction of oppositely charged carbon nanotubes and self-assembled monolayers
US9442695B2 (en) 2014-05-02 2016-09-13 International Business Machines Corporation Random bit generator based on nanomaterials
US9720772B2 (en) * 2015-03-04 2017-08-01 Kabushiki Kaisha Toshiba Memory system, method for controlling magnetic memory, and device for controlling magnetic memory
WO2020014478A1 (en) * 2018-07-11 2020-01-16 The Regents Of The University Of California Nucleic acid-based electrically readable, read-only memory

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6256767B1 (en) * 1999-03-29 2001-07-03 Hewlett-Packard Company Demultiplexer for a molecular wire crossbar network (MWCN DEMUX)
WO2002003482A1 (de) * 2000-07-04 2002-01-10 Infineon Technologies Ag Feldeffekttransistor
US6385075B1 (en) * 2001-06-05 2002-05-07 Hewlett-Packard Company Parallel access of cross-point diode memory arrays

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60028343T2 (de) 1999-02-12 2007-05-24 Board Of Trustees Operating Michigan State University, East Lansing Nanokapseln mit geladenen teilchen, deren verwendung und verfahren zu ihrer herstellung
US6128214A (en) 1999-03-29 2000-10-03 Hewlett-Packard Molecular wire crossbar memory
US6314019B1 (en) * 1999-03-29 2001-11-06 Hewlett-Packard Company Molecular-wire crossbar interconnect (MWCI) for signal routing and communications
US6383784B1 (en) 1999-12-03 2002-05-07 City Of Hope Construction of nucleoprotein based assemblies comprising addressable components for nanoscale assembly and nanoprocessors
US7301199B2 (en) * 2000-08-22 2007-11-27 President And Fellows Of Harvard College Nanoscale wires and related devices
US20040248381A1 (en) 2000-11-01 2004-12-09 Myrick James J. Nanoelectronic interconnection and addressing
KR101008294B1 (ko) * 2001-03-30 2011-01-13 더 리전트 오브 더 유니버시티 오브 캘리포니아 나노구조체 및 나노와이어의 제조 방법 및 그로부터 제조되는 디바이스
US6777982B2 (en) * 2001-04-03 2004-08-17 Carnegie Mellon University Molecular scale latch and associated clocking scheme to provide gain, memory and I/O isolation
US6706402B2 (en) * 2001-07-25 2004-03-16 Nantero, Inc. Nanotube films and articles
EP1468423A2 (en) * 2002-01-18 2004-10-20 California Institute Of Technology Array-based architecture for molecular electronics
US6760245B2 (en) * 2002-05-01 2004-07-06 Hewlett-Packard Development Company, L.P. Molecular wire crossbar flash memory
WO2004034467A2 (en) 2002-07-25 2004-04-22 California Institute Of Technology Sublithographic nanoscale memory architecture
US6682951B1 (en) * 2002-09-26 2004-01-27 International Business Machines Corporation Arrangements of microscopic particles for performing logic computations, and method of use

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6256767B1 (en) * 1999-03-29 2001-07-03 Hewlett-Packard Company Demultiplexer for a molecular wire crossbar network (MWCN DEMUX)
WO2002003482A1 (de) * 2000-07-04 2002-01-10 Infineon Technologies Ag Feldeffekttransistor
JP2004503097A (ja) * 2000-07-04 2004-01-29 インフィネオン　テクノロジーズ　アクチエンゲゼルシャフト 電界効果トランジスタ
US6385075B1 (en) * 2001-06-05 2002-05-07 Hewlett-Packard Company Parallel access of cross-point diode memory arrays

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Publication number Priority date Publication date Assignee Title
JP2009525193A (ja) * 2006-01-27 2009-07-09 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． ミックススケール電子界面
KR101409310B1 (ko) * 2007-03-28 2014-06-18 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 3차원 크로스바 어레이 접합에 저장된 정보를 판독 및 기록하기 위한 3차원 크로스바 어레이 시스템 및 방법
JP2018006757A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ 半導体素子
JP2018006755A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ ナノトランジスタ
JP2018006756A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ ナノヘテロ接合構造
JP2018006754A (ja) * 2016-07-01 2018-01-11 ツィンファ ユニバーシティ ナノヘテロ接合構造

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DE60313462D1 (de) 2007-06-06
ATE360873T1 (de) 2007-05-15
AU2003298529A8 (en) 2004-07-29
US20040113138A1 (en) 2004-06-17
WO2004034467A2 (en) 2004-04-22
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AU2003298530A8 (en) 2004-05-04
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US20040113139A1 (en) 2004-06-17
EP1525586B1 (en) 2007-04-25
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EP1758126A2 (en) 2007-02-28
AU2003298529A1 (en) 2004-07-29
US6963077B2 (en) 2005-11-08
DE60313462T2 (de) 2008-01-03
WO2004034467A3 (en) 2004-08-26
WO2004061859A3 (en) 2005-02-03
EP1525585A2 (en) 2005-04-27
US6900479B2 (en) 2005-05-31

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