JP2005535029A - データ処理装置のコンフィギュレーション・データの取得 - Google Patents

データ処理装置のコンフィギュレーション・データの取得 Download PDF

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Publication number
JP2005535029A
JP2005535029A JP2004525672A JP2004525672A JP2005535029A JP 2005535029 A JP2005535029 A JP 2005535029A JP 2004525672 A JP2004525672 A JP 2004525672A JP 2004525672 A JP2004525672 A JP 2004525672A JP 2005535029 A JP2005535029 A JP 2005535029A
Authority
JP
Japan
Prior art keywords
data processing
timing device
event
time interval
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2004525672A
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English (en)
Japanese (ja)
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JP2005535029A5 (enExample
Inventor
ジェイ テリー，アラン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of JP2005535029A publication Critical patent/JP2005535029A/ja
Publication of JP2005535029A5 publication Critical patent/JP2005535029A5/ja
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Communication Control (AREA)
  • Electric Clocks (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Complex Calculations (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
JP2004525672A 2002-07-31 2003-07-16 データ処理装置のコンフィギュレーション・データの取得 Ceased JP2005535029A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0217708.7A GB0217708D0 (en) 2002-07-31 2002-07-31 Obtaining configuration data for a data processing apparatus
PCT/IB2003/003240 WO2004013754A2 (en) 2002-07-31 2003-07-16 Obtaining configuration data for a data processing apparatus

Publications (2)

Publication Number Publication Date
JP2005535029A true JP2005535029A (ja) 2005-11-17
JP2005535029A5 JP2005535029A5 (enExample) 2009-06-18

Family

ID=9941430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004525672A Ceased JP2005535029A (ja) 2002-07-31 2003-07-16 データ処理装置のコンフィギュレーション・データの取得

Country Status (8)

Country Link
US (1) US7325153B2 (enExample)
EP (1) EP1527389B1 (enExample)
JP (1) JP2005535029A (enExample)
CN (1) CN1672131B (enExample)
AT (1) ATE527596T1 (enExample)
AU (1) AU2003247079A1 (enExample)
GB (1) GB0217708D0 (enExample)
WO (1) WO2004013754A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7447655B2 (en) * 2000-03-02 2008-11-04 Trading Technologies International, Inc. System and method for automatic scalping of a tradeable object in an electronic trading environment
DE102004030969A1 (de) * 2004-06-26 2006-01-12 Robert Bosch Gmbh Verfahren und Vorrichtung zur Steuerung eines Bussystems sowie entsprechendes Bussystem
US7543173B2 (en) * 2005-08-02 2009-06-02 Hewlett-Packard Development Company, L.P. Timestamp generator
US7631176B2 (en) * 2006-07-24 2009-12-08 Standard Microsystems Corporation Resistor/capacitor based identification detection
US7719996B2 (en) * 2006-09-25 2010-05-18 Hewlett-Packard Development Company, L.P. Encoding timestamps
FR3027402B1 (fr) * 2014-10-21 2016-11-18 Centre Nat Rech Scient Circuit et procede pour le test sur puce d'une matrice de pixels

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3906346A (en) * 1972-12-26 1975-09-16 Us Navy Precision time interval comparator
US5051622A (en) * 1989-11-08 1991-09-24 Chips And Technologies, Inc. Power-on strap inputs
SE9002129D0 (sv) * 1990-06-15 1990-06-15 Siemens Elema Ab Anordning foer stimulering av levande vaevnad
DE59108895D1 (de) * 1991-12-18 1998-01-08 Siemens Ag Verfahren zur Uhrzeitführung in Computernetzen
JP3388053B2 (ja) * 1995-03-20 2003-03-17 富士通株式会社 データ収集システム用の伝送時間測定装置
US5508650A (en) * 1995-03-30 1996-04-16 Maxim Integrated Products, Inc. Dual feature input/timing pin

Also Published As

Publication number Publication date
CN1672131A (zh) 2005-09-21
CN1672131B (zh) 2012-05-23
WO2004013754A3 (en) 2004-12-29
AU2003247079A1 (en) 2004-02-23
US7325153B2 (en) 2008-01-29
EP1527389B1 (en) 2011-10-05
AU2003247079A8 (en) 2004-02-23
WO2004013754A2 (en) 2004-02-12
US20060025982A1 (en) 2006-02-02
GB0217708D0 (en) 2002-09-11
ATE527596T1 (de) 2011-10-15
EP1527389A2 (en) 2005-05-04

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