JP2005347429A - Manufacturing method of printed circuit board - Google Patents

Manufacturing method of printed circuit board Download PDF

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JP2005347429A
JP2005347429A JP2004163934A JP2004163934A JP2005347429A JP 2005347429 A JP2005347429 A JP 2005347429A JP 2004163934 A JP2004163934 A JP 2004163934A JP 2004163934 A JP2004163934 A JP 2004163934A JP 2005347429 A JP2005347429 A JP 2005347429A
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cover film
circuit board
printed circuit
solder resist
circuit pattern
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Kiyotaka Kato
聖隆 加藤
Hidesato Haigata
英里 拝形
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KTECH RES CORP
KTECH RESEARCH CORP
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KTECH RES CORP
KTECH RESEARCH CORP
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Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a printed circuit board capable of plasma desmear processing without producing poor appearance of a solder resist and capable of performing good nickel/gold plating processing. <P>SOLUTION: This manufacturing method of the printed circuit board has at least the steps of laser via processing for exposing a circuit pattern in an electronic device component mounting location of the printed circuit board comprising an interlayer insulating film consisting of an organic material, the circuit pattern comprising a conductive material on the interlayer insulating film, and the solder resist formed on the interlayer insulating film and the circuit pattern; and finishing for electrically connecting the circuit pattern exposed by the laser via processing and the electronic device component. The steps of cover film sticking for sticking a cover film all over the surface of the solder resist, plasma desmear processing for performing desmear processing by plasma after the cover film sticking step, and removing the cover film are provided between above-mentioned laser via processing step and the finishing step. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、電子部品を搭載するプリント基板の製造方法に関する。   The present invention relates to a method for manufacturing a printed circuit board on which electronic components are mounted.

プリント基板には、電子デバイス等の部品を搭載する際のハンダの不良を防いだり、プリント基板の表面回路を外部環境から保護するために、高分子皮膜としてソルダレジストが最終層に施される。この層は絶縁材料によって形成されることから、電子デバイス部品を搭載する位置にビアを形成して回路パターンを露出させ、さらにその部分を保持するために仕上げ処理として、無電解ニッケル・金メッキ加工が施されていた。   On the printed board, a solder resist is applied to the final layer as a polymer film in order to prevent solder defects when mounting components such as electronic devices and to protect the surface circuit of the printed board from the external environment. Since this layer is made of an insulating material, vias are formed at the positions where electronic device components are to be mounted to expose the circuit pattern, and electroless nickel / gold plating is used as a finishing process to retain that portion. It was given.

近年、搭載する電子デバイスの高集積化が進み、プリント基板にもパターンの微細加工が要求されるようになり、従来スクリーン印刷によるソルダレジストのパイプターニングが行われてきたが、現在では写真法による焼き付け技術を用いたホトソルダレジストによるパターニングが多く使用されるようになってきた。しかしながら、さらにソルダレジストの高精度、高解像度の要求が高まり、ソルダレジストをレーザで穴加工し、ニッケル・金メッキ加工を行う技術も検討されてきている。しかし、レーザ加工をする際には、スミアと呼ばれる溶融樹脂残渣が発生し、これが穴底や穴の側面に付着するため、デスミア処理と呼ばれるスミア除去を行わないと、ニッケル・金メッキのつきまわりが悪くなるという不具合が生じる。   In recent years, electronic devices to be mounted have been highly integrated, and fine processing of patterns has been required for printed circuit boards. Conventionally, solder resist pipe turning has been performed by screen printing. Patterning by a photo solder resist using a printing technique has been frequently used. However, the demand for higher accuracy and higher resolution of solder resists has further increased, and a technique for drilling a solder resist with a laser and performing nickel / gold plating has been studied. However, when laser processing is performed, a molten resin residue called smear is generated, which adheres to the bottom of the hole and the side of the hole. Therefore, if smear removal called desmear treatment is not performed, nickel / gold plating will run around. The problem of getting worse occurs.

このため、特許文献1に開示される多層基板のスミア除去方法は、多層基板の絶縁樹脂層にレーザ加工により形成されたインナービアホール内に残留するスミアを除去するために、酸素ガスを含んだプラズマ発生ガスを用いて多層基板のインナービアホールをプラズマ処理して絶縁樹脂層の表面を親水性化した後、酸化剤を含んだデスミア水溶液を用いて湿式処理により前記スミアを除去するようにしたものである。   For this reason, the smear removing method for the multilayer substrate disclosed in Patent Document 1 is a plasma containing oxygen gas in order to remove smear remaining in the inner via hole formed by laser processing on the insulating resin layer of the multilayer substrate. The inner via hole of the multilayer substrate is plasma treated with the generated gas to make the surface of the insulating resin layer hydrophilic, and then the smear is removed by wet treatment using a desmear aqueous solution containing an oxidizing agent. is there.

また、特許文献2に開示されるデスミア処理方法は、プラズマエッチング等のエッチングによってビア内に残存する樹脂残渣を除去するプラズマエッチングに先立って、ビルドアップ基板を所定の温度で加熱し、ビア内における樹脂残渣の分布を均一化して、処理時間の短縮を図ったものである。
特開2000−49463号公報 特開2002−50603号公報
In addition, the desmear treatment method disclosed in Patent Document 2 heats the build-up substrate at a predetermined temperature prior to plasma etching for removing the resin residue remaining in the via by etching such as plasma etching, and the like in the via. The resin residue distribution is made uniform to shorten the processing time.
JP 2000-49463 A JP 2002-50603 A

特許文献1に開示されるような湿式(ウェット方式)のデスミア処理では、酸化剤を含んだデスミア水溶液を用いることから、プリント基板の基材によっては表面が荒れる等の不具合が生じる場合があり、また環境問題にも課題が生じる。一方、特許文献2に開示されるドライ方式では、レーザで加工した穴(レーザビア)のデスミア処理の際にソルダレジストを削ってしまい、ソルダレジスト中にフィラーが発生する等外観不良を生じる不具合がある。   In the wet (wet process) desmear treatment as disclosed in Patent Document 1, since a desmear aqueous solution containing an oxidizing agent is used, a problem such as a rough surface may occur depending on the substrate of the printed circuit board. There are also problems with environmental issues. On the other hand, in the dry method disclosed in Patent Document 2, there is a problem that the solder resist is shaved during the desmearing process of the laser-processed hole (laser via), resulting in a defective appearance such as generation of filler in the solder resist. .

このため、この発明は、ソルダレジストの外観不良を生じることなく、プラズマデスミア処理ができ、ニッケル・金メッキ加工を良好に行うことができるプリント基板の製造方法を提供するものである。   For this reason, this invention provides the manufacturing method of the printed circuit board which can perform a plasma desmear process and does nickel / gold plating processing satisfactorily, without producing the external appearance defect of a soldering resist.

したがって、この発明は、有機材料からなる層間絶縁膜、該層間絶縁膜上に導電体材料からなる回路パターン及び前記層間絶縁膜及び回路パターン上に形成されるソルダレジストからなるプリント基板の電子デバイス部品の搭載位置に回路パターンを露出させるレーザビア加工工程と、該レーザビア加工によって露出した回路パターンと前記電子デバイス部品とを電気的に接続する仕上げ処理工程とを少なくとも有するプリント基板の製造方法において、前記レーザビア加工工程と前記仕上げ処理工程の間に、前記ソルダレジスト表面全体にカバーフィルムを貼り付けるカバーフィルム貼り付け工程と、該カバーフィルム貼り付け工程後、プラズマによるデスミア処理を行うプラズマデスミア処理工程と、前記カバーフィルムを除去する除去工程とを設けたことにある。   Accordingly, the present invention provides an electronic device component for a printed circuit board comprising an interlayer insulating film made of an organic material, a circuit pattern made of a conductor material on the interlayer insulating film, and a solder resist formed on the interlayer insulating film and the circuit pattern. In the method of manufacturing a printed circuit board, the laser via processing step of exposing a circuit pattern at a mounting position of the circuit board and a finishing processing step of electrically connecting the circuit pattern exposed by the laser via processing and the electronic device component are provided. Between the processing step and the finishing treatment step, a cover film attaching step for attaching a cover film to the entire surface of the solder resist, a plasma desmear treatment step for performing a desmear treatment with plasma after the cover film attaching step, Removal to remove cover film Lies in the fact that provided a degree.

プラズマデスミア処理工程の前に、ソルダレジスト表面全体にカバーフィルムを貼り付けることによって、プラズマからソルダレジスト表面を保護することができると共に、ビア上のカバーフィルムは、ソルダレジスト上のカバーフィルムよりも削り取られる速度が非常に速いため、ビア上のカバーフィルムが取り除かれた後、ビア内のスミア除去されるものである。   Before the plasma desmear process, the solder resist surface can be protected from the plasma by applying the cover film to the entire solder resist surface, and the cover film on the via is more scraped than the cover film on the solder resist. Since the speed at which the cover is formed is very high, smear in the via is removed after the cover film on the via is removed.

また、前記除去工程は、カバーフィルムを剥がす工程と、カバーフィルムを剥がした後に残る接着剤を除去するオゾン処理工程とによって構成されることが望ましい。これによって、ソルダレジスト表面に接着剤が残った場合には、オゾン処理装置によってソルダレジスト表面を損傷することなく接着剤の除去が可能となるものである。   Moreover, it is desirable that the removing step includes a step of peeling the cover film and an ozone treatment step of removing the adhesive remaining after the cover film is peeled off. Thus, when the adhesive remains on the solder resist surface, the adhesive can be removed without damaging the solder resist surface by the ozone treatment apparatus.

さらに、前記カバーフィルムは、片面に接着手段を具備する樹脂系フィルムであることが望ましい。特に樹脂系フィルムとしては、ポリイミド系樹脂フィルム、エポキシ系樹脂フィルム、PETフィルム等であることが望ましい。   Furthermore, the cover film is preferably a resin film having an adhesive means on one side. In particular, the resin film is preferably a polyimide resin film, an epoxy resin film, a PET film, or the like.

さらにまた、前記仕上げ処理工程は、無電解ニッケル・金メッキ加工工程である。   Furthermore, the finishing process is an electroless nickel / gold plating process.

以上のように、プラズマデスミア処理の前に、ソルダレジスト全面にカバーフィルムを貼るだけで、デスミア処理時においてソルダレジスト表面を保護できるため、プリント基板の品質を良好に保つことができるものである。また、無電解ニッケル。金メッキ加工も良好な状態で行うことが可能となるものである。   As described above, the surface of the solder resist can be protected at the time of the desmear process only by sticking a cover film on the entire surface of the solder resist before the plasma desmear process, so that the quality of the printed circuit board can be kept good. Electroless nickel. Gold plating can also be performed in good condition.

以下、この発明の実施例ついて図面により説明する。   Embodiments of the present invention will be described below with reference to the drawings.

プリント基板10は、図2(a)で示すように、基本的にプリプレグなどの有機材料からなる層間絶縁膜1と、この層間絶縁膜1上に形成された銅箔層又は銅メッキ層からなるプリント配線層2と、このプリント配線層2を外部環境から保護するために形成された高分子被膜からなるソルダレジスト3とによって構成される。   As shown in FIG. 2A, the printed board 10 is basically composed of an interlayer insulating film 1 made of an organic material such as a prepreg and a copper foil layer or a copper plating layer formed on the interlayer insulating film 1. The printed wiring layer 2 and a solder resist 3 made of a polymer film formed to protect the printed wiring layer 2 from the external environment.

このプリント基板10に電子デバイス部品を搭載するために、前記プリント配線層2の銅表面を露出させる必要があり、図1のステップ100で示されるレーザビア加工工程において、レーザビア加工が施される。このレーザビア加工は、図2(b)で示すように、前記ソルダレジスト3の所定の位置にレーザ4を照射し、照射範囲内のソルダレジスト3を蒸散させて除去し、ビア5を形成するもので、高精度のビア5を形成できるという効果を有するが、図2(c)で示すように、ビア5の穴底や側面に微小厚さの樹脂よりなるスミア6が残留する。このスミア6が残留したまま新な導体層形成のためのメッキを行うとメッキ不良や導通不良が生じる場合があるため、このスミア6を除去するデスミア処理を行う必要がある。   In order to mount the electronic device component on the printed board 10, it is necessary to expose the copper surface of the printed wiring layer 2, and laser via processing is performed in the laser via processing step shown in Step 100 of FIG. In this laser via processing, as shown in FIG. 2 (b), a predetermined position of the solder resist 3 is irradiated with a laser 4, and the solder resist 3 within the irradiation range is removed by evaporation to form a via 5. Thus, although there is an effect that the high-precision via 5 can be formed, as shown in FIG. 2C, the smear 6 made of a resin having a very small thickness remains on the bottom and side surfaces of the via 5. If plating for forming a new conductor layer is performed with the smear 6 remaining, plating failure or conduction failure may occur. Therefore, it is necessary to perform a desmear process for removing the smear 6.

本願発明に係るデスミア処理工程では、先ずステップ200において、前記レーザビア加工工程100において複数のビア5が形成されたプリント基板10のソルダレジスト3上に、図3(a)で示すように、ポリイミド系樹脂フィルム、エポキシ系樹脂フィルム、PETフィルム等からなるカバーフィルム7を貼り付ける(ラミネートする)。   In the desmear treatment process according to the present invention, first, in step 200, on the solder resist 3 of the printed circuit board 10 in which the plurality of vias 5 are formed in the laser via processing process 100, as shown in FIG. A cover film 7 made of a resin film, an epoxy resin film, a PET film or the like is attached (laminated).

そして、ステップ300においてプラズマデスミア処理を行う。従来のプラズマデスミア処理では、ビア5内のスミア6を蒸散させて取り除く際に、ソルダレジスト3の表面も削ってしまうために、ソルダレジスト3内にフィラーが発生するなどの不具合が生じていたが、カバーフィルム7を貼り付けることによってソルダレジスト3を保護することができるものである。また、ビア5上に位置するカバーフィルム7とソルダレジスト3上に位置するカバーフィルム7とでは、削れ速度が大きく異なるため、ビア5上のカバーフィルム7はプラズマデスミア処理の初期段階で取り除かれることから、全体的にカバーフィルムを貼り付けても、特に問題なくデスミア処理を行うことができる。尚、このプラズマデスミア処理後、図3(b)で示すように、カバーフィルム7はプラズマによって削られることから、厚みが薄くなっているものである。   In step 300, a plasma desmear process is performed. In the conventional plasma desmear process, when the smear 6 in the via 5 is removed by evaporation, the surface of the solder resist 3 is also shaved, so that a problem such as generation of filler in the solder resist 3 has occurred. The solder resist 3 can be protected by attaching the cover film 7. Further, the cover film 7 located on the via 5 and the cover film 7 located on the solder resist 3 are greatly different in scraping speed, and therefore the cover film 7 on the via 5 is removed at the initial stage of the plasma desmear process. Therefore, even if the cover film is affixed as a whole, the desmear treatment can be performed without any particular problem. In addition, after this plasma desmear process, as shown in FIG.3 (b), since the cover film 7 is scraped off by plasma, thickness is thin.

そして、ステップ400において前記カバーフィルム7を剥がす。この工程において、図3(c)で示すように、カバーフィルム7を貼り付ける際に用いた接着剤8が残った場合には、ステップ500において、図示しないオゾン処理装置によって表面処理を行い、接着剤8の除去を行うものである。   In step 400, the cover film 7 is peeled off. In this step, as shown in FIG. 3C, when the adhesive 8 used when the cover film 7 is pasted remains, in step 500, surface treatment is performed by an ozone treatment device (not shown), and adhesion is performed. The agent 8 is removed.

前記ステップ400の前記カバーフィルム7の剥がし工程の後、又は前記ステップ500のオゾン表面処理の後、図3(d)で示すように、ソルダレジスト3の表面がきれいなままで、ビア5内のスミア6が除去されたプリント基板10を得ることができ、ステップ600によるニッケル・金メッキ処理を良好な状態で行うことができるようになるものである。   After the peeling process of the cover film 7 in the step 400 or after the ozone surface treatment in the step 500, the surface of the solder resist 3 remains clean as shown in FIG. 6 can be obtained, and the nickel / gold plating process in step 600 can be performed in a good state.

本願発明のプリント基板製造方法を示したフローチャート図である。It is the flowchart figure which showed the printed circuit board manufacturing method of this invention. レーザビア加工の状態を示した説明図である。It is explanatory drawing which showed the state of laser via processing. 本願発明のプリント基板製造方法におけるデスミア処理の過程を示した説明図である。It is explanatory drawing which showed the process of the desmear process in the printed circuit board manufacturing method of this invention.

符号の説明Explanation of symbols

1 層間絶縁膜
2 プリント配線層
3 ソルダレジスト
4 レーザ
5 ビア
6 スミア
7 カバーフィルム
8 接着剤
10 プリント基板
1 Interlayer insulating film 2 Printed wiring layer 3 Solder resist 4 Laser 5 Via 6 Smear 7 Cover film 8 Adhesive 10 Printed circuit board

Claims (4)

有機材料からなる層間絶縁膜、該層間絶縁膜上に導電体材料からなる回路パターン及び前記層間絶縁膜及び回路パターン上に形成されるソルダレジストからなるプリント基板の電子デバイス部品の搭載位置に回路パターンを露出させるレーザビア加工工程と、該レーザビア加工によって露出した回路パターンと前記電子デバイス部品とを電気的に接続する仕上げ処理工程とを少なくとも有するプリント基板の製造方法において、
前記レーザビア加工工程と前記仕上げ処理工程の間に、
前記ソルダレジスト表面全体にカバーフィルムを貼り付けるカバーフィルム貼り付け工程と、
該カバーフィルム貼り付け工程後、プラズマによるデスミア処理を行うプラズマデスミア処理工程と、
前記カバーフィルムを除去する除去工程とを設けたことを特徴とするプリント基板の製造方法。
An interlayer insulating film made of an organic material, a circuit pattern made of a conductor material on the interlayer insulating film, and a circuit pattern at a mounting position of an electronic device component on a printed circuit board made of a solder resist formed on the interlayer insulating film and the circuit pattern In a method for manufacturing a printed circuit board, the method includes at least a laser via processing step that exposes a circuit pattern, and a finish processing step that electrically connects the circuit pattern exposed by the laser via processing and the electronic device component,
Between the laser via processing step and the finishing step,
A cover film attaching step of attaching a cover film to the entire solder resist surface;
A plasma desmear treatment step of performing a desmear treatment with plasma after the cover film attaching step;
A method for producing a printed circuit board, comprising: a removing step for removing the cover film.
前記除去工程は、カバーフィルムを剥がす工程と、カバーフィルムを剥がした後に残る接着剤を除去するオゾン処理工程とによって構成されることを特徴とする請求項1記載のプリント基板の製造方法。   The method for manufacturing a printed circuit board according to claim 1, wherein the removing step includes a step of peeling the cover film and an ozone treatment step of removing the adhesive remaining after the cover film is peeled off. 前記カバーフィルムは、片面に接着手段を具備する樹脂系フィルムであることを特徴とする請求項1又は2記載のプリント基板の製造方法。   3. The method of manufacturing a printed circuit board according to claim 1, wherein the cover film is a resin film having an adhesive means on one side. 前記仕上げ処理工程は、無電解ニッケル・金メッキ加工工程であることを特徴とする請求項1,2又は3記載のプリント基板の製造方法。   4. The method of manufacturing a printed circuit board according to claim 1, wherein the finishing process is an electroless nickel / gold plating process.
JP2004163934A 2004-06-02 2004-06-02 Manufacturing method of printed circuit board Pending JP2005347429A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008004720A1 (en) * 2006-07-04 2008-01-10 Jesagi Hankook Ltd. Plasma semi-additive process method for manufacturing pcb
KR100859206B1 (en) 2007-03-15 2008-09-18 주식회사제4기한국 Laser via hole processing method using plasma
KR20100117035A (en) 2009-04-23 2010-11-02 아지노모토 가부시키가이샤 Method for manufacturing printed circuit board
JP2011077520A (en) * 2010-09-14 2011-04-14 Sekisui Chem Co Ltd Adhesive tape for protecting solder resist, method of manufacturing the same, and method of controlling surface roughness of solder resist
JP2012227292A (en) * 2011-04-18 2012-11-15 Ibiden Co Ltd Manufacturing method of led substrate
KR101471794B1 (en) * 2010-09-27 2014-12-10 다이요 홀딩스 가부시키가이샤 Method for forming solder resist

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008004720A1 (en) * 2006-07-04 2008-01-10 Jesagi Hankook Ltd. Plasma semi-additive process method for manufacturing pcb
KR100859206B1 (en) 2007-03-15 2008-09-18 주식회사제4기한국 Laser via hole processing method using plasma
KR20100117035A (en) 2009-04-23 2010-11-02 아지노모토 가부시키가이샤 Method for manufacturing printed circuit board
JP2011077520A (en) * 2010-09-14 2011-04-14 Sekisui Chem Co Ltd Adhesive tape for protecting solder resist, method of manufacturing the same, and method of controlling surface roughness of solder resist
KR101471794B1 (en) * 2010-09-27 2014-12-10 다이요 홀딩스 가부시키가이샤 Method for forming solder resist
JP2012227292A (en) * 2011-04-18 2012-11-15 Ibiden Co Ltd Manufacturing method of led substrate

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