JP2005338854A - Active matrix liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the occurrence of failure in the manufacturing process caused by charging in a black matrix and to improve reliability after the apparatus is completed. <P>SOLUTION: The display has pixels having thin film transistors, a common part and a lead terminal part on a substrate, wherein the common part and the lead terminal part have electrodes comprising transparent conductive films. The lead terminal part has a plurality of terminal electrodes to be connected to the common part. By employing the above structure, the common electrode extended in the lead terminal part can be connected to an appropriate potential. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The invention disclosed in this specification relates to a structure of an active matrix liquid crystal display device. Further, the present invention relates to a manufacturing method thereof.

  Conventionally, an active matrix type liquid crystal display device is known. In this method, a thin film transistor is arranged in each of the pixels arranged in a matrix, and the charges entering and leaving the pixel electrode are controlled by the thin film transistor.

  In such a configuration, a light shielding film called a black matrix (BM) arranged so as to cover the edge portion of the pixel electrode is required. As the BM, a metal film having a thickness of about several thousand mm is usually used.

  This black matrix does not play an especially electrical role, but exists throughout the entire pixel matrix region.

  However, when a thin metal film is sandwiched between insulating films and exists in the entire pixel matrix region, there is a problem that unnecessary charges are accumulated therein.

  This is a problem not only after the device is completed but also in the manufacturing process.

  As is well known, generally, in a thin film transistor manufacturing process, a film forming process or an etching process using plasma is performed.

  At this time, if there is an electrically floating conductive material, electric charges are accumulated there, causing electrostatic breakdown of the insulating film.

  The thickness of an insulating film that is generally used is several thousand Å. In addition, defects and pinholes are present at a density that cannot be ignored in an insulating film (silicon oxide film or silicon nitride film) formed by CVD or sputtering.

  Accordingly, as a result of the phenomenon that charges are accumulated in the BM as described above, the insulating film is locally electrostatically broken.

  This means that a defect occurs in a part of the apparatus during the production. That is, some thin film transistors have problems such as malfunction or circuit malfunction due to the presence of leakage current.

  This is particularly a problem during device fabrication. Further, even after the device is completed, it becomes a factor that impairs its reliability.

  An object of the invention disclosed in this specification is to solve the problem that the black matrix is charged. That is, it is an object to suppress the occurrence of defects in the manufacturing process caused by charging of the black matrix and to improve the reliability after completion of the device.

One of the inventions disclosed in this specification is as shown in FIG.
A liquid crystal display device having an active matrix type,
An electrode 303 for setting the black matrix 302 to a common potential is formed by a transparent conductive film 227 constituting the pixel electrode 228.

The configuration of another invention is as shown in a specific example in FIG.
A liquid crystal display device having an active matrix type,
An electrode 217 for setting the black matrix 302 to a common potential is formed on the same layer as the source line 215 (see FIG. 2).

  By using the invention disclosed in this specification, the problem that the black matrix is charged can be solved. That is, it is possible to suppress the occurrence of defects in the manufacturing process caused by the black matrix being charged. Moreover, the reliability after completion of the apparatus can be improved.

  FIG. 1 shows an outline of an active matrix liquid crystal display device as viewed from above. FIG. 1 shows an active matrix region 101 having pixel electrodes arranged in a matrix of several hundreds × several hundreds, and peripheral drive circuits 103 and 111 for driving a thin film transistor disposed in the active matrix region 101. Has been.

  In the active matrix region 101, pixel electrodes arranged in a matrix are arranged. A thin film transistor is disposed on each pixel electrode.

  An overview of the active matrix configuration is shown at 107. As shown in the enlarged view 107, in the active matrix region, source lines (also referred to as data lines) 109 and gate lines 108 are arranged in a lattice pattern.

  The thin film transistor 110 is disposed in a region surrounded by the source line and the gate line. The source of the thin film transistor is connected to the source line. The drain is connected to a pixel electrode (not shown). The pixel electrode is disposed in a region surrounded by the gate line and the source line.

  In FIG. 1, reference numeral 102 denotes a black matrix aperture. The area other than the opening is shielded from light. A pixel electrode is present in the opening indicated by 102.

  The black matrix extends to the common electrodes indicated by 105, 106, 100 to hold itself at a predetermined potential. The common electrode is connected to the common electrode disposed on the counter electrode via the conductive pad when it is bonded to the counter substrate.

  Also, as shown at 104 in the lead terminal portion, wiring extends from the common electrode.

  With such a configuration, the black matrix is maintained at a predetermined potential, and it is possible to prevent a part of the apparatus from being destroyed due to, for example, the influence of static electricity.

  A manufacturing process of an active matrix liquid crystal display device having the structure shown in FIG. 1 is described below. Here, a manufacturing process of a portion where one thin film transistor of the pixel in the active matrix region shown by 101 in FIG. 1 is arranged, and further, a P type thin film transistor and an N type arranged in the peripheral driver circuit region shown by 103 or 111 A step of producing a portion where the thin film transistor is disposed, a step of producing a common electrode portion indicated by 105 to 107, particularly a step of producing a cross section cut along CC ′, and a step of producing a terminal portion indicated by 104, In particular, a manufacturing process of a cross section cut along BB ′ is shown.

  FIG. 2 shows a manufacturing process of each part. First, a base film (not shown) is formed on the glass substrate 201 to a thickness of 3000 mm. This base film is composed of a silicon oxide film or a silicon oxynitride film. This base film has a role of preventing diffusion of impurities from the glass substrate.

  Next, an amorphous silicon film (not shown) is formed to a thickness of 500 mm by plasma CVD, and further crystallized by heat treatment or laser light irradiation to obtain a crystalline silicon film.

  Further, by patterning the obtained crystalline silicon film, island-shaped regions 202, 203, and 204 that become active layers of the thin film transistor are formed. In this way, the state shown in FIG. Since the thin film transistor is formed in the peripheral circuit and the pixel portion, nothing is formed in the terminal portion and the common portion in this state.

  Next, a silicon oxide film 205 functioning as a gate insulating film is formed to a thickness of 1000 mm. The silicon oxide film 205 constituting the gate electrode is formed by a plasma CVD method.

  Next, an aluminum film (not shown) constituting the gate electrode is formed to a thickness of 4000 mm by sputtering. This aluminum film contains 0.2% by weight of scandium in order to suppress the generation of hillocks. Hillock is a phenomenon in which abnormal growth of aluminum occurs in the heating process, and irregularities and protrusions are formed on the surface of the film or pattern.

  Further, the aluminum film is patterned to form gate electrodes 206, 208, and 210. At the same time as the formation of the gate electrode, a gate wiring extending therefrom is simultaneously formed. These gate electrodes and gate wirings are called first-layer wirings for convenience.

  Anodization is performed in an electrolytic solution using the gate electrode as an anode, thereby forming anodic oxide films 207, 209, and 211 having a dense film quality. The thickness of this anodic oxide film is 1000 mm.

  This anodic oxide film has a role of preventing hillocks from being generated on the surface of the gate electrode and the gate wiring extending therefrom. If the thickness of the anodic oxide film is further increased, an offset gate region can be formed in a subsequent impurity ion implantation step.

  Here, impurity ions are implanted to form a source / drain region and a channel formation region in each active layer.

  Here, P (phosphorus) ions are implanted into the active layers 202 and 204. Further, B (boron) ions are implanted into the active layer 203. The selective implantation of impurity ions is performed by using a resist mask.

  In this step, the source regions 21, 26, 27 and the drain regions 23, 24, 29 are formed in a self-aligned manner. Further, the channel formation regions 22, 25, and 28 are formed in a self-aligned manner.

  After the impurity ion implantation step, laser light irradiation is performed to activate the ion implanted region. In this step, a method by irradiation with infrared light or ultraviolet light may be used.

  In this way, the state shown in FIG. Next, a first interlayer insulating film 212 is formed to a thickness of 1000 mm. This interlayer insulating film 212 uses a silicon nitride film. A plasma CVD method may be used as a method for forming the silicon nitride film. (Fig. 2 (C))

  Note that a silicon oxide film or a silicon oxynitride film can be used as the first interlayer insulating film 212.

  Next, contact holes 30 to 35 are formed. (Fig. 2 (D))

  When the state shown in FIG. 2D is obtained, electrodes that contact each active layer are formed as shown in FIG. Here, the source electrodes 36 and 214 and the drain electrodes 212 and 213 of the thin film transistors arranged in the peripheral circuit, and the source electrode 215 and the drain electrode 215 of the thin film transistors arranged in the pixel portion are formed.

  At this time, necessary wirings are formed extending from the respective electrodes. For example, simultaneously with the formation of the source electrode 215 of the thin film transistor in the pixel portion, a source wiring extending from the source electrode 215 is formed. In the peripheral circuit, a required wiring pattern is formed. Note that a CMOS structure can be obtained by connecting the drain electrodes 212 and 213 in the peripheral circuit.

  Also, electrodes are formed at the same time in the terminal portion and the common portion. Here, patterns 219 and 218 forming the electrode of the terminal portion are formed, and further, a pattern 217 forming the common electrode is formed in the common portion. The common electrode extends to the terminal portion and is connected to an appropriate potential. (Figure 2 (E))

  The electrodes and patterns formed in the step shown in FIG. 2E are formed as having a three-layer structure comprising a 500 to 1000 Å titanium film, a 2000 Å thick aluminum film, and a 1000 Å thick titanium film.

  The electrodes and patterns formed in this step are called second-layer wiring for convenience.

  The reason why the lowermost layer is a titanium film is that electrical contact between the aluminum and the semiconductor constituting the active layer is not successful. This is because aluminum cannot make a good ohmic contact with a semiconductor.

  The central layer is made of aluminum in order to make the best use of its low electrical resistance.

  The reason why the uppermost layer is a titanium film is to contact a pixel electrode (ITO electrode) to be formed later and the drain electrode 216 of the thin film transistor in the pixel portion.

  That is, when aluminum and ITO electrode are directly contacted, good ohmic contact cannot be obtained, but good ohmic contact can be obtained between titanium film and ITO electrode, and titanium film and aluminum.

  In a later step, it is necessary to connect the BM and the second layer common electrode 217 with an ITO electrode also in the common portion. At this time, in order to make good electrical contact with the ITO electrode, the uppermost layer of the second wiring layer is required to be a titanium film.

  In the subsequent process, the terminal electrodes 218 and 219 formed of the second layer wiring and the ITO electrode must be in contact with each other also in the terminal portion. At this time, in order to make good electrical contact between the terminal electrode and the ITO electrode, the uppermost layer of the second wiring layer is required to be a titanium film.

  In this way, the state shown in FIG. Next, as shown in FIG. 3A, a silicon oxide film 301 is formed to a thickness of 2000 mm as a second interlayer insulating film.

  When the state shown in FIG. 3A is obtained, a titanium film is formed to a thickness of 3000 mm to form a BM (black matrix) as shown in FIG. As the BM, a chromium film, a laminated film of a titanium film and a chromium film, or other appropriate metal film can be used.

  In FIG. 3B, a portion denoted by 302 functions as a BM. Reference numeral 303 denotes a portion extending from the BM indicated by 302 to the common portion.

  Next, as shown in FIG. 3C, a third interlayer insulating film 221 is formed. Here, a 2000 nm thick silicon oxide film is formed by plasma CVD.

  Further, openings 222, 223, 224, and 225 are formed as shown in FIG. Here, 222 is an opening for forming an electrode of the terminal portion. Reference numerals 223 and 224 denote openings for electrically connecting the second-layer wiring and the BM.

  Reference numeral 225 denotes an opening through which an ITO electrode, which is a pixel electrode, comes into contact with the drain electrode 216 of the thin film transistor in the pixel portion.

  Then, as shown in FIG. 4A, electrodes 226, 227 and 228 made of ITO are formed simultaneously. Here, reference numeral 228 denotes a portion that functions as a pixel electrode. Reference numeral 227 serves as an electrode pattern for connecting the second-layer wiring 217 and the electrode pattern 220 extending from the BM.

  An electrode for contact with the counter substrate is further formed on the common part electrode pattern 227 with silver paste.

  By adopting the above-described configuration, it is possible to prevent the BM layer from being in an electrically floating state.

  For example, after the step shown in FIG. 4A, a final protective film (not shown) is formed, a rubbing film (not shown) for rubbing the liquid crystal is formed thereon, and then a rubbing step is performed. At this time, the generation of static electricity often destroys the thin film transistor or the insulating film.

  However, when the configuration shown in this embodiment is adopted, the black matrix can be set at a predetermined potential, and it is possible to avoid the accumulation of charges therein, so that the occurrence of the above-described defects can be prevented.

  The present embodiment relates to a configuration in which some steps are different from the first embodiment. The manufacturing steps shown in this embodiment are the same as those shown in Embodiment 1 up to FIG.

  First, according to the manufacturing process shown in Embodiment 1, the state shown in FIG. When the state shown in FIG. 3A is obtained, openings 501, 502, and 503 are formed as shown in FIG. That is, openings indicated by 501 to 503 are formed in the second interlayer insulating film 301.

  Next, a titanium film constituting the BM is formed and patterned to obtain the state shown in FIG.

  Here, reference numeral 507 denotes a pattern that functions as an original BM.

  Reference numeral 506 denotes a pattern for directly contacting the pattern extending from the BM and the common electrode 217 on the second layer surface.

  Further, reference numerals 504 and 505 denote electrodes that contact the first-layer electrodes 218 and 219 constituting the terminal portion.

  The present embodiment is different from the first embodiment in that the electrode is formed of the material constituting the BM in the terminal portion. Another difference from the first embodiment is that the electrode 506 extending from the BM and the common electrode 217 in the second layer are in direct contact with each other in the common portion.

  When the state shown in FIG. 5B is obtained, a third interlayer insulating film 508 is formed. Here, a third interlayer insulating film 508 is formed with a silicon oxide film as in the first embodiment. (Fig. 5 (C))

  Further, contact holes are formed. Then, an ITO film is formed to a thickness of 1500 mm by sputtering. Then, the pixel electrode 512 is formed by patterning it.

  At the same time, an electrode 511 in the common portion is formed. This electrode 511 becomes an electrode to come into contact with the common electrode of the counter substrate later. Reference numerals 504 and 505 form electrode terminals in the terminal portion.

  When the configuration of this embodiment is employed, the electrode 506 extending from the BM 507 and the second-layer common electrode 217 can be in direct contact with each other. And the contact can be ensured.

  Since the connection between the BM and the second layer common electrode is for maintaining a common potential, it is necessary to reduce the contact resistance as much as possible. For this purpose, the configuration of this embodiment is useful.

  In the present embodiment, in the configuration shown in the first embodiment, the second-layer wiring is not a three-layer film made of titanium film / aluminum film / titanium film but a two-layer film of titanium film / aluminum film. An example of

  As described in the first embodiment, the reason why the second-layer wiring has a three-layer structure is to solve problems such as contact with the active layer, contact with ITO, and reduction in resistance of the wiring itself.

  However, since the multilayer structure as described above requires a large number of film forming steps, it is preferable that the number of layers be smaller when considering reduction in manufacturing cost. In this embodiment, considering this point, the second-layer wiring may be a two-layer film of titanium film / aluminum film.

  The present embodiment relates to a configuration in which some steps are different from the first embodiment. The manufacturing steps shown in this embodiment are the same as those shown in Embodiment 1 up to FIG. 3A except for some steps.

  First, according to the manufacturing process shown in Embodiment 1, the state shown in FIG. At this time, the opening 35 is not formed in the step shown in FIG.

  Further, in the step shown in FIG. 2E, the second layer wirings indicated by 217 to 219 and 36 and 212 to 215 are formed of two layers of a 1000-thick titanium film and a 3000-thick aluminum film. Of course, the electrode 216 is not formed.

  When the state shown in FIG. 3A is obtained in this way, openings 501, 502, 503, and 601 are formed as shown in FIG. 6A. That is, openings 501 to 503 and 601 are formed in the second interlayer insulating film 301.

  FIG. 6A corresponds to FIG. 6 is different from FIG. 6A in that an opening 601 is formed, but an electrode 216 is formed in a corresponding portion in FIG. 5A.

  Next, a titanium film constituting the BM is formed and patterned to obtain the state shown in FIG. Here, reference numeral 507 denotes a pattern that functions as an original BM.

  The pattern 506 is a pattern for directly contacting the pattern extending from the BM 507 and the second-layer common electrode 217.

  Further, reference numerals 504 and 505 denote electrodes in contact with the first-layer electrodes 218 and 219 constituting the terminal portion.

  In this step, an electrode 602 that is in contact with the drain region 29 is formed at a portion of the opening 601 with a material constituting the BM 507.

  The present embodiment is different from the first embodiment in that the electrode is formed of the material constituting the BM in the terminal portion. Further, the point where the BM and the common electrode 217 of the second layer are in direct contact is different from the first embodiment. Moreover, the point which the electrode 602 which contacts the drain region of the thin-film transistor of a pixel part is formed with BM material is different from Example 1 and Example 2. FIG.

  In the state shown in FIG. 6B, it becomes clear that the second-layer wirings indicated by 217 to 219, and 36 and 212 to 215 may be a two-layer film made of titanium and aluminum.

  That is, the BM material made of titanium is in contact with the upper surface of the second-layer wiring. Therefore, even if the upper surface of the second-layer wiring is aluminum, ohmic contact can be obtained without any problem.

  Therefore, in this embodiment, the second-layer wiring can have a two-layer structure in which the lower layer is a titanium film and the upper layer is an aluminum film.

  After obtaining the state shown in FIG. 6B, a third interlayer insulating film 508 is formed. Here, a third interlayer insulating film 508 is formed with a silicon oxide film as in the first embodiment. (Fig. 6 (C))

  Further, contact holes are formed. Then, an ITO film is formed to a thickness of 1500 mm by sputtering. Then, the pixel electrode 512 is formed by patterning it.

  At the same time, an electrode 511 in the common portion is formed. This electrode 511 becomes an electrode in order to come into contact with the common electrode of the counter substrate later. Reference numerals 509 and 510 form electrode terminals in the terminal portion.

  When the configuration of this embodiment is employed, the electrode 506 extending from the BM 507 and the second-layer common electrode 217 can be in direct contact with each other. And the contact can be ensured.

  Since the connection between the BM and the second layer common electrode is for maintaining a common potential, it is necessary to reduce the contact resistance as much as possible. For this purpose, it is preferable to adopt the configuration of this embodiment.

  In addition, the second-layer wiring can be formed of a two-layer film of a titanium film and an aluminum film. This is useful in the sense that the number of steps can be reduced.

  In this example, when the material constituting the BM is formed in the steps shown in Examples 1 to 3, the BM has a high potential during the film formation so that the insulating film is not electrostatically broken. Regarding ingenuity.

  As shown in the first to third embodiments, the BM is finally configured to have a predetermined potential. However, when the BM is formed (ordinary sputtering method is used), there is a concern that charges are accumulated in the BM in the middle of the film formation and the BM has a potential with respect to other parts.

  The present embodiment solves this problem. FIG. 7 shows an outline of the configuration shown in this embodiment. First, as shown in FIG. 7B, a first interlayer insulating film 702 and a second-layer wiring 703 are formed over a substrate 701. Here, a part of the wiring of the second layer is provided so as to extend to a corner portion of the substrate 701.

  Then, when the second interlayer insulating film is formed by the plasma CVD method, as shown in FIG. 7A, the nail 705 for holding the substrate 701 at a portion where the extended portion 702 of the second layer wiring exists. To be placed on the electrode 700.

  In this state, a second interlayer insulating film 704 is formed as shown in FIG. Then, no film is formed on the portion where the nail 705 was present.

  Then, a BM material is formed by sputtering. Then, the second-layer wiring 703 and the BM film 706 that extend simultaneously with the film formation come into contact with each other. If it does in this way, it can control that BM material will become a specific potential in the middle of film formation of BM material, or before formation of a common electrode.

  Reference numeral 702 denotes an insulating film serving as a substrate on which a second-layer wiring is formed.

1 is a diagram showing an outline of an active matrix liquid crystal display device. 10A and 10B illustrate a manufacturing process of an active matrix liquid crystal display device. 10A and 10B illustrate a manufacturing process of an active matrix liquid crystal display device. 10A and 10B illustrate a manufacturing process of an active matrix liquid crystal display device. 10A and 10B illustrate a manufacturing process of an active matrix liquid crystal display device. 10A and 10B illustrate a manufacturing process of an active matrix liquid crystal display device. The figure which shows the film-forming state of BM material.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Active matrix area | region 102 Opening formed in BM (black matrix) 103 Peripheral drive circuit 104 Terminals 105, 106, 100 Common electrode 107 Enlarged view of active matrix circuit 108 Gate line 109 Source line 110 Thin film transistor 111 Peripheral drive circuit 201 Glass Substrate 202, 203, 204 Active layer 205 Gate insulating film 206, 208, 210 Gate electrode 207, 209, 211 Anodized film 21, 26, 27 Source region 23, 24, 29 Drain region 22, 25, 28 Channel formation region 212 Interlayer insulating film 30 to 35 Contact opening 218, 219 Terminal electrode 217 Common electrode 36, 214, 215 Source electrode 212, 213, 216 Drain electrode 301 Interlayer insulating film 302 BM (bra Click matrix)
303 Common electrode 221 Interlayer insulating film 226 Terminal electrode
227 Common electrode 228 Pixel electrode

Claims (2)

On a substrate, it has a pixel having a thin film transistor, a common part, and a lead terminal part,
The display device, wherein the common portion and the lead terminal portion have electrodes made of a transparent conductive film. 2. The display device according to claim 1, wherein the lead terminal portion includes a plurality of terminal electrodes connected to the common portion.

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