JP2005333436A - Imaging apparatus, and device and method for controlling the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain images of high quality, to attain high-speed image pickup especially at the time of picking up moving images, to increase sensitivity and a dynamic range at the time of image pickup, and to suppress or remove smears generated at the time of transfer in an imaging apparatus including a CCD solid state imaging device. <P>SOLUTION: In the imaging apparatus including an image pickup part having a plurality of pixels for receiving light from the external and generating information charges, in which each pixel is provided with a plurality of transfer electrodes 30 extended in a direction intersecting with a transfer direction of information charges, and capable of accumulating and transferring information charges generated in response to light made incident on the pixels by utilizing potential wells formed by the action of the transfer electrodes 30: twelve transfer electrodes 30-1 to 30-12 continued along the transfer direction of information charges are combined as one group and any one of clock pulses ϕ<SB>1</SB>to ϕ<SB>8</SB>of eight phases is applied to respective transfer electrodes 30-1 to 30-12 included in one group to control them. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an image pickup apparatus, an image pickup apparatus control apparatus, and a control method thereof that improve the image quality of a picked-up image.

  FIG. 14 shows a configuration of an imaging apparatus 100 including a CCD solid-state imaging device. The imaging apparatus 100 includes a CCD solid-state imaging device 102, a timing control circuit 104, and a drive driver 106. The CCD solid-state imaging device 102 includes an imaging unit 2i, a storage unit 2s, a horizontal transfer unit 2h, and an output unit 2d. The timing control circuit 104 receives a clock pulse of a predetermined frequency and an external control signal, and generates a control signal for controlling imaging, vertical transfer, horizontal transfer, and output of the CCD solid-state image sensor 102. The control signal is input to the drive driver 106. The drive driver 106 receives a control signal from the timing control circuit 104, and outputs a clock pulse to each of the imaging unit 2i, the storage unit 2s, the horizontal transfer unit 2h, and the output unit 2d of the CCD solid-state imaging device 102 at a necessary timing. Output.

  The CCD solid-state imaging device 102 receives a clock from the drive driver 106 and performs imaging, vertical transfer, horizontal transfer, and output. In the imaging unit 2i, light receiving pixels are arranged in a matrix, and light incident on the imaging unit 2i is photoelectrically converted by the light receiving pixels constituting each bit to generate information charges. By applying the vertical transfer clock, the two-dimensional array of information charges generated in the imaging unit 2i is transferred to the storage unit 2s at high speed by the vertical shift register of the imaging unit 2i. As a result, the information charge for one frame is held in the vertical shift register of the storage unit 2s. Subsequently, the information charges are transferred from the storage unit 2s to the horizontal transfer unit 2h line by line. Furthermore, by applying a horizontal transfer clock, information charges are transferred from the horizontal transfer unit 2h to the output unit 2d in units of pixels. The output unit 2d converts the charge amount for each pixel into a voltage value, and the change in the voltage value is used as the output of the CCD.

The imaging unit 2i and the storage unit 2s are configured by a vertical shift register formed in the surface region of the semiconductor substrate, as shown in the plan view inside the element of FIG. The vertical shift register includes a plurality of channel regions 22 defined by separation regions 14 extending in parallel to each other in the vertical direction (vertical direction in FIG. 15), and a plurality of transfer electrodes 24-1 intersecting the channel region 22. To 24-3. In the conventional solid-state imaging device, a set of three adjacent transfer electrodes 24-1, 24-2, 24-3 constitutes one pixel. Information charges generated by the imaging unit 2i are transferred by applying transfer clocks φ _{1 to} φ ₃ having a predetermined cycle to each of the set of transfer electrodes 24-1, 24-2, 24-3. be able to.

  FIG. 16 shows the potential distribution in the N well 12 along the channel region 22 during imaging. At the time of imaging, one transfer electrode (for example, transfer electrode 24-2) of the set of transfer electrodes 24-1, 24-2, 24-3 is turned on, and the remaining transfer electrodes (for example, transfer electrodes) 24-1 and 24-3) are turned off to form the potential well 50 in the channel region 22 under the transfer electrode that is turned on. Information charges generated in each pixel are accumulated in the potential well 50.

At the time of transfer, as shown in FIG. 17, three-phase transfer clocks φ _{1 to} φ ₃ are applied for each combination of the three transfer electrodes 24-1, 24-2, 24-3 constituting one pixel, and the transfer electrodes Information charges are transferred by controlling the potential of the channel region 22 below 24-1, 24-2, 24-3.

  Further, in a CCD solid-state imaging device for a color image, as shown in FIG. 6, filters that transmit red (R) and filters that transmit green (G) are alternately arranged along the vertical transfer direction. A matrix-like pixel arrangement is obtained by alternately arranging columns and columns in which filters that transmit green (G) and filters that transmit blue (B) are alternately arranged in a direction crossing the vertical transfer direction. The color image can be acquired.

JP 2001-166284 A JP-A-6-112467

  However, in the conventional imaging apparatus and the control method thereof, information charges are sequentially sent out for each transfer electrode to perform transfer. As a result, the vertical transfer time becomes long, and there is a problem that a high-quality image cannot be obtained.

  For example, when the image pickup unit 2i is not provided with a mechanical shutter, or when shooting continuously without closing the shutter as in moving image shooting, the light is incident on each pixel of the image pickup unit 2i even during the period during which charges are transferred. Electric charges continue to be generated by the continued light. This electric charge causes noise called smear. The charge that causes noise is called smear charge. As the time for transferring information charges from the imaging unit 2i to the storage unit 2s becomes longer, the amount of smear charge increases, and the captured image remains as strong noise.

  Further, in the case where imaging is performed with only one of the pair of transfer electrodes being turned on in the imaging unit 2i, the amount of charge that can be accumulated in the potential well at the time of imaging is limited, and the imaging target having high luminance Sufficient sensitivity and dynamic range could not be obtained when receiving light from Furthermore, the amount of information charges generated during the imaging period may exceed the capacity of the potential well, and the dynamic range of the obtained image may be reduced.

  An object of the present invention is to provide an imaging apparatus, an imaging apparatus control apparatus, and an imaging apparatus control method capable of obtaining a higher quality image in view of the above-described problems of the related art.

  The present invention includes an imaging unit including a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes a plurality of transfer electrodes that extend in a direction that intersects the transfer direction of the information charges. An imaging device for storing and transferring information charges generated in response to light incident on a pixel by using a potential well formed by the action of a transfer electrode, which is continuous along the transfer direction of the information charges The 12 transfer electrode groups are set as one set, and any one of 8-phase clock pulses is applied to each transfer electrode included in the set.

  Information charges are accumulated in a plurality of potential wells that are substantially separated from each other during imaging by applying 8-phase independent clock pulses to any one of the transfer electrodes included in a set of transfer electrodes. At the time of transfer, the information charges are transferred by applying substantially in-phase clock pulses to every two transfer electrodes that are continuous along the transfer direction.

  It is also preferable to transfer information charges accumulated in at least two potential wells at the time of imaging after adding and synthesizing them along the transfer direction. At this time, it is preferable that the information charges to be added and combined are information charges accumulated in at least two potential wells in imaging periods having different lengths. Thereby, even when strong light is incident, it is possible to estimate a signal corresponding to an ideal amount of information charge that should be accumulated in each pixel.

  More specifically, the one set of transfer electrode groups includes first to twelfth transfer electrodes arranged in order along the information charge transfer direction, and the first transfer electrode and the seventh transfer electrode. A first phase clock pulse is applied to the electrodes, a second phase clock pulse is applied to the second transfer electrode, and a third phase clock pulse is applied to the third transfer electrode and the ninth transfer electrode. The fourth phase clock pulse is applied to the fourth transfer electrode and the tenth transfer electrode, the fifth phase clock pulse is applied to the fifth transfer electrode, and the sixth transfer electrode and the tenth transfer electrode A sixth phase clock pulse is applied to the 12 transfer electrodes, a seventh phase clock pulse is applied to the eighth transfer electrode, and an eighth phase clock pulse is applied to the eleventh transfer electrode. A configuration is preferable.

  When a color image is to be photographed, the pixel group in which the one set of transfer electrode groups is arranged accumulates information charges generated in response to one of two or more different wavelength regions. Thus, it is preferable that three transfer electrodes continuous along the information charge transfer direction correspond to a pixel that stores information charges generated in response to one wavelength region.

  Such an imaging device has a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes a plurality of transfer electrodes that extend in a direction that intersects the transfer direction of the information charges. A control device for an imaging device including an imaging unit and storing and transferring information charges generated in response to light incident on a pixel using a potential well formed by the action of a transfer electrode, This can be realized by providing a control device that applies one of the eight-phase clock pulses to each transfer electrode included in one set of twelve transfer electrode groups that are continuous along the transfer direction. .

  Accordingly, the image sensor includes a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes an imaging unit that includes a plurality of transfer electrodes extended in a direction intersecting the information charge transfer direction. A control method of an imaging apparatus for storing and transferring information charges generated in response to light incident on a pixel by using a potential well formed by the action of a transfer electrode, wherein the information charges are transferred along the information charge transfer direction. A control method of applying any one of eight-phase clock pulses to each of the transfer electrodes included in one set can be realized with a set of twelve transfer electrode groups as one set.

  According to the present invention, a high-quality image can be obtained in an imaging apparatus including a CCD solid-state imaging device. In particular, it is possible to perform high-speed imaging when capturing a moving image, and to increase sensitivity and dynamic range during imaging. In addition, it is possible to suppress or eliminate smear that occurs during transfer.

  As shown in FIG. 1, the imaging apparatus 200 according to the embodiment of the present invention includes a CCD solid-state imaging device 202, a timing control circuit 204, a drive driver 206, and an output signal processing unit 208.

  The CCD solid-state imaging device 202 includes an imaging unit 2i, a storage unit 2s, a horizontal transfer unit 2h, and an output unit 2d. The timing control circuit 204 receives a clock pulse of a predetermined frequency and an external control signal, and generates a control signal for controlling imaging, vertical transfer, horizontal transfer, and output of the CCD solid-state imaging device 202. These control signals are input from the timing control circuit 204 to the drive driver 206. The drive driver 206 receives a control signal from the timing control circuit 204, and sends clock pulses to the image pickup unit 2i, storage unit 2s, horizontal transfer unit 2h, and output unit 2d of the CCD solid-state image pickup device 202 at necessary timings. Output. The output signal processing unit 208 performs processing such as smear removal on the output signal of the CCD solid-state imaging device 202 output from the output unit 2d, and then outputs the output signal to the outside of the apparatus.

  As in the prior art, the imaging unit 2i and the storage unit 2s are each composed of a plurality of channel regions extending in parallel to each other in the vertical direction (vertical direction in FIG. 1) and a plurality of transfer electrodes intersecting the vertical shift region. Each bit of each shift register functions as one of light receiving pixels arranged as a two-dimensional matrix.

  As shown in FIGS. 2 to 4, the imaging unit 2 i includes a plurality of shift registers formed in the surface region of the semiconductor substrate 10. FIG. 2 is a schematic plan view showing a part of the imaging unit 2i of the present application, and FIGS. 3 and 4 are side sectional views taken along lines CC and DD in FIG. 2, respectively.

  As shown in FIGS. 3 and 4, the imaging unit 2 i in the present embodiment has the same cross-sectional structure as the imaging unit in the conventional imaging device. That is, a P-well (PW) 11 is formed in an N-type semiconductor substrate 9, an N-well 12 is formed thereon, and an N-well in which N-type impurities are added to the surface region of the P-well 11 at a high concentration. 12 is formed. Further, isolation regions 14 made of P-type impurity regions are formed in the N well 12 in parallel with each other at a predetermined interval. The isolation region 14 forms a potential barrier between adjacent channel regions, and a region sandwiched between the isolation regions 14 is electrically partitioned to become a channel region 22 that is a transfer path of information charges.

  An insulating film 13 is formed on the surface of the semiconductor substrate 9. As shown in FIG. 2, a plurality of transfer electrodes 30 (30-1 to 30-12) made of a polysilicon film or the like are parallel to each other so as to be orthogonal to the extending direction of the channel region 22 with the insulating film 13 interposed therebetween. Repeatedly placed.

  In the present embodiment, an imaging apparatus 200 that captures a color image will be described. The imaging apparatus 200 that captures a color image has a matrix pixel arrangement in which pixels that accumulate information charges generated in response to wavelength components of different colors are repeatedly arranged at a predetermined period. For example, as shown in FIG. 5, a filter 32-R that transmits red (R) and a filter 32-G that transmits green (G) each including three transfer electrodes that are continuous in the vertical transfer direction as a set, Are arranged in the vertical transfer direction. The row 34-1 is alternately arranged, and the row 34-2 is alternately arranged with the filter 32-B that transmits blue (B) and the filter 32-G that transmits green (G). Are alternately arranged in the direction intersecting As a result, as shown in FIG. 6, a pixel array is formed in which R, G, and B pixels each controlled by a plurality of electrodes (three in this case) are arranged in a matrix.

In the present embodiment, twelve adjacent transfer electrodes 30-1 to 30-12 are set as one set of transfer electrode groups, and each of transfer electrodes 30-1 to 30-12 included in one set of transfer electrode groups is set to eight. Imaging and information charge transfer are performed by applying any _{one of the} phase clock pulses φ _{1 to} φ ₈ . Specifically, clock pulses phi ₁ to the transfer electrodes 30-1, clock pulses phi ₂ to the transfer electrodes 30-2, clock pulses phi ₃ to the transfer electrodes 30-3, clock pulses phi ₄ to the transfer electrodes 30-4, transfer clock pulses phi ₅ to the electrodes 30-5, transfer clock pulses phi ₆ to the electrodes 30-6, transfer clock pulses phi ₁ to the electrodes 30-7, clock pulses phi ₇ to the transfer electrodes 30-8, the clock to the transfer electrodes 30-9 A pulse φ ₃ , a clock pulse φ ₄ is applied to the transfer electrode 30-10, a clock pulse φ ₈ is applied to the transfer electrode 30-11, and a clock pulse φ ₆ is applied to the transfer electrode 30-12.

Imaging (accumulation of information charges) and transfer of information charges in the imaging apparatus 200 are performed by independently applying voltages of clock pulses φ _{1 to} φ ₈ applied to the transfer electrodes 30-1 to 30-12 using the timing control circuit 204. It can be done by controlling. FIG. 7 shows a timing chart from imaging to transfer, and the control of the transfer electrode will be described. Further, in FIG. 8 shows a change of the potential in each transfer electrode 30-1～30-12 lower at time T ₁ through T _8. The horizontal axis indicates the position along the transfer direction in the imaging unit 2i, and the vertical axis indicates the potential at each position. At this time, the lower side in the figure is the positive potential side and the upper side is the negative potential side.

The driving driver 206 receives the control signal from the timing control circuit 204 and applies clock pulses φ _{1 to} φ ₈ to the transfer electrodes 30-1 to 30-12, respectively. The N-type semiconductor substrate (N-SUB) 10 of the CCD solid-state imaging device 202 is fixed to the substrate potential _Vsub .

Time T ₀ is an initial state before imaging. At this time, all of the clock pulses φ _{1 to} φ ₈ are turned off, and no potential well is formed under the transfer electrodes 30-1 to 30-12 as shown in FIG. Is done.

At time T ₁ , the clock pulse is controlled so that potential wells are formed in the pixels at both ends of the pixel group made into one set. Here, clock pulses φ ₂ , φ ₅ , φ ₇ , and φ ₈ are turned on, and potential wells are formed under the transfer electrodes 30-2, 30-5, 30-8, and 30-11. Information charges generated in response to light incident around the transfer electrodes 30-2, 30-5, 30-8, and 30-11 in the on state are accumulated in these potential wells.

  In the present embodiment, for example, in the row 34-1 of the CCD solid-state imaging device 202 shown in FIG. 5, a set of R, G, R, G is repeatedly arranged from the left as shown in FIG. The information charge generated according to the red wavelength component is stored in the corresponding pixel, and the information charge generated according to the green wavelength component is stored in the pixel corresponding to G. Similarly, the information charges corresponding to the blue wavelength component and the green wavelength component are accumulated in the columns where B and G are repeatedly arranged.

At time T _2, the discharge of the information charges is performed. Clock pulses phi ₅ and phi ₇ is applied to the transfer electrodes 30-5 and 30-8 in the transfer immediately before the start of the information charges from the time T ₃ is turned off, it has been accumulated in the potential well under the electrodes Information charges are discharged to the substrate 10. As a result, information charges in the red wavelength region and information charges in the green wavelength region are accumulated in the potential wells formed under the transfer electrodes 30-2 and 30-11, respectively.

At time T ₃ , information charges are rearranged. Information charges are collected in one potential well. At time T ₃ , the clock pulses φ ₃ , φ ₄ , and φ ₇ are turned on in addition to the clock pulses φ ₂ and φ ₈ , and information stored in the potential wells under the transfer electrodes 30-2 and 30-11. The charge is dispersed in a potential well formed under a plurality of electrodes.

In the time T ₄ or later, the transfer of information charge is started. At this time, the transfer is performed by supplying substantially in-phase clock pulses to at least two transfer electrodes continuous in the transfer direction. In the present embodiment, as shown in the timing chart of FIG. 7, a set of clock pulses φ ₁ and φ ₆ , a set of φ ₂ , φ ₃ and φ _{7, and} a set of φ ₄ , φ ₅ and φ ₈ are Each is driven in phase. As a result, as shown in FIG. 8, a set of the transfer electrode 30-12 and the transfer electrode 30-1, and a set of the transfer electrode 30-6 and the transfer electrode 30-7 which are continuously arranged along the transfer direction. Are driven in the same phase, the set of the transfer electrode 30-2 and the transfer electrode 30-3 and the set of the transfer electrode 30-8 and the transfer electrode 30-9 are driven in the same phase, and the transfer electrode 30-4 and the transfer electrode 30- 5 and the transfer electrode 30-10 and the transfer electrode 30-11 are driven in the same phase, and information charges are sequentially transferred with a potential well formed below two continuous transfer electrodes as one transfer unit. The

Specifically, as shown in FIG. 7, at time T ₄ , clock pulses φ ₁ , φ ₄ , φ ₅ , φ ₆ , φ ₈ are turned off, and clock pulses φ ₂ , φ ₃ , φ ₇ are turned on, At time T ₅ , clock pulses φ ₁ and φ ₆ are turned off, clock pulses φ ₂ , φ ₃ , φ ₄ , φ ₅ , φ ₇ , and φ ₈ are turned on, and at time T ₆ , clock pulses φ ₁ , φ ₂ , φ ₃ , φ ₆ , φ ₇ are turned off, and clock pulses φ ₄ , φ ₅ , φ ₈ are turned on. Thus, as shown in FIG. 8, at time T ₄ and the transfer electrodes 30-2 to set and the potential wells formed under the set of transfer electrodes 30-8 and the transfer electrode 30-9 of the transfer electrodes 30-3 The stored information charges are transferred to a potential well newly formed under the pair of transfer electrode 30-4 and transfer electrode 30-5 and the pair of transfer electrode 30-10 and transfer electrode 30-11. Further, at time T ₇ , clock pulses φ ₂ , φ _3, and φ ₇ are turned off, clock pulses φ ₁ , φ ₄ , φ ₅ , φ ₆ , and φ ₈ are turned on, and at time T ₈ , clock pulses φ ₂ , φ _{3, φ 4, φ 5,} φ 8 is turned off, the clock pulses phi ₁ and phi ₆ is turned on. Thus, as shown in FIG. 8, the set and the potential wells formed under the set of transfer electrodes 30-10 and the transfer electrodes 30-11 of the transfer and the transfer electrode 30-4 at time T ₆ electrodes 30-5 The stored information charges are transferred to a potential well newly formed under the pair of the transfer electrode 30-12 and the transfer electrode 30-1 and the pair of the transfer electrode 30-6 and the transfer electrode 30-7. Similarly, information charges can be sequentially transferred by changing the clock pulses φ _{1 to} φ ₈ applied to the transfer electrodes 30-1 to 30-12. Similarly, transfer is performed for other columns.

In this embodiment, a set of clock pulses φ ₁ and φ ₆ , a set of φ ₂ , φ ₃ and φ _{7, and} a set of φ ₄ , φ ₅ and φ ₈ are driven completely in phase, respectively. As shown in FIG. 9, the clock pulses supplied to the transfer electrodes in each set so that the potential varies smoothly along the transfer direction, as shown in FIG. May be delayed. By providing such a delay, information charges can be transferred smoothly.

  Thus, at the time of transfer, by controlling a plurality of transfer electrodes as a set, information charges can be transferred from the imaging unit 2i at high speed. As a result, it is possible to suppress smear that occurs during transfer. For example, when two transfer electrodes are collectively controlled as in the present embodiment, transfer can be performed at a transfer rate approximately twice that of the conventional control method. A similar transfer method can be applied to the storage unit 2s.

  As described above, according to the present embodiment, high-speed transfer of information charges can be realized in the imaging unit 2i and the storage unit 2s, and a high-quality image in which generation of smear charges is suppressed can be obtained. . Therefore, even when a mechanical shutter is provided in the imaging unit 2i, when performing high-speed transfer with low resolution continuously like a moving image, imaging can be continuously performed with the shutter opened. Further, by reducing the number of clock pulses that need to be controlled to 8 phases, it is possible to easily control the clock pulses while realizing high-speed transfer.

  Further, the number of phases of the smallest clock pulse for controlling the transfer of information charges by collecting the potential wells under the plurality of transfer electrodes is eight, and the number of electrode terminals provided in the imaging device can be minimized. It is most suitable for reducing the size.

As in the prior art, transfer is performed to the transfer electrodes 30-1 to 30-3, 30-4 to 30-6, 30-7 to 30-9, and 30-10 to 30-12 corresponding to one pixel. electrodes _{30-1 (φ 1), 30-4 (} φ 4), 30-7 (φ 1), 30-10 (φ 4), transfer electrodes _{30-2 (φ 2), 30-5 (} φ 5) _{, 30-8 (φ 7), 30-11} (φ 8), transfer electrodes _{30-3 (φ 3), 30-6 (} φ 6), 30-9 (φ 3), 30-12 (φ 6) And can be controlled by clock pulses having the same phase. As described above, by sequentially transferring information charges for each transfer electrode, it is possible to capture a high-resolution image and perform low-speed transfer.

  In this embodiment, an imaging apparatus including a frame transfer type CCD solid-state imaging device is targeted. However, the scope of application of the present invention is not limited to this. For example, the present invention can also be applied to an imaging device including an interline CCD solid-state imaging device.

<Modification 1>
By applying the control method of the imaging apparatus in the above embodiment, an ideal information charge amount is estimated when strong light that generates information charges exceeding the saturation level of the potential well is incident during imaging. You can also. However, since the present invention is not limited to color photography but limited to monochrome photography, an imaging apparatus that does not include a color filter will be described below.

FIG. 10 shows a timing chart at the time of imaging and rearrangement, and the control of the transfer electrode will be described. Further, in FIG. 11 shows a change of the potential in each transfer electrode 30-1～30-12 lower at time T ₁ through T ₃ in FIG. 10. The horizontal axis indicates the position along the transfer direction in the imaging unit 2i, and the vertical axis indicates the potential at each position. At this time, the lower side in the figure is the positive potential side and the upper side is the negative potential side.

The driving driver 206 receives the control signal from the timing control circuit 204 and applies clock pulses φ _{1 to} φ ₈ to the transfer electrodes 30-1 to 30-12, respectively, as shown in FIGS. The N-type semiconductor substrate (N-SUB) 10 of the CCD solid-state imaging device 202 is fixed to the substrate potential _Vsub .

At time T ₀ , all of the clock pulses φ _{1 to} φ ₉ are turned off, and no potential well is formed under the transfer electrodes 30-1 to 30-12 as shown in FIG. Is discharged. At time T ₁ , only the clock pulses φ ₂ and φ ₈ are turned on, and a potential well is formed under the transfer electrodes 30-2 and 30-11. Information charges generated in response to light incident around the transfer electrodes 30-2 and 30-11 in the on state are accumulated in these potential wells. Next, at time T _2, in addition to the clock pulses phi ₂ and phi _8, clock pulses phi ₅ and phi ₇ are turned on, the potential well is formed below the transfer electrodes 30-5 and 30-8. Information charges generated in response to light incident around the transfer electrodes 30-5 and 30-8 in the on state are accumulated in these potential wells. At time T ₃ , information charges are rearranged. The rearrangement is executed so that the information charges accumulated in the transfer electrodes 30-2 and 30-5 are collected and the information charges accumulated in the transfer electrodes 30-8 and 30-11 are collected. Hereinafter, like the time T ₄ after the above-mentioned embodiment the information charges are transferred.

That is, during imaging, a potential well is formed under the transfer electrode 30-2 and the transfer electrode 30-11 for an on-gate period T _H equal to the imaging period T, and under the transfer electrodes 30-5 and 30-8. A potential well is formed for an on-gate period T _L shorter than the period T _H.

At this time, it is preferable that the timing control circuit 204 controls the on-gate periods T _H and T _L according to the maximum signal strength in the previous frame. Control is performed such that the smaller the maximum signal strength, the longer the off-gate period, and the larger the maximum signal strength, the longer the on-gate period. This is to control the imaging period by utilizing the fact that the maximum signal intensity included in continuously captured images does not tend to change greatly. When a long time has elapsed since the previous imaging or when it is desired to ensure a sufficient dynamic range, a maximum image intensity is detected by temporarily capturing and outputting an image of one frame, and the maximum signal It is preferable to perform actual imaging after setting the imaging period based on the intensity.

When the light incident on the pixel of the imaging unit 2i is weak, as shown in FIG. 12, the information charge (inclination of the line E in FIG. 12) accumulated in the potential well of each pixel per unit time becomes small. In such a case, the information charges Q _{H, total} and Q _{L, total} accumulated in the on-gate periods T _H and T _L are smaller than the saturation level Q _max of each potential well, so that a sufficient dynamic range can be secured. it can.

When the light incident on the pixel of the imaging unit 2i is strong, as shown in FIG. 13, the information charge accumulated in the pixel per unit time (the slope of the line F in FIG. 13) becomes large, and the long on-gate period T _H The information charge Q _{H, total} stored in the potential well under the transfer electrode 30-2 that is in the ON state only exceeds the saturation level of the potential well. On the other hand, the information charge Q _{L, total} stored in the potential well below the transfer electrode 30-7 that is in the on state only for a short on-gate period T _L does not exceed the saturation level of the potential well. Therefore, the output information charge amount Q _total which is the sum of the information charges Q _{H, total} and Q _{L, total} exhibits knee characteristics as shown by the line G in FIG.

The information charge amount Q _{H, total} accumulated in the on-gate period T _H can be calculated from the output information charge amount Q _total using Equation (1). Similarly, the information charge amount Q _{L, total} accumulated in the short on-gate period T _L can be calculated from the output information charge amount Q _total using Equation (2). However, when the information charge amount Q _{H, total} calculated in this way is calculated as a value exceeding the saturation level Q _max of the potential well corresponding to one transfer electrode, it is incident on the pixel of the imaging unit 2i. Therefore, the information charge amount Q _{H, total} and the information charge amount Q _{L, total} need to be recalculated by the equations (3) and (4), respectively. The saturation level Q _max in the imaging unit 2 i of the CCD solid-state imaging device 202 can be obtained in advance.

Assuming that there is no effect of smear charges generated in the imaging unit 2i during transfer, the information charge amount Q _{L, total} accumulated in the short on-gate period T _L and a sufficient capacity not to saturate the potential well are provided. equal to the ratio Q _{L, total} / Q _ideal ratio of oN-gate period T _L / T _H of the ideal information charges Q _ideal to be accumulated in one pixel of the potential well in the long-gate period T _H when there . Therefore, the ideal information charge amount Q _ideal can be calculated based on Equations (5) and (6).

By examining the saturation level Q _max of the potential well per pixel (or the output signal value corresponding to the saturation level Q _max ) in _advance , the ideal output information charge amount Q _itotal to be accumulated in the imaging period is _determined . Can be sought.

Therefore, the _ideal output signal S _ideal can be obtained by performing the above processing in the output signal processing unit 208 based on the output signal from the CCD solid-state imaging device 202. That is, the ideal output signal S _ideal since is a signal proportional to the information amount of charge Q _Itotal, it is possible to calculate the output signal S _ideal by applying a predetermined coefficient information charge amount Q _Itotal.

As described above, according to the first modification, even when the light incident on the pixels of the imaging unit 2i is strong by accumulating information charges in different on-gate periods T _H and T _L in one set of pixel groups. Therefore, it is possible to obtain the correct information charge amount and output signal according to the light intensity. Therefore, a sufficient dynamic range can be obtained in the image signal.

When smear charges are generated in the imaging unit 2i during transfer, the output signal processing unit 208 applies a general offset smear removal method based on the calculated ideal information charge amount Q _ideal. Thus, it is possible to remove smear charges superimposed at the time of transfer.

It is a block diagram which shows the structure of the imaging device in embodiment of this invention. It is a figure which shows the top view of the internal structure of the imaging part of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows sectional drawing of the internal structure of the imaging part of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows sectional drawing of the internal structure of the imaging part of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows arrangement | positioning of the color filter of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the arrangement | sequence of the color filter of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the timing chart of the clock pulse supplied to the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the state change of the potential under each transfer electrode in embodiment of this invention. It is a figure which shows a state change when the potential under each transfer electrode is changed smoothly in embodiment of this invention. It is a figure which shows the timing chart of the clock pulse supplied to the CCD solid-state image sensor in the modification 1 of embodiment of this invention. It is a figure which shows the state change of the potential under each transfer electrode in the modification 1 of embodiment of this invention. It is a figure explaining the mode of accumulation | storage of the information charge in the imaging period in the modification 1 of embodiment of this invention. It is a figure explaining the mode of accumulation | storage of the information charge in the imaging period in the modification 1 of embodiment of this invention. It is a block diagram which shows the structure of the conventional imaging device. It is a figure which shows the top view of the internal structure of the imaging part of the conventional CCD solid-state image sensor. It is a figure explaining accumulation | storage of the information charge at the time of imaging. It is a figure which shows the timing chart of the clock pulse supplied to the transfer electrode at the time of the imaging in the conventional CCD solid-state image sensor, and transfer.

Explanation of symbols

  2d output unit, 2i imaging unit, 2h horizontal transfer unit, 2s storage unit, 9 semiconductor substrate, 10 semiconductor substrate (N-SUB), 11, 12 well, 13 insulating film, 14 isolation region, 22 channel region, 24 transfer electrode , 30 transfer electrode, 32 filter, 34 pixel row, 50 potential well, 100 imaging device, 102 CCD solid-state imaging device, 104 timing control circuit, 106 drive driver, 200 imaging device, 202 CCD solid-state imaging device, 204 timing control circuit 206 Drive driver, 208 Output signal processing unit.

Claims (10)

It has a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes an imaging unit that includes a plurality of transfer electrodes extended in a direction crossing the information charge transfer direction,
An imaging device that accumulates and transfers information charges generated in response to light incident on a pixel using a potential well formed by the action of a transfer electrode,
An image pickup characterized in that a group of twelve transfer electrodes continuous along the information charge transfer direction is one set, and any one of eight-phase clock pulses is applied to each transfer electrode included in the set. apparatus. The imaging device according to claim 1,
During imaging, information charges are accumulated in a plurality of potential wells substantially separated from each other,
At the time of transfer, the information charge is transferred by applying substantially in-phase clock pulses to every two transfer electrodes that are continuous along the transfer direction. The imaging device according to claim 1 or 2,
An image pickup apparatus that transfers information charges accumulated in at least two potential wells at the time of image pickup after being added and synthesized along a transfer direction. The imaging device according to claim 3.
The information charge to be added and combined is information charge accumulated in at least two potential wells in imaging periods of different lengths. In the imaging device according to any one of claims 1 to 4,
The one set of transfer electrode groups includes first to twelfth transfer electrodes arranged in order along a transfer direction of information charges,
A first phase clock pulse is applied to the first transfer electrode and the seventh transfer electrode,
A second phase clock pulse is applied to the second transfer electrode;
A third phase clock pulse is applied to the third transfer electrode and the ninth transfer electrode,
A fourth phase clock pulse is applied to the fourth transfer electrode and the tenth transfer electrode,
A fifth phase clock pulse is applied to the fifth transfer electrode;
A sixth phase clock pulse is applied to the sixth transfer electrode and the twelfth transfer electrode,
A seventh phase clock pulse is applied to the eighth transfer electrode;
An imaging device, wherein an eighth phase clock pulse is applied to the eleventh transfer electrode. In the imaging device according to any one of claims 1 to 4,
The pixel group in which the one set of transfer electrode groups is arranged accumulates information charges generated in response to any of two or more different wavelength regions,
An imaging apparatus, wherein three transfer electrodes that are continuous along a transfer direction of information charges correspond to pixels that store information charges generated in response to one wavelength region. The pixel includes a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes an imaging unit that includes a plurality of transfer electrodes that extend in a direction intersecting the information charge transfer direction. An imaging device for storing and transferring information charges generated in response to incident light using a potential well formed by the action of a transfer electrode;
A control device of
A control device characterized in that a group of twelve transfer electrodes continuous along the information charge transfer direction is set as one set, and any one of eight-phase clock pulses is applied to each transfer electrode included in the set. . The control device according to claim 7,
A control device characterized by applying substantially in-phase clock pulses to each of two transfer electrodes that are continuous along the transfer direction when transferring information charges. The pixel includes a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes an imaging unit that includes a plurality of transfer electrodes that extend in a direction intersecting the information charge transfer direction. An imaging device that stores and transfers information charges generated in response to incident light using a potential well formed by the action of a transfer electrode;
Control method,
A control method characterized in that one set of 12 transfer electrode groups that are continuous along the information charge transfer direction is applied to any one of eight-phase clock pulses to each transfer electrode included in one set. . The control method according to claim 9, wherein
A control method characterized by applying substantially in-phase clock pulses to each of two continuous transfer electrodes along the transfer direction when transferring information charges.

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