JP3515191B2 - Driving method of solid-state imaging device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a solid-state image pickup device having a color filter mounted thereon.

[0002]

2. Description of the Related Art In an image pickup apparatus such as a television camera using a CCD solid-state image pickup device, each scanning timing of the solid-state image pickup device is set on the basis of a synchronizing signal according to a predetermined television system, and has a format corresponding to the system. The video signal is taken out. For example, in the case of the NTSC system, the vertical scanning period is set to 1/60 seconds, the horizontal scanning period is set to 2/525 of the vertical scanning period, and a video signal in which video information is continuous in units of one horizontal scanning period is output. To be done.

FIG. 6 shows a frame transfer type CCD.
It is a block diagram which shows the structure of the imaging device using a solid-state image sensor. The solid-state imaging device 1 includes an imaging unit 1a that receives an image from a subject and generates information charges, a storage unit 1b that temporarily stores the information charges, a horizontal transfer unit 1c that horizontally transfers and outputs the information charges, and The output unit 1d converts the amount of information charges into a voltage value and outputs the voltage value. Drive clock generation circuit 2
Is composed of a frame transfer clock generator 2a, a vertical transfer clock generator 2b, and a horizontal transfer clock generator 2c, which operate in response to timing signals from the timing control circuit 3, respectively. Frame transfer clock generator 2
a generates a frame transfer clock φF in synchronism with the timing of vertical scanning and supplies it to the image pickup unit 1a of the solid-state image pickup device 1 to supply the information charges of the image pickup unit 1a for each screen within a blanking period of vertical scan. Transfer to the storage unit 1b. The vertical transfer clock generation unit 2b generates a vertical transfer clock φV in synchronization with the timing of horizontal scanning and supplies the vertical transfer clock φV to the storage unit 1b of the solid-state imaging device 1 to horizontally scan the information charges of the storage unit 1b for each row. Transfer to the horizontal transfer unit 1c within the blanking period. The horizontal transfer clock generation unit 2c generates the horizontal transfer clock φH in synchronization with the horizontal scanning timing, supplies the horizontal transfer clock φH to the horizontal transfer unit 1c, and transfers the information charges for one row transferred from the storage unit 1b within the horizontal scanning period. To output to the output unit 1d. The timing control circuit 3 generates a timing signal of a vertical scanning period and a horizontal scanning period based on the reference clock CK, and supplies it to each part of the drive clock generating circuit 2. Thereby, the imaging unit 1a
The information charges generated in 1 are transferred to and accumulated in the accumulation unit 1b in units of one screen at the timing of the start of the vertical scanning period. Then, the data is transferred from the storage unit 1b to the horizontal transfer unit 1c row by row at the timing of the start of the horizontal scanning period,
The data is transferred from the horizontal transfer unit 1c bit by bit to the output unit 1d.

The reset clock generating circuit 4 generates a reset clock φR in synchronization with the operation of the horizontal transfer clock generating section 2c and supplies it to the output section 1d of the solid-state image pickup device 1. The output portion 1d is provided with a diffusion region electrically independent from other regions called floating diffusion, and information charges accumulated in this diffusion region are transferred to the drain for discharging charges in response to the reset clock φR. Is discharged. That is, since the output unit 1d accumulates the information charges transferred from the horizontal transfer unit 1c in the diffusion region and obtains the voltage value from the fluctuation of the potential of the diffusion region, the information charges of the horizontal transfer unit 1c are output. It is configured to discharge the information charges in response to the reset clock φR each time one bit is transferred to 1d. As a result, the information charges transferred and output from the horizontal transfer unit 1c are converted into voltage values bit by bit, and the video signal Y1 (t) in which the reset level and the signal level corresponding to the amount of information charges are repeated is output.

The sampling circuit 5 is provided with a video signal Y1 (t).
Are taken in, sampled at a timing according to the sampling clock φS, and output as a video signal Y2 (t).
Similar to the reset clock generating circuit 4, the sampling clock generating circuit 6 generates a sampling clock φS in synchronization with the operation of the horizontal transfer clock generating section 2c and supplies it to the sampling circuit 5. The sampling clock φS is in phase during the period in which the voltage value corresponding to the amount of information charges is output from the output unit 1d of the solid-state imaging device 1, and the sampling signal φS of the video signal Y1 (t) output from the output unit 1d is output. Of which
Only the signal level is extracted and the video signal Y2 (t) is generated.

The video signal Y2 (t) output in this way
After that, the signal is sent to a recording medium or a reproduction monitor through signal processing such as automatic gain control and gamma correction. When performing color imaging in the imaging device as described above, a color filter is attached to the imaging unit 1a of the solid-state imaging device 1, and each light receiving pixel is associated with a specific color component. For example, a mosaic type color filter composed of four color components a, b, c, and d is attached to the image pickup unit 1a of the solid-state image pickup device 1, and as shown in FIG. 7, a horizontal transfer clock φH is generated in each horizontal scanning period. The video signal Y1 (t) in which the color components a and b or c and d are alternately repeated in a cycle corresponding to Then, such a video signal Y2 (t) is subjected to processing such as color component separation, color balance adjustment, and color difference matrix calculation in the signal processing circuit. Therefore, when color imaging is performed, the signal processing circuit becomes more complicated than when monochrome imaging is performed, and the cost of the apparatus is significantly increased.

[0007]

By the way, in an image pickup apparatus used for various purposes such as a surveillance camera and an intercom other than a video camera, there are a case where a color image is taken and a case where a monochrome image is taken according to the purpose. To be selected. In recent years, color imaging is often selected for general purposes, but in simple surveillance cameras and the like, monochrome imaging may be selected to reduce the cost of the apparatus.

However, the solid-state image pickup device for color image pickup, in which the color filter is mounted on the image pickup section, cannot be used for monochrome image pickup as it is. For example, Japanese Patent Application No. 2-199585 (JP-A-4-8457).
As shown in No. 5), when considering a solid-state image sensor configured to distribute and output odd-numbered vertical shift registers and even-numbered vertical shift registers, each color component is 1 when color imaging is performed. Since the data is read out in a row-separated state, the processing of the video signal becomes easy. On the other hand, in the case of monochrome imaging, since information for one line is output in two divisions, a signal processing circuit corresponding to monochrome imaging that uses normal analog signal processing can perform predetermined signal processing. Disappear. Therefore, the solid-state image pickup device for monochrome image pickup and the solid-state image pickup device for color image pickup need to have different configurations, which is a factor of increasing the manufacturing cost of the solid-state image pickup device.

Therefore, an object of the present invention is to enable monochrome image pickup by using a solid-state image pickup device for color image pickup to which a color filter is attached.

[0010]

The present invention has been made to solve the above-mentioned problems, and is characterized in that it is arranged in a row direction and a column direction, and an odd column is arranged in each row. Each light receiving pixel is provided in a plurality of vertical shift registers provided with a plurality of light receiving pixels to which the first color component is applied and to which the second color component is applied to even columns, and which are arranged corresponding to each column of the light receiving pixels. Received in the vertical direction and transferred in the vertical direction,
The information charge output from each vertical shift register is received by each bit of the horizontal shift register and transferred in the horizontal direction, and at the same time, the information charge output from the horizontal shift register is accumulated in the output unit in pixel units and the amount of information charge is increased. In a method of driving a solid-state image pickup device for extracting a voltage value corresponding to, the information charges for one row from the odd columns of the plurality of vertical shift registers are transferred to the horizontal shift register, and subsequently, for one row from the even columns. The information charge is transferred to the horizontal shift register to synthesize two pixels, and then transferred from the horizontal shift register to the output section.

In the first operation mode, the information charges of one row from the odd columns of the plurality of vertical shift registers are transferred to the horizontal shift register, and subsequently the information charges of one row from the even columns are transferred. After transferring to the horizontal shift register and synthesizing two pixels, it is transferred from the horizontal shift register to the output section. In the second operation mode, information charges for one row from an odd number column of the plurality of vertical shift registers are transferred. To the horizontal shift register, and then from the horizontal shift register to the output section, and then to transfer information charges for one row from the even column to the horizontal shift register, and then from the horizontal shift register to the output section. It is characterized by transferring to.

[0012]

According to the present invention, at the stage of transferring the information charges from the vertical shift register to the horizontal shift register, the information charges from the light receiving pixels in the odd columns and the information charges from the light receiving pixels in the even columns are combined by two pixels. To be done. By combining the information charge corresponding to the first color component and the information charge corresponding to the second color component, it is possible to generate information indicating the brightness, and convert the combined information charge into a voltage value. By outputting, a video signal representing a monochrome video can be obtained.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a plan view showing the structure of a solid-state image pickup device having a color filter mounted thereon. FIG. 2 is a timing diagram illustrating a driving method when monochrome imaging is performed by the solid-state imaging device, and FIG. 3 is a timing diagram illustrating a driving method when color imaging is performed by the solid-state imaging device. In this figure, the light receiving pixels of the image pickup section are shown in 6 rows × 8 columns for the sake of simplification of the drawing.

The image pickup section 11 is composed of a plurality of vertical shift registers arranged in parallel with each other, and each of the vertical shift registers is divided into a plurality of bits to form a plurality of light receiving pixels arranged in a matrix. It A mosaic-type color filter including four color components a, b, c, and d is attached to the image pickup unit 11. Thereby, in the light receiving pixels in the odd rows, the odd columns are associated with the first color component a and the even columns are associated with the second color component b.
In the light-receiving pixels in the even-numbered rows, the odd-numbered columns are associated with the third color component c and the even-numbered columns are associated with the fourth color component d. A frame transfer clock φF synchronized with the vertical scanning timing is applied to each vertical shift register of the image pickup unit 11, and information charges generated in each light receiving pixel are transferred to the storage unit 12. The storage unit 12 is composed of a plurality of vertical shift registers that are continuous with the vertical shift registers of the image pickup unit 11. These vertical shift registers are divided so as to correspond to the light receiving pixels of the image pickup unit 11 and transferred from the image pickup unit 11. It takes in information charges and temporarily stores them. A vertical transfer clock φV is applied to the vertical shift register of the storage unit 12,
The information charges transferred from the vertical shift register of the image pickup unit 11 are fetched and accumulated, and the accumulated information charges are vertically transferred in units of one row in synchronization with the horizontal scanning timing. The output side of these vertical shift registers is formed with one bit more in the even columns than in the odd columns, and the last bit of the even columns is driven by an auxiliary transfer clock φT different from the vertical transfer clock φV. As a result, the transfer timing of the information charges from the storage unit 12 to the horizontal transfer unit 13 is shifted by a predetermined period between the vertical shift registers in the odd columns and the vertical shift registers in the even columns. The horizontal transfer unit 13 is composed of one column of horizontal shift registers. This horizontal shift register is divided into a plurality of bits corresponding to every two columns of the vertical shift registers of the storage unit 12, and each vertical shift register of the storage unit 12 is divided. The information charges transferred from are taken into each bit.
A horizontal transfer clock φH synchronized with the horizontal scanning timing is applied to the horizontal shift register of the horizontal transfer unit 13.
The information charges transferred from the storage unit 12 to the horizontal transfer unit 13 are sequentially transferred and output in the horizontal direction within the horizontal scanning period. The output unit 14 is composed of a capacitor that receives the information charges output from the horizontal shift register of the horizontal transfer unit 13, an output amplifier that takes out a change in the potential of the capacitors, and a reset transistor that discharges the information charges accumulated in the capacitors. . A reset clock φR synchronized with the horizontal transfer clock φH is applied to the output unit 14, and the information charges output from the horizontal transfer unit 13 and accumulated in the capacitance in pixel units are sequentially discharged. As a result, the information charges transferred from the horizontal transfer unit 13 are converted into voltage values in 1-bit units, and the video signal Y1 (t) corresponding to the amount of information charges is output.

When monochrome imaging is performed by such a solid-state imaging device, various transfer clocks as shown in FIG. 2 are given. The vertical transfer clock φV is, for example, 3
It consists of phase clocks φV1 to φV3, and transfers the information charges of the storage unit 12 in the vertical direction for one row at the timing of the start of vertical scanning synchronized with the horizontal synchronizing signal HD. At this time, in the odd-numbered vertical shift registers, the information charge of the last bit is transferred to the horizontal shift register of the horizontal transfer unit 13.
In an even column vertical shift register, which has one bit more than an odd column, the information charges in the same row are held in the last bit of the vertical shift register. The auxiliary transfer clock φT that drives the final bit of the vertical shift register is composed of, for example, three-phase clocks φT1 to φT3, and the information charges are transferred to the final bit of the vertical shift register at the beginning of horizontal scanning together with the vertical transfer clock φV. After capturing, information charges are transferred from the final bit of the vertical shift register to the horizontal shift register of the horizontal transfer unit 13. The horizontal transfer clock φH is composed of, for example, two-phase clocks φH1 and φH2,
After the information charges in the vertical shift registers in the odd columns are transferred to the horizontal shift registers, and the information charges in the vertical shift registers in the even columns are transferred to the horizontal shift registers, the information charges are output to output unit 14 within the horizontal scanning period. Forward. The information charges transferred and output in this way are composed of two pixels of the information charges transferred from the vertical shift registers in the odd columns at the stage when the information charges in the vertical shift registers in the even columns are transferred to the horizontal shift registers. It is a thing. Therefore,
If the color components a, b, c, and d associated with each light-receiving pixel are set so that the sums of the odd-numbered rows and the even-numbered rows match, the information charges combined by the horizontal shift register are
Each row of light receiving pixels represents the same component. Therefore, luminance information can be represented by the combined information charge, and the video signal Y2 (t) obtained by sampling the video signal Y1 (t) output from the output unit 14 directly represents a monochrome video. There is.

On the other hand, when performing color image pickup by the same solid-state image pickup device, various transfer clocks as shown in FIG. 3 are given. The vertical transfer clock φV matches the case of FIG. As a result, the information charges of the storage unit 12 are vertically transferred for one row at the timing of the start of vertical scanning in synchronization with the horizontal synchronization signal HD. Then, in the odd-numbered vertical shift registers, the information charges of the final bit are transferred to the horizontal transfer unit 13
To the horizontal shift register, but 1 more than odd columns
In an even column vertical shift register having many bits, the information charges of the same row are held in the last bit of the vertical shift register. The auxiliary transfer clock φT for driving the last bit of the vertical shift register is composed of, for example, three-phase clock clocks φT1 to φT3, and the vertical transfer clock φV
In addition to capturing the information charges in the last bit of the vertical shift register at the beginning of horizontal scanning,
When the period of / 2 has elapsed, the information charges are transferred from the final bit of the vertical shift register to the horizontal shift register of the horizontal transfer section. The horizontal transfer clock φH is composed of, for example, two-phase clocks φH1 and φH2, and 1 / H of the horizontal scanning is performed every time the information charges are transferred from the vertical shift register of the storage unit 12 to the horizontal shift register of the horizontal transfer unit 13. In the period of 2, the information charges of 1/2 row are transferred to the output section 14.
In the odd-numbered horizontal scanning period, the information charges transferred and output in this manner are, for example, first in the first half of the horizontal scanning period.
The information charges representing the color component a are continuously output, and the information charges representing the second color component b are continuously output in the latter half. In the even-numbered horizontal scanning period, the information charges representing the third color component c are continuously output in the first half of the horizontal scanning period, and the information charges representing the fourth color component d are continuously output in the second half. become. Therefore, the video signal Y2 (t) obtained by sampling the video signal Y1 (t) output from the output unit 14 has a single color every half horizontal scanning period in each horizontal scanning period. Represents an ingredient.

The structure for outputting the information charges of the storage section 12 by dividing into an odd number column and an even number column is output in addition to forming the bit number of the vertical shift register by 1 bit more in the even number column and in addition to the horizontal transfer section 13. The method of controlling the potential of the above, a method of providing a transfer control electrode on the output side of the vertical shift register, and the like are conceivable. For example, a pair of transfer control electrodes whose arrangement order is switched between odd columns and even columns are provided on the output side of the vertical shift register, and the information charges in the vertical shift register are distributed between the odd columns and the even columns by the transfer control electrodes. Can be configured as.

FIG. 4 is a plan view showing a first structural example of a mosaic type color filter mounted on a solid-state image pickup device, which is composed of a combination of Ye (yellow), G (green) and Cy (cyan). The case is shown. The color filter is composed of first to fourth elements E1 to E4 corresponding to the first to fourth color components a, b, c and d, and the odd and first columns have first and second elements E1. , E2
Are alternately arranged, and the third and fourth elements E3 and E4 are alternately arranged in the even-numbered column. First element E
In the first element, Cy and Ye are arranged at a ratio of 2: 1, and in the second element E2, G and Ye are arranged at a ratio of 2: 1. In the third element E3, G and Cy are 2:
The fourth element E4 is arranged with Ye and C.
y and 2 are arranged at a ratio of 2: 1. Therefore, the respective color components a, b, c and d are represented as a = 2Cy + Ye b = 2G + Ye c = 2G + Cy d = 2Ye + Cy. Therefore, when the first color component a and the second color component b arranged in odd rows are combined, a + b = (2Cy + Ye) + (2G + Ye) = 2R + 6G + 2B. Similarly, when the third color component c and the fourth color component d arranged in the even rows are combined, b + d = (2G + Cy) + (2Ye + Cy) = 2R + 6G + 2B. Therefore, the composite components of the odd-numbered rows and the even-numbered rows match. In these components, each of R (red), G (green) and B (blue) components is 1: 3:
It is a composite of 1 and can be used as luminance information.

By the way, when performing color image pickup, it is possible to obtain a monochromatic color component by taking the difference between the color components of each row. For example, by taking the difference between the first color component a and the second color component b, it is possible to obtain the B component as | a−b | = (2Cy + Ye) − (2G + Ye) = 2Cy−2G = 2B, Similarly, if the difference between the third color component c and the second color component d is taken, then | c−d | = (2Ye + Cy) − (2G + Cy) = 2Ye−2G = 2R to obtain the R color component. You can

FIG. 5 is a plan view showing a second configuration example of a mosaic type color filter mounted on a solid-state image pickup device, which is a combination of R (red), G (green) and B (blue). The configuration is shown below. The color filter is
Similar to FIG. 4, it is composed of first to fourth elements E1 to E4 corresponding to the first to fourth color components a, b, c and d. The first element E1 has R, G and B of 1:
The second element E2 is arranged in a ratio of 3: 2, and the second element E2 is arranged in a ratio of R and G of 1: 3. In the third element E3, G and B are arranged in a ratio of 3: 1 and
In the element E4, R, G and B are arranged at a ratio of 2: 3: 1. Therefore, the respective color components a, b, c and d are expressed as a = R + 3G + 2B b = R + 3G c = 3G + B d = 2R + 3G + B. Therefore, when the first color component a and the second color component b arranged in odd rows are combined, a + b = (R + 3G + 2B) + (R + 3G) = 2R + 6G + 2B. Similarly, when the third color component c and the fourth color component d arranged in even rows are combined, c + d = (3G + B) + (2R + 3G + B) = 2R + 6G + 2B. Therefore, the composite components of the odd-numbered rows and the even-numbered rows match. In these components, each of R (red), G (green) and B (blue) components is 1: 3:
It is a composite of 1 and can be used as luminance information.

By the way, when performing color image pickup, as in the case of FIG. 4, it is possible to obtain a monochromatic color component by taking the difference between the color components for each row. For example, when the difference between the first color component a and the second color component b is taken, it is possible to obtain the B component by | a−b | = (R + 3G + 2B) − (R + 3G) = 2B. By taking the difference between the third color component c and the second color component d, it is possible to obtain the R color component as | c−d | = (2R + 3G + B) − (3G + B) = 2R.

As described above, regarding the first to fourth elements E1 to E4 corresponding to the respective color components a, b, c and d, as shown in FIG. 4 or 5, for example, each element is set to a predetermined ratio. Divide each divided area into Ye, G,
It may correspond to Cy or R, G, B. In addition, the first to fourth elements E1 to E4 themselves are used for the respective color components a,
It suffices to satisfy the conditions of b, c and d.

The first to fourth color components a, b, c and d
Is not limited to the configurations shown in FIGS. 4 and 5, and a + b = c + d | a−b | = C1 | c−d | = C2 (C1 and C2 are one component or two components of three primary colors) 2) of the three primary colors (red: R, green: G, blue: B) and their complementary colors (yellow: Ye, magenta: Mg, cyan: Cy) so as to comply with the above. The components may be combined at a predetermined ratio. In such a color filter, the first to fourth elements E1 to E4 may correspond to the light-receiving pixels in a one-to-one correspondence, and the solid-state image pickup device may be of a frame transfer, interline, or frame interline type. Either may be used.

[0024]

According to the present invention, it is possible to obtain a video signal representing a monochrome video from a solid-state imaging device having a color filter mounted for color imaging. Therefore, the range of use of the solid-state imaging device is widened, it is not necessary to prepare a solid-state imaging device for monochrome imaging different from that for color imaging, and the manufacturing cost of the solid-state imaging device can be reduced.

[Brief description of drawings]

FIG. 1 is a plan view showing a configuration of a solid-state image pickup device having a color filter mounted thereon.

FIG. 2 is a timing diagram illustrating a method for driving a solid-state image sensor according to the present invention.

FIG. 3 is a timing diagram illustrating a method for driving a solid-state image sensor during color imaging.

FIG. 4 is a first color filter mounted on a solid-state image sensor.
3 is a plan view showing a configuration example of FIG.

FIG. 5 is a second color filter mounted on a solid-state image sensor.
3 is a plan view showing a configuration example of FIG.

FIG. 6 is a block diagram showing a configuration of an image pickup apparatus using a solid-state image pickup element.

FIG. 7 is a timing diagram illustrating the operation of a conventional solid-state image sensor.

[Explanation of symbols]

1 Solid-state image sensor 1a, 11 imaging unit 1b, 12 storage unit 1c, 13 Horizontal transfer unit 1d, 14 Output section 2 Drive clock generation circuit 2a Frame transfer clock generator 2b Vertical transfer clock generator 2c Horizontal transfer clock generator 3 Timing control circuit 4 Reset clock generation circuit 5 Sampling circuit 6 Sampling clock generator

Claims (2)

(57) [Claims] 1. A plurality of light receiving pixels arranged in a row direction and a column direction, wherein each row is provided with a first color component for an odd column and a second color component for an even column, Information charges generated in each light receiving pixel are transferred to a plurality of vertical shift registers arranged corresponding to each column of the light receiving pixels in the vertical direction, and the information charges output from each vertical shift register are transferred to the horizontal shift register. In a method for driving a solid-state image sensor, which receives each bit and transfers and outputs it in the horizontal direction, accumulates information charges output from the horizontal shift register in the output unit in pixel units and extracts a voltage value corresponding to the amount of information charges, Information charges for one row from the odd columns of the plurality of vertical shift registers are transferred to the horizontal shift register, and subsequently information charges for one row from the even columns are transferred to the horizontal shift register to generate two screens. A method for driving a solid-state image pickup device, which comprises synthesizing components and then transferring them from the horizontal shift register to an output unit. 2. A plurality of light-receiving pixels arranged in a row direction and a column direction, wherein each row is provided with a first color component for an odd column and a second color component for an even column, Information charges generated in each light receiving pixel are transferred to a plurality of vertical shift registers arranged corresponding to each column of the light receiving pixels in the vertical direction, and the information charges output from each vertical shift register are transferred to the horizontal shift register. In a method for driving a solid-state image sensor, which receives each bit and transfers and outputs it in the horizontal direction, accumulates information charges output from the horizontal shift register in the output unit in pixel units and extracts a voltage value corresponding to the amount of information charges, In the first operation mode, the information charges of one row from the odd columns of the plurality of vertical shift registers are transferred to the horizontal shift register, and then the information charges of one row from the even columns are transferred to the horizontal shift register. After transferring to the register and synthesizing two pixels, it is transferred from the horizontal shift register to the output section, and in the second operation mode, the information charges for one row from the odd columns of the plurality of vertical shift registers are described above. After transferring to the horizontal shift register and then from the horizontal shift register to the output section, the information charges for one row from the even column are transferred to the horizontal shift register, and then from the horizontal shift register to the output section. A method for driving a solid-state image sensor, comprising: