JP2005252409A - Imaging apparatus, and control device for imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an imaging apparatus capable of realizing high image quality and a control device for the imaging apparatus. <P>SOLUTION: The imaging apparatus is characterized in that each pixel includes an imaging section 2i provided with a plurality of transfer electrodes extended toward a direction in crossing with a transfer direction of information electric charges, the information electric charges produced in response to light made incident onto each pixel are stored and transferred by utilizing potential wells formed by the action of the transfer electrodes, a plurality of the potential wells substantially separated at imaging store the information electric charges at imaging, the information electric charges stored in at least two of a plurality of the potential wells at the time of transfer are summed and combined, and the resulting information electric charges are transferred. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an imaging apparatus and an imaging apparatus control apparatus that improve the image quality of a captured image.

  FIG. 17 shows a configuration of an imaging apparatus 100 provided with a CCD solid-state imaging device. The imaging apparatus 100 includes a CCD solid-state imaging device 102, a timing control circuit 104, and a drive driver 106. The CCD solid-state imaging device 102 includes an imaging unit 2i, a storage unit 2s, a horizontal transfer unit 2h, and an output unit 2d. The timing control circuit 104 receives a clock pulse of a predetermined frequency and an external control signal, and generates a control signal for controlling imaging, vertical transfer, horizontal transfer, and output of the CCD solid-state image sensor 102. The control signal is input to the drive driver 106. The drive driver 106 receives a control signal from the timing control circuit 104, and outputs a clock pulse to each of the imaging unit 2i, the storage unit 2s, the horizontal transfer unit 2h, and the output unit 2d of the CCD solid-state imaging device 102 at a necessary timing. Output.

  The CCD solid-state imaging device 102 receives a clock from the drive driver 106 and performs imaging, vertical transfer, horizontal transfer, and output. The light incident on the imaging unit 2i is photoelectrically converted by the light receiving pixels constituting each bit of the imaging unit 2i to generate information charges. By applying the vertical transfer clock, the two-dimensional array of information charges generated in the imaging unit 2i is transferred to the storage unit 2s at high speed by the vertical shift register of the imaging unit 2i. As a result, the information charge for one frame is held in the vertical shift register of the storage unit 2s. Subsequently, the information charges are transferred from the storage unit 2s to the horizontal transfer unit 2h line by line. Furthermore, by applying a horizontal transfer clock, information charges are transferred from the horizontal transfer unit 2h to the output unit 2d in units of pixels. The output unit 2d converts the charge amount for each pixel into a voltage value, and the change in the voltage value is used as the output of the CCD.

  The imaging unit 2i and the storage unit 2s include a vertical shift register including a plurality of channel regions extending in parallel with each other in the vertical direction (the vertical direction in FIG. 17) and a plurality of transfer electrodes intersecting the vertical shift registers. Each bit of the register functions as one of the light receiving pixels arranged as a two-dimensional matrix.

  As shown in FIGS. 18A to 18C, the imaging unit 2i includes a plurality of shift registers formed in the surface region of the semiconductor substrate 9. FIG. 18A is a schematic plan view showing a part of a conventional imaging unit 2i, and FIGS. 18B and 18C are side sectional views taken along lines AA and BB, respectively. It is.

  As shown in FIG. 18B, a P well (PW) 11 is formed in an N type semiconductor substrate 9, and an N well 12 is formed thereon. That is, a P well 11 to which a P type impurity is added is formed on an N type semiconductor substrate 9. An N well 12 to which an N-type impurity is added at a high concentration is formed in the surface region of the P well 11. Further, in order to separate the channel regions of the vertical shift register, a P-type impurity region is formed by ion-implanting P-type impurities in parallel to each other at a predetermined interval in the N well 12. The N well 12 is electrically partitioned by adjacent isolation regions 14, and a region sandwiched between the isolation regions 14 becomes a channel region 22 that is an information charge transfer path. The isolation region 14 forms a potential barrier between adjacent channel regions, and electrically isolates each channel region 22.

  An insulating film 13 is formed on the surface of the semiconductor substrate 9. A plurality of transfer electrodes 24 made of a polysilicon film are arranged in parallel to each other so as to be orthogonal to the extending direction of the channel region 22 via the insulating film 13. In the conventional imaging unit 2i, a set of three adjacent transfer electrodes 24-1, 24-2, 24-3 corresponds to one pixel.

  FIG. 19 shows the potential distribution in the N well 12 along the channel region 22 during imaging. At the time of imaging, one transfer electrode 24-2 of the set of transfer electrodes 24 is turned on to form a potential well 50 in the channel region 22 below the transfer electrode 24-2, and the remaining transfer electrodes 24-1, Information charges are accumulated in the potential well 50 under the transfer electrode in the on state by turning off 24-3. At the time of transfer, as shown in FIG. 20, three-phase transfer clocks φ1 to φ3 are applied to each combination of three transfer electrodes 24-1, 24-2, 24-3 constituting one pixel, and transfer electrodes 24- Information charges are transferred by controlling the potential of the channel region 22 below 1, 24-2, 24-3.

  The storage unit 2s is also composed of a vertical shift register, like the imaging unit 2i. The vertical shift register included in the storage unit 2s is shielded from light, and each bit of each shift register functions as a storage pixel that stores information charges.

  Further, in a CCD solid-state imaging device for a color image, as shown in FIG. 6, filters that transmit red (R) and filters that transmit green (G) are alternately arranged along the vertical transfer direction. A matrix-like pixel arrangement is obtained by alternately arranging columns and columns in which filters that transmit green (G) and filters that transmit blue (B) are alternately arranged in a direction crossing the vertical transfer direction. The color image can be acquired.

JP 2001-166284 A JP-A-6-112467

  However, in the conventional imaging apparatus and the control method thereof, information charges are sequentially sent out for each transfer electrode to perform transfer. As a result, the vertical transfer time becomes long, and there is a problem that a high-quality image cannot be obtained.

  For example, when the imaging unit 2i is not provided with a mechanical shutter, electric charges continue to be generated during the transfer period according to the light that continues to enter each pixel of the imaging unit 2i. This electric charge causes noise called smear. A charge that causes noise is called a smear charge. As the time for transferring information charges from the imaging unit 2i to the storage unit 2s becomes longer, the amount of smear charge increases, and the captured image remains as strong noise.

  Further, as in the prior art, in the case where imaging is performed with only one of the pair of transfer electrodes in the imaging unit 2i turned on, the amount of charge that can be accumulated in the potential well at the time of imaging is limited, Sufficient sensitivity and dynamic range cannot be obtained when receiving light from an object to be photographed with high brightness. Furthermore, the amount of information charges generated during the imaging period may exceed the capacity of the potential well, and the dynamic range of the obtained image may be reduced.

  An object of the present invention is to provide an imaging device and a control device for the imaging device that can obtain a higher quality image in view of the above-described problems of the related art.

  The present invention includes an imaging unit including a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes a plurality of transfer electrodes that extend in a direction that intersects the transfer direction of the information charges. An image pickup apparatus that stores and transfers information charges generated in response to light incident on a pixel by using a potential well formed by the action of a transfer electrode, and a control apparatus for the image pickup apparatus. The information charges are accumulated in a plurality of potential wells that are separated from each other, and at the time of transfer, the information charges accumulated in at least two of the plurality of potential wells are added and combined and transferred.

  That is, the transfer time can be made shorter than before by adding and combining the information charges accumulated in at least two of the plurality of potential wells along the transfer direction. As a result, high-speed transfer can be realized, and the amount of smear charge can be reduced. In addition, the sensitivity and dynamic range during imaging can be increased.

  Specifically, control means (apparatus) for independently controlling each of the transfer electrodes provided in the group of pixels in which at least two pixels arranged continuously along the transfer direction are set as a set. Is provided. By this control means (apparatus), at least two transfer electrodes arranged continuously along the transfer direction are set as a set, and clock pulses having substantially the same phase are supplied to the transfer electrodes set as the set at the time of transfer. Is preferred. As a result, the information charges accumulated in at least two of the plurality of potential wells can be added and combined along the transfer direction and transferred.

  In addition, in an imaging device for obtaining a color image, each pixel stores information charges generated in response to one of two or more different wavelength regions (colors). It is preferable to add and combine the information charges accumulated in at least two pixels that generate information charges in response to the same wavelength region and transfer them.

  Specifically, pixels corresponding to each wavelength region are repeatedly arranged in a predetermined cycle along the transfer direction, and one pixel is arranged in a cycle in which pixels corresponding to the same wavelength region are arranged by the control means (device). It is preferable to independently control each of the transfer electrodes provided in the pixels included in the group, with the pixel group included in the cycle including At this time, the control means (apparatus) supplies at least two transfer electrodes arranged continuously along the transfer direction as a set, and supplies substantially in-phase clock pulses to the transfer electrodes set as the set. This enables high-speed transfer.

  At the time of transfer, information charges accumulated in at least two pixels that generate information charges in response to different wavelength regions may be added and combined for transfer. In this case, it is preferable to provide an output signal processing unit that obtains a signal corresponding to the information charge of each wavelength component based on the information charge added and synthesized after the transfer.

  According to the present invention, a high-quality image can be obtained in an imaging apparatus including a CCD solid-state imaging device. For example, the sensitivity and dynamic range during imaging can be increased. Further, it is possible to suppress smear that occurs during transfer.

  As shown in FIG. 1, the imaging apparatus 200 according to the embodiment of the present invention includes a CCD solid-state imaging device 202, a timing control circuit 204, a drive driver 206, and an output signal processing unit 208.

  The CCD solid-state imaging device 202 includes an imaging unit 2i, a storage unit 2s, a horizontal transfer unit 2h, and an output unit 2d. The timing control circuit 204 receives a clock pulse of a predetermined frequency and an external control signal, and generates a control signal for controlling imaging, vertical transfer, horizontal transfer, and output of the CCD solid-state imaging device 202. These control signals are input from the timing control circuit 204 to the drive driver 206. The drive driver 206 receives a control signal from the timing control circuit 204, and sends clock pulses to the image pickup unit 2i, storage unit 2s, horizontal transfer unit 2h, and output unit 2d of the CCD solid-state image pickup device 202 at necessary timings. Output. The output signal processing unit 208 performs processing such as smear removal on the output signal of the CCD solid-state imaging device 202 output from the output unit 2d, and then outputs the output signal to the outside of the apparatus.

  As in the prior art, the imaging unit 2i and the storage unit 2s are each composed of a plurality of channel regions extending in parallel to each other in the vertical direction (vertical direction in FIG. 1) and a plurality of transfer electrodes intersecting the vertical shift region. Each bit of each shift register functions as one of light receiving pixels arranged as a two-dimensional matrix.

  As shown in FIGS. 2 to 4, the imaging unit 2 i includes a plurality of shift registers formed in the surface region of the semiconductor substrate 10. FIG. 2 is a schematic plan view showing a part of a conventional imaging unit 2i, and FIGS. 3 and 4 are side sectional views taken along lines CC and DD in FIG. 2, respectively.

  As shown in FIGS. 3 and 4, the imaging unit 2 i in the present embodiment has the same cross-sectional structure as the imaging unit in the conventional imaging device. That is, a P-well (PW) 11 is formed in an N-type semiconductor substrate 9, an N-well 12 is formed thereon, and an N-well in which N-type impurities are added to the surface region of the P-well 11 at a high concentration. 12 is formed. Further, isolation regions 14 made of P-type impurity regions are formed in the N well 12 in parallel with each other at a predetermined interval. The isolation region 14 forms a potential barrier between adjacent channel regions, and a region sandwiched between the isolation regions 14 is electrically partitioned to become a channel region 22 that is a transfer path of information charges.

  An insulating film 13 is formed on the surface of the semiconductor substrate 9. As shown in FIG. 2, a plurality of transfer electrodes 30 (30-1 to 30-9) made of a polysilicon film or the like are parallel to each other so as to be orthogonal to the extending direction of the channel region 22 with the insulating film 13 interposed therebetween. Repeatedly placed.

  In the present embodiment, an imaging apparatus 200 that captures a color image will be described. The imaging apparatus 200 that captures a color image has a matrix pixel arrangement in which pixels that accumulate information charges generated in response to wavelength components of different colors are repeatedly arranged at a predetermined period. For example, as shown in FIG. 5, a filter 32-R that transmits red (R) and a filter 32-G that transmits green (G) each including three transfer electrodes that are continuous in the vertical transfer direction as a set, Are arranged in the vertical transfer direction. The row 34-1 is alternately arranged, and the row 34-2 is alternately arranged with the filter 32-B that transmits blue (B) and the filter 32-G that transmits green (G). Are alternately arranged in the direction intersecting As a result, as shown in FIG. 6, a pixel array is formed in which R, G, and B pixels each controlled by a plurality of electrodes (here, three) are arranged in a matrix.

  In the conventional imaging unit 2i, a set of three adjacent transfer electrodes 24-1, 24-2, 24-3 corresponds to one pixel, and each of the transfer electrodes 24-1, 24-2, 24-3 On the other hand, by supplying three-phase clock pulses φ1, φ2, and φ3, the imaging and transfer of the imaging unit 2i are controlled. In the present embodiment, one set of pixel groups included in a cycle obtained by adding one pixel to the cycle in which pixels corresponding to the same wavelength region (color) are arranged along the transfer direction is included in one set. Control is accomplished by supplying different clock pulses to each of the electrodes. For example, in the pixel arrangement of FIG. 5, pixels corresponding to the wavelength region of the same color (R, G, B) are arranged in a two-pixel cycle along the transfer direction, so 2 pixels + 1 pixel = The transfer electrodes for three pixels are controlled as one set. That is, nine transfer electrodes 30-1 to 30-9 continuous along the transfer direction are set as one set, and different clock pulses are supplied to each of the transfer electrodes 30-1 to 30-9 in the transfer direction. The imaging and transfer in the imaging unit 2i are controlled by independently controlling each of the transfer electrodes 30-1 to 30-9 arranged in three pixels that are continuous along.

Imaging (accumulation of information charges) and transfer of information charges in the imaging apparatus 200 can be performed by controlling the voltage applied to the transfer electrodes 30-1 to 30-9 using the timing control circuit 204. FIG. 7 shows a timing chart from imaging to transfer, and the control of the transfer electrode will be described. Further, in FIG. 8 shows a change of the potential in each transfer electrode 30-1～30-9 lower at time T ₁ through T _9. The horizontal axis indicates the position along the transfer direction in the imaging unit 2i, and the vertical axis indicates the potential at each position. At this time, the lower side in the figure is the positive potential side and the upper side is the negative potential side.

In response to the control signal from the timing control circuit 204, the drive driver 206 applies clock pulses φ _{1 to} φ ₉ to the transfer electrodes 30-1 to 30-9, respectively. The N-type semiconductor substrate (N-SUB) 10 of the CCD solid-state imaging device 202 is fixed to the substrate potential _Vsub .

Time T ₀ is an initial state before imaging. At this time, all of the clock pulses φ _{1 to} φ ₉ are turned off, and no potential well is formed under the transfer electrodes 30-1 to 30-9 as shown in FIG. Is done.

At time T ₁ , the clock pulse is controlled so that potential wells are formed in the pixels at both ends of the pixel group made into one set. Here, the clock pulses φ ₂ and φ ₈ are turned on, and a potential well is formed under the transfer electrodes 30-2 and 30-8. Information charges generated in response to light incident around the transfer electrodes 30-2 and 30-8 that are turned on are accumulated in these potential wells.

  In the present embodiment, the clock pulse to the transfer electrode is controlled as a set of pixels each having a period obtained by adding one pixel to the period in which pixels corresponding to the same wavelength region are arranged along the transfer direction. In one set of pixels, information charges generated corresponding to the same wavelength component are accumulated. For example, in the row 34-1 of the CCD solid-state imaging device 202 shown in FIG. 5, as shown in FIG. 8, a set of R, G, R and a set of G, R, G are repeatedly arranged from the left. In the set of G, R and G, the information charges generated according to the red wavelength component are accumulated in the pixels corresponding to R at both ends, and in the set of G, R and G, the green wavelength component is stored in the pixels corresponding to G at both ends. The information charge generated in response to is stored. The same applies to the other columns.

Here, the pixels other than both ends are controlled so that the information charges are always discharged to the substrate 10 at the time of imaging by keeping the clock pulse off. However, the present invention is not limited to this. For example, as shown in FIG. 9, at time S ₀ , the clock pulse φ ₅ is temporarily turned on together with the clock pulses φ ₂ and φ ₈ to accumulate information charges, and at time S ₁ when imaging is completed, the clock pulse φ ₅ is turned off. The electronic shutter operation may be performed by returning the information charge and discharging the information charge.

At times T ₂ and T ₃ , the information charges are rearranged. In one set of pixel groups, information charges accumulated in the potential wells of the pixels at both ends are collected into one potential well. At time T ₂ , clock pulses φ _{3 to} φ ₇ are turned on in addition to clock pulses φ ₂ and φ ₈ , and information charges accumulated in the potential wells under the transfer electrodes 30-2 and 30-8 are added. Synthesized. Subsequently, at time T ₃ , the clock pulses φ ₂ , φ ₃ , φ ₇ , and φ ₈ are turned off, and information charges are rearranged in the potential well formed below the transfer electrodes 30-4 to 30-6. The

  As described above, the information charges accumulated in at least two or more pixels of a set of pixel groups at the time of imaging are combined into one potential well by rearrangement, thereby increasing the sensitivity and dynamic range at the time of imaging. Can do.

After time T ₄ , information charges collected in one potential well are transferred to one set of pixel groups. At this time, transfer is performed by supplying in-phase clock pulses to at least two transfer electrodes that are continuous in the transfer direction. Here, the transfer is performed by supplying clock pulses having the same phase to each set of three transfer electrodes arranged in each pixel.

For example, in the CCD solid-state imaging device 202 shown in FIG. 5, as shown in FIG. 7, a set of clock pulses φ _{1 to} φ ₃ , φ _{4 to} φ ₆ , and φ _{7 to} φ ₉ are driven in the same phase. As shown in FIG. 8, information charges are sequentially transferred using a group of transfer electrodes 30-1 to 30-3, 30-4 to 30-6, and 30-7 to 30-9 arranged in succession as one transfer unit. Transferred.

Specifically, as shown in FIG. 7, the clock pulses phi ₁ to [phi] ₃ at the time T ₄ is turned off, the clock pulse phi ₄ to [phi] ₉ is turned on, the clock pulses phi ₁ to [phi] ₆ at time T ₅ is Off, clock pulses φ _{7 to} φ ₉ are turned on. As a result, as shown in FIG. 8, the information charges accumulated in the potential well formed under the transfer electrodes 30-4 to 30-6 are newly formed under the transfer electrodes 30-7 to 30-9. Transferred to a potential well. At time T ₆ , clock pulses φ _{4 to} φ ₆ are turned off, and clock pulses φ _{1 to} φ ₃ and φ _{7 to} φ ₉ are turned on. At time T ₇ , clock pulses φ _{4 to} φ ₉ are turned off, and clock pulse φ ₁ ~φ ₃ is turned on. As a result, as shown in FIG. 8, information charges accumulated in the potential well formed under the transfer electrodes 30-7 to 30-9 are newly formed under the transfer electrodes 30-1 to 30-3. Transferred to a potential well. Similarly, information charges can be sequentially transferred by applying in-phase clock pulses to each pair of transfer electrodes arranged in one pixel. The transfer is performed in the same manner for the other columns.

Although the case where the sets of clock pulses φ _{1 to} φ ₃ , φ _{4 to} φ ₆ , and φ _{7 to} φ ₉ are driven in the same phase is shown, it is sufficient that they are driven in the same phase. As shown, the clock pulses supplied to the transfer electrodes in each set may be delayed so that the potential varies smoothly along the transfer direction. By providing such a delay, information charges can be transferred smoothly.

  Thus, at the time of transfer, by controlling a plurality of transfer electrodes as a set, information charges can be transferred from the imaging unit 2i at high speed. As a result, it is possible to suppress smear that occurs during transfer. For example, when three transfer electrodes are collectively controlled as in the present embodiment, transfer can be performed at a transfer rate about three times that of the conventional control method. A similar transfer method can be applied to the storage unit 2s.

  As described above, according to the present embodiment, a high-quality image can be obtained in an imaging device including a CCD solid-state imaging device.

  In the present embodiment, nine consecutive transfer electrodes 30-1 to 30-9 are taken as one set, and different clock pulses are supplied to each of the transfer electrodes 30-1 to 30-9 to thereby capture the imaging unit 2i. The image pickup (accumulation of information charge) and the transfer of information charge are controlled in the above. Of course, as in the conventional case, transfer electrodes 30-1 to 30-3, 30-4 to 30-6, 30- corresponding to one pixel are used. Transfer electrodes 30-1, 30-4, 30-7, transfer electrodes 30-2, 30-5, 30-8 and transfer electrodes 30-3, 30-6, 30- 9 can be controlled by clock pulses of the same phase. In this way, by switching between a control with a set of transfer electrodes extending over a plurality of consecutive pixels and a control with a set of transfer electrodes corresponding to one pixel, low-speed high-speed transfer and high-resolution low-speed It is also possible to perform shooting and transfer by switching between transfer and transfer.

  In addition, when a mechanical shutter is provided in the imaging unit 2i, when performing high-speed transfer with low resolution continuously like a moving image, it is possible to continuously perform imaging with the shutter opened. In such a case, the storage unit 2s need not have the same number of pixels as the imaging unit 2i as in the conventional case, and the storage unit 2s has a capacity capable of storing the storage pixels of the storage unit 2s and storing the added and combined information charges. It is also possible to arrange pixels having the same. For example, when information charges are accumulated together in the transfer direction in the image pickup unit 2i, the number of pixels along the transfer direction of the storage unit 2s can be reduced to 1/3 of the conventional one. Therefore, the number of pixels can be reduced as compared with the conventional storage unit 2s, and the configuration of the CCD solid-state imaging device 202 can be further downsized. In addition, the control of the transfer electrode of the storage unit 2s can be simplified. Note that, when shooting a high-resolution still image, imaging is performed in units of one pixel composed of three transfer electrodes as before, and the mechanical shutter is closed at the time when the imaging is completed, and the image is taken directly from the imaging unit 2i. It is also possible to obtain a high-resolution image by sequentially transferring information charges to the transfer unit 2h.

  In the above embodiment, the control is performed by supplying nine different clock pulses with a set of nine transfer electrodes. However, the present invention is not limited to this. For example, a more compressed image can be transferred at a higher speed by increasing the number of controllable clock pulses.

  In this embodiment, an imaging apparatus including a frame transfer type CCD solid-state imaging device is targeted. However, the scope of application of the present invention is not limited to this. For example, the present invention can also be applied to an imaging device including an interline CCD solid-state imaging device.

<Modification 1>
In the above-described embodiment, information charges are accumulated only in the pixels at both ends of the pixel group that is set as one set at the time of imaging, and the information charges are collectively transferred. On the other hand, as described below, information charges can be accumulated for pixels other than both ends, and the information charges can be collectively transferred.

FIG. 11 shows a timing chart from imaging to transfer, and the control of the transfer electrode will be described. Further, in FIG. 12 shows a change of the potential in each transfer electrode 30-1～30-9 lower at time T ₁ through T _9. The horizontal axis indicates the position along the transfer direction in the imaging unit 2i, and the vertical axis indicates the potential at each position. At this time, the lower side in the figure is the positive potential side and the upper side is the negative potential side.

In response to the control signal from the timing control circuit 204, the drive driver 206 applies clock pulses φ _{1 to} φ ₉ to the transfer electrodes 30-1 to 30-9, respectively. The N-type semiconductor substrate (N-SUB) 10 of the CCD solid-state imaging device 202 is fixed to the substrate potential _Vsub .

At time T ₀ , all of the clock pulses φ _{1 to} φ ₉ are turned off, and no potential well is formed under the transfer electrodes 30-1 to 30-9 as shown in FIG. Is discharged.

At time T ₁ , the clock pulse is controlled so that potential wells are formed in all the pixels of the set of pixels. Here, the clock pulses φ ₂ , φ ₅ , and φ ₈ are turned on, and a potential well is formed under the transfer electrodes 30-2, 30-5, and 30-8. Information charges generated in response to light incident around the transfer electrodes 30-2, 30-5, and 30-8 that are turned on are accumulated in these potential wells.

  For example, in the row 34-1 of the CCD solid-state imaging device 202 shown in FIG. 5, as shown in FIG. 12, a set of R, G, R and a set of G, R, G are repeatedly arranged from the left. Therefore, in the group of R, G, and R, information charges generated according to the red, green, and red wavelength components are accumulated in the pixels corresponding to R, G, and R, respectively, and in the group of G, R, and G, Information charges generated according to green, red, and green wavelength components are accumulated in pixels corresponding to G, R, and G, respectively.

At times T ₂ and T ₃ , the information charges are rearranged. In one set of pixel groups, information charges accumulated in the potential wells of the pixels at both ends are collected into one potential well. At time T ₂ , clock pulses φ ₃ , φ ₄ , φ ₆ , φ ₇ are turned on in addition to clock pulses φ ₂ , φ ₅ , φ ₈ , and transfer electrodes 30-2, 30-5, 30-8 are turned on. The information charges accumulated in the lower potential well are added and synthesized. Subsequently, at time T ₃ , the clock pulses φ ₂ , φ ₃ , φ ₇ , and φ ₈ are turned off, and information charges are rearranged in the potential well formed below the transfer electrodes 30-4 to 30-6. The

In the following, information charges can be transferred in the same manner as after time T ₄ in the above embodiment. As a result, the information charges accumulated in one set of pixel groups are output from the output unit 2d as a combined image signal obtained by adding and combining information charges corresponding to different wavelength components (colors). The output signal processing unit 208 performs color separation processing from these synthesized image signals.

  Here, when a group of pixels is collectively expressed as the a-th row, the signal values corresponding to the same column in the synthesized image signals of the a-th row and the (a + 1) -th row have the same wavelength component (color). ) And their mixing ratios are different from each other. The output signal processing unit 208 uses this to perform color separation.

  Hereinafter, the signal values corresponding to the pixels in the α-th row and the β-th column of the imaging unit 2i are associated with the colors R, G, and B of the pixel, and the symbols R (α, β), G (α, β), The image signal value corresponding to the b-th column in the imaging unit 2i in the output image signal of the a-th row is represented by the symbol D (a, b).

  In the pixel array of FIG. 6, there are the following four types of image signal values obtained by addition and synthesis, which have different color mixing ratios.

  The output signal processing unit 208 generates an image signal separated for each of the R, G, and B color components based on the mixed color signal values given by the equations (1) to (4). (1) and (2) are used for odd-numbered columns, and (3) and (4) are used for even-numbered columns. Based on the obtained information charges, the color component signal value at the sampling point corresponding to the position of the pixel region composed of these pixels is obtained.

  As a specific example of this color separation process, a process for a pixel region composed of six consecutive pixels on an odd-numbered column will be described. In accordance with the expressions (1) and (2), the pixel area to be processed is an area composed of 6 pixels located in the (6λ-5) to 6λ rows of the (2μ-1) th column. The output signal processing unit 208 uses the R signal value <R> (≡ <R (2λ-1, 2 μ−1)>) at the sampling point P (2λ-1, 2 μ−1) representing the pixel area to be processed, and G signal value <G> (≡ <G (2λ−1, 2 μ−1)>) is obtained. At this time, under the approximation in which the respective values of R and G in the pixel region are regarded as constant values <R> and <G>, the equations (1) and (2) are expressed by the equations (5) and (6). To be rewritten.

  From these, the signal values <R> and <G> at the sampling points of the pixel area can be obtained using the following mathematical formulas (7) and (8).

  The output signal processing unit 208 calculates (7) and (8) to obtain <G> and <R>. B and G signal values <B> at sampling points P (2λ−1, 2μ) for a pixel region consisting of 6 pixels located in the (6λ-5) to 6λ rows of the even-numbered column (second μ column), <G> is determined in the same manner based on equations (3) and (4). In this way, signal value pairs <G> and <R>, or <B> and <G> are obtained for each column from the (2λ−1) row and the second λ row of the composite image signal.

  Similarly, a set of signal values <G> and <R> or <B> and <G> are obtained for each column from the second λ row and the (2λ + 1) row of the composite image signal. In this way, by performing the color separation processing by shifting the set of two composite image signals used for the color separation processing one row at a time, color component signals having the same number of rows as the composite image signal are obtained.

<Modification 2>
In addition, by applying the control of the imaging device in the above embodiment, when the potential well does not saturate even when strong light that generates information charges exceeding the saturation level of the potential well is incident during imaging. It is also possible to obtain an ideal information charge amount to be obtained.

FIG. 13 shows a timing chart at the time of imaging and rearrangement, and the control of the transfer electrode will be described. Further, in FIG. 14 shows a change of the potential in each transfer electrode 30-1～30-9 lower at time T ₁ through T _3. The horizontal axis indicates the position along the transfer direction in the imaging unit 2i, and the vertical axis indicates the potential at each position. At this time, the lower side in the figure is the positive potential side and the upper side is the negative potential side.

In response to the control signal from the timing control circuit 204, the drive driver 206 applies clock pulses φ _{1 to} φ ₉ to the transfer electrodes 30-1 to 30-9, respectively. The N-type semiconductor substrate (N-SUB) 10 of the CCD solid-state imaging device 202 is fixed to the substrate potential _Vsub .

At time T ₀ , all of the clock pulses φ _{1 to} φ ₉ are turned off, and no potential well is formed under the transfer electrodes 30-1 to 30-9 as shown in FIG. Is discharged. At time T ₁ , the clock pulse is controlled so that a potential well is formed in one pixel of a group of pixels. Here, only the clock pulse φ ₂ is turned on, and a potential well is formed under the transfer electrode 30-2. Information charges generated in response to light incident on the periphery of the transfer electrode 30-2 in the on state are accumulated in these potential wells. Next, at time T ₂ , the clock pulse is controlled so that potential wells are formed in the pixels at both ends of the pixel group made into one set. Here, in addition to the clock pulse φ ₂ , φ ₈ is turned on, and a potential well is formed under the transfer electrodes 30-2 and 30-8. Information charges generated in response to light incident around the transfer electrodes 30-2 and 30-8 that are turned on are accumulated in these potential wells. At time T ₃ , information charges are rearranged. In the following, information charges can be transferred in the same manner as after time T ₄ in the above embodiment.

That is, on-gate period T _H by the potential well equal to the imaging period T is below the transfer electrode 30-2 at the time of imaging is formed, a short on-gate period T _L from the on-gate period T _H is under the transfer electrodes 30-8 A potential well is formed.

At this time, it is preferable that the timing control circuit 204 controls the on-gate periods T _H and T _L according to the maximum signal strength in the previous frame. Control is performed such that the smaller the maximum signal strength, the longer the off-gate period, and the larger the maximum signal strength, the longer the on-gate period. This is to control the imaging period by utilizing the fact that the maximum signal intensity included in continuously captured images does not tend to change greatly. When a long time has elapsed since the previous imaging or when it is desired to ensure a sufficient dynamic range, a maximum image intensity is detected by temporarily capturing and outputting an image of one frame, and the maximum signal It is preferable to perform actual imaging after setting the imaging period based on the intensity.

When the light incident on the pixel of the imaging unit 2i is weak, as shown in FIG. 15, the information charge (inclination of the line E in FIG. 15) accumulated in the potential well of each pixel per unit time becomes small. In such a case, the information charges Q _{H, total} and Q _{L, total} accumulated in the on-gate periods T _H and T _L are smaller than the saturation level Q _max of each potential well, so that a sufficient dynamic range can be secured. it can.

When the light incident on the pixel of the imaging unit 2i is strong, as shown in FIG. 16, the information charge accumulated in the pixel per unit time (the slope of the line F in FIG. 16) becomes large, and the long on-gate period T _H The information charge Q _{H, total} stored in the potential well under the transfer electrode 30-2 that is in the ON state only exceeds the saturation level of the potential well. On the other hand, the information charge Q _{L, total} stored in the potential well below the transfer electrode 30-7 that is in the on state only for a short on-gate period T _L does not exceed the saturation level of the potential well. Therefore, the output information charge amount Q _total which is the sum of the information charges Q _{H, total} and Q _{L, total} shows knee characteristics as shown by the line G in FIG.

When the light incident on the pixels of the imaging unit 2i is weak, the information charge amount Q _{H, total} accumulated in the long on-gate period T _H can be calculated from the output information charge amount Q _total by using Equation (9). . Similarly, the information charge amount Q _{L, total} accumulated in the short on-gate period T _L can be calculated from the output information charge amount Q _total using Equation (10). However, when the information charge amount Q _{H, total} calculated in this way is calculated as a value exceeding the saturation level Q _max , the information charge amount Q _{H, total} and the information charge amount Q _{L, total} are expressed by the formula (11 ) And (12) need to be recalculated. The saturation level Q _max in the imaging unit 2 i of the CCD solid-state imaging device 202 can be obtained in advance.

Assuming that there is no effect of smear charges generated in the imaging unit 2i during transfer, the information charge amount Q _{L, total} accumulated in the short on-gate period T _L and a sufficient capacity not to saturate the potential well are provided. equal to the ratio Q _{L, total} / Q _ideal ratio of oN-gate period T _L / T _H of the ideal information charges Q _ideal to be accumulated in one pixel of the potential well in the long-gate period T _H when there . Therefore, the ideal information charge amount Q _ideal can be calculated based on Equations (13) and (14).

By examining the saturation level Q _max of the potential well per pixel (or the output signal value corresponding to the saturation level Q _max ) in _advance , the ideal output information charge amount Q _itotal to be accumulated in the imaging period is _determined . Can be sought.

Therefore, the _ideal output signal S _ideal can be obtained by performing the following processing in the output signal processing unit 208 based on the output signal from the CCD solid-state imaging device 202. That is, the ideal output signal S _ideal since is a signal proportional to the information amount of charge Q _Itotal, it is possible to calculate the output signal S _ideal by applying a predetermined coefficient information charge amount Q _Itotal.

As described above, according to the second modification, even when the light incident on the pixels of the imaging unit 2i is strong by accumulating information charges in different on-gate periods T _H and T _L in one set of pixel groups. Therefore, it is possible to obtain the correct information charge amount and output signal according to the light intensity. Therefore, a sufficient dynamic range can be obtained in the image signal.

It is a block diagram which shows the structure of the imaging device in embodiment of this invention. It is a figure which shows the top view of the internal structure of the imaging part of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows sectional drawing of the internal structure of the imaging part of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows sectional drawing of the internal structure of the imaging part of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows arrangement | positioning of the color filter of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the arrangement | sequence of the color filter of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the timing chart of the clock pulse supplied to the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the state change of the potential under each transfer electrode in embodiment of this invention. It is a figure which shows another example of the timing chart of the clock pulse supplied to the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the state change of the potential under each transfer electrode of the CCD solid-state image sensor in embodiment of this invention. It is a figure which shows the timing chart of the clock pulse supplied to the CCD solid-state image sensor in the modification 1 of embodiment of this invention. It is a figure which shows the state change of the potential under each transfer electrode in the modification 1 of embodiment of this invention. It is a figure which shows the timing chart of the clock pulse supplied to the CCD solid-state image sensor in the modification 2 of embodiment of this invention. It is a figure which shows the state change of the potential under each transfer electrode in the modification 2 of embodiment of this invention. It is a figure explaining the mode of accumulation | storage of the information charge in the imaging period in the modification 2 of embodiment of this invention. It is a figure explaining the mode of accumulation | storage of the information charge in the imaging period in the modification 2 of embodiment of this invention. It is a block diagram which shows the structure of the conventional imaging device. It is a figure which shows the top view of the internal structure of the imaging part of the conventional CCD solid-state image sensor. It is a figure explaining accumulation | storage of the information charge at the time of imaging. It is a figure which shows the timing chart of the clock pulse supplied to the transfer electrode at the time of the imaging in the conventional CCD solid-state image sensor, and transfer.

Explanation of symbols

  2d output unit, 2i imaging unit, 2h horizontal transfer unit, 2s storage unit, 9 semiconductor substrate, 10 semiconductor substrate (N-SUB), 11, 12 well, 13 insulating film, 14 isolation region, 22 channel region, 24 transfer electrode , 30 transfer electrode, 32 filter, 34 pixel row, 50 potential well, 100 imaging device, 102 CCD solid-state imaging device, 104 timing control circuit, 106 drive driver, 200 imaging device, 202 CCD solid-state imaging device, 204 timing control circuit 206 Drive driver, 208 Output signal processing unit.

Claims (12)

It has a plurality of pixels that generate information charges by receiving light from the outside, and each pixel includes an imaging unit that includes a plurality of transfer electrodes extended in a direction crossing the information charge transfer direction,
An imaging device that accumulates and transfers information charges generated in response to light incident on a pixel using a potential well formed by the action of a transfer electrode,
During imaging, information charges are accumulated in a plurality of potential wells substantially separated from each other,
At the time of transfer, the information charge accumulated in at least two of the plurality of potential wells is added and combined and transferred. The imaging device according to claim 1,
An image pickup apparatus, wherein information charges accumulated in at least two of the plurality of potential wells are added and combined along a transfer direction and transferred. The imaging device according to claim 1 or 2,
An imaging device comprising: control means for independently controlling each of transfer electrodes provided in a group of pixels in which at least two pixels arranged continuously along the transfer direction are set as a set. apparatus. The imaging device according to claim 1 or 2,
Control means for supplying at least two transfer electrodes arranged continuously along the transfer direction as a set, and supplying clock pulses having substantially the same phase to the transfer electrodes set as the set at the time of transfer. Imaging device. In the imaging device according to any one of claims 1 to 4,
Each pixel stores information charges generated in response to one of two or more different wavelength regions,
An image pickup apparatus characterized by adding and combining information charges accumulated in at least two pixels that generate information charges in response to the same wavelength region during transfer. The imaging device according to claim 3.
Each pixel stores information charges generated in response to one of two or more different wavelength regions,
Pixels corresponding to each wavelength region are repeatedly arranged in a predetermined cycle along the transfer direction,
The control means sets a group of pixels included in a period obtained by adding one pixel to a period in which pixels corresponding to the same wavelength region are arranged, and independently sets each of the transfer electrodes provided in the pixels included in the group. An image pickup apparatus that is controlled to the above. The imaging device according to claim 6,
In the transfer, the control means sets at least two transfer electrodes arranged continuously in the transfer direction as a set, and supplies substantially in-phase clock pulses to the transfer electrodes set as the set. An imaging device. In the imaging device according to any one of claims 1 to 4,
Each pixel stores information charges generated in response to one of two or more different wavelength regions,
At the time of transfer, the information charges accumulated in at least two pixels that generate information charges in response to different wavelength regions are added and combined, transferred,
An image pickup apparatus comprising: an output signal processing unit that obtains a signal corresponding to the information charge of each wavelength component based on the information charge added and synthesized after transfer. An imaging unit that has a plurality of pixels and generates information charges by receiving light from the outside,
A control device for an imaging device that stores and transfers information charges generated in response to light incident on a pixel using a potential well,
During imaging, information charges are accumulated in a plurality of potential wells substantially separated from each other,
A control apparatus for an imaging apparatus, wherein at the time of transfer, information charges accumulated in at least two of the plurality of potential wells are added and combined for transfer. The control apparatus for an imaging apparatus according to claim 9,
A control apparatus for an image pickup apparatus, wherein at the time of transfer, the accumulated information charges are added and combined along the transfer direction for transfer. In the control apparatus of the imaging device according to claim 9 or 10,
When each pixel of the imaging unit includes a plurality of transfer electrodes extended in a direction crossing the information charge transfer direction,
A control apparatus for an imaging apparatus, wherein at least two pixels arranged continuously along the transfer direction are set as a set, and each of transfer electrodes provided in the set of pixels is independently controlled. . In the control apparatus of the imaging device according to claim 9 or 10,
Control of an image pickup apparatus characterized in that at least two transfer electrodes arranged continuously along the transfer direction are used as a set, and clock pulses having substantially the same phase are supplied to the transfer electrodes set in the set during transfer. apparatus.

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