JP2005332871A - Solid electrolytic capacitor and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid electrolytic capacitor that can be built in a wiring board and be arranged adjacent to a semiconductor chip such as a CPU or the like to be mounted, and to provide a method for manufacturing the same. <P>SOLUTION: The solid electrolytic capacitor 35 is formed of a plate-like capacitor not sealed by an insulating material, and the capacitor is provided with an electrode 31a having one polarity, an electrode 31b having the other polarity, and a solid electrolyte 17 between them. The electrode 31a is exposed over one surface of the plate-like capacitor, and the electrode 31b is exposed over the other surface. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a thin solid electrolytic capacitor that can be built in a wiring board or a semiconductor package on which a semiconductor chip is mounted, and a method for manufacturing the same.

  A capacitor (decoupling capacitor) for suppressing fluctuations in power supply voltage supplied to the semiconductor chip is mounted on a wiring board or semiconductor package on which a semiconductor chip such as a CPU is mounted. For example, a ceramic chip capacitor is externally attached to a currently available CPU package.

  In recent years, since the operating frequency of the CPU has been increased, it is required to provide a capacitor with a larger capacity in the vicinity of the CPU. When the capacitor is arranged close to the CPU, the inductance of the wiring connecting the CPU and the capacitor can be reduced, and the electrical characteristics of the wiring are improved. Therefore, by arranging a large-capacity capacitor close to the CPU, fluctuations in the power supply voltage can be suitably suppressed. Therefore, in order to provide the capacitor near the CPU, it is considered to provide the capacitor inside the wiring board (semiconductor package).

  For example, Patent Document 1 and Patent Document 2 disclose a wiring board in which a solid electrolytic capacitor capable of increasing capacity is formed in a wiring board and built in an insulating layer. However, manufacturing a solid electrolytic capacitor in a wiring board is complicated in its process, and it is difficult to actually produce it.

  Patent Document 3 discloses that a capacitor as a single electronic component formed separately from a wiring board is built in the wiring board. In this case, the capacitor is connected to the wiring layer inside the substrate through a conductive layer formed using a conductive adhesive paste or a conductive adhesive sheet. With this technology, if a solid electrolytic capacitor as an electronic component is built in a wiring board, the process is complicated and it is difficult to actually produce the product. The difficulty can be overcome.

  Conventional solid electrolytic capacitors as electronic components have a large capacity and a proven record. However, conventional solid electrolytic capacitors as electronic components have a lead attached to the capacitor element as described in Patent Documents 4 to 6, for example. Since the capacitor element is manufactured by resin sealing, the outer shape becomes large. For this reason, it is difficult to incorporate the conventional solid electrolytic capacitor in the insulating layer of the wiring board to be thinly formed. In addition, there is a problem in the adhesion between the resin material used for sealing the capacitor and the resin material of the interlayer insulating layer of the wiring board.

JP 2002-246272 A JP 2002-260960 A JP 2001-274034 A JP-A-6-310387 JP-A-7-226336 Japanese Patent Laid-Open No. 11-288848

  To solve the above-mentioned problems of the prior art, and to provide a thin solid electrolytic capacitor that can be built in a wiring board and can be disposed near a semiconductor chip such as a CPU mounted on the wiring board, and a method for manufacturing the same. Is the object of the present invention.

  The solid electrolytic capacitor of the present invention is composed of a flat capacitor element that is not sealed with an insulating material. This capacitor element includes an electrode of one polarity, an electrode of the other polarity, and a solid electrolyte therebetween. In addition, the electrode having one polarity is exposed on one surface of the flat capacitor element, and the electrode having the other polarity is exposed on the other surface.

  Preferably, one polarity electrode is connected to a conductive film on one insulating substrate, and the other polarity electrode is connected to a conductive film on the other insulating substrate. Again preferably, each electrode penetrates the solid electrolyte layer.

  Preferably, a dielectric layer is present on the surface of each electrode except for a portion exposed on each surface and a portion connected to the conductive film on the insulating substrate.

  The solid electrolytic capacitor of the present invention includes (a) a step of preparing a flat base material of an insulating material having a hole, (b) a step of forming a metal material layer on one side of the base material, (c) this metal material Forming a metal bump on the layer; (d) forming a dielectric layer on the surface of the metal material layer and the metal bump by anodizing the metal material layer; and (e) forming a dielectric layer of the substrate. On the formed side, a step of forming a solid electrolyte layer so that a metal bump having a hole filled in the base material and a dielectric layer formed on the surface protrudes, (f) Steps (a) to (e) are repeated, When the surfaces on which the bumps are formed face each other, the position of the hole of the base material matches the position of the bump of the one component, and the position of the bump matches the position of the hole of the base material of the one component, A process of manufacturing the other component of the capacitor; (g) the one component and the other The parts are bonded with their bump-formed surfaces facing each other, and an assembly is produced in which both bumps having a dielectric layer on the surface penetrate through the solid electrolyte layer of the other part and protrude to the outside. (H) forming an insulating layer on both surfaces of the assembly; (i) removing protruding bumps having a dielectric layer on the surface together with at least a part of the insulating layer; And a step of exposing the metal material of the bump.

  Preferably, the formation of the solid electrolyte layer in the step (e) is performed by electrolytic polymerization in which the base material is temporarily fixed on another base material of the conductive material, and the other base material is used as an electrode.

  In order to facilitate the penetration of the solid electrolyte layer of the bump in the step (g), a through hole can be formed in the solid electrolyte layer in the hole of the base material after the step (e).

  According to the present invention, it is possible to use a solid electrolytic capacitor as a single electronic component that is thinner than a conventional solid electrolytic capacitor as a single electronic component. This thin solid electrolytic capacitor can be built in a wiring board (semiconductor package) on which a semiconductor chip such as a CPU is mounted. Therefore, the solid electrolytic capacitor of the present invention is disposed near the CPU whose operating frequency is increasing, and can be effectively used to reduce the wiring inductance connected to the CPU and suppress the fluctuation of the power supply voltage. it can.

  In addition, the capacitor of the present invention using an electrode formed by using a bump provided on the surface of a flat substrate has a high degree of freedom in electrode position. This degree of freedom is further improved by providing an electrode layer covering each surface of the capacitor. Furthermore, since a dielectric layer can be provided on the surface of the bump that constitutes both polar electrodes of the capacitor, a nonpolar capacitor can be used. If the solid electrolytic capacitor according to the present invention is used, a wiring circuit having a small equivalent series inductance can be configured.

  The present invention will be described with reference to the drawings. Needless to say, the following description is an example, and the present invention is not limited thereto.

First, the solid electrolytic capacitor according to the first aspect of the present invention will be described together with its manufacturing method.
A photoresist pattern is formed on one side of a silicon substrate (4 mm × 4 mm, thickness 0.1 mm), and 4 × 2 × 2 holes are formed in the silicon substrate by inductively coupled plasma reactive ion etching (ICP-RIE) using this as a mask. (Opening diameter 0.4 mm, pitch 1 mm). The etching conditions at this time are 2500 W and 15 Pa, and SF ₆ is used as an etching gas. After the etching, the resist pattern is removed to obtain the silicon substrate 1 having the bump holes 3 shown in the top view of FIG. 1B to 1K referred to in the following description corresponds to a cross-sectional view taken along the line BB in FIG.

Next, in order to make the silicon substrate 1 constituting the base material of the capacitor insulative, the surface is thermally oxidized at 1000 ° C. for about 8 hours, and the SiO ₂ insulating film 5 is formed as shown in FIG. Form. Furthermore, aluminum is sputtered at 100 to 500 W in an argon atmosphere of 0.3 to 1 Pa to form an Al film 7 having a thickness of 1 μm on the upper surface of the silicon substrate 1. In FIGS. 1C to 1K referred to below, the insulating film 5 on the surface of the silicon substrate 1 is omitted for simplification.

  The Al balls with a diameter of 0.2 mm are adsorbed one by one with the tool that has been recessed and placed on the Al film 7, and ultrasonic connection is performed at room temperature while applying a load of 10 to 50 g per ball (ultrasonic oscillation) After 2 to 20 msec), 2 × 2 four Al bumps 9 are connected to the Al film 7 with a pitch of 1 mm (FIG. 1C). The height of the Al bump after connection is about 150 μm (the height of the Al bump 9 in FIG. 1C is exaggerated for convenience of drawing).

  With the silicon substrate 1 facing up, a 4 × 3.3 mm portion of the substrate 1 is immersed in an aqueous solution of ammonium adipate, and this is used as the anode, and an Al film is formed at 10-80 V using a stainless steel cathode. 7 and the surface of the Al bump 9 are anodized to form a dielectric film (anodized film) 11 as shown in FIG.

  As shown in FIG. 1 (e), the silicon substrate 1 is temporarily fixed to a stainless steel plate 13 by adhering the periphery with a polyimide tape tape 15 so that the surface on which the Al bumps 9 are formed is exposed. Subsequently, the silicon substrate 1 supported by the stainless steel plate 13 is immersed in an acetonitrile solution of pyrrole monomer to which perchlorate ions or boron tetrafluoride ions are added, and the stainless steel plate 13 is used as an anode. Using another stainless steel cathode, pyrrole was electropolymerized, and as shown in FIG. 1 (f), a solid electrolyte layer 17 of polypyrrole conductive polymer having a thickness of 20 μm was formed on the exposed side of the silicon substrate 1. Form. The tape 15 for temporary fixing is removed, and the silicon substrate 1 on which the solid electrolyte layer 17 is formed is peeled off from the stainless steel plate 13. Since the adhesion between the polypyrrole and the stainless steel plate is weak, this peeling of the silicon substrate 1 is easy.

In this aspect of the present invention, since the stainless steel plate with the substrate attached can be used as one electrode, the solid electrolyte membrane can be formed only by electrolytic polymerization. In the production of a conventional solid electrolytic capacitor, in many cases, a chemically polymerized film and a MnO ₂ film are formed in advance, and then a solid electrolyte film is formed by electrolytic polymerization. A solid electrolyte membrane can be formed.

  The solid electrolyte layer 17 deposited on the peeled silicon substrate 1 has a diameter equal to or smaller than the diameter of the bump 9 formed with the dielectric film 11 as shown in FIG. The through-hole 19 is opened to produce one component 21 of the capacitor. The diameter of the hole 19 may be about 150 to 200 μm. This step is not always necessary when the two components of the capacitor, which will be described later, are joined if the bumps of one component can easily break through the solid electrolyte layer of the other component.

  The other component 23 (FIG. 1 (g)) of the capacitor is manufactured by the same procedure.

  Next, the epoxy adhesive 25 is applied to a part where the solid electrolyte layer 17 is not present in one or both of the parts 21 and 23 (a part covered with the temporary fixing tape when the solid electrolyte layer 17 is formed by electrolytic polymerization). (FIG. 1 (h)) is applied (in addition to the epoxy adhesive, for example, polyimide, acrylic, silicone adhesive, etc. may be used). The formation surfaces of the bumps 9 of the components 21 and 23 face each other, and the position of the through hole 19 opened in the bump 9 of one component 21 (or 23) and the solid electrolyte layer 17 of the other component 23 (or 21) is determined. They are laminated together and pressed for 30 minutes under conditions of a temperature of 150 ° C. and a load of 100 g to 1 kg to produce an assembly 27 (FIG. 1H) in which the parts 21 and 23 are combined. In FIG. 1 (h), the height of the bump 9 is further exaggerated in order to clearly show that the bump 9 formed on one silicon substrate 1 penetrates the solid electrolyte layer 17 formed on the other silicon substrate 1. .

  As shown in FIG. 1 (i), a phenol resin is printed on each surface of the assembly 27 and heated at 180 ° C. for 30 minutes to expose the upper portion of the bump 9 on which the dielectric film 11 is formed. (For example, polyimide, silicone, epoxy, or acrylic resin may be used to form the insulating layer 29). The upper surface of the bump 9 provided with the surrounding dielectric film 11 is ground together with the insulating layer 29 using polishing paper, and the electrode surrounded by the dielectric film 11 as shown in FIG. 31a and 31b (derived from the bump 9 up to FIG. 1 (i)) are exposed, and a part of the insulating layer 29 is left thin to prevent a short circuit due to contact between the electrodes 31a and 31b and the electrolyte of the layer 17. The assembly 27 with the electrodes 31a and 31b exposed is a solid electrolytic capacitor of the present invention.

  As shown in FIG. 1 (k), metal films 33a and 33b may be formed on at least one surface of the solid electrolytic capacitor thus manufactured. The metal films 33a and 33b are formed as thin films having a film thickness of about 0.2 μm by sputtering Ti and Cu or Cr and Cu, for example, under conditions of 0.3 to 1 Pa and 100 to 500 W in an Ar atmosphere. be able to.

  FIGS. 2A and 2B show the solid electrolytic capacitor 35 of the present invention in the state of FIG. 1J in which the metal films 33a and 33b are not formed. The capacitor 35 is composed of a plate-shaped capacitor element that is not sealed with an insulating material. The electrode 31a having one polarity is exposed on one surface, and the electrode 31b having the other polarity is exposed on the other surface. ing. Around each electrode 31a, 31b, there is an anodic oxide film 11 made by anodic oxidation of the electrode material.

  Next, the solid electrolytic capacitor according to the second aspect of the present invention will be described together with its manufacturing method. The capacitor of this embodiment is the same as that of the first embodiment except that the bump of the electrode material is made of gold instead of aluminum. Therefore, the manufacturing method is the same as that in the case of the first embodiment described above, except for the formation of bumps.

  More specifically, the same silicon substrate 1 (FIG. 1A) as in the first embodiment except that the thickness is 70 μm was used and described with reference to FIG. Processes up to the formation of the Al film 7 are performed. Next, four 2 × 2 Au balls having a diameter of 0.15 mm are formed on the Al film 7 at a pitch of 1 mm using a wire bonding apparatus. Ultrasonic connection (ultrasonic oscillation time 2 to 20 msec) is applied at 100 to 200 ° C. while applying a load of 10 to 100 g per ball, and as shown in FIG. An Au bump 51 having a thickness of 100 μm is formed. In the description here, the same reference numerals as those in the first embodiment are used for members common to the members in the first embodiment described with reference to FIGS. 1 (a) to 1 (k). To do.

  Subsequently, as shown in FIG. 3B, an Al film 53 covering the Au bump 51 is formed by sputtering (Ar atmosphere, 0.3 to 1 Pa, 100 to 500 W). In this figure, the Al film 53 is formed only on the Au bump 51, but the Al film 53 may also be formed on the Al film 7.

  Next, the Al film 53 on the surface of the Au bump 51 and the Al film 7 on the surface of the silicon substrate 1 are anodized as described above with reference to FIG. A dielectric film (anodized film) 55 is formed as shown in FIG.

  After this, from the temporary fixing to the stainless steel plate for the formation of the solid electrolyte layer by chemical polymerization described above with reference to FIGS. 1 (e) to 1 (j), the electrodes on both sides (in this case Au The solid electrolytic capacitor of the second embodiment can be manufactured by performing the steps up to the exposure of the electrode). In addition, the diameter of the hole 19 opened in the solid electrolyte layer 17 described with reference to FIG. 1 (g) is taken into consideration that the diameter of the Au bump 51 of the second aspect is smaller than the Al bump 9 of the second aspect. And about 100 to 150 μm.

  Next, the solid electrolytic capacitor of the third aspect of the present invention and the manufacturing method thereof will be described. The capacitor of this embodiment is the same as the first embodiment except that a glass substrate is used instead of the silicon substrate. Therefore, the manufacturing method is also the same as that in the case of the first embodiment described above, except for drilling holes in the substrate.

More specifically, sand blasting (abrasive material particle diameter: # 600 to # 2500, pressure: pressure mask) is formed using a photoresist pattern on one side of a glass substrate (4 mm × 4 mm, thickness 0.1 mm) as a mask. 0.5 to 2 MPa), 2 × 2 four holes (opening diameter 0.4 mm, pitch 1 mm) are opened in the glass substrate. Next, without forming the SiO ₂ insulating film on the substrate surface, from the formation of the Al sputtered film on the substrate surface described above with reference to FIGS. 1C to 1J to the exposure of the electrodes on both sides. The solid electrolytic capacitor of the second aspect is manufactured by performing the process.

  The solid electrolytic capacitor of the present invention comprising a capacitor element that is not sealed with an insulating material can be manufactured thinly and can be easily incorporated in a wiring board. FIG. 4 shows a part of a wiring board incorporating the capacitor of the present invention. In the example of this figure, insulating layers 62a, 62b, 62c, 62d are positioned on the core substrate 60, and wirings 64 are formed on the core substrate 60 and on the insulating layers 62a, 62b, 62c, 62d. The wirings on both sides of 60 are connected to each other by through holes 66, and the wirings of each layer on one side of core substrate 60 are connected to each other by vias 68. The capacitor 70 of the present invention is embedded in the insulating layer 62c on the insulating layer 62b. An electrode (not shown) having one polarity of the capacitor 70 is exposed on the upper surface, and an electrode (not shown) having the other polarity is exposed on the lower surface, and is connected to upper and lower wirings, respectively.

  The capacitor of the present invention can have various modes other than the above-described modes. For example, as the bump material, a metal material capable of anodization such as tantalum can be used in addition to the above-mentioned aluminum or a metal material such as gold provided with an aluminum layer on the surface. When tantalum is used, a tantalum foil can be used as a base material, which can be pressed to form bumps, and holes in the base material can be opened by laser, drilling, etc. .

  In the case of using a silicon base material, the insulating film on the base material surface for making the base material insulative can be formed by a CVD method or the like instead of thermal oxidation. An organic resin material can also be used for the base material of the capacitor.

It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the manufacturing process of the solid electrolytic capacitor of the 1st aspect of this invention. It is a figure explaining the solid electrolytic capacitor of this invention. It is a figure explaining the solid electrolytic capacitor of this invention. It is a figure explaining a part of manufacturing process of the solid electrolytic capacitor of the 2nd aspect of this invention. It is a figure explaining a part of manufacturing process of the solid electrolytic capacitor of the 2nd aspect of this invention. It is a figure explaining a part of manufacturing process of the solid electrolytic capacitor of the 2nd aspect of this invention. It is a figure explaining the example of the wiring board which incorporated the solid electrolytic capacitor of this invention.

Explanation of symbols

1 ... silicon substrate 3 ... bump hole 5 ... SiO ₂ insulating film 7 ... Al film 9 ... Al bumps 11 ... dielectric film 17 ... solid electrolyte layers 21 and 23 ... capacitor component 25 ... adhesive 29 ... insulating layer 31a, 31b ... Electrode 35 ... Solid electrolytic capacitor

Claims (7)

  The capacitor element comprises a flat capacitor element that is not sealed with an insulating material. The capacitor element includes an electrode having one polarity, an electrode having the other polarity, and a solid electrolyte therebetween. A solid electrolytic capacitor characterized in that it is exposed on one surface of a flat capacitor element and an electrode of the other polarity is exposed on the other surface.   The electrode of one polarity is connected to a conductive film on one insulating substrate, and the electrode of the other polarity is connected to a conductive film on the other insulating substrate. Solid electrolytic capacitor.   The solid electrolytic capacitor according to claim 2, wherein electrodes of both polarities connected to the conductive film on each insulating base material respectively penetrate the solid electrolyte layer.   The dielectric layer exists on the surface of the electrode of both polarities except the part exposed to each surface and the part connected to the electroconductive film on an insulating base material. Solid electrolytic capacitor. The capacitor element comprises a flat capacitor element that is not sealed with an insulating material. The capacitor element includes an electrode having one polarity, an electrode having the other polarity, and a solid electrolyte therebetween. A method of manufacturing a solid electrolytic capacitor in which one surface of a flat capacitor element is exposed and the other polarity electrode is exposed on the other surface,
(A) a step of preparing a flat base material made of an insulating material having a hole;
(B) forming a metal material layer on one side of the substrate;
(C) forming a metal bump on the metal material layer;
(D) a step of anodizing the material of the metal material layer and the metal bump to form a dielectric layer on the surface thereof;
(E) a step of forming a solid electrolyte layer so that metal bumps filling the holes of the base material and forming the dielectric layer on the surface thereof protrude on the side of the base material on which the dielectric layer is formed;
(F) When the steps (a) to (e) are repeated and the surfaces on which the bumps are formed face each other, the positions of the holes of the base material coincide with the positions of the bumps of the one component, and the positions of the bumps Producing the other part of the capacitor that matches the position of the hole in the base material of the one part;
(G) The above-mentioned one part and the other part are joined with their bump-formed surfaces facing each other, and both bumps having a dielectric layer on the surface penetrate the solid electrolyte layer of the other part, respectively. And producing an assembly protruding outside,
(H) forming an insulating layer on both sides of the assembly;
(I) removing protruding bumps having a dielectric layer on the surface together with at least a part of the insulating layer to expose the bump metal material on the surface of the assembly;
A method for producing a solid electrolytic capacitor, comprising:   6. The solid according to claim 5, wherein the formation of the solid electrolyte layer in the step (e) is performed by electrolytic polymerization in which the base material is temporarily fixed on another base material of the conductive material, and the other base material is used as an electrode. Electrolytic capacitor manufacturing method.   The method for producing a solid electrolytic capacitor according to claim 5 or 6, further comprising a step of forming a through hole in the solid electrolyte layer in the hole of the base material after the step (e).

Images