JP2006005243A - Solid electrolytic capacitor and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin-type solid electrolytic capacitor that can be incorporated into a wiring board and can be arranged near a semiconductor chip, such as a CPU, mounted onto the wiring board, and to provide a method for manufacturing the solid electrolytic capacitor. <P>SOLUTION: In the solid electrolytic capacitor 40: there are first and second electrodes 38, 25 of the capacitor on one surface and the other, respectively, of an insulating body 10 formed by two insulating members 11, 21 connected by anode junction; a dielectric layer 15a' is positioned inside the body; and a solid electrolyte 31a and a conductive member 15 are positioned in the region of the body between the dielectric layer 15a' and the first electrode 38 and in the region of the body between the dielectric layer 15a' and the second electrode 25, respectively. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a thin solid electrolytic capacitor that can be built in a wiring board or a semiconductor package on which a semiconductor chip is mounted, and a method for manufacturing the same.

  A capacitor (decoupling capacitor) for suppressing fluctuations in power supply voltage supplied to the semiconductor chip is mounted on a wiring board or semiconductor package on which a semiconductor chip such as a CPU is mounted. For example, a ceramic chip capacitor is externally attached to a currently available CPU package.

  In recent years, since the operating frequency of the CPU has been increased, it is required to provide a capacitor with a larger capacity in the vicinity of the CPU. When the capacitor is arranged close to the CPU, the inductance of the wiring connecting the CPU and the capacitor can be reduced, and the electrical characteristics of the wiring are improved. Therefore, by arranging a large-capacity capacitor close to the CPU, fluctuations in the power supply voltage can be suitably suppressed. Therefore, in order to provide the capacitor near the CPU, it is considered to provide the capacitor inside the wiring board (semiconductor package).

  For example, Patent Document 1 and Patent Document 2 disclose a wiring board in which a solid electrolytic capacitor capable of increasing capacity is formed in a wiring board and built in an insulating layer. However, manufacturing a solid electrolytic capacitor in a wiring board is complicated in its process, and it is difficult to actually produce it.

  Patent Document 3 discloses that a capacitor as a single electronic component formed separately from a wiring board is built in the wiring board. In this case, the capacitor is connected to the wiring layer inside the substrate through a conductive layer formed using a conductive adhesive paste or a conductive adhesive sheet. With this technology, if a solid electrolytic capacitor as an electronic component is built in a wiring board, the process is complicated and it is difficult to actually produce the product. The difficulty can be overcome.

  Conventional solid electrolytic capacitors as electronic components have a large capacity and a proven record. However, conventional solid electrolytic capacitors as electronic components have a lead attached to the capacitor element as described in Patent Documents 4 to 6, for example. Since the entire capacitor element is manufactured by resin sealing, the outer shape becomes large and thick. For this reason, it is difficult to incorporate the conventional solid electrolytic capacitor in the insulating layer of the wiring board to be thinly formed.

JP 2002-246272 A JP 2002-260960 A JP 2001-274034 A JP-A-6-310387 JP-A-7-226336 Japanese Patent Laid-Open No. 11-288848

  To solve the above-mentioned problems of the prior art, and to provide a thin solid electrolytic capacitor that can be built in a wiring board and can be disposed near a semiconductor chip such as a CPU mounted on the wiring board, and a method for manufacturing the same. Is the object of the present invention.

  The solid electrolytic capacitor of the present invention has a first electrode of a capacitor on one surface of an insulating main body formed by two insulating members connected by anodic bonding, and a second electrode on the other surface, and a dielectric layer Is located within the body, a solid electrolyte in the region of the body between the dielectric layer and the first electrode, and a conductive member in the region of the body between the dielectric layer and the second electrode. It is characterized by being located respectively.

  The two insulating members connected by anodic bonding may be made of, for example, silicon whose surface is insulated, and in this case, the two silicon insulating members are anodic bonded using a glass layer disposed between them. The Alternatively, one of the insulating members may be made of silicon whose surface is insulated, and the other may be made of glass. In this case, both insulating members are directly anodically bonded.

  Preferably, the material of the conductive member is aluminum. Again preferably, the dielectric layer is formed by anodic oxidation of an aluminum conductive member.

The solid electrolyte may be, for example, a conductive polymer, an inorganic solid electrolyte, a TCNQ complex, or a combination of a conductive polymer and an inorganic solid electrolyte. Preferably, the conductive polymer is polypyrrole, polythiophene or polyaniline. Preferably, the inorganic solid electrolyte is MnO _2.

The solid electrolytic capacitor of the present invention is
Forming a through hole and a recess surrounding the opening of the through hole on one side of the insulating member in the first insulating member;
Forming a through hole provided with an aluminum film around one opening at a position corresponding to the hole in the first insulating member of the second insulating member;
Disposing an aluminum material in the opening of the through hole in the recess of the first insulating member;
The second insulating member is overlaid on the first insulating member so that the aluminum film around one opening of the through hole is in contact with the aluminum material, and the aluminum film and the aluminum material are Joining,
The first and second insulating members are anodically bonded while being pressed at a high temperature, and at that time, the concave portions of the first insulating member are filled with the aluminum material, and among the first and second insulating members Filling each through hole with an aluminum material so as to completely or partially fill the through hole of one of the two and partially fill the through hole of the other, to form a conductive member,
Forming an electrode connected to the conductive member on the surface of the one insulating member;
A conductive member whose surface is exposed in the through hole by partially filling the through hole of the other insulating member is anodized, and a dielectric layer (corresponding to the second electrode described above) is formed on the surface. Forming),
Forming a solid electrolyte on the surface of the dielectric layer in the through hole,
Forming an electrode (corresponding to the first electrode) connected to the solid electrolyte on the surface of the other insulating member;
It can manufacture by the method containing.

  The aluminum material disposed in the opening of the through hole in the recess of the first insulating member is preferably ball-shaped.

  According to the present invention, it is possible to use a solid electrolytic capacitor as a single electronic component that is thinner than a conventional solid electrolytic capacitor as a single electronic component. The solid electrolytic capacitor according to the present invention can be easily built in a wiring board (semiconductor package) on which a semiconductor chip such as a CPU is mounted because of its thinness. Therefore, the solid electrolytic capacitor of the present invention is disposed near the CPU whose operating frequency is increasing, and can be effectively used to reduce the wiring inductance connected to the CPU and suppress the fluctuation of the power supply voltage. it can. If the solid electrolytic capacitor according to the present invention is used, a wiring circuit having a small equivalent series inductance can be configured.

  The present invention will be described with reference to the drawings. Needless to say, the following description is an example, and the present invention is not limited thereto.

Silicon substrate (3 mm x 3 mm, thickness 0.3 mm) by inductively coupled plasma reactive ion etching (ICP-RIE) using a photoresist pattern as a mask to produce the lower part that is one member of the insulating body Two holes with an opening diameter of 0.2 mm and a pitch of 1 mm are formed in two rows in a row to form a total of four holes. The etching conditions at this time are 2500 W and 15 Pa, and SF ₆ is used as an etching gas. Thereafter, the resist pattern is removed, another resist pattern is formed, and a concave portion (opening diameter 0.28 mm, depth 0.1 mm) is formed around each hole by ICP-RIE under the same conditions as those for forming the hole described above. Form. FIG. 1A shows a silicon substrate in which holes and recesses are thus formed. In this figure, the silicon substrate is represented by reference numeral 11, the hole is represented by 12, and the surrounding recess is represented by 13.

After removing the resist pattern (not shown), the silicon substrate 11 is processed at 1000 ° C. for about 8 hours, and a thermal oxide film (SiO ₂ film) 11a as an insulating film is formed on the entire surface as shown in FIG. 1B. Form. The thermal oxide film 11a is not shown for simplicity in FIG. 1C and the subsequent drawings to be referred to in the following description.

  As shown in FIG. 1C, a layer 14 having a thickness of 1 μm made of Na-added low alkali borosilicate glass is sputtered (0.3 to 1 Pa, 100) on the surface of the silicon substrate 11 where the recess 13 is formed. (˜500 W, Ar atmosphere). Next, an Al ball 15 (FIG. 1D) having a diameter of 0.25 μm is disposed in the hole 12 in the recess 13.

Subsequently, in order to fabricate the upper part, an opening diameter is formed on the silicon substrate 21 (3 mm × 3 mm, thickness 0.1 mm) as shown in FIG. A total of four holes 22 of 0.15 mm and a pitch of 1 mm are formed at locations corresponding to the positions of the holes 12 of the lower part. The etching conditions at this time are 2500 W and 15 Pa, and SF ₆ is used as an etching gas. After removing the resist pattern (not shown), the silicon substrate 21 is processed at 1000 ° C. for about 8 hours, and a thermal oxide film (SiO ₂ film) 21a as an insulating film is formed on the entire surface as shown in FIG. 1 (f). Form. This thermal oxide film 21a is not shown for simplicity in FIG. 1 (g) and thereafter, which will be referred to in the following description.

  Next, an Al film having a thickness of 1 μm is formed on one surface of the silicon substrate 21 by sputtering (0.3 to 1 Pa, 100 to 500 W, Ar atmosphere), and the Al film 24 is formed only around the hole 22 by photolithography. (FIG. 1 (g)) is left. At this time, a Stanford etching solution (an aqueous solution containing phosphoric acid, acetic acid, and nitric acid) is used for etching the Al film. Thereafter, the resist pattern (not shown) used for the etching mask is removed.

  As shown in FIG. 1 (h), the holes 21 of the lower component substrate 11 and the holes 22 of the upper component substrate 21 are aligned, and the substrate 21 is overlaid on the substrate 11, and the lower component Al balls 15 and The upper part of the patterned Al film 24 is brought into contact, and the stage temperature is set to room temperature, and ultrasonic connection processing is performed under a condition of ultrasonic oscillation time of 10 to 80 msec under a load of 50 to 400 g. The Al ball 15 is bonded to the silicon substrate 21 through the Al film 24 of the upper part.

  Subsequently, the lower part silicon substrate 11 is used as a cathode and the upper part silicon substrate 21 is used as an anode, and an anodic bonding process is performed under conditions of 250 ° C. and 20 to 200 V while being pressed under a load of 1 kg. As shown in i), the lower component silicon substrate 11 is bonded to the upper component silicon substrate 21 through the glass layer 14 thereon. The Al ball 15 is filled with a part of the hole 12 of the lower part and the recess 13 (FIG. 1 (h)) by the press at this time, and filled with the hole 22 (FIG. 1 (h)) of the upper part, A conductive member 15a (a combination of the Al ball 15 and the Al film 24) indicated by 15a in FIG. 1 (i) is formed.

  It is composed of a Ti film (thickness 0.01 μm) and a Cu film (thickness 0.2 μm) on the upper component substrate 21 by sputtering in an atmosphere of 0.3 to 1 Pa, 100 to 500 W, Ar. A Ti / Cu sputtered layer 25 is formed (FIG. 1 (j)).

Next, the Al material conducting member 15a in the hole 12 of the lower part is immersed in an aqueous solution of an ammonium adipate (anodizing solution) in a stainless steel container (not shown), and Ti on the upper part side is made. / Cu layer 25 is connected to the positive electrode of the DC power source, a stainless steel container is connected to the negative electrode, and a voltage of 10 to 80 V is applied, and an anodic oxide film (Al ₂ O ₅ is formed on the surface of the conductive member 15a made of Al material. A dielectric layer 15a ′ (FIG. 1 (k)) of the film is formed. In this way, an intermediate product 27 (FIG. 1 (k)) obtained by joining the upper part and the lower part is obtained.

  Masking is performed so that only the surface of the lower part of the intermediate product 27 where the hole 12 is exposed is exposed, and the exposed surface and the inside of the hole 12 are brought into contact with a solution obtained by adding anhydrous ferric chloride to ethanol and oxidized there. The agent is fixed and brought into contact with a solution containing pyrrole monomer and a dopant (perchlorate ion or tetrafluoroborate ion) to form a chemical polymerization film (not shown) of polypyrrole having a thickness of 10 μm by chemical polymerization. . Subsequently, the intermediate product on which this chemically polymerized film is formed is immersed in a solution of acetonitrile containing a pyrrole monomer and a dopant (perchlorate ion or tetrafluoroborate ion). Electropolymerization is performed using the stainless steel plate inside as a cathode to form a polypyrrole electrolytic polymerization film (not shown) having a thickness of 20 μm. In this way, as shown in FIG. 1L, the solid electrolyte layer 31 that covers the exposed surface and fills the hole 12 (FIG. 1K) is obtained.

  The solid electrolyte layer 31 on the intermediate product 27 is removed by polishing, leaving only the solid electrolyte 31a (FIG. 1 (m)) in the hole 12. Next, as shown in FIG. 1 (n), a carbon paste is printed on the surface from which the solid electrolyte layer has been removed, except for the periphery thereof, and cured at 150 ° C. for 30 minutes, and a carbon paste layer having a thickness of 5 to 10 μm. 33 is formed. Further thereon, an Ag paste is printed and cured at 180 ° C. for 60 minutes to form an Ag paste layer 34 having a thickness of 5 to 50 μm. Subsequently, an epoxy resin layer 36 for sealing and adhesion is printed on the outside of the carbon paste layer 33 and the Ag paste layer 34, and a Cu foil 38 (thickness 0. 0) covering the epoxy resin layer 36 and the Ag paste layer 34 is printed. 1 mm). Thus, the solid electrolytic capacitor 40 of the present invention is obtained.

  As shown in FIG. 1 (n), the solid electrolytic capacitor 40 of the present invention is made insulative by applying an insulating body 10 (insulating treatment for forming a thermal oxide film on the entire surface), and the glass layer 14 is formed. It has a dielectric layer 15a ′ inside the silicon substrate 11 and 21 integrated by anodic bonding to be used, and this dielectric layer 15a ′ is disposed on one side of the main body 10 via the solid electrolyte 31a. The other side of the Ti / Cu layer 25 composed of the Ti film and the Cu film formed on the other side of the main body 10 through the conductive member 15a. It is connected to the electrode. At least one of these electrodes (for example, the upper electrode of the Ti / Cu layer 25) may be patterned. FIG. 1 (o) shows a solid electrolytic capacitor 40a having a patterned upper electrode 25a.

  Next, another example of the solid electrolytic capacitor of the present invention will be described. The solid electrolytic capacitor of this example is the same as that of the example described above except that one of two silicon substrates whose surfaces are insulated is replaced with a glass substrate (a substrate of low-alkali borosilicate glass added with Na). It is the same.

  More specifically, in the case of this example, as shown in FIG. 2A, the same dimensions (3 mm × 3 mm, thickness 0. 0) as the silicon substrate 11 of the previous example (FIG. 1A). 3 mm) glass substrate 51 is prepared, and a two-step sandblasting process using a photoresist pattern formed on one side as a mask (abrasives having a particle size of # 600 to # 2500 at a pressure of 0.5 to 2 MPa on a glass substrate) A hole 52 (opening diameter 0.2 mm) and a recess 53 (opening diameter 0.28 mm, depth 0.1 mm) are formed by spraying. Subsequently, as shown in FIG. 2B, the Al ball 15 having the same diameter of 0.25 mm as that used in the previous example is disposed in the hole 52 in the concave portion 53 of the glass substrate 51. The lower part of the solid electrolytic capacitor is produced.

  Since the glass substrate 51 itself is insulative, the glass substrate 51 can be used for manufacturing a solid electrolytic capacitor without performing an insulating process such as forming an oxide film on the entire surface thereof like the silicon substrate used in the previous example. it can. Further, the glass substrate 51 is a silicon substrate used in the upper part of the example described here (this silicon substrate is subjected to an insulation treatment in the same manner as the silicon substrate of the upper part described in the previous example). ) Can be welded directly.

  Then, the solid electrolytic capacitor of this example can be manufactured according to the process demonstrated with reference to FIG.1 (e) -1 (n) in the previous example. However, at the time of anodic bonding for connecting the glass substrate 51 (FIG. 2B) of the lower member and the silicon substrate 21 (FIG. 1G) provided with the Al film 24 patterned around the hole 22 of the upper member, The substrate 51 is a cathode.

  The solid electrolytic capacitor 40 of the present invention shown in FIG. 1 (n) or the solid electrolytic capacitor 40a of the present invention shown in FIG. 1 (o) is entirely the same as a solid electrolytic capacitor as a single electronic component so far. Since the lead drawn out from the resin-encapsulated capacitor element is not used, it can be made particularly thin as compared with a conventional single-unit solid electrolytic capacitor, and can be easily built in a wiring board. FIG. 3 shows an example of a part of a wiring board incorporating the capacitor of the present invention. In the example of this figure, insulating layers 62a, 62b, 62c, 62d are positioned on the core substrate 60, and wirings 64 are formed on the core substrate 60 and on the insulating layers 62a, 62b, 62c, 62d. The wirings on both sides of 60 are connected to each other by through holes 66, and the wirings of each layer on one side of core substrate 60 are connected to each other by vias 68. The solid electrolytic capacitor 70 of the present invention is embedded in the insulating layer 62c on the insulating layer 62b. One electrode (not shown) of the capacitor 70 is exposed on the upper surface, and the other electrode (not shown) is exposed on the lower surface, and is connected to the upper and lower wirings, respectively.

In the solid electrolytic capacitor of the present invention, various modes other than the modes already described are possible. For example, in the processing of holes and recesses in a silicon substrate, wet etching may be used in addition to the dry etching of ICP-RIE described above. In the processing of holes and recesses in a glass substrate, the sandblast described above is used. In addition, wet etching, ultrasonic processing, or the like may be used. For the surface treatment for insulating the silicon substrate, it is possible to use a method of depositing an insulating material on the entire surface by, for example, a CVD method. For the solid electrolyte, other conductive polymers such as polythiophene and polyaniline may be used in addition to the polypyrrole used in the example described above. In addition, the solid electrolyte may be an inorganic solid electrolyte typified by MnO ₂ , a TCNQ complex, or a combination of an inorganic solid electrolyte such as MnO ₂ and a conductive polymer. For example, when MnO ₂ is used, thermal decomposition of an aqueous manganese nitrate solution can be used. When MnO ₂ is combined with a conductive polymer, it is electrically conductive by electrolytic polymerization on the first formed MnO ₂ layer. A polymeric layer can be formed. In addition to the epoxy resin used in the previous example, a silicone resin, a polyimide resin, or the like can also be used as the resin material used for sealing the side surface portion of the capacitor and bonding the metal material to be one electrode. Furthermore, the order of forming the holes and recesses in the lower member is opposite to that described in the previous example, and it is also possible to form the holes after forming the recesses first. The lower member and the upper member may also be manufactured in the reverse order as described in the previous example.

It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining the solid electrolytic capacitor of this invention, and its manufacture. It is a figure explaining manufacture of the upper member used by manufacture of the solid electrolytic capacitor of another example of this invention. It is a figure explaining manufacture of the upper member used by manufacture of the solid electrolytic capacitor of another example of this invention. It is a figure explaining the example of the wiring board which incorporated the solid electrolytic capacitor of this invention.

Explanation of symbols

11, 21 Silicon substrate 11a, 21a Thermal oxide film 12, 22, 52 Hole 13, 53 Recess 14 Glass layer 15 Al ball 15a Conducting member 15a 'Dielectric layer 24 Al film 25 Ti / Cu layer 31 Solid electrolyte layer 31a Solid electrolyte 33 Carbon paste layer 34 Ag paste layer 36 Epoxy resin layer 38 Cu foil 40, 40a, 70 Solid electrolytic capacitor 51 Glass substrate

Claims (10)

  The insulating main body formed by two insulating members connected by anodic bonding has the first electrode of the capacitor on one side and the second electrode on the other side, and the dielectric layer is located inside the main body. The solid electrolyte is located in the region of the main body between the dielectric layer and the first electrode, and the conductive member is located in the region of the main body between the dielectric layer and the second electrode. Solid electrolytic capacitor.   The solid electrolytic capacitor according to claim 1, wherein the two insulating members are made of silicon having a surface subjected to insulation treatment, and are anodically bonded using a glass layer disposed therebetween.   The solid electrolytic capacitor according to claim 1, wherein one of the insulating members is made of silicon having a surface subjected to insulation treatment, and the other is made of glass.   The solid electrolytic capacitor according to any one of claims 1 to 3, wherein a material of the conductive member is aluminum.   The solid electrolytic capacitor according to claim 4, wherein the dielectric layer is formed by anodization of aluminum of the conductive member.   The solid electrolytic capacitor according to any one of claims 1 to 5, wherein the solid electrolyte is a conductive polymer, an inorganic solid electrolyte, a TCNQ complex, or a combination of a conductive polymer and an inorganic solid electrolyte.   The solid electrolytic capacitor according to claim 6, wherein the conductive polymer is polypyrrole, polythiophene, or polyaniline. The solid electrolytic capacitor according to claim 6, wherein the inorganic solid electrolyte is MnO ₂ . The insulating main body formed by two insulating members connected by anodic bonding has the first electrode of the capacitor on one side and the second electrode on the other side, and the dielectric layer is located inside the main body. A solid electrolytic capacitor in which a solid electrolyte is located in a region of the main body between the dielectric layer and the first electrode, and a conductive member is located in a region of the main body between the dielectric layer and the second electrode A manufacturing method of
Forming a through hole and a recess surrounding the opening of the through hole on one side of the insulating member in the first insulating member;
Forming a through hole provided with an aluminum film around one opening at a position corresponding to the hole in the first insulating member of the second insulating member;
Disposing an aluminum material in the opening of the through hole in the recess of the first insulating member;
The second insulating member is overlaid on the first insulating member so that the aluminum film around one opening of the through hole is in contact with the aluminum material, and the aluminum film and the aluminum material are Joining,
The first and second insulating members are anodically bonded while being pressed at a high temperature, and at that time, the concave portions of the first insulating member are filled with the aluminum material, and among the first and second insulating members Filling each through hole with an aluminum material so as to completely or partially fill the through hole of one of the two and partially fill the through hole of the other, to form a conductive member,
Forming an electrode connected to the conductive member on the surface of the one insulating member;
Partially filling the through hole of the other insulating member and anodizing the conductive member whose surface is exposed in the through hole to form a dielectric layer on the surface;
Forming a solid electrolyte on the surface of the dielectric layer in the through hole,
Forming an electrode connected to the solid electrolyte on the surface of the other insulating member;
A solid electrolytic capacitor manufacturing method comprising: The method for manufacturing a solid electrolytic capacitor according to claim 9, wherein a ball-shaped aluminum material is used as the aluminum material disposed in the opening of the through hole in the recess of the first insulating member.

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