JP2005260196A - Method of manufacturing semiconductor device, and surface-mounted semiconductor device - Google Patents

Method of manufacturing semiconductor device, and surface-mounted semiconductor device Download PDF

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JP2005260196A
JP2005260196A JP2004153694A JP2004153694A JP2005260196A JP 2005260196 A JP2005260196 A JP 2005260196A JP 2004153694 A JP2004153694 A JP 2004153694A JP 2004153694 A JP2004153694 A JP 2004153694A JP 2005260196 A JP2005260196 A JP 2005260196A
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parallel
semiconductor device
conductive plate
plane
coating material
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Hiroyuki Sekine
浩幸 関根
Masaru Kuno
勝 久野
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Origin Electric Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing capable of manufacturing at a low cost a small-sized surface-mounted semiconductor device, and to provide a small-sized surface-mounted type semiconductor device of high heat dissipation. <P>SOLUTION: The method of manufacturing the semiconductor device includes a step of carrying and soldering a semiconductor element on one flat surface of a conductive board; a step of soldering a soldering part connected with the parallel part parallel, with the flat surface of the conductive board and a soldering part connected with the parallel part of a wire connection member, having a perpendicular part perpendicular to the parallel part to the semiconductor element; a step of adhering the adhering part connected to the perpendicular part of the wire connection member to one flat surface of the conductive board; a step of covering with an electrical insulating coating material so that the one flat surface of the conductive board and the semiconductor element are at least covered; and a step of cutting the parallel part of the wire connection member, the electrical insulating coating material and the conductive board and dividing into each semiconductor device. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、半導体装置の製造方法、特に薄型の表面実装型半導体装置を製造するのに適した製造方法、及びその方法により製造される表面実装型半導体装置に関する。   The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a manufacturing method suitable for manufacturing a thin surface-mounted semiconductor device, and a surface-mounted semiconductor device manufactured by the method.

携帯電話に代表される小型で、高性能の小型電子機器は、多数の小型電子部品が実装されているプリント基板を備えている。そのような小型電子機器にあっては、年々、更なる小型化、高機能化の方向に向かっており、これに伴って高密度実装の要求が高まり、小型電子部品についても更に薄型化、小型化の要求が強まっている。前述の小型電子部品の内の一部分は、ダイオード、トランジスタ（ＦＥＴ）などの表面実装型半導体装置であり、小型電子機器といえどもその電力を扱う半導体装置は、要求される電流容量などの面から現在ではＩＣ化が難しく、個別に製造される表面実装型半導体装置が用いられている。   A small and high-performance small electronic device typified by a mobile phone includes a printed circuit board on which a large number of small electronic components are mounted. In such small electronic devices, the trend toward further miniaturization and higher functionality has been made year by year, and with this, the demand for high-density mounting has increased, and even smaller electronic components have become thinner and smaller. There is an increasing demand for conversion. Some of the small electronic components described above are surface-mount semiconductor devices such as diodes and transistors (FETs), and semiconductor devices that handle the power of even small electronic devices are required in terms of required current capacity. At present, it is difficult to make an IC, and a surface mount semiconductor device manufactured individually is used.

表面実装型半導体装置を薄型化、小型化する構造については既に種々のものが提案されており、厚みが１ｍｍ弱という薄型の個別に製造される表面実装型半導体装置も実現されている。代表的なものとして、適当に曲げられた一対のリード電極間に半導体素子を位置させ、前記一対のリード電極の平坦部分がモールド樹脂の底面に露出する構造にして薄型化と小型化とを図った発明が提案されている（例えば、特許文献１参照）。   Various structures for reducing the thickness and size of surface-mounted semiconductor devices have already been proposed, and a thin and individually manufactured surface-mounted semiconductor device having a thickness of less than 1 mm has also been realized. As a typical example, a semiconductor element is positioned between a pair of appropriately bent lead electrodes, and a flat portion of the pair of lead electrodes is exposed on the bottom surface of the mold resin to reduce the thickness and size. Have been proposed (see, for example, Patent Document 1).

その他にも、比較的厚みのあるほぼ同じ厚みの二つの金属板を電極とし、一方の金属板に半導体素子を搭載し、その半導体素子を他方の金属板にワイヤボンディングして樹脂モールドし、前記金属板を端子部材として兼用したもの（例えば、特許文献２参照）、また、金属板をほぼ９０度に折り曲げて半導体素子を支承する端子部材として用いると共に、その折り曲げた部分を表面実装用端子部材として用いて、薄型化と小型化を図った発明（例えば、特許文献３参照）などがある。   In addition, two metal plates with relatively the same thickness are used as electrodes, a semiconductor element is mounted on one metal plate, the semiconductor element is wire-bonded to the other metal plate, resin molded, A metal plate also used as a terminal member (see, for example, Patent Document 2), and used as a terminal member for supporting a semiconductor element by bending the metal plate at approximately 90 degrees, and the bent portion is a surface mounting terminal member As an invention (see, for example, Patent Document 3) which is thinned and miniaturized.

しかし、特許文献１、２の表面実装型半導体装置の製造工程にあっては、専用のモールド金型でモールドを行うトランスファーモールド装置が必要である。かかる金型を使用する場合には、僅かなサイズの変更などを行う場合にも、その度に新規に金型を作り直すか、あるいは変更しなければならず、時間とコストとがかかる。   However, in the manufacturing process of the surface mount semiconductor device disclosed in Patent Documents 1 and 2, a transfer mold apparatus that performs molding with a dedicated mold is required. When such a mold is used, even when a slight size change is performed, a new mold must be recreated or changed each time, which takes time and cost.

また、トランスファーモールドの場合には、モールド部分のランナー、ゲート部分、スポット部分など不要な廃棄部分が生じ、これら部分のモールド樹脂を廃棄処分するので、コスト的にも、環境保護の面からも好ましくない。特許文献３のものでは、量産に不適な構造であるなどの問題がある。   In the case of transfer molding, unnecessary waste parts such as runners, gate parts and spot parts of the mold part are generated, and the mold resin in these parts is discarded, which is preferable from the viewpoint of cost and environmental protection. Absent. The thing of patent document 3 has problems, such as a structure unsuitable for mass production.

更にまた、下記特許文献で提案されている表面実装型半導体装置では、その側面から端子部材が突出する構造であるので、小型化の面で、難点がある。
特許第２７４７６３４公報 特許第２９０２９１８号公報 特開２００２−２６０６７号公報 Furthermore, since the surface mount type semiconductor device proposed in the following patent document has a structure in which the terminal member protrudes from the side surface, there is a difficulty in miniaturization.
Japanese Patent No. 2747634 Japanese Patent No. 2902918 JP 2002-26067 A

本発明は、上記課題に鑑みて、小型の表面実装型半導体装置を低コストで製造し得る製造方法を提供すること、及び小型で高放熱の表面実装型半導体装置を提供することを目的としている。   SUMMARY OF THE INVENTION In view of the above problems, the present invention has an object to provide a manufacturing method capable of manufacturing a small surface-mount semiconductor device at low cost, and to provide a small-sized and high heat dissipation surface-mount semiconductor device. .

前記課題を解決するために、第１の発明は、半導体装置の製造方法において、導電板の一方の平面上に半導体素子を搭載してハンダ付けする工程と、前記導電板の前記平面に平行な平行部と該平行部に垂直な垂直部とを有する結線部材の前記平行部につながるハンダ付け部を前記半導体素子にハンダ付けする工程と、前記結線部材の前記垂直部につながる固着部を前記導電板の前記一方の平面に固着する工程と、前記導電板の前記一方の平面と前記半導体素子とが少なくとも覆われるように電気絶縁被覆材料で被覆する工程と、前記結線部材の前記平行部と前記電気絶縁被覆材料と前記導電板とを切断して個々の半導体装置に分離する工程とからなることを特徴とする半導体装置の製造方法を提供するものである。   In order to solve the above-described problems, a first invention is a method of manufacturing a semiconductor device, wherein a semiconductor element is mounted on one plane of a conductive plate and soldered, and parallel to the plane of the conductive plate. Soldering a soldering part connected to the parallel part of the connection member having a parallel part and a vertical part perpendicular to the parallel part to the semiconductor element, and fixing the connection part connected to the vertical part of the connection member to the conductive member. A step of adhering to the one plane of the plate, a step of covering with the electrically insulating coating material so that the one plane of the conductive plate and the semiconductor element are at least covered, and the parallel portion of the connection member and the The present invention provides a method for manufacturing a semiconductor device, comprising a step of cutting an electrically insulating coating material and the conductive plate into individual semiconductor devices.

第２の発明は、半導体装置の製造方法において、導電板の一方の平面上に複数の半導体素子を搭載してハンダ付けする工程と、前記導電板の前記平面に平行な平行部と該平行部に垂直な垂直部とを有する結線部材の両端に位置するハンダ付け部を一定間隔離れて位置する前記半導体素子にハンダ付けする工程と、前記導電板の前記一方の平面と前記半導体素子とが少なくとも覆われるように電気絶縁被覆材料で被覆する工程と、前記結線部材の前記平行部と前記電気絶縁被覆材料と前記導電板とを切断して個々の半導体装置に分離する工程とからなることを特徴とする半導体装置の製造方法を提供するものである。   According to a second aspect of the present invention, in the method of manufacturing a semiconductor device, a step of mounting a plurality of semiconductor elements on one plane of the conductive plate and soldering, a parallel portion parallel to the plane of the conductive plate, and the parallel portion A soldering portion positioned at both ends of a connecting member having a vertical portion perpendicular to the semiconductor element, soldered to the semiconductor element positioned at a predetermined distance, and the one plane of the conductive plate and the semiconductor element at least A step of covering with an electrically insulating coating material so as to be covered; and a step of cutting the parallel portion of the connecting member, the electrically insulating coating material, and the conductive plate and separating them into individual semiconductor devices. A method for manufacturing a semiconductor device is provided.

第３の発明は、前記第１又は第２の発明において、電気絶縁被覆材料で被覆する前記工程は、前記結線部材の前記平行部が露出するように行われることを特徴とする半導体装置の製造方法を提供するものである。
第４の発明は、前記第１又は第２の発明において、前記結線部材の前記平行部が露出するように研磨して電気絶縁被覆材料の一部分を除去する工程を備えることを特徴とする半導体装置の製造方法を提供するものである。
第５の発明は、前記第１の発明ないし前記第４の発明のいずれかにおいて、電気絶縁被覆材料で被覆する前記工程は、前記導電板の他方の平面が露出するように行われることを特徴とする半導体装置の製造方法を提供するものである。 According to a third aspect of the present invention, in the first or second aspect of the invention, the step of covering with the electrically insulating coating material is performed so that the parallel portion of the connecting member is exposed. A method is provided.
According to a fourth aspect of the invention, there is provided the semiconductor device according to the first or second aspect, further comprising a step of removing a part of the electrically insulating coating material by polishing so that the parallel portion of the connection member is exposed. The manufacturing method of this is provided.
According to a fifth invention, in any one of the first invention to the fourth invention, the step of covering with the electrically insulating coating material is performed such that the other plane of the conductive plate is exposed. A method for manufacturing a semiconductor device is provided.

第６の発明は、前記第１の発明ないし前記第４の発明のいずれかにおいて、電気絶縁被覆材料で被覆する前記工程は、前記導電板の他方の平面も覆うように行われることを特徴とする半導体装置の製造方法を提供するものである。
第７の発明は、平面を有する導電板と、該導電板の前記平面に搭載されてハンダ付けされている半導体素子と、前記導電板の平面に平行な平行部と該平行部に垂直な垂直部とを有する端子部材であって、前記垂直部につながる一端が前記導電板に固着されている第１の端子部材と、前記導電板の平面に平行な平行部を有する端子部材であって、前記平行部につながる一端が前記半導体素子にハンダ付けされている第２の端子部材とからなり、前記第１と第２の端子部材の前記双方の平行部が同等の高さにあることを特徴とする表面実装型半導体装置を提供するものである。
第８の発明は、前記第７の発明において、前記半導体素子は２個以上並置されており、前記第２の端子部材の前記他端は前記２個以上の半導体素子にハンダ付けされていることを特徴とする表面実装型半導体装置を提供するものである。 A sixth invention is characterized in that, in any one of the first invention to the fourth invention, the step of covering with the electrically insulating coating material is performed so as to cover the other plane of the conductive plate. A method for manufacturing a semiconductor device is provided.
According to a seventh aspect of the present invention, there is provided a conductive plate having a plane, a semiconductor element mounted on the plane of the conductive plate and soldered, a parallel portion parallel to the plane of the conductive plate, and a vertical perpendicular to the parallel portion. A first terminal member having one end connected to the vertical portion fixed to the conductive plate, and a terminal member having a parallel portion parallel to the plane of the conductive plate, One end connected to the parallel portion is composed of a second terminal member soldered to the semiconductor element, and both the parallel portions of the first and second terminal members are at the same height. The surface mount type semiconductor device is provided.
In an eighth aspect based on the seventh aspect, two or more semiconductor elements are juxtaposed, and the other end of the second terminal member is soldered to the two or more semiconductor elements. A surface mount semiconductor device characterized by the above is provided.

第９の発明は、平面を有する導電板と、該導電板の前記平面に搭載されてハンダ付けされている一方の面を有する複数個の半導体素子と、前記導電板の平面に平行な平行部と該平行部の一端につながるハンダ付け部とを有する端子部材であって、前記ハンダ付け部が前記それぞれの半導体素子にハンダ付けされている第１、第２の端子部材と、前記導電板の前記一方の平面と前記半導体素子とを少なくとも覆っている電気絶縁被覆材料と、前記第１と第２の端子部材の前記双方の平行部が同等の高さにあると共に、それら端子部材の前記平行部の他端が電気絶縁被覆材料から露出していることを特徴とする表面実装型半導体装置を提供するものである。
第１０の発明は、前記第９の発明において、前記複数個の半導体素子は、前記導電板によって同極性又は逆極性で、並列に又は直列に接続されていることを特徴とする表面実装型半導体装置を提供するものである。
第１１の発明は、前記第１の発明ないし前記第１０の発明のいずれかにおいて、前記導電板は、金属板、又は電気絶縁材料あるいは抵抗材料からなる板状若しくはシート状の基材の一方の面に導電層を形成してなる導電板状部材からなることを特徴とする表面実装型半導体装置を提供するものである。
第１２の発明は、前記第１１の発明において、前記絶縁性基板に形成された導電層は金属材料からなる導電パターンであり、露出しない表面実装型半導体装置を提供するものである。
According to a ninth aspect of the present invention, there is provided a conductive plate having a plane, a plurality of semiconductor elements having one surface mounted on the plane of the conductive plate and soldered, and a parallel portion parallel to the plane of the conductive plate And a soldering part connected to one end of the parallel part, wherein the soldering part is soldered to each of the semiconductor elements, the first and second terminal members, and the conductive plate The electrically insulating coating material covering at least the one plane and the semiconductor element and the parallel portions of the first and second terminal members are at the same height, and the parallel of the terminal members The other end of the part is exposed from the electrically insulating coating material, and the surface mounted semiconductor device is provided.
A tenth aspect of the present invention is the surface mount semiconductor according to the ninth aspect, wherein the plurality of semiconductor elements are connected in parallel or in series with the same polarity or opposite polarity by the conductive plate. A device is provided.
In an eleventh aspect based on any one of the first to tenth aspects, the conductive plate is one of a metal plate, a plate-like or sheet-like substrate made of an electrically insulating material or a resistance material. A surface-mount type semiconductor device comprising a conductive plate member having a conductive layer formed on a surface is provided.
A twelfth invention provides a surface-mount type semiconductor device according to the eleventh invention, wherein the conductive layer formed on the insulating substrate is a conductive pattern made of a metal material and is not exposed.

前記第１の発明によれば、半導体装置を小型化でき、また、一種類の結線部材で双方の端子部材を形成できると共に、一括モールドしているので、経済的に製造できる製造方法を提供することができる。
前記第２の発明によれば、２個以上の半導体素子を有する半導体装置を小型化でき、また、一種類の結線部材で双方の端子部材を形成できると共に、一括モールドしているので、経済的に製造できる製造方法を提供することができる。
また、前記第３の発明によれば、さらに、半導体装置の端子部材となる結線部材の平行部の露出の割合を調整でき、また、モールド樹脂の研磨工程を省略することができる。
また、前記第４の発明によれば、さらに、樹脂モールドにモールド樹脂の高さをそれほど厳密の調整する必要は無く、樹脂モールドが容易であると同時に、研磨によって平行部の高さを均一にすることができる。 According to the first aspect of the present invention, a semiconductor device can be miniaturized, and both terminal members can be formed with a single type of connection member, and since it is molded together, a manufacturing method that can be manufactured economically is provided. be able to.
According to the second aspect of the invention, a semiconductor device having two or more semiconductor elements can be reduced in size, and both terminal members can be formed with a single type of connection member, and since it is molded in a lump, it is economical. The manufacturing method which can be manufactured can be provided.
In addition, according to the third aspect of the present invention, it is possible to further adjust the exposure ratio of the parallel portion of the connection member that becomes the terminal member of the semiconductor device, and to omit the molding resin polishing step.
According to the fourth aspect of the present invention, it is not necessary to adjust the height of the mold resin so strictly to the resin mold, the resin mold is easy, and at the same time, the height of the parallel portion is made uniform by polishing. can do.

また、前記第５の発明によれば、さらに、導電板として用いられる金属板を露出させているので、半導体装置の放熱をより良好なものにできる。
また、前記第６の発明によれば、さらに、導電板の錆びを防止でき、導電板と半導体素子との間に生じるストレスを低減することができる。
また、前記第７の発明によれば、端子部材が電気絶縁被覆材料の側面から突出することがないので、表面実装型半導体装置の小型化ができる。また、導電板によって熱容量が増し、放熱の良好な表面実装型半導体装置を得ることができる。
また、前記第８の発明によれば、より電流容量の大きな表面実装型半導体装置を得ることができる。
また、前記第９の発明によれば、端子部材が電気絶縁被覆材料の側面から突出することがないので、表面実装型半導体装置の小型化ができる。また、複数の半導体素子、又は半導体素子に他の電子部品を組み合わせた構造の表面実装型半導体装置を得ることができる。
また、前記第１０の発明によれば、さらに、双方向の定電圧半導体素子、又は高電圧のダイオードなど種々の構成の表面実装型半導体装置を得ることができる。
また、前記第１１の発明によれば、導電板が金属板だけでなく、合成樹脂板などに導電層を形成してなる板状部材を導電板として用いることができ、前記板状部材を用いたときには個々の半導体装置に切断することが容易になる。
また、前記第１２の発明によれば、基材に形成された導電層が露出しないので、空気中の湿度などによる影響を受けにくいので、信頼性の高い表面実装型半導体装置を得ることができ、また、個々の半導体装置に分離するときに切断し易い。
In addition, according to the fifth aspect, since the metal plate used as the conductive plate is exposed, the heat dissipation of the semiconductor device can be improved.
In addition, according to the sixth aspect of the invention, it is possible to prevent rusting of the conductive plate and reduce stress generated between the conductive plate and the semiconductor element.
According to the seventh aspect of the invention, since the terminal member does not protrude from the side surface of the electrically insulating coating material, the surface mount semiconductor device can be downsized. In addition, a heat capacity is increased by the conductive plate, and a surface mount semiconductor device with good heat dissipation can be obtained.
According to the eighth aspect of the invention, a surface mount semiconductor device having a larger current capacity can be obtained.
According to the ninth aspect of the present invention, since the terminal member does not protrude from the side surface of the electrically insulating coating material, the surface mount semiconductor device can be reduced in size. In addition, a surface-mounted semiconductor device having a structure in which a plurality of semiconductor elements or a semiconductor element is combined with another electronic component can be obtained.
In addition, according to the tenth aspect of the present invention, surface mount semiconductor devices having various configurations such as a bidirectional constant voltage semiconductor element or a high voltage diode can be obtained.
According to the eleventh aspect of the present invention, the conductive plate is not limited to a metal plate, but a plate member formed by forming a conductive layer on a synthetic resin plate or the like can be used as the conductive plate. When it is, it becomes easy to cut into individual semiconductor devices.
According to the twelfth aspect of the present invention, since the conductive layer formed on the base material is not exposed, it is difficult to be influenced by humidity in the air, so that a highly reliable surface mount semiconductor device can be obtained. Moreover, it is easy to cut when separating into individual semiconductor devices.

先ず、本発明を実施するための最良の形態である実施形態１の表面実装型半導体装置の製造方法について説明する。
[実施形態１]
図１ないし図３により本発明の実施形態１について説明する。図１は、本発明に係る表面実装型半導体装置の製造方法の実施形態１を説明するための断面図である。図２は、本発明に係る製造方法の実施形態１を説明するための結線部材の搭載工程後における斜視図である。図３は、本発明に係る製造方法の実施形態１を説明するための樹脂モールド工程後の斜視図である。 First, a method for manufacturing a surface-mount type semiconductor device according to the first embodiment, which is the best mode for carrying out the present invention, will be described.
[Embodiment 1]
Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view for explaining Embodiment 1 of a method for manufacturing a surface-mount type semiconductor device according to the present invention. FIG. 2 is a perspective view after the mounting process of the connection member for explaining the first embodiment of the manufacturing method according to the present invention. FIG. 3 is a perspective view after the resin molding step for explaining the first embodiment of the manufacturing method according to the present invention.

この実施形態１では、先ず図１（Ａ）に示すように、銅又は銅をニッケルメッキで被覆した金属など導電性の良好な金属材料からなるリードフレームのような薄い金属板を導電板１として用い、その一方の平面に、一定間隔離して複数の半導体素子２を搭載し、図１（Ｂ）に示すように、これら半導体素子をリフローハンダ付け法など通常の方法で導電板１にハンダ付けする。半導体素子１は、ＰＮ接合を有するプレーナー型又はメサ型のダイオードチップ、ショットキーバリアダイオード（ＳＢＤ）素子、あるいはＦＥＴチップ又はＩＧＢＴチップなどである。半導体素子２がＦＥＴチップ又はＩＧＢＴチップのような制御型半導体素子の場合には後ほど触れることにする。実施形態１では金属板１として表示する。   In the first embodiment, first, as shown in FIG. 1A, a thin metal plate such as a lead frame made of a metal material having good conductivity such as copper or a metal coated with copper by nickel plating is used as the conductive plate 1. A plurality of semiconductor elements 2 are mounted on one plane separated by a certain distance, and as shown in FIG. 1B, these semiconductor elements are soldered to the conductive plate 1 by a normal method such as a reflow soldering method. To do. The semiconductor element 1 is a planar or mesa diode chip having a PN junction, a Schottky barrier diode (SBD) element, an FET chip, or an IGBT chip. When the semiconductor element 2 is a control type semiconductor element such as an FET chip or an IGBT chip, it will be touched later. In the first embodiment, the metal plate 1 is displayed.

次に、図１（Ｂ）に示すように、結線部材３が搭載される。この結線部材３は、導電板１の平面と平行な平行部３ａ、平行部３ａに対して直角に折り曲げられている垂直部３ｂ、半導体素子２にハンダ付けされるハンダ付け部３ｃ、導電板１の前記一方の平面にハンダ付け又は溶接などによって固着される固着部３ｄからなる。結線部材３については、後でも述べるが、図示以外の種々な形状のものが考えられる。また、図１（Ｂ）では結線部材３が個別になっているが、最終的に個別の半導体装置に切断して分離する工程を行うので、各結線部材１は図示しない細い金属片などで互いに結合されている一連の構造になっていても勿論よく、この場合には結線部材の搭載工程が簡単になる。   Next, as shown in FIG. 1B, the connecting member 3 is mounted. The connecting member 3 includes a parallel part 3a parallel to the plane of the conductive plate 1, a vertical part 3b bent at a right angle to the parallel part 3a, a soldering part 3c soldered to the semiconductor element 2, and the conductive plate 1 The fixed portion 3d is fixed to the one plane by soldering or welding. The connecting member 3 will be described later, but various shapes other than those illustrated are conceivable. Further, in FIG. 1B, the connecting members 3 are individual. However, since the process of finally cutting and separating into individual semiconductor devices is performed, the connecting members 1 are connected to each other by thin metal pieces (not shown). Of course, it may be a series of coupled structures. In this case, the mounting process of the connecting members is simplified.

しかる後に、図１（Ｃ）に示すように、それぞれの結線部材３の一端であるハンダ付け部３ｃを各半導体素子２にハンダ付けし、他方では結線部材３の他端である固着部３ｄを金属板１の一方の平面に固着する。ここで、結線部材３の平行部３ａは、後の切断工程で平行部３ａの途中において切断されるので、切断したときに半導体素子２の一部分が切断されることが無いように、適度な長さを有しなければならない。なお、前述のハンダ付けされた部分と固着された部分は記号４で示される。ダイオードチップである半導体素子２は、図２に示すように、金属板１の一方の平面上に格子状にほぼ一定間隔で搭載される。   Thereafter, as shown in FIG. 1C, the soldering portion 3c which is one end of each connection member 3 is soldered to each semiconductor element 2, and the other end of the fixing portion 3d which is the other end of the connection member 3 is provided. It adheres to one plane of the metal plate 1. Here, since the parallel part 3a of the connection member 3 is cut in the middle of the parallel part 3a in a subsequent cutting step, an appropriate length is provided so that a part of the semiconductor element 2 is not cut when cut. Must have The above-mentioned soldered part and the fixed part are indicated by symbol 4. As shown in FIG. 2, the semiconductor elements 2 that are diode chips are mounted on the one plane of the metal plate 1 in a lattice shape at substantially constant intervals.

次に、前述のようにして半導体素子２と結線部材３とが搭載され、固着された金属板１を不図示の浅い鋳型又は容器に入れ、エポキシ樹脂のような液状の電気絶縁被覆材料５を流し込んで、一括で樹脂モールドを行う。このとき、図１（Ｄ）に示すように、電気絶縁被覆材料５は結線部材３の平行部３ａの図示上面が少なくとも露出するように流し込まれる。結線部材３の平行部３ａは、この表面実装型半導体装置の外部の端子部材を兼ねるものであるので、平行部３ａの上面は清浄な状態にあることが好ましい。   Next, the semiconductor element 2 and the connection member 3 are mounted as described above, and the fixed metal plate 1 is put into a shallow mold or container (not shown), and a liquid electrical insulating coating material 5 such as an epoxy resin is applied. Pour and resin mold at once. At this time, as shown in FIG. 1D, the electrical insulating coating material 5 is poured so that the illustrated upper surface of the parallel portion 3a of the connecting member 3 is exposed at least. Since the parallel portion 3a of the connection member 3 also serves as an external terminal member of the surface mount semiconductor device, it is preferable that the upper surface of the parallel portion 3a is in a clean state.

しかし、実際上は結線部材３の平行部３ａは薄いために、少なくともその上面が露出するように樹脂モールドするのは難しい。したがって、図１（Ｅ）に示すように、結線部材３の平行部３ａが覆われるように樹脂モールドを行い、次に電気絶縁被覆材料５が固化した後に、不図示の鋳型又は容器から取り出し、通常の研磨工程によって結線部材３の平行部３ａの上部に位置する電気絶縁被覆材料５を削除し、図１（Ｄ）に示すように、結線部材３の平行部３ａの上面を露出させる。この研磨は、複数の結線部材３の各平行部３ａの高さを同一にするという役割も行う。   However, in practice, since the parallel part 3a of the connecting member 3 is thin, it is difficult to perform resin molding so that at least the upper surface thereof is exposed. Therefore, as shown in FIG. 1 (E), a resin mold is performed so that the parallel part 3a of the connection member 3 is covered, and after the electrically insulating coating material 5 is solidified, it is taken out from a mold or a container (not shown), The electrical insulating coating material 5 located above the parallel part 3a of the connecting member 3 is deleted by a normal polishing process, and the upper surface of the parallel part 3a of the connecting member 3 is exposed as shown in FIG. This polishing also serves to make the heights of the parallel portions 3a of the plurality of connecting members 3 the same.

そして、不図示の鋳型又は容器から取り出した状態を示すのが、図３であり、電気絶縁被覆材料５から結線部材３の平行部３ａが露出しているのが分かる。しかる後に、図３における格子状に延びる切断線７に従って、ダイシングソウなどによる通常の機械的な切断手段、又はレーザ装置などによって切断を行い、図１（Ｆ）に示すように、個々の半導体装置に分離する。このように、本発明によれば、個々の表面実装型半導体装置の外形面積は切断寸法で決まるので、半導体素子の金属板への搭載位置、結線部材の大きさと金属板への搭載位置とを変更し、切断寸法を変えるだけで、表面実装型半導体装置の縦、横寸法を自由に変更できる。したがって、モールド金型における個々の半導体装置の容積の変更は不要となる。   Then, FIG. 3 shows a state where it is taken out from a mold or a container (not shown), and it can be seen that the parallel part 3 a of the connecting member 3 is exposed from the electrically insulating coating material 5. Thereafter, cutting is performed by a normal mechanical cutting means such as a dicing saw or a laser device in accordance with the cutting lines 7 extending in a lattice shape in FIG. 3, and as shown in FIG. To separate. As described above, according to the present invention, since the outer area of each surface-mount semiconductor device is determined by the cutting size, the mounting position of the semiconductor element on the metal plate, the size of the connection member, and the mounting position on the metal plate are determined. By simply changing and changing the cutting dimensions, the vertical and horizontal dimensions of the surface mount semiconductor device can be freely changed. Therefore, it is not necessary to change the volume of each semiconductor device in the mold.

図３における水平方向のこの切断は、各結線部材３の平行部３ａのほぼ中央を通る直線に沿って行われ、結線部材３の平行部３ａ、電気絶縁被覆材料５、及び金属板１が切断される。また、図３における垂直方向の切断は、隣り合う結線部材３の平行部３ａと平行部３ａとの間におけるほぼ中央を通る直線に沿って行われ、電気絶縁被覆材料５と金属板１とが切断される。このようにして、薄い角型の表面実装型半導体装置を得ることができ、また、金属板１及び結線部材３の平行部３ａとの切断面が電気絶縁被覆材料５から露出するが、突出することがないので、少なくともこの分だけ小型化できる。   This horizontal cutting in FIG. 3 is performed along a straight line passing through substantially the center of the parallel part 3a of each connecting member 3, and the parallel part 3a of the connecting member 3, the electrical insulating coating material 5, and the metal plate 1 are cut. Is done. Further, the cutting in the vertical direction in FIG. 3 is performed along a straight line passing through the substantially center between the parallel portions 3a and 3a of the adjacent connecting members 3, and the electrically insulating coating material 5 and the metal plate 1 are separated from each other. Disconnected. In this way, a thin square surface-mount type semiconductor device can be obtained, and a cut surface between the metal plate 1 and the parallel part 3a of the connection member 3 is exposed from the electrically insulating coating material 5, but protrudes. Since there is nothing, the size can be reduced at least by this amount.

この実施形態では図１（Ｆ）から分かるように、結線部材３の平行部３ａの一部分は、垂直部３ｂと固着部３ｄと共に隣り合う半導体装置の一方の端子部材を形成し、別途に端子部材を設ける必要がないので、製造工程の簡略化を図ることができる。また、大面積の金属板１上に実装されたすべての半導体素子と結線部材とを一括して樹脂モールドしていることも、低コスト化と更なる製造工程の簡略化に役立っている。   In this embodiment, as can be seen from FIG. 1 (F), a part of the parallel part 3a of the connecting member 3 forms one terminal member of the adjacent semiconductor device together with the vertical part 3b and the fixing part 3d, and separately the terminal member. Therefore, the manufacturing process can be simplified. Also, the fact that all the semiconductor elements mounted on the large-area metal plate 1 and the connecting members are resin-molded at the same time is helpful for cost reduction and further simplification of the manufacturing process.

なお、以上述べた実施形態では金属板１をベタのもので示したが、金属板１は一般的にはリードフレームのように、不要な部分が繰り抜かれて、各半導体素子２を搭載する部分が不図示の細い橋絡片で橋絡されて結合されているようなものであり、金属板１の切断部分を少なくするような構造になっていることが好ましい。また、この実施形態及び以下に述べる実施形態において、金属板１は切断前の大面積のものだけでなく、個々の半導体装置に分離した後の金属板も金属板１で表すものとする。   In the embodiment described above, the metal plate 1 is shown as a solid one. However, the metal plate 1 is generally a portion in which unnecessary portions are pulled out to mount each semiconductor element 2 like a lead frame. However, it is preferable that the metal plate 1 has a structure in which the number of cut portions is reduced. In this embodiment and the embodiments described below, the metal plate 1 is not limited to a large area before cutting, and the metal plate after being separated into individual semiconductor devices is also represented by the metal plate 1.

次に、前述の製造方法によって製造された表面実装型半導体装置１００及びその実装について、図４により説明する。
半導体素子２がＰＮ接合を有するプレーナー型のダイオードチップであるとすると、不図示のＰ型領域にハンダ付けされたハンダ付け部３ｃから延びる平行部３ａが一方の表面実装用のアノード端子となり、半導体素子２のＮ型領域（不図示）がハンダ付けされている金属板１に固着された固着部３ｄから延びる垂直部３ｂにつながる平行部３ａが、他方の表面実装用のカソード端子となる。表面実装型半導体装置１００をプリント基板１０に搭載するときには、図示していないマウンタが金属板１を吸着して、一対の平行部３ａをプリント基板１０の所定位置に搭載し、これら双方の平行部３ａはプリント基板１０の実装パターン金属６にハンダ付けされる。 Next, the surface mounted semiconductor device 100 manufactured by the above manufacturing method and its mounting will be described with reference to FIG.
If the semiconductor element 2 is a planar diode chip having a PN junction, a parallel portion 3a extending from a soldered portion 3c soldered to a P-type region (not shown) serves as one surface-mounting anode terminal, and the semiconductor The parallel portion 3a connected to the vertical portion 3b extending from the fixing portion 3d fixed to the metal plate 1 to which the N-type region (not shown) of the element 2 is soldered becomes the other surface mounting cathode terminal. When mounting the surface mount semiconductor device 100 on the printed circuit board 10, a mounter (not shown) sucks the metal plate 1 and mounts a pair of parallel portions 3 a at predetermined positions on the printed circuit board 10. 3 a is soldered to the mounting pattern metal 6 of the printed circuit board 10.

ここで、前記結線部材３の平行部３ａの一部分と垂直部３ｂと固着部３ｄとは前記カソード端子となる第１の端子部材を構成し、また、前記結線部材３の平行部３ａの一部分とハンダ付け部３ｃとは前記アノード端子となる第２の端子部材を構成する。
この表面実装型半導体装置１００では、金属板１が上面に位置しており、金属板１が放熱に寄与するので、放熱が良好になるばかりでなく、極限まで薄型化を行っても機械的強度を確保でき、また、搭載時に不図示のマウンタで金属板１を吸着保持することになるので、表面実装型半導体装置１００が小型のものであっても、確実に吸着保持できるなど、種々の効果を奏することができる。更にまた、この表面実装型半導体装置１００をプリント基板１０に実装した状態では、金属板１の上面に、図示しない放熱フィン又は他の電子回路のプリント基板を搭載することも可能である。 Here, a part of the parallel part 3a, the vertical part 3b, and the fixing part 3d of the connection member 3 constitute a first terminal member serving as the cathode terminal, and a part of the parallel part 3a of the connection member 3 The soldering portion 3c constitutes a second terminal member that becomes the anode terminal.
In this surface-mount type semiconductor device 100, the metal plate 1 is located on the upper surface, and the metal plate 1 contributes to heat dissipation, so that not only heat dissipation is improved, but also mechanical strength is achieved even if the thickness is reduced to the limit. In addition, since the metal plate 1 is sucked and held by a mounter (not shown) at the time of mounting, even if the surface mount semiconductor device 100 is small, various effects such as reliable suction holding can be achieved. Can be played. Furthermore, in a state where the surface-mount type semiconductor device 100 is mounted on the printed circuit board 10, it is possible to mount a heat radiation fin (not shown) or a printed circuit board of another electronic circuit on the upper surface of the metal plate 1.

なお、この実施形態では前記第２の端子部材の平行部３ａとハンダ付け部３ｃとの間に段差が存在するが、この段差は弧状の傾斜などであってもよく、段差が無くとも良い。また、ハンダ付け部３ｃ、固着部３ｄはハンダボールが形成されているようなものであってもよい。さらにまた、前記端子部材の平行部３ａが樹脂モールド側面から露出しており、ハンダ付け時にハンダが平行部３ａの露出面を上ってハンダフィレットを形成するので、好ましいハンダ付けができると共に、ハンダ付けの確認を行い易い。   In this embodiment, there is a step between the parallel portion 3a and the soldering portion 3c of the second terminal member. However, this step may be an arcuate slope or the like, or may not have a step. Further, the soldering portion 3c and the fixing portion 3d may be such that solder balls are formed. Furthermore, the parallel part 3a of the terminal member is exposed from the side surface of the resin mold, and when soldering, the solder goes up the exposed surface of the parallel part 3a to form a solder fillet. Easy to check attachment.

この実施形態の変形例として、図示しないが、図１において、ダイオード素子２を２個並べて配置したダイオードからなるものとし、ハンダ付け部３ｃの大きいものを用いてハンダ付け部３ｃで双方の半導体素子を並列接続する形態にしても良い。この場合、２個の半導体素子の極性が逆の場合にはそれらの順方向ドロップに等しい双方向の一定電圧をもつ表面実装型のダイオードが得られ、２個の半導体素子の極性が同じ場合にはそれらの順方向ドロップに等しい片方向の一定電圧をもつ表面実装型のダイオードを得ることができる。３個以上の半導体素子を並列接続しても勿論よい。また、半導体素子と抵抗チップなど他の電子部品チップを並列接続又は直列接続しても勿論よい。この実施形態では一種類の結線部材が必要であるだけであり、生産性の向上、コストダウンにつながる。   As a modification of this embodiment, although not shown, in FIG. 1, it is composed of a diode in which two diode elements 2 are arranged side by side, and both of the semiconductor elements are used in the soldering portion 3c using a large soldering portion 3c. May be connected in parallel. In this case, when the polarities of the two semiconductor elements are opposite, a surface-mount type diode having a bidirectional constant voltage equal to their forward drop is obtained, and when the polarities of the two semiconductor elements are the same Can obtain surface mount diodes with a unidirectional constant voltage equal to their forward drop. Of course, three or more semiconductor elements may be connected in parallel. Of course, another electronic component chip such as a semiconductor element and a resistor chip may be connected in parallel or in series. In this embodiment, only one type of connecting member is required, which leads to improvement in productivity and cost reduction.

[実施形態２]
実施形態２は導電板として用いられる金属板１の両面を樹脂モールドする例である。前記実施形態における図１（Ａ）〜（Ｃ）の工程についてはこの実施形態でも同じであるので、図示するのを省略する。
図５（Ａ）は、図１（Ｃ）で示したように、金属板１に複数の半導体素子２をハンダ付けすると共に、端子部材のハンダ付け部３ｃを半導体素子２にハンダ付けし、その固着部３ｄを金属板１に固着させた後に、その両面を樹脂モールドした状態を示す。この両面樹脂モールドは、不図示の浅い角型の鋳型又は容器の底から僅かに浮かせるように金属板１を支持した状態で、エポキシ樹脂のような液状の電気絶縁被覆材料５を流し込んで、一括で樹脂モールドを行う。 [Embodiment 2]
The second embodiment is an example in which both surfaces of a metal plate 1 used as a conductive plate are resin-molded. Since the steps of FIGS. 1A to 1C in the above embodiment are the same in this embodiment, illustration thereof is omitted.
5 (A), as shown in FIG. 1 (C), a plurality of semiconductor elements 2 are soldered to the metal plate 1, and solder portions 3c of terminal members are soldered to the semiconductor elements 2, After the fixing portion 3d is fixed to the metal plate 1, the both surfaces are resin-molded. The double-sided resin mold is formed by pouring a liquid electrical insulating coating material 5 such as epoxy resin in a state where the metal plate 1 is supported so as to slightly float from the bottom of a shallow square mold or container (not shown). Resin mold.

電気絶縁被覆材料５が固化した後に、不図示の浅い角型の鋳型又は容器から前述の樹脂モールドしたものを取り出し、鎖線で示す結線部材３を覆っている電気絶縁被覆材料５のみを研磨によって除去し、金属板１を覆っている電気絶縁被覆材料５は除去せずに、そのままにしておく。しかる後に、図５（Ｂ）に示すように、前記実施形態と同様にして端子部材を形成する平行部３のほぼ中央から垂直に切断して個々の半導体装置に分離する。   After the electrical insulation coating material 5 is solidified, the above-mentioned resin-molded product is taken out from a shallow square mold or container (not shown), and only the electrical insulation coating material 5 covering the connection member 3 indicated by a chain line is removed by polishing. However, the electrically insulating coating material 5 covering the metal plate 1 is not removed and is left as it is. Thereafter, as shown in FIG. 5B, the semiconductor device is separated into individual semiconductor devices by cutting perpendicularly from substantially the center of the parallel portion 3 forming the terminal member in the same manner as in the above embodiment.

図６は、このようにして製造された表面実装型半導体装置２００をプリント基板１０に実装した状態を示す図である。表面実装型半導体装置２００においても、結線部材３の平行部３ａが端子部材としてプリント基板１０に接続される。金属板１は両面で樹脂モールドされているので、金属板１の両面にかかるストレスを緩和することができる。なお、この実施形態における金属板１には、図示していないが、小孔を形成し、その金属板１の両側の電気絶縁被覆材料５が前記小孔を通して結合されているのが、電気絶縁被覆材料５の剥がれ防止などの面から好ましい。   FIG. 6 is a view showing a state where the surface-mount type semiconductor device 200 manufactured in this way is mounted on the printed circuit board 10. Also in the surface mount semiconductor device 200, the parallel portion 3a of the connection member 3 is connected to the printed circuit board 10 as a terminal member. Since the metal plate 1 is resin-molded on both sides, the stress on both sides of the metal plate 1 can be relieved. Although not shown, the metal plate 1 in this embodiment forms a small hole, and the electrical insulating coating material 5 on both sides of the metal plate 1 is bonded through the small hole. This is preferable from the standpoint of preventing peeling of the coating material 5.

次に、図７は、表面実装型半導体装置２００と同じ製造方法にて製造された表面実装型半導体装置３００をプリント基板１０に実装した状態を示す図である。表面実装型半導体装置３００では、表面実装型半導体装置１００、２００に比べて薄い金属板１を用いており、金属板１をスタンピング加工などによって、半導体素子２が搭載される部分１ａを若干突出させている。他の部分については表面実装型半導体装置２００と同様であるので、説明を省略する。この実施形態では、表面実装型半導体装置１００、２００に比べて薄い金属板１を用いているので、金属板１と半導体素子２との熱膨張差によって半導体素子２にかかるストレスを小さくできる。   Next, FIG. 7 is a diagram showing a state in which the surface mount semiconductor device 300 manufactured by the same manufacturing method as the surface mount semiconductor device 200 is mounted on the printed circuit board 10. In the surface mount semiconductor device 300, the metal plate 1 that is thinner than the surface mount semiconductor devices 100 and 200 is used, and the portion 1a on which the semiconductor element 2 is mounted is slightly protruded by stamping the metal plate 1 or the like. ing. The other parts are the same as those of the surface-mount type semiconductor device 200, and thus description thereof is omitted. In this embodiment, since the metal plate 1 that is thinner than the surface-mounted semiconductor devices 100 and 200 is used, the stress applied to the semiconductor element 2 due to the difference in thermal expansion between the metal plate 1 and the semiconductor element 2 can be reduced.

[実施形態３]
実施形態３は、図８（Ａ）に示すように、半導体素子２、２’として２個のダイオードを同極性同士突き合わせて直列接続し、双方向の表面実装型の定電圧半導体装置を得る実施形態である。この第４の表面実装型半導体装置の製造工程については、実施形態１、実施形態２とほぼ同じであるので、図示するのを省略する。 [Embodiment 3]
In the third embodiment, as shown in FIG. 8A, two diodes as semiconductor elements 2 and 2 ′ are connected to each other with the same polarity in series to obtain a bidirectional surface-mount type constant voltage semiconductor device. It is a form. Since the manufacturing process of the fourth surface mount semiconductor device is substantially the same as in the first and second embodiments, the illustration thereof is omitted.

接触させて又は至近距離に並べた２個のプレーナー型の半導体素子２、２’を一組として、複数の組みを図２に示した１個の半導体素子２に代えて配置する。そして、それら半導体素子２、２’のカソード側を金属板１にハンダ付け、又は半導体素子２、２’のアノード側を、導電板として用いられる金属板１にハンダ付けすることによって、２個のダイオードのカソード同士、又はアノード同士を接続する。半導体素子２のアノード側又はカソード側に、結線部材３の一方のハンダ付け部３ｃをハンダ付けし、半導体素子２’のアノード側又はカソード側に、別の結線部材３’の一方のハンダ付け部３’ｃをハンダ付けする。そして、結線部材３の他方のハンダ付け部３ｃを図面右隣りに位置する個別の半導体装置を構成する半導体素子２’Ａにハンダ付けすると共に、さらに別の結線部材３’’の一方のハンダ付け部３’’ｃを半導体素子２Ａにハンダ付けする。その他の半導体素子についても結線部材が同様に接続される。   Two planar semiconductor elements 2 and 2 'arranged in close contact with each other are used as a set, and a plurality of sets are arranged in place of the single semiconductor element 2 shown in FIG. Then, by soldering the cathode side of the semiconductor elements 2 and 2 ′ to the metal plate 1 or soldering the anode side of the semiconductor elements 2 and 2 ′ to the metal plate 1 used as a conductive plate, The cathodes or anodes of the diodes are connected. One soldering part 3c of the connecting member 3 is soldered to the anode side or the cathode side of the semiconductor element 2, and one soldering part of another connecting member 3 'is connected to the anode side or the cathode side of the semiconductor element 2'. Solder 3'c. Then, the other soldering portion 3c of the connecting member 3 is soldered to the semiconductor element 2′A constituting the individual semiconductor device located on the right side of the drawing, and one soldering of the other connecting member 3 ″ is further soldered. The part 3 ″ c is soldered to the semiconductor element 2A. Connection members are similarly connected to other semiconductor elements.

このように、隣りに位置する個別の半導体装置をそれぞれ構成する半導体素子２、２’を結線部材３で接続した後、前述したように電気絶縁被覆材料５で一括して樹脂モールドし、固化した後に、不図示の浅い鋳型又は容器からそれを取り出して切断線７に沿って切断し、分離を行う。この切断は、結線部材３の平行部３ａのほぼ中央を通るように行われる。この実施形態では、結線部材３の両端が隣りに位置する個別の半導体装置をそれぞれ構成する半導体素子２、２’にハンダ付けされる点が、実施形態１、実施形態２とは異なる。この実施形態でも結線部材３の平行部３ａが表面実装型半導体装置の端子部材になり、一種類の結線部材が必要であるだけであるので、生産性の向上、コストダウンにつながる。   As described above, after connecting the semiconductor elements 2 and 2 ′ constituting the individual semiconductor devices located adjacent to each other by the connecting member 3, as described above, the resin insulation molding material 5 is collectively resin-molded and solidified. Later, it is taken out from a shallow mold or container (not shown) and cut along a cutting line 7 for separation. This cutting is performed so as to pass through substantially the center of the parallel part 3 a of the connecting member 3. This embodiment is different from the first and second embodiments in that both ends of the connecting member 3 are soldered to the semiconductor elements 2 and 2 ′ constituting the individual semiconductor devices located adjacent to each other. Also in this embodiment, the parallel part 3a of the connection member 3 becomes a terminal member of the surface-mount type semiconductor device, and only one type of connection member is required, leading to improvement in productivity and cost reduction.

[実施形態４]
実施形態４は、２個のダイオードを直列接続して高い電圧を得ることのできる第５の表面実装型半導体装置の例である。接続構造は、図８と同様であるので省略し、図８を利用して説明する。 [Embodiment 4]
The fourth embodiment is an example of a fifth surface mount semiconductor device that can obtain a high voltage by connecting two diodes in series. Since the connection structure is the same as that in FIG. 8, a description thereof will be omitted, and description will be made with reference to FIG.

図８において、ダイオード素子２と２’とは逆極性に配置される。例えば、すべてのダイオード素子２のアノード側が、導電板として用いられる金属板１にハンダ付けされ、すべてのダイオード素子２’のカソード側が金属板１にハンダ付けされる。そして、この場合にはすべてのダイオード素子２のカソード側に結線部材３の一方のハンダ付け部がハンダ付けされ、また、すべてのダイオード素子２’のアノード側に結線部材３の他方のハンダ付け部がハンダ付けされる。これによって、ダイオード素子２と２’とは金属板１で直列接続され、結線部材３の端子部材となる平行部３ａと３ａとの間に直列接続されたダイオード素子２と２’とを有する表面実装型のダイオードが得られる。   In FIG. 8, the diode elements 2 and 2 'are arranged with opposite polarities. For example, the anode side of all the diode elements 2 is soldered to the metal plate 1 used as a conductive plate, and the cathode side of all the diode elements 2 ′ is soldered to the metal plate 1. In this case, one soldering portion of the connecting member 3 is soldered to the cathode side of all the diode elements 2, and the other soldering portion of the connecting member 3 is connected to the anode side of all the diode elements 2 ′. Is soldered. As a result, the diode elements 2 and 2 'are connected in series by the metal plate 1, and the surface having the diode elements 2 and 2' connected in series between the parallel portions 3a and 3a serving as the terminal members of the connection member 3 is provided. A mounted diode is obtained.

[実施形態５]
以上の実施形態では、導電板として大面積の金属板をシート状のリードフレームとして用い、このシート状のリードフレームの上に格子状に半導体素子を配置したが、図９に示すような細幅のテープ状、つまりフープ式リードフレーム、又は短冊状のリードフレームＲＦを用いても良い。このフープ式リードフレームＲＦ又は短冊状のリードフレームの形状は種々考えられるが、各半導体素子２の搭載される小面積の金属板１を結合部分１ｂで結合した形をしたものであり、図９（Ａ）、（Ｂ）に示すように各金属板１に順次半導体素子２が１個づつ搭載されてハンダ付け部４にハンダ付けされ、また、結線部材３の両端が半導体素子２の上面と金属板１とにハンダ付け部４にハンダ付けされる。しかる後に、電気絶縁被覆材料５で樹脂モールドして、１本の細長い羊かん状にし、電気絶縁被覆材料５が固化した後に、点線で示す切断線７で切断することによって、個々の表面実装型のダイオードとする。この実施形態５の第６の表面実装型半導体装置でも、図８に示したような構造の半導体素子とすることもできる。 [Embodiment 5]
In the above embodiment, a metal plate with a large area is used as a sheet-like lead frame as a conductive plate, and semiconductor elements are arranged in a lattice shape on the sheet-like lead frame. However, the narrow width as shown in FIG. A tape-shaped lead frame RF, that is, a hoop-type lead frame or a strip-shaped lead frame RF may be used. Various shapes of the hoop-type lead frame RF or the strip-shaped lead frame are conceivable. The shape of the hoop-type lead frame RF or the strip-shaped lead frame is such that the small-area metal plate 1 on which each semiconductor element 2 is mounted is coupled by the coupling portion 1b. As shown in (A) and (B), one semiconductor element 2 is sequentially mounted on each metal plate 1 and soldered to the soldering portion 4, and both ends of the connection member 3 are connected to the upper surface of the semiconductor element 2. The metal plate 1 is soldered to the soldering portion 4. After that, resin molding is performed with the electrical insulation coating material 5 to form one elongated sheep cane, and after the electrical insulation coating material 5 is solidified, it is cut with a cutting line 7 indicated by a dotted line to thereby obtain individual surface mounting type. A diode. The sixth surface mount semiconductor device of the fifth embodiment can also be a semiconductor element having a structure as shown in FIG.

[実施形態６]
以上の実施形態では、いずれも導電板として種々のリードフレーム形状の金属板を用いたが、図１０、図１１に示すように、この実施形態６では気絶縁材料あるいは抵抗材料からなる板状若しくはシート状の基材１１の一方の面に導電層１２を形成してなる導電板１を用いることが特徴である。図１０と図１１とによって、第７の表面実装型半導体装置４００について説明する。これら図に示すように、導電板１は基材１１とその平面上に形成された導電層１２とからなる。基材１１は、例えばガラス−エポキシ樹脂又はポリイミド樹脂などからなる薄い合成樹脂板又はシートであり、導電層１２は基材１１の一方の面に、所定の面積、形状になるよう形成された銅パターンからなる。この導電板１は一般的なプリント基板の製法で製造できるので説明を省略するが、この実施形態６では個々の半導体素子に分離したときに、その切断線７に銅パターンがかからないように形成されている。 [Embodiment 6]
In the above embodiments, various lead frame-shaped metal plates are used as the conductive plates. However, as shown in FIGS. 10 and 11, in the sixth embodiment, a plate-like or resistive material made of an air insulating material or a resistance material is used. A feature is that a conductive plate 1 formed by forming a conductive layer 12 on one surface of a sheet-like substrate 11 is used. The seventh surface mount semiconductor device 400 will be described with reference to FIGS. 10 and 11. As shown in these drawings, the conductive plate 1 includes a base material 11 and a conductive layer 12 formed on the plane. The base material 11 is a thin synthetic resin plate or sheet made of, for example, glass-epoxy resin or polyimide resin, and the conductive layer 12 is copper formed on one surface of the base material 11 so as to have a predetermined area and shape. Consists of patterns. Since the conductive plate 1 can be manufactured by a general printed circuit board manufacturing method, the description thereof will be omitted, but in the sixth embodiment, when the semiconductor plate is separated into individual semiconductor elements, the cutting line 7 is formed so as not to have a copper pattern. ing.

導電層１２は、例えば個々に分離されている４角形状のものであり、個々の導電層１２の上に１個の半導体素子２がハンダ付けされると共に、隣の結線部材３の固着部３ｄがハンダ付けされる。図から分かるように、半導体素子２に一端がハンダ付けされた結線部材３の他端である固着部３ｄとその半導体素子２との間で、隣り合う導電層１２同士が分離されている。半導体素子２と結線部材３とのハンダ付け、結線部材３の導電層１２へのハンダ付け、及びこれらの搭載などについては図１に関連して行った説明と同様であるので説明を省略する。   The conductive layer 12 has, for example, a rectangular shape that is separated from each other. One semiconductor element 2 is soldered on each conductive layer 12 and the adhering portion 3d of the adjacent connection member 3 is soldered. Is soldered. As can be seen from the figure, adjacent conductive layers 12 are separated between the semiconductor element 2 and the fixing portion 3d which is the other end of the connecting member 3 soldered to the semiconductor element 2 at one end. Since the soldering of the semiconductor element 2 and the connecting member 3, the soldering of the connecting member 3 to the conductive layer 12, and the mounting thereof are the same as those described with reference to FIG. 1, the description is omitted.

次に、図１に従って説明したように、半導体素子２と結線部材３とが搭載され、固着された導電板１をエポキシ樹脂のような液状の電気絶縁被覆材料５によって一括して樹脂モールドを行う。このとき、図１０（Ａ）に示すように、電気絶縁被覆材料５は結線部材３の平行部３ａの図示上面が少なくとも露出するように流し込まれる。結線部材３の平行部３ａは前述したように、この表面実装型半導体装置の外部の端子部材を兼ねるものである。電気絶縁被覆材料５が固化した後に、切断線７に従って、ダイシングソウなどによる通常の機械的な切断手段、又はレーザ装置などによって切断を行い、図１０（Ｂ）に示すように、個々の半導体装置に分離する。この切断時に切断する金属材料は結線部材３の平行部３ａだけであるので、前記実施形態のものに比べて、金属板１を切断する必要が無く、したがって、切断が容易になる。また、導電層１２が切断面に露出していないので、空気中の湿度などによる影響を受けにくく、信頼性の高い表面実装型半導体装置４００を得ることができる。   Next, as described with reference to FIG. 1, the semiconductor element 2 and the connecting member 3 are mounted, and the fixed conductive plate 1 is collectively resin-molded with a liquid electrical insulating coating material 5 such as epoxy resin. . At this time, as shown in FIG. 10A, the electrically insulating coating material 5 is poured so that the illustrated upper surface of the parallel portion 3a of the connecting member 3 is at least exposed. As described above, the parallel portion 3a of the connecting member 3 also serves as an external terminal member of the surface mount type semiconductor device. After the electrically insulating coating material 5 is solidified, the semiconductor device is cut by a normal mechanical cutting means such as a dicing saw or a laser device according to the cutting line 7, and as shown in FIG. To separate. Since the metal material to be cut at the time of cutting is only the parallel portion 3a of the connecting member 3, it is not necessary to cut the metal plate 1 as compared with the above-described embodiment, and therefore cutting is easy. In addition, since the conductive layer 12 is not exposed on the cut surface, it is possible to obtain a highly reliable surface mount semiconductor device 400 that is not easily affected by humidity in the air and the like.

このようにして得られた表面実装型半導体装置４００をプリント基板に搭載する場合には、図１１に示すように、導電板１を上側にし、線部材３の切断された平行部３ａをプリント基板１０の実装パターン金属６にハンダ付けする。したがって、表面実装型半導体装置４００の上面は基材１１になり、半導体素子２の上面は、基材１１と電気絶縁被覆材料５とで気中から遮断された導電層１２と結線部材３の平行部３ａとを介してプリント基板１０の実装パターン金属６に接続される。   When the surface-mounted semiconductor device 400 obtained in this way is mounted on a printed board, the conductive plate 1 is placed on the upper side and the cut parallel part 3a of the wire member 3 is placed on the printed board as shown in FIG. 10 mounting pattern metal 6 is soldered. Therefore, the upper surface of the surface-mount type semiconductor device 400 becomes the base material 11, and the upper surface of the semiconductor element 2 is parallel to the conductive layer 12 and the connection member 3 cut off from the air by the base material 11 and the electrically insulating coating material 5. It is connected to the mounting pattern metal 6 of the printed circuit board 10 via the part 3a.

導電板１は前述のものに限定される必要はなく、電流容量の小さな半導体素子の場合には導電層１２が薄くても良いので、切断にほとんど影響が無い程度の膜厚、例えば数十μｍ以下であれば、基材１１の一方の面の全面に導電層１２が形成されていても良い。
また、電流容量の大きな半導体素子の場合には、基材１１として一面が粘着性を有するシートを用い、切断線７にかからない程度の大きさの多数の金属片をその粘着性シート上の所定の位置に規則正しく貼り付けて導電層１２としても良い。そして、不要であれば、切断前に基材１１を剥離しても良い。表面実装型半導体装置としては前述の表面実装型半導体装置１００と同様な構造になる。
更にまた、この実施形態は図２、図３で述べた構造、あるいは図９に示した構造を採用して製造することができ、図８に述べたような構成の半導体装置でも勿論よい。 The conductive plate 1 is not necessarily limited to the above-described one. In the case of a semiconductor element having a small current capacity, the conductive layer 12 may be thin, so that it has a film thickness that hardly affects cutting, for example, several tens of μm. The conductive layer 12 may be formed on the entire surface of one surface of the substrate 11 as long as it is below.
Further, in the case of a semiconductor element having a large current capacity, a sheet having adhesiveness on one side is used as the base material 11, and a large number of metal pieces having a size that does not reach the cutting line 7 are formed on the adhesive sheet. The conductive layer 12 may be affixed regularly at positions. And if unnecessary, you may peel the base material 11 before a cutting | disconnection. The surface mount semiconductor device has a structure similar to that of the surface mount semiconductor device 100 described above.
Furthermore, this embodiment can be manufactured by adopting the structure shown in FIGS. 2 and 3 or the structure shown in FIG. 9, and the semiconductor device having the structure as shown in FIG.

なお、以上の実施形態では、半導体素子をダイオード素子として説明したが、トランジスタ、ＦＥＴ、ＩＧＢＴなど制御端子を有する制御型の半導体素子であっても勿論よい。この場合には、隣り合う制御型半導体素子を構成する半導体素子のベース又はゲートに代表される制御領域同士を接続して制御端子となる制御用結線部材（図示せず）が別途必要になる。その結線部材は接続するのに適した任意の形状のもので良いが、それら制御用結線部材の平行部の高さも他の平行部の高さと同じでなければならない。   In the above embodiments, the semiconductor element has been described as a diode element. However, a control-type semiconductor element having a control terminal such as a transistor, FET, or IGBT may be used as a matter of course. In this case, a control connection member (not shown) that connects control regions typified by bases or gates of semiconductor elements constituting adjacent control type semiconductor elements to serve as control terminals is required separately. The connecting member may have any shape suitable for connection, but the height of the parallel portions of the control connecting members must be the same as the height of the other parallel portions.

また、半導体素子としてプレーナー型のもの、あるいはメサ型のもののいずれでも用いることができるが、メサ型の半導体素子の場合には、ＰＮ接合が露出しているので、通常の方法でインナーコートを行ってＰＮ接合を保護した状態で電気絶縁被覆材料で樹脂モールドする必要がある。   In addition, a planar type element or a mesa type element can be used as a semiconductor element. However, in the case of a mesa type semiconductor element, the PN junction is exposed. Therefore, it is necessary to resin mold with an electrically insulating coating material while protecting the PN junction.

本発明の一実施形態に係る表面実装型半導体装置の製造方法を説明するための図である。It is a figure for demonstrating the manufacturing method of the surface mount-type semiconductor device which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表面実装型半導体装置の製造方法の途中の搭載工程を説明するための図である。It is a figure for demonstrating the mounting process in the middle of the manufacturing method of the surface mounted semiconductor device which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表面実装型半導体装置の製造方法の途中の樹脂モールド工程を説明するための図である。It is a figure for demonstrating the resin mold process in the middle of the manufacturing method of the surface mount-type semiconductor device which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表面実装型半導体装置１００の実装形態を示す図である。It is a figure which shows the mounting form of the surface mounted semiconductor device 100 which concerns on one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置の製造方法を説明するための図である。It is a figure for demonstrating the manufacturing method of the surface mount-type semiconductor device which concerns on other one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置２００の実装形態を示す図である。It is a figure which shows the mounting form of the surface mounted semiconductor device 200 which concerns on other one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置３００の実装形態を示す図である。It is a figure which shows the mounting form of the surface mounted semiconductor device 300 which concerns on other one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置を説明するための図である。It is a figure for demonstrating the surface mounted semiconductor device which concerns on other one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置の製造方法を説明するための図である。It is a figure for demonstrating the manufacturing method of the surface mount-type semiconductor device which concerns on other one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置４００の実装形態を示す図である。It is a figure which shows the mounting form of the surface mounted semiconductor device 400 which concerns on other one Embodiment of this invention. 本発明の他の一実施形態に係る表面実装型半導体装置４００の実装形態を示す図である。It is a figure which shows the mounting form of the surface mounted semiconductor device 400 which concerns on other one Embodiment of this invention.

符号の説明Explanation of symbols

１・・・金属板
２・・・半導体素子
３・・・結線部材
３ａ・・・平行部
３ｂ・・・垂直部
３ｃ・・・ハンダ付け部
３ｄ・・・固着部
４・・・ハンダ付け部又は固着部
５・・・電気絶縁被覆材料
６・・・実装パターン金属
１０・・・プリント基板
DESCRIPTION OF SYMBOLS 1 ... Metal plate 2 ... Semiconductor element 3 ... Connection member 3a ... Parallel part 3b ... Vertical part 3c ... Soldering part 3d ... Adhering part 4 ... Soldering part Or fixed part 5 ... Electrical insulation coating material 6 ... Mounting pattern metal 10 ... Printed circuit board

Claims (12)

半導体装置の製造方法において、
導電板の一方の平面上に半導体素子を搭載してハンダ付けする工程と、
前記導電板の前記平面に平行な平行部と該平行部に垂直な垂直部とを有する結線部材の前記平行部につながるハンダ付け部を前記半導体素子にハンダ付けする工程と、
前記結線部材の前記垂直部につながる固着部を前記導電板の前記一方の平面に固着する工程と、
前記導電板の前記一方の平面と前記半導体素子とが少なくとも覆われるように電気絶縁被覆材料で被覆する工程と、
前記結線部材の前記平行部と前記電気絶縁被覆材料と前記導電板とを切断して個々の半導体装置に分離する工程と、
からなることを特徴とする半導体装置の製造方法。 In a method for manufacturing a semiconductor device,
Mounting and soldering a semiconductor element on one plane of the conductive plate;
Soldering a soldering portion connected to the parallel portion of the connecting member having a parallel portion parallel to the plane of the conductive plate and a vertical portion perpendicular to the parallel portion to the semiconductor element;
Fixing a fixing portion connected to the vertical portion of the connecting member to the one plane of the conductive plate;
Coating with an electrically insulating coating material so that at least the one plane of the conductive plate and the semiconductor element are covered;
Cutting the parallel portion of the connecting member, the electrically insulating coating material, and the conductive plate into individual semiconductor devices; and
A method for manufacturing a semiconductor device, comprising: 半導体装置の製造方法において、
導電板の一方の平面上に複数の半導体素子を搭載してハンダ付けする工程と、
前記導電板の前記平面に平行な平行部と該平行部に垂直な垂直部とを有する結線部材の両端に位置するハンダ付け部を一定間隔離れて位置する前記半導体素子にハンダ付けする工程と、
前記導電板の前記一方の平面と前記半導体素子とが少なくとも覆われるように電気絶縁被覆材料で被覆する工程と、
前記結線部材の前記平行部と前記電気絶縁被覆材料と前記導電板とを切断して個々の半導体装置に分離する工程と、
からなることを特徴とする半導体装置の製造方法。 In a method for manufacturing a semiconductor device,
Mounting and soldering a plurality of semiconductor elements on one plane of the conductive plate;
Soldering the soldering parts located at both ends of the connecting member having a parallel part parallel to the plane of the conductive plate and a vertical part perpendicular to the parallel part to the semiconductor element located at a predetermined distance; and
Coating with an electrically insulating coating material so that at least the one plane of the conductive plate and the semiconductor element are covered;
Cutting the parallel portion of the connecting member, the electrically insulating coating material, and the conductive plate into individual semiconductor devices; and
A method for manufacturing a semiconductor device, comprising: 請求項１又は請求項２において、
電気絶縁被覆材料で被覆する前記工程は、前記結線部材の前記平行部が露出するように行われることを特徴とする半導体装置の製造方法。 In claim 1 or claim 2,
The method of manufacturing a semiconductor device, wherein the step of coating with an electrically insulating coating material is performed such that the parallel portion of the connection member is exposed. 請求項１又は請求項２において、
前記電気絶縁被覆材料の一部分を研磨により除去して前記結線部材の前記平行部を露出させる工程を備えることを特徴とする半導体装置の製造方法。 In claim 1 or claim 2,
A method of manufacturing a semiconductor device, comprising: removing a part of the electrically insulating coating material by polishing to expose the parallel portion of the connecting member. 請求項１ないし請求項４のいずれかにおいて、
電気絶縁被覆材料で被覆する前記工程は、前記導電板の他方の平面が露出するように行われることを特徴とする半導体装置の製造方法。 In any one of Claim 1 thru | or 4,
The method of manufacturing a semiconductor device, wherein the step of coating with an electrically insulating coating material is performed such that the other plane of the conductive plate is exposed. 請求項１ないし請求項４のいずれかにおいて、
電気絶縁被覆材料で被覆する前記工程は、前記導電板の他方の平面も覆うように行われることを特徴とする半導体装置の製造方法。 In any one of Claim 1 thru | or 4,
The method of manufacturing a semiconductor device, wherein the step of coating with an electrically insulating coating material is performed so as to cover the other plane of the conductive plate. 平面を有する導電板と、
該導電板の前記平面に搭載されてハンダ付けされている半導体素子と、
前記導電板の平面に平行な平行部と該平行部に垂直な垂直部とを有する端子部材であって、前記垂直部につながる一端が前記導電板に固着されている第１の端子部材と、
前記導電板の平面に平行な平行部を有する端子部材であって、前記平行部につながる一端が前記半導体素子にハンダ付けされている第２の端子部材と、
からなり、
前記第１と第２の端子部材の前記双方の平行部が同等の高さにあることを特徴とする表面実装型半導体装置。 A conductive plate having a plane;
A semiconductor element mounted on the plane of the conductive plate and soldered;
A first terminal member having a parallel part parallel to the plane of the conductive plate and a vertical part perpendicular to the parallel part, wherein one end connected to the vertical part is fixed to the conductive plate;
A second terminal member having a parallel part parallel to the plane of the conductive plate, wherein one end connected to the parallel part is soldered to the semiconductor element;
Consists of
The surface-mount type semiconductor device according to claim 1, wherein both parallel portions of the first and second terminal members are at the same height. 請求項７において、
前記半導体素子は２個以上並置されており、前記第２の端子部材の前記一端は前記２個以上の半導体素子にハンダ付けされていることを特徴とする表面実装型半導体装置。 In claim 7,
Two or more semiconductor elements are juxtaposed, and the one end of the second terminal member is soldered to the two or more semiconductor elements. 平面を有する導電板と、
該金属基板の前記平面に搭載されてハンダ付けされている一方の面を有する複数個の半導体素子と、
前記導電板の平面に平行な平行部と該平行部の一端につながるハンダ付け部とを有する端子部材であって、前記ハンダ付け部が前記それぞれの半導体素子にハンダ付けされている第１、第２の端子部材と、
前記導電板の前記一方の平面と前記半導体素子とを少なくとも覆っている電気絶縁被覆材料と、
前記第１と第２の端子部材の前記双方の平行部が同等の高さにあると共に、それら端子部材の前記平行部の他端が電気絶縁被覆材料から露出していることを特徴とする表面実装型半導体装置。 A conductive plate having a plane;
A plurality of semiconductor elements having one surface mounted on the plane of the metal substrate and soldered;
A terminal member having a parallel portion parallel to the plane of the conductive plate and a soldering portion connected to one end of the parallel portion, wherein the soldering portion is soldered to each of the semiconductor elements. Two terminal members;
An electrically insulating coating material covering at least the one plane of the conductive plate and the semiconductor element;
The parallel surface of both the first and second terminal members is at the same height, and the other end of the parallel portion of the terminal member is exposed from the electrically insulating coating material. Mounting type semiconductor device. 請求項９において、
前記複数個の半導体素子は、前記導電板によって同極性又は逆極性で、並列に又は直列に接続されていることを特徴とする表面実装型半導体装置。 In claim 9,
The plurality of semiconductor elements are connected in parallel or in series with the same polarity or opposite polarity by the conductive plate. 請求項１ないし請求項１０のいずれかにおいて、
前記導電板は、金属板、又は電気絶縁材料あるいは抵抗材料からなる板状若しくはシート状の基材の一方の面に導電層を形成してなる部材からなることを特徴とする表面実装型半導体装置。 In any one of Claims 1 thru | or 10,
The surface-mount type semiconductor device, wherein the conductive plate is a metal plate or a member formed by forming a conductive layer on one surface of a plate-like or sheet-like base material made of an electrically insulating material or a resistance material. . 請求項１１において、
前記基材に形成された導電層は金属材料からなる導電パターンであり、露出しないことを特徴とする表面実装型半導体装置。
In claim 11,
The surface-mount type semiconductor device according to claim 1, wherein the conductive layer formed on the substrate is a conductive pattern made of a metal material and is not exposed.
JP2004153694A 2004-02-13 2004-05-24 Method of manufacturing semiconductor device, and surface-mounted semiconductor device Withdrawn JP2005260196A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9029995B2 (en) 2012-09-26 2015-05-12 Renesas Electronics Corporation Semiconductor device and method of manufacturing the same
JP2016152416A (en) * 2015-02-17 2016-08-22 立昌先進科技股▲分▼有限公司 Multi-function miniaturized surface-mount device and method for producing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9029995B2 (en) 2012-09-26 2015-05-12 Renesas Electronics Corporation Semiconductor device and method of manufacturing the same
JP2016152416A (en) * 2015-02-17 2016-08-22 立昌先進科技股▲分▼有限公司 Multi-function miniaturized surface-mount device and method for producing the same

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