JP3913622B2 - Circuit equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To efficiently radiate a heat generated from a circuit element 12 contained in a circuit device 10 to an exterior. <P>SOLUTION: A first external electrode 15A is formed on a rear surface of a first conductive pattern 11A in which a circuit element 12 such as a transistor, a diode or the like is mounted. A second external electrode 15E is provided on a rear surface of a second conductive pattern in which the element 12 is not mounted. A fixed substrate 20 in which the circuit device is mounted, is made of a metal layer 22 and an insulating layer 23, and a conductive path 21 formed on the insulating layer is thermally coupled to the layer 22 through a thermal via hole 24. Accordingly, the heat generated from the element 12 is radiated to an exterior via the second conductive pattern 11E and the thermal via hole 24. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a circuit device incorporating a plurality of circuit elements such as semiconductor elements.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a circuit device set in an electronic device is employed in a mobile phone, a portable computer, and the like, and thus, a reduction in size, thickness, and weight are required. For example, a semiconductor device as an example of a circuit device will be described. As a general semiconductor device, there is a package type semiconductor device sealed by a conventional transfer mold. This semiconductor device is mounted on a printed circuit board PS as shown in FIG.
[0003]
In the package type semiconductor device 61, the semiconductor chip 62 is covered with a resin layer 63, and lead terminals 64 for external connection are led out from the side portions of the resin layer 63. However, the package type semiconductor device 61 has the lead terminals 64 protruding from the resin layer 63 and has a large overall size, which does not satisfy the reduction in size, thickness and weight. Therefore, various companies have competed to develop various structures to achieve miniaturization, thinning, and weight reduction, and recently called CSP (chip size package), wafer scale CSP equivalent to chip size, or chip size A slightly larger CSP has been developed.
[0004]
FIG. 11 shows a CSP 66 that employs a glass epoxy substrate 65 as a support substrate and is slightly larger than the chip size. Here, description will be made assuming that the transistor chip T is mounted on the glass epoxy substrate 65.
[0005]
A first electrode 67, a second electrode 68, and a die pad 69 are formed on the surface of the glass epoxy substrate 65, and a first back electrode 70 and a second back electrode 71 are formed on the back surface. The first electrode 67 and the first back electrode 70, and the second electrode 68 and the second back electrode 71 are electrically connected through the through hole TH. Further, the bare transistor chip T is fixed to the die pad 69, the emitter electrode of the transistor and the first electrode 67 are connected via the fine metal wire 72, and the base electrode of the transistor and the second electrode 68 are connected to the fine metal wire 72. Connected through. Further, a resin layer 73 is provided on the glass epoxy substrate 65 so as to cover the transistor chip T.
[0006]
The CSP 66 employs a glass epoxy substrate 65, but unlike the wafer scale CSP, the extending structure from the chip T to the backside electrodes 70 and 71 for external connection is simple and has the merit that it can be manufactured at low cost. The CSP 66 is mounted on the printed circuit board PS as shown in FIG. The printed circuit board PS is provided with electrodes and wirings constituting an electric circuit, and the CSP 66, the package type semiconductor device 61, a chip resistor CR, a chip capacitor CC, and the like are electrically connected and fixed. And the circuit comprised with this printed circuit board was attached in various sets.
[0007]
[Problems to be solved by the invention]
However, the semiconductor device as described above has the following problems.
[0008]
That is, in the CSP 66 described in the conventional example, the transistor T is electrically and thermally connected to the mounting substrate PS via the metal thin wire 72 and the conductive pattern formed on the glass epoxy substrate 65. Therefore, there is a problem that the heat dissipation of the transistor T is insufficient.
[0009]
The present invention has been made in view of such problems, and an object of the present invention is to provide a circuit device that efficiently releases the heat of a built-in semiconductor element to the outside.
[0010]
[Means for Solving the Problems]
The circuit device of the present invention is a circuit device that has a conductive pattern, a circuit element connected to the conductive pattern, and an insulating resin that seals the conductive pattern and the circuit element, and has a square shape in plan view. The conductive pattern is formed in a cross shape between the four first conductive patterns provided at the four corners of the circuit device and having the circuit element mounted on each upper surface, and the first conductive patterns. A plurality of second conductive patterns arranged on the first conductive pattern, wherein heat generated from the circuit element mounted on the first conductive pattern is released to the outside through the second conductive pattern. And
[0015]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment illustrating the configuration of the circuit device 10)
With reference to FIG. 1, the configuration of the circuit device 10 of the present invention will be described. FIG. 1A is a plan view of the circuit device 10, and FIG. 1B is a cross-sectional view of the circuit device 10.
[0016]
Referring to FIGS. 1A and 1B, circuit device 10 includes first conductive patterns 11A, 11B, 11C and 11D arranged in the peripheral portion, and a second conductive pattern arranged in the central portion. 11E, circuit elements 12 mounted on the first conductive patterns 11A, 11B, 11C, and 11D, and the first and second conductive patterns 11 and circuit elements by exposing the back surfaces of the first and second conductive patterns 11. 12 and an insulating resin for sealing 12. Furthermore, in the present invention, the heat generated from the circuit element 12 is released to the outside through the second conductive pattern 11E by thermally coupling the circuit element 12 and the second conductive pattern 11E. Each of these components will be described below.
[0017]
The first conductive patterns 11A, 11B, 11C and 11D are made of a metal such as copper, and are embedded in the insulating resin 13 with the back surface exposed. As described above, the four first conductive patterns 11A, 11B, 11C, and 11D are arranged at the four corners of the circuit device 10, and the two sides are the outer shapes. A circuit element 12 is mounted on each of the first conductive patterns 11A, 11B, 11C, and 11D. The shape of the first conductive pattern 11A is basically a rectangle, but the shape can be changed according to the circuit configured therein. For example, as shown in the plan view, the first conductive pattern 11D can be locally extended in the lateral direction in order to secure a region to be a bonding pad of the fine metal wire 14. That is, the shapes of the first conductive patterns 11A, 11B, 11C, and 11D do not have to be the same.
[0018]
The second conductive pattern 11E is made of a metal such as copper, and is buried in the insulating resin 13 with the back surface exposed. The second conductive pattern 11E is provided between the first conductive patterns 11A, 11B, 11C, and 11D. A plurality of second conductive patterns 11 </ b> E are provided so as to be arranged in a cross shape from the vicinity of the center of the circuit device 10. Further, the second conductive pattern 11E is electrically connected to the circuit element 12 mounted on the first conductive pattern via the fine metal wires 14 and the like. Here, the cross-shaped second conductive pattern 11E provided near the center is a conductive pattern that works as a ground potential. And the other 2nd conductive pattern 11E is a conductive pattern which acts as a bonding pad etc. of the metal fine wire 14, for example. Furthermore, since all of the first conductive patterns 11A to 11D are close to the second conductive pattern 11E arranged in the central portion via the insulating resin 13, both are thermally coupled. .
[0019]
As the circuit element 12, passive elements such as resistors and capacitors and active elements such as semiconductor elements are generally employed. Here, as shown in the plan view, one element that generates heat, such as a diode or a transistor, is mounted on each of the first conductive patterns 11A arranged at the four corners. The circuit element mounted on the first conductive pattern 11A is electrically connected to another conductive pattern via the metal thin wire 14. Further, here, a chip resistor is mounted so as to straddle the conductive pattern. The circuit element is mounted through a brazing material such as solder or Ag paste. Further, the heat generated from the circuit element 12 causes the first conductive patterns 11A to 11D and the insulating resin 13 to move along the directions of the hatched arrows in FIGS. 1 (A) and 1 (B). And transmitted to the second conductive pattern 11E.
[0020]
The insulating resin 13 exposes the back surface of the conductive pattern 11 and seals the whole. Here, the circuit element 12, the fine metal wire 14, and the conductive pattern 11 are sealed. As a material of the insulating resin 13, a thermosetting resin formed by transfer molding or a thermoplastic resin formed by injection molding can be employed. The insulating resin 13 used in the present invention is excellent in heat conductivity. Therefore, the heat generated from the circuit element 12 is efficiently conducted to the second conductive pattern 11E and the like through the insulating resin 13.
[0021]
With reference to FIG. 2, a state in which the above-described circuit device 10 is mounted on the fixed substrate 20 will be described. 2A is a back view of the circuit device 10, and FIG. 2B is a cross-sectional view showing a state where the circuit device 10 is fixed to the fixing substrate 20.
[0022]
The circuit device 10 shown in FIGS. 2A and 2B has the following configuration. That is, the first conductive patterns 11A to 11D disposed in the peripheral portion, the second conductive pattern 11E disposed in the central portion, the circuit element 12 mounted on the first conductive patterns 11A to 11D, the first and first The insulating resin 13 that seals the conductive pattern 11 and the circuit element 12 by exposing the back surface of the second conductive pattern 11, and the external electrode 15 provided on the back surface of the first and second conductive patterns 11. Further, the second conductive pattern 11E thermally coupled to the first conductive patterns 11A to 11D is thermally connected to the thermal via hole 24 provided in the fixed substrate 20 via the second external electrode 15E. The The configuration of such a circuit device 10 will be described below. In addition, the description which overlaps description of FIG. 1 is omitted.
[0023]
With reference to FIG. 2A, the state of the back surface of the circuit device 10 will be described. In this figure, the conductive pattern 11 is indicated by a dotted line, and the external electrode 15 is indicated by a hatched region. The entire circuit device 10 is supported by an insulating resin 13. Therefore, on the back surface of the circuit device 10, the first conductive patterns 11A, 11B, 11C, and 11D and the second conductive pattern 11E are exposed from the insulating resin 13. An external electrode 15 made of solder or the like is formed on the back surfaces of the first conductive pattern and the second conductive pattern in order to make electrical and thermal connection between the circuit device 10 and the outside. Further, the portion on the back surface of the circuit device 10 where no external electrode is provided may be covered with a resist for the purpose of protecting the conductive pattern 11 or the like.
[0024]
The first external electrodes 15A, 15B, 15C, and 15D are electrodes that are provided on the back surface of the first conductive patterns 11A, 11B, 11C, and 11D and perform electrical and thermal bonding with the outside. Here, large first external electrodes 15A, 15B, 15C, and 15D are provided on the back surfaces of the four first conductive patterns 11A, 11B, 11C, and 11D provided at the four corners. Accordingly, four first external electrodes 15 </ b> A, 15 </ b> B, 15 </ b> C, and 15 </ b> D are formed at the four corners of the back surface of the circuit device 10. Further, the four first external electrodes 15A, 15B, 15C, and 15D are formed in the same shape, and are symmetrically arranged on the back surface of the circuit device 10 in the horizontal and vertical directions. Further, the sizes of the respective first external electrodes 15A are formed to be equal. Although the shape of the first conductive pattern 11 may change depending on the circuit configured therein, the shape of the first external electrode 15A is rectangular. The first external electrode 15A is formed using a brazing material such as solder.
[0025]
The second external electrode 15E is mainly provided on the back surface of the second conductive pattern 11E, and is an electrode that performs electrical and thermal bonding with the outside. A plurality of second external electrodes 15E are arranged in a cross shape from the vicinity of the center on the back surface of the circuit device 10. Further, the second external electrodes 15E are arranged at equal intervals. Here, a plurality of second external electrodes 15E are provided on the second conductive pattern 11E disposed near the center. Then, one second external electrode 15E is provided on each back surface of the second conductive pattern 11A disposed in the peripheral portion. The second external electrode 15E may be provided on the back surface of the first conductive pattern 11A. The second external electrode 15A is made of a brazing material such as solder, and the size thereof is smaller than that of the first external electrode 15A.
[0026]
The hatched arrows shown in FIG. 1B indicate paths of heat generated from the circuit elements 12. Specifically, the heat generated from the circuit element 12 is transmitted to the first conductive patterns 11A to 11D on which the circuit element 12 is mounted. The first conductive patterns 11 </ b> A to 11 </ b> D and the second conductive pattern 11 </ b> E provided in the central portion are close to each other via the insulating resin 13 and are thermally coupled. Accordingly, heat is conducted from the first conductive patterns 11A to 11D to the second conductive pattern 11E.
[0027]
With reference to FIG. 2B, a state in which the circuit device 10 is mounted on the fixed substrate 20 will be described. Here, the circuit device 10 is fixed to the conductive path 21 formed on the fixing substrate 20 by reflowing the external electrode 15 made of a brazing material such as solder. Since the first external electrodes 15A, 15B, 15C and 15D arranged at the four corners on the back surface of the circuit device 10 are sufficiently large, the circuit device 10 rotates on the fixed substrate 20 in the reflow process. It is possible to prevent the position from shifting. In addition, this allows the first external electrodes 15A, 15A, 15B, 15C and 15D and the second external electrode 15E to be accurately fixed to a desired location of the conductive path 21 on the fixing substrate 20 by self-alignment. Can do.
[0028]
The fixed substrate 20 is a composite substrate including a metal layer 22 and an insulating layer 23 formed on the metal layer 22. A conductive path 21 is provided on the surface of the insulating layer 23, and the positions of the pads formed by the conductive path 21 are the positions of the first external electrodes 11A to 11D and the second external electrode 11E on the back surface of the circuit device 10. Corresponds precisely to the position. The second external electrode 15E is fixed to the conductive path 21E, and is thermally coupled to the metal layer 22 through the thermal via hole 24. The thermal via hole 24 is made of a good thermal conductor such as alumina or beryllia, and penetrates the insulating layer 23 to thermally couple the conductive path 21E and the metal layer 22 together.
[0029]
The hatched arrows shown in FIG. 2B indicate the path of heat generated from the circuit element 12. Specifically, the heat generated from the circuit element 12 is transmitted to the first conductive patterns 11A to 11D on which the circuit element 12 is mounted. The first conductive patterns 11 </ b> A to 11 </ b> D and the second conductive pattern 11 </ b> E provided in the central portion are close to each other via the insulating resin 13 and are thermally coupled. Accordingly, heat is conducted from the first conductive patterns 11A to 11D to the second conductive pattern 11E. Further, the second conductive pattern 11E provided in the central portion is thermally connected to the thermal via hole 24 via the second external electrode 15E and the conductive path 21E. Accordingly, the heat transmitted to the second conductive pattern 11E is released to the outside through the second external electrode 15E, the conductive path 21E, the thermal via hole 24, and the metal layer 22.
[0030]
The circuit element 12 is electrically and thermally coupled to the conductive path 21 of the fixed substrate 20 via the first conductive pattern 11A and the first external electrode 15A. That is, in principle, the external electrode 15 formed on the conductive pattern 11 on which the circuit element 12 is mounted on the surface is formed large, and the external electrode formed on the conductive pattern 11 on which the circuit element is not mounted is formed small. Is done. Here, when the circuit element 12 mounted on the conductive pattern 11 is an element that does not generate heat, the external electrode 15 formed on the back surface of the conductive pattern may be formed small.
[0031]
With reference to FIG. 3, an example of an electric circuit formed in the circuit device 10 will be described. FIG. 3A is a circuit diagram of a built-in voltage control circuit. FIG. 3B is a plan view of a circuit device in which a circuit as shown in FIG.
[0032]
With reference to FIG. 3A, a voltage control circuit built in the circuit device 10 will be described. This circuit includes a first transistor TR1 having a collector connected to Vin and an emitter connected to Vout, a first diode D1 and a second diode D2 connected to the collector of the first transistor TR1, and a resistor. And a second transistor TR2 having a drain connected to the base of the first transistor TR1 via R1. Here, a bipolar transistor is employed as the first transistor TR1, and a MOSFET is employed as the second transistor TR2.
[0033]
An operation example of the voltage control circuit configured as described above will be described below. By applying a pulse voltage to the gate of the second transistor TR2, the second transistor TR2 is intermittently turned on and off. Therefore, when the second transistor TR2 is in the ON state, the first transistor TR1 is also in the ON state and controls the voltage of Vout.
[0034]
Thus, by controlling the pulse of the second transistor TR2, the ON-OFF of the first transistor TR1 is controlled to control the voltage value of Vout. In the present invention, for example, the voltage of Vin is 6V, and the voltage of Vout is controlled to be 4V. Therefore, heat corresponding to a voltage difference of about 2V between Vin and Vout is generated from the circuit elements. This heat is released to the outside of the circuit device 10 through the following path.
[0035]
With reference to FIG. 3B, arrangement of circuit elements constituting the voltage control circuit will be described. A diode and a transistor constituting the circuit are mounted on the first conductive pattern via a brazing material. The resistor R1 is mounted so as to straddle two spaced apart conductive patterns.
[0036]
The first diode D1 and the second diode D2 are, for example, Schottky diodes, and are mounted on the first conductive pattern 11A with the cathode as the bottom surface. Accordingly, heat generated from the cathodes of the first diode D1 and the second diode D2 is released to the outside through the first conductive pattern 11A. Note that the anode of the diode is electrically connected to another conductive pattern 11 via a thin metal wire 14.
[0037]
The first transistor TR1 and the second transistor TR2 are mounted on the first conductive pattern. Accordingly, the heat generated by the transistor is released to the outside through the first conductive pattern 11A. Note that the control part and the inflow part of the transistor are electrically connected to other conductive patterns via the fine metal wires 14.
[0038]
The first conductive patterns 11A, 11B, 11C, and 11D are formed sufficiently larger than the circuit element 12 mounted on them. The circuit element 12 is fixed so as to substantially overlap the first external electrodes 15A, 15B, 15C and 15D corresponding to most of the first conductive patterns 11A, 11B, 11C and 11D.
[0039]
A feature of the present invention resides in that heat generated from the circuit element 12 is released to the outside of the circuit device 10 through the second conductive pattern. As described above, the circuit element 12 is mounted on the first conductive patterns 11 </ b> A to 11 </ b> D arranged at the four corners of the circuit device 10. And since the 2nd conductive pattern 11E is arrange | positioned in the center part enclosed by 1st conductive pattern 11A-11D, it couple | bonds thermally via all the conductive patterns 11A-11D and the insulating resin 13. Has been. Therefore, the heat generated from the circuit device 12 is transmitted to the second conductive pattern 11E provided at the center via the first conductive patterns 11A to 11D and the second conductive pattern 11E. The second conductive pattern 11E is connected to a conductive path 21E that is thermally coupled to the thermal via hole 24 via the second external electrode 15E. Accordingly, the heat generated from the circuit element 12 is released to the outside through the following path. That is, heat is released in the order of circuit element 12 → first conductive patterns 11A to 11D → insulating resin 13 → second conductive pattern 11E → second external electrode 15E → conductive path 21E → thermal via hole 24 → metal substrate. Is done. Therefore, the heat generated from the plurality of circuit elements 12 incorporated in the circuit device 10 can be released to the outside through the single second conductive pattern 11E. For this reason, it is not necessary to provide the thermal via holes 24 individually in the conductive paths 21 corresponding to the first conductive patterns 11A, 11B, 11C, and 11D on which the circuit elements 12 that generate heat are mounted.
[0040]
(Second Embodiment Explaining Method of Manufacturing Circuit Device 10)
The circuit device 10 of the present invention is manufactured by the following process. That is, a step of preparing the conductive foil 40, a step of forming a separation groove 41 shallower than the thickness of the conductive foil 40 in the conductive foil 40 to form the conductive pattern 51, and each circuit device portion 45 of the desired conductive pattern 51. The step of fixing the circuit element 12 to the substrate, the step of wire bonding the circuit element 12 and the desired conductive pattern 51, and the circuit element 12 of each circuit device unit 45 are collectively covered and filled in the separation groove 41. A step of performing common molding with the insulating resin 13, a step of removing the back surface of the conductive foil 40 until the insulating resin 13 is exposed, and a step of dicing the insulating resin 13 into the circuit device portion. It is composed of Below, each process of this invention is demonstrated with reference to FIGS.
[0041]
In the first step of the present invention, as shown in FIGS. 4 to 6, a conductive foil 40 is prepared, and a separation groove 41 shallower than the conductive foil 40 is formed in the conductive foil 40 by etching to form a conductive pattern 51. It is to form.
[0042]
In this step, first, a sheet-like conductive foil 40 is prepared as shown in FIG. The conductive foil 40 is selected in consideration of the adhesiveness, bonding property, and plating property of the brazing material. As the material, a conductive foil mainly composed of Cu, a conductive foil mainly composed of Al, or Fe is used. A conductive foil made of an alloy such as Ni is employed.
[0043]
The thickness of the conductive foil 40 is preferably about 10 μm to 300 μm in consideration of the later etching, but may be basically 300 μm or more or 10 μm or less. As will be described later, it is only necessary that the separation groove 41 shallower than the thickness of the conductive foil 40 can be formed.
[0044]
In addition, the sheet-like conductive foil 40 is prepared by being wound into a roll with a predetermined width, for example, 45 mm, and this may be conveyed to each step described later, or a strip-shaped cut into a predetermined size. The conductive foil 40 may be prepared and conveyed to each process described later.
[0045]
Specifically, as shown in FIG. 4B, 4 to 5 blocks 42 in which a large number of circuit device portions 45 are formed are arranged on the strip-shaped conductive foil 40 so as to be spaced apart. A slit 43 is provided between each block 42 to absorb the stress of the conductive foil 40 generated by the heat treatment in the molding process or the like. Also, index holes 44 are provided at regular intervals at the upper and lower peripheral ends of the conductive foil 40, and are used for positioning in each step. Subsequently, a conductive pattern is formed.
[0046]
First, as shown in FIG. 5, a photoresist (etching resistant mask) PR is formed on the conductive foil 40, and the photoresist PR is patterned so that the conductive foil 40 excluding the region to be the conductive pattern 51 is exposed. Then, as shown in FIG. 6A, the conductive foil 40 is selectively etched.
[0047]
A specific conductive pattern 51 is shown in FIG. This figure corresponds to an enlarged view of one of the blocks 42 shown in FIG. One hatched portion is one circuit device unit 45, and in one block 42, a large number of circuit device units 45 are arranged in a matrix of 2 rows and 2 columns, and the same conductive pattern is provided for each circuit device unit 45. 51 is provided. A frame-like pattern 46 is provided in the periphery of each block, and a positioning mark 47 for dicing is provided inside the pattern slightly apart from the frame-like pattern 46. The frame-shaped pattern 46 is used for fitting with the mold, and has a function of reinforcing the insulating resin 13 after the back surface etching of the conductive foil 40. Here, the conductive pattern 51 includes first conductive patterns 11A to 11D and a second conductive pattern 11E.
[0048]
In the second step of the present invention, as shown in FIG. 7, the circuit element 12 is fixed to each circuit device portion 45 of the desired conductive pattern 51, and the electrode of the circuit element 12 and the desired conductive pattern 51 are wire-bonded. There is.
[0049]
Here, as the circuit element 12, a semiconductor element and a chip resistor are die-bonded to the first conductive patterns 11 to 14. Thereafter, the base electrode and the gate electrode of the circuit element 12 of each circuit device unit are collectively bonded by ball bonding by thermocompression bonding and wedge bonding by ultrasonic waves. Specifically, the gate electrode and the base electrode of each circuit element 12 are connected to the first or second conductive pattern via a thin metal wire.
[0050]
In the third step of the present invention, as shown in FIG. 8, the circuit elements 12 of each circuit device unit 45 are collectively covered, and the insulating resin 13 is commonly molded so as to fill the separation grooves 41. is there.
[0051]
In this step, as shown in FIG. 8A, the insulating resin 13 completely covers the circuit element 12 and the plurality of conductive patterns, and the separation groove 41 is filled with the insulating resin 13. Fits and bonds firmly. The conductive pattern 51 is supported by the insulating resin 13.
[0052]
Further, this step can be realized by transfer molding, injection molding, or potting. As the resin material, a thermosetting resin such as an epoxy resin can be realized by transfer molding, and a thermoplastic resin such as polyimide resin or polyphenylene sulfide can be realized by injection molding.
[0053]
Further, when performing transfer molding or injection molding in this step, each block 42 has a circuit device portion 63 in one common mold as shown in FIG. 8B, and one insulating property is provided for each block. The resin 13 is molded in common. For this reason, the amount of resin can be greatly reduced as compared with a method in which each circuit device unit is individually molded, such as a conventional transfer mold.
[0054]
The feature of this step is that the conductive foil 40 that becomes the conductive pattern 51 becomes a support substrate until the insulating resin 13 is coated. Conventionally, the conductive pattern is formed by using a support substrate that is not originally required, but in the present invention, the conductive foil 40 serving as the support substrate is a material necessary as an electrode material. Therefore, there is a merit that the work can be performed with the constituent materials omitted as much as possible, and the cost can be reduced.
[0055]
Further, since the separation groove 41 is formed shallower than the thickness of the conductive foil, the conductive foil 40 is not individually separated as the conductive pattern 51. Therefore, the sheet-like conductive foil 40 can be handled as a unit, and when the insulating resin 13 is molded, it has a feature that the work of transporting to the mold and mounting to the mold becomes very easy.
[0056]
The fourth step of the present invention is to remove the back surface of the conductive foil 40 until the insulating resin is exposed.
[0057]
In this step, the back surface of the conductive foil 40 is chemically and / or physically removed and separated as the conductive pattern 51. This step is performed by polishing, grinding, etching, laser metal evaporation, or the like.
[0058]
In the experiment, the entire surface of the conductive foil 40 is wet etched to expose the insulating resin 13 from the separation groove 41. This exposed surface is indicated by a dotted line in FIG. As a result, the conductive pattern 51 is separated.
[0059]
As a result, the back surface of the conductive pattern 51 is exposed to the insulating resin 13. That is, the surface of the insulating resin 13 filled in the separation groove 41 and the surface of the conductive pattern 51 are substantially matched. Therefore, since the circuit device of the present invention does not have a step as in the conventional back electrode, it has the feature that it can be moved horizontally and self-aligned by the surface tension of solder or the like during mounting.
[0060]
Furthermore, the back surface treatment of the conductive pattern 51 is performed to obtain, for example, the final structure shown in FIG. That is, a conductive material such as solder is deposited on the exposed conductive pattern 51 as necessary to complete the circuit device.
[0061]
The fifth step of the present invention is to separate the insulating resin 13 by dicing for each circuit device section 45 as shown in FIG.
[0062]
In this step, the block 42 is vacuum-adsorbed on the mounting table of the dicing apparatus, and the insulating resin 13 in the separation groove 41 is diced along a dicing line (one-dot chain line) between the circuit device portions 45 with a dicing blade 49. Separate into separate circuit devices.
[0063]
In this step, the dicing blade 49 is preferably performed at a cutting depth that substantially cuts the insulating resin 13, and after taking out the block 42 from the dicing apparatus, a chocolate break may be performed with a roller. At the time of dicing, the alignment mark 47 of each block provided in the first step described above is recognized in advance and dicing is performed based on this. As is well known, dicing is performed by dicing all dicing lines in the vertical direction, rotating the mounting table 90 degrees, and performing dicing according to the dicing lines 70 in the horizontal direction.
[0064]
【The invention's effect】
In the present invention, the following effects can be obtained.
[0065]
That is, it is possible to prevent the temperature of the circuit element 12 from excessively rising by releasing the heat generated from the circuit element 12 incorporated in the circuit device 10 to the outside through the second conductive pattern 11E. it can. Further, since the second conductive pattern 11E is a conductive pattern that works as a ground potential, it can be easily connected to the metal layer 22 of the fixed substrate 20 through a thermal via hole made of a material having excellent thermal conductivity.
[Brief description of the drawings]
1A and 1B are a plan view and a cross-sectional view illustrating a circuit device according to the present invention.
2A and 2B are a plan view and a cross-sectional view illustrating a circuit device of the present invention.
3A and 3B are a circuit diagram (A) and a plan view (B) for explaining a circuit device of the present invention.
4A and 4B are a cross-sectional view (A) and a plan view (B) illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 5 is a cross-sectional view illustrating a method for manufacturing a circuit device according to the present invention.
6A and 6B are a cross-sectional view (A) and a plan view (B) illustrating a method for manufacturing a circuit device according to the present invention.
7A and 7B are a plan view and a cross-sectional view illustrating a method for manufacturing a circuit device according to the present invention.
8A and 8B are a cross-sectional view (A) and a plan view (B) cross-sectional view illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 9 is a plan view illustrating the method for manufacturing the circuit device of the present invention.
FIG. 10 is a cross-sectional view illustrating a conventional circuit device.
FIG. 11 is a cross-sectional view illustrating a conventional circuit device.

Claims (6)

  In a circuit device that has a conductive pattern, a circuit element connected to the conductive pattern, and an insulating resin that seals the conductive pattern and the circuit element, and has a square shape in plan view.
  The conductive patterns are arranged in a cross shape between the four first conductive patterns provided at the four corners of the circuit device and having the circuit element mounted on each upper surface, and the first conductive patterns. A plurality of second conductive patterns.
  A circuit device characterized in that heat generated from the circuit element mounted on the first conductive pattern is released to the outside through the second conductive pattern.   The circuit device according to claim 1, wherein the circuit element is a semiconductor element.   An external electrode is provided on the back surface of the second conductive pattern exposed to the outside from the insulating resin,
  2. The circuit device according to claim 1, wherein heat generated from the circuit element is conducted to a thermal via hole provided in a fixed substrate via the second conductive pattern and the external electrode. 4. The circuit device according to claim 3, wherein the second conductive pattern connected to the thermal via hole is connected to a ground potential.   2. The circuit device according to claim 1, wherein the second conductive pattern provided in the central portion adjacent to all the first conductive patterns has a cross shape.   2. The circuit device according to claim 1, wherein a side surface and an upper surface of the conductive pattern are covered with the insulating resin, and a back surface of the conductive pattern is exposed to the outside from the insulating resin.

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