JP2005260081A5

JP2005260081A5 -

Info

Publication number: JP2005260081A5
Application number: JP2004071296A
Authority: JP
Filing date: 2004-03-12
Publication date: 2007-04-19
Anticipated expiration: 2024-03-12

Claims

A pad electrode formed on the first main surface of the semiconductor chip;
A via hole reaching the pad electrode from the second major surface of said semiconductor chip,
A wiring layer electrically connected to the pad electrode through the via hole and extending from the via hole onto the second main surface of the semiconductor chip;
A reinforcing layer that is formed so as to cover the wiring layer and reinforces the wiring layer;
A protective layer formed on the reinforcing layer,
A surface of the reinforcing layer in contact with the protective layer is roughened.

An insulating film formed over the sidewall of the via hole from the second on the main surface of the semiconductor chip,
An opening for opening a part of the reinforcing layer and the protective layer;
A conductive terminal formed on the wiring layer exposed at the opening,
The semiconductor device according to claim 1 , wherein the wiring layer extends from the via hole onto a second main surface of the semiconductor chip including the insulating film.

3. The semiconductor device according to claim 1, wherein the reinforcing layer is made of a silicon oxide film or a silicon nitride film.

A pad electrode formed on the first main surface of the semiconductor chip;
A via hole reaching the pad electrode from the second major surface of said semiconductor chip,
An insulating film formed over the sidewall of the via hole from the second on the main surface of the semiconductor chip,
A wiring layer electrically connected to the pad electrode through the via hole and extending from the via hole onto the second main surface of the semiconductor chip;
A protective layer formed on the wiring layer so as to cover the wiring layer;
The surface of the insulating film in contact with the protective layer or the surfaces of the insulating film and the wiring layer is roughened.

A buffer layer provided on the insulating film;
An opening for opening a part of the protective layer;
A conductive terminal formed on the wiring layer exposed at the opening,
The semiconductor device according to claim 4 , wherein the wiring layer extends from the via hole onto a second main surface of the semiconductor chip including the buffer layer.

The semiconductor device according to any one of claims 1 to 5 wherein the interconnection layer is characterized in that it consists of copper.

Under the wiring layer, the semiconductor device according to any one of claims 1 to claim 6, characterized in that the barrier layer is formed.

The semiconductor device according to claim 7 , wherein the barrier layer is made of titanium nitride.

The semiconductor device according to claim 1, further comprising a support bonded to the first main surface of the semiconductor chip.

Preparing a semiconductor substrate having a pad electrode formed on the first main surface;
Forming a via hole reaching the pad electrode from the second main surface of the semiconductor substrate;
Forming a barrier layer electrically connected to the pad electrode through the via hole and extending from the via hole onto the second main surface of the semiconductor substrate;
Forming a wiring layer on the barrier layer;
Forming a reinforcing layer on the wiring layer to reinforce the wiring layer so as to cover the wiring layer;
A step of roughening the surface of the reinforcing layer;
And a step of forming a protective layer on the reinforcing layer.

Forming a first insulating film on the second main surface of the semiconductor substrate after bonding a support on the first main surface of the semiconductor substrate;
Forming a second insulating film on the entire second main surface of the semiconductor substrate including the inside of the via hole after forming the via hole;
Removing the second insulating film located at the bottom of the via hole and forming a sidewall insulating film on the side wall of the via hole;
After forming the reinforcing layer and the protective layer, removing a part of the reinforcing layer and the protective layer to form an opening exposing a part of the wiring layer;
Forming a conductive terminal on the wiring layer exposed at the opening;
The method of manufacturing a semiconductor device according to claim 10, further comprising: dividing the semiconductor substrate into a plurality of semiconductor chips.

Forming an insulating film on a second main surface of the semiconductor substrate including the inside of the via hole after forming the via hole;
Removing the insulating film located at the bottom of the via hole and forming a sidewall insulating film on the sidewall of the via hole;
After forming the reinforcing layer and the protective layer, removing a part of the reinforcing layer and the protective layer to form an opening exposing a part of the wiring layer;
Forming a conductive terminal on the wiring layer exposed at the opening;
Dividing the semiconductor substrate into a plurality of semiconductor chips.
A method for manufacturing a semiconductor device according to claim 10.

The method for manufacturing a semiconductor device according to claim 10, wherein the reinforcing layer is made of a silicon oxide film or a silicon nitride film.

The barrier layer is made of titanium nitride,
The method for manufacturing a semiconductor device according to claim 10, wherein the wiring layer is made of copper.

The method of manufacturing a semiconductor device according to claim 10, wherein the roughening process is performed by dry etching.

The method of manufacturing a semiconductor device according to claim 10, wherein the roughening process is performed by wet etching.

Prepare a semiconductor substrate on which pad electrodes are formed,
Forming a first insulating film on a second main surface of the semiconductor substrate;
Forming a via hole reaching the pad electrode from the first insulating film;
Forming a barrier layer electrically connected to the pad electrode through the via hole and extending from the via hole onto the second main surface of the semiconductor substrate;
Forming a wiring layer on the barrier layer;
Roughening the surface of the first insulating film or the surfaces of the first insulating film and the wiring layer;
And a step of forming a protective layer on the first insulating film and the wiring layer so as to cover the wiring layer.

Forming a second insulating film on a second main surface of the semiconductor substrate including the inside of the via hole after forming the via hole;
Forming a buffer layer on the second insulating film;
Removing the second insulating film located at the bottom of the via hole and forming a sidewall insulating film on the side wall of the via hole;
Forming the barrier layer, the wiring layer, and the protective layer, and then removing a part of the protective layer to form an opening exposing a part of the wiring layer;
Forming a conductive terminal on the wiring layer exposed at the opening;
18. The method of manufacturing a semiconductor device according to claim 17, further comprising: dividing the semiconductor substrate into a plurality of semiconductor chips.

Preparing a semiconductor substrate having a pad electrode formed on the first main surface;
Forming a via hole reaching the pad electrode from the second main surface of the semiconductor substrate;
Forming an insulating film on a second main surface of the semiconductor substrate including the via hole;
Removing the insulating film located at the bottom of the via hole and forming a sidewall insulating film on the sidewall of the via hole;
Forming a barrier layer electrically connected to the pad electrode through the via hole and extending from the via hole onto the second main surface of the semiconductor substrate;
Forming a wiring layer on the barrier layer;
Roughening the surface of the insulating film or the surfaces of the insulating film and the wiring layer;
And a step of forming a protective layer on the insulating film and the wiring layer so as to cover the wiring layer.

Forming a buffer layer on the insulating film after forming the insulating film;
After forming the wiring layer and the protective layer, removing a part of the protective layer to form an opening exposing a part of the wiring layer;
Forming a conductive terminal on the wiring layer exposed at the opening;
The method of manufacturing a semiconductor device according to claim 19, further comprising: dividing the semiconductor substrate into a plurality of semiconductor chips.

The barrier layer is made of titanium nitride,
21. The method of manufacturing a semiconductor device according to claim 17, wherein the wiring layer is made of copper.

The method for manufacturing a semiconductor device according to claim 17, wherein the roughening process is performed by dry etching.

The method of manufacturing a semiconductor device according to claim 17, wherein the roughening process is performed by wet etching.

24. The method for manufacturing a semiconductor device according to claim 10, further comprising a step of bonding a support to the first main surface of the semiconductor substrate.