JP2005227562A - Pixel circuit and display device - Google Patents

Pixel circuit and display device Download PDF

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JP2005227562A
JP2005227562A JP2004036504A JP2004036504A JP2005227562A JP 2005227562 A JP2005227562 A JP 2005227562A JP 2004036504 A JP2004036504 A JP 2004036504A JP 2004036504 A JP2004036504 A JP 2004036504A JP 2005227562 A JP2005227562 A JP 2005227562A
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tft
capacitor
gate
source
transistor
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JP4529467B2 (en
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Katsuhide Uchino
Tetsuo Yamamoto
Junichi Yamashita
勝秀 内野
淳一 山下
哲郎 山本
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Sony Corp
ソニー株式会社
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that if the sum of the capacity of a capacitor (pixel capacitor) and the capacity between the gate and source of a driving transistor is smaller than the parasitic capacitor of a switching transistor, a change in the value of the potential between the gate and source of the driving transistor is resulted by the amount of change in the source potential of the driving transistor and desired light emission cannot be expected. <P>SOLUTION: The configuration that an anode electrode layer 211 of an organic EL element 21 and capacitor forming layers 231 and 232 forming a capacitor 23 are overlapped in layout is employed for a pixel circuit 11 of the constitution to connect the capacitor 23 between the gate and source of a TFT 22 which is the driving transistor and to selectively connect the source of the TFT 22 to a grounding potential GND through a TFT 25 which is the switching transistor. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a pixel circuit and a display device, and in particular, a pixel circuit having an electro-optic element whose luminance is changed by a flowing current as a display element, and the pixel circuits are arranged in a matrix, and active for each pixel circuit (pixel) The present invention relates to a display device which includes an element and is driven by a pixel unit by the active element.

  In a display device, for example, a liquid crystal display device using a liquid crystal cell as a display element of a pixel, a number of pixels including the liquid crystal cell are arranged in a matrix, and the light intensity is controlled for each pixel according to image information to be displayed. Thus, image display driving is performed. This display drive is the same for an organic EL display device that uses an electro-optical element whose luminance is changed by a flowing current, for example, an organic EL (electroluminescence) element, as a display element of a pixel.

  However, in the case of an organic EL display device, since it is a so-called self-luminous display device using an organic EL element which is a self-luminous element as a pixel display element, the light intensity from the light source (backlight) is controlled. Compared with a liquid crystal display device, it has advantages such as high image visibility, no need for a backlight, and high response speed. Further, the light emission luminance of the organic EL element is controlled by the value of the current flowing therethrough, that is, the organic EL element is of a current control type, which is greatly different from a liquid crystal display device in which the liquid crystal cell is of a voltage control type.

  In the organic EL display device, as in the liquid crystal display device, a simple (passive) matrix method and an active matrix method can be adopted as the driving method. However, although the simple matrix display device has a simple structure, there is a problem that it is difficult to realize a large and high-definition display device. For this reason, in recent years, an active matrix in which a current flowing in a light emitting element in a pixel is controlled by an active element similarly provided in the pixel, for example, an insulated gate field effect transistor (generally, a thin film transistor (TFT)). There is a lot of development of methods.

  FIG. 25 is a circuit diagram showing a conventional example of a pixel circuit (unit pixel circuit) in an active matrix organic EL display device.

  As is clear from FIG. 25, the pixel circuit according to this conventional example has, for example, an organic EL element 101 having a cathode (cathode) connected to the ground potential GND and a drain connected to the anode (anode) of the organic EL element 101. , A P-channel TFT 102 whose source is connected to the positive power supply potential Vcc, a capacitor 103 connected between the gate of the TFT 102 and the positive power supply potential Vcc, a source to the gate of the TFT 102, a gate to the scanning line 105, The P-channel TFT 104 has a drain connected to the data line 106 (see, for example, Patent Documents 1 and 2).

  Here, since organic EL elements often have a rectifying property, they are sometimes called OLEDs (Organic Light Emitting Diodes). Therefore, in FIG. 25 and other figures, a symbol of a diode is used as the OLED. However, in the following description, rectification is not necessarily required for the OLED.

  Next, the operation of the pixel circuit having the above configuration will be described. First, when the potential of the scanning line 105 is set to a selected state (here, a low level state) and the write potential Vdata is applied to the data line 106, the TFT 104 is turned on and the capacitor 103 is charged or discharged. As a result, the gate potential of the TFT 102 becomes the write potential Vdata. Next, when the potential of the scanning line 105 is set to a non-selected state (here, a high level state), the scanning line 105 and the TFT 102 are electrically disconnected, but the gate potential of the TFT 102 is stably held by the capacitor 103. .

  The current flowing in the TFT 102 and the organic EL element 101 has a value corresponding to the gate-source voltage Vgs of the TFT 102. Then, the organic EL element 101 continues to emit light with a luminance corresponding to the current value. Here, the operation of selecting the scanning line 105 and transmitting the luminance information supplied through the data line 106 to the inside of the pixel through the TFT 104 is hereinafter referred to as “writing”.

  As described above, in the pixel circuit of FIG. 25, once the potential Vdata is written, the organic EL element 101 continues to emit light with a constant luminance until the next potential Vdata is written. Further, the value of the current flowing through the organic EL element 101 is controlled by changing the gate voltage of the TFT 102 which is a driving transistor. At this time, the TFT 102 is a constant current source having a current value Ids shown in the following equation (1) because the source is connected to the positive power supply potential Vcc and always operates in the saturation region.

Ids = 1/2 · μ (W / L) Cox (Vgs− | Vth |) 2 (1)
Here, Vth is the threshold value of the TFT 102, μ is the carrier mobility, W is the channel width, L is the channel length, Cox is the gate capacitance per unit area, and Vgs is the gate-source voltage.

  In a simple matrix display device, each light emitting element emits light only at a selected moment. On the other hand, in the active matrix display device, the light emitting element continues to emit light even after writing is completed. Therefore, the active matrix display device is particularly advantageous in a large-sized and high-definition display device in that the peak luminance and peak current of the light-emitting element can be reduced as compared with the simple matrix display device.

  FIG. 26 is a characteristic diagram showing the change with time of the current-voltage characteristic (IV characteristic) of the organic EL element. In FIG. 26, the curve indicated by the solid line indicates the characteristic in the initial state, and the curve indicated by the broken line indicates the characteristic after change with time.

  Generally, the IV characteristic of an organic EL element deteriorates with time as shown in FIG. However, in the pixel circuit of FIG. 25, as described above, constant current continues to flow through the organic EL element 101 due to constant current driving by the TFT 102 as the driving transistor, and the IV characteristics of the organic EL element deteriorate. However, the emission luminance does not decrease.

  By the way, the pixel circuit of FIG. 25 is configured by a P-channel TFT. If a pixel circuit can be constituted by an N-channel TFT instead of the P-channel TFT, a conventional amorphous silicon (a-Si) process can be used for TFT production. Cost reduction can be achieved.

  Consider a pixel circuit in which a P-channel TFT is replaced with an N-channel TFT.

  FIG. 27 is a circuit diagram showing a configuration of a pixel circuit in which the P-channel TFT in FIG. 25 is replaced with an N-channel TFT.

  As is apparent from FIG. 27, this pixel circuit has, for example, an organic EL element 201 whose cathode is connected to the ground potential GND, a source connected to the anode of the organic EL element 201, and a drain connected to the positive power supply potential Vcc. The N-channel TFT 202, the capacitor 203 connected between the gate of the TFT 202 and the positive power supply potential Vcc, the drain connected to the gate of the TFT 202, the gate connected to the scanning line 205, and the source connected to the data line 206, respectively. The source follower circuit configuration has an N-channel TFT 204.

  FIG. 28 is a diagram showing operating points of the TFT 202 as the driving transistor and the organic EL element 201 in the initial state. In FIG. 28, the horizontal axis represents the drain-source voltage Vds of the TFT 202, and the horizontal axis represents the drain-source current Ids. As shown in FIG. 28, the source voltage is determined by the operating point of the TFT 202 and the organic EL element 201, and has a different value depending on the gate voltage. Since the TFT 202 is driven in a saturation region, a current Ids having a current value given by the equation (1) is passed with respect to the gate-source voltage Vgs with respect to the source voltage at the operating point.

US Pat. No. 5,684,365 JP-A-8-234683

  However, even in a pixel circuit in which a P-channel TFT is replaced with an N-channel TFT, deterioration due to aging of the IV characteristic of the organic EL element is unavoidable. As a result, as shown in FIG. Therefore, even if the same gate voltage is applied to the TFT 202 which is a driving transistor, the source voltage fluctuates. As a result, the gate-source voltage Vgs of the TFT 202 changes, and the value of the current flowing through the TFT 202 changes. At the same time, since the current value flowing through the organic EL element 201 also changes, when the IV characteristic of the organic EL element 201 changes, the emission luminance of the organic EL element 201 also changes with time.

  As a modification of the pixel circuit of FIG. 28, as shown in FIG. 30, the anode of the organic EL element 201 is connected to the positive power supply potential Vcc, and the drain of the N-channel TFT 202 as the driving transistor is connected to the cathode of the organic EL element 201. In addition, it is conceivable to adopt a circuit configuration in which the source is connected to the ground potential GND.

  In the pixel circuit according to this modification, the source potential of the N-channel TFT 202 is fixed to the ground potential GND and operates as a constant current source, as in the case of driving by the P-channel TFT 102 of FIG. Therefore, a change in luminance due to deterioration of the IV characteristic of the organic EL element 201 can be prevented.

  However, in the pixel circuit according to this modification, a configuration in which the N-channel TFT 202 that is a driving transistor is connected to the cathode side of the organic EL element 201 must be adopted. In order to adopt this cathode connection configuration, it is necessary to develop a new anode / cathode electrode for the organic EL element. Development of the anode / cathode electrode is considered to be very difficult with the current technology. From such a viewpoint, conventionally, a pixel circuit using an N-channel transistor that suppresses a change in luminance due to a change with time in IV characteristics of an organic EL element has not been developed.

  The present invention has been made in view of the above problems, and an object thereof is to be realized by an N-channel transistor that does not change in luminance even if the current-voltage characteristics of the light-emitting element change over time. Another object is to provide a pixel circuit and a display device in which the pixel circuits are arranged in a matrix.

  To achieve the above object, according to the present invention, an electro-optical element having one end connected to a first power supply potential, and a drive transistor connected between the other end of the electro-optical element and a second power supply potential A capacitor connected between the gate and the source of the driving transistor, a first switching transistor that selectively takes in a signal corresponding to luminance information to the gate of the driving transistor, and a source of the driving transistor In a pixel circuit having a second switching transistor connected between a third power supply potential or a display device in which the pixel circuits are arranged in a matrix, the layer on the one end side of the electro-optic element and the layer The configuration is such that the capacitor forming layer forming the capacitor overlaps.

  In the pixel circuit having the above structure or a display device in which the pixel circuits are arranged in a matrix, the second switching transistor is turned on, the source potential of the driving transistor is set to the third power supply potential, and the capacitor is charged. Is determined by the difference between the input voltage and the third power supply potential. Then, after the writing to the capacitor is completed, the second switching transistor is turned off in the light emission period of the electro-optical element, whereby a current starts to flow through the electro-optical element. At this time, since the drive transistor operates as a constant current source, even if the current-voltage characteristic of the electro-optic element changes with time, and the source potential of the drive transistor changes accordingly, the gate and Since the potential difference between the sources is kept constant, the current flowing through the electro-optic element does not change, and thus the emission luminance of the electro-optic element is also kept constant.

  In addition, since the layer on one end side of the electro-optic element and the capacitor forming layer forming the capacitor overlap, a capacitance is formed between these layers. As a result, the capacitance between the gate and the source of the driving transistor is larger than the structure in which the capacitance does not overlap by the amount of the capacitance. As a result, the rate of increase of the gate potential with respect to the source potential of the driving transistor can be increased, so that desired light emission can be easily obtained.

  According to the present invention, even if the current-voltage characteristic of the electro-optic element changes with time, and the source potential of the driving transistor changes accordingly, the light emission luminance of the electro-optic element can be kept constant, and further driving Since the capacitance between the gate and the source of the transistor can be increased, desired light emission can be obtained, and the pixel size can be reduced by reducing the pixel capacitance by the increase in the capacitance. Can greatly contribute to higher resolution and higher definition.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing an outline of the configuration of an active matrix display device to which the present invention is applied. The active matrix display device according to this application example includes a pixel array unit 12 in which pixels (pixel circuits) 11 including, as display elements, electro-optical elements whose luminance changes depending on a flowing current are arranged in a matrix of m columns and n rows. Have. Here, for simplification of the drawing, a case where the pixel array unit 12 has a pixel array of 3 columns and 2 rows is shown as an example.

  In the pixel array unit 12, a scanning line 13 and a driving line 14 are wired for each row of each pixel 12, and a data line 15 is wired for each column. Around the pixel array section 12, there are a write scanning circuit 16 for driving the scanning line 13, a driving scanning circuit 17 for driving the driving line 14, and a data line for supplying a data signal corresponding to the luminance information to the data line 15. A drive circuit 18 is arranged.

[First Embodiment]
FIG. 2 is a circuit diagram showing a configuration example of the pixel circuit according to the first embodiment of the present invention and an active matrix display device using the pixel circuit. The pixel circuit 11 according to the present embodiment uses an organic EL element 21 as an electro-optical element that is a display element. In addition to the organic EL element 21, the driving transistor 22, the capacitor (pixel capacitance) 23, and the first and first elements are used. 2 switching transistors 24 and 25 as circuit elements. The drive transistor 22 and the switching transistors 24 and 25 are N-channel field effect transistors, for example, N-channel TFTs (thin film transistors). Hereinafter, the drive transistor 22 and the switching transistors 24 and 25 are referred to as TFT 22 and TFTs 24 and 25.

  In FIG. 2, the organic EL element 21 is provided with a cathode electrode connected to a first power supply potential (in this example, a ground potential GND). The TFT 22 is a drive transistor that drives the organic EL element 21 to emit light, and has a drain connected to the second power supply potential (in this example, the power supply potential Vcc) and a source connected to the anode electrode of the organic EL element 21, respectively. A circuit is formed. One end of the capacitor 23 is connected to the gate of the TFT 22, and the other end is connected to a connection node N 11 between the source of the TFT 22 and the anode electrode of the organic EL element 21. The TFT 24 has a source connected to the data line 16, a gate connected to the scanning line 13, and a drain connected to a connection node N 12 between the gate of the TFT 22 and one end of the capacitor 23. The TFT 25 has a drain connected to the connection node N11 and a source connected to a third power supply potential (in this example, the ground potential GND).

  Subsequently, regarding the circuit operation of the active matrix organic EL display device in which the pixel circuits 11 are two-dimensionally arranged in a matrix in the first embodiment having the above-described configuration, the timing chart of FIG. 3 and the explanation of the operations of FIGS. This will be described with reference to the drawings.

  FIG. 3 shows write signals WS [1] and WS [2] applied to the pixel circuit 11 from the write scanning circuit 16 via the scanning line 13 when driving the pixel circuits 11 in two consecutive rows. In one field (1F) period of the drive signals DS [1], DS [2] given from the circuit 17 to the pixel circuit 11 through the drive line 14, and the gate potential Vg and source potential Vs of the TFT 22 (see FIG. 2). The timing relationship is shown. 4 to 8, the TFTs 22, 24, and 25 are illustrated using switch symbols.

  In the normal light emission state, the write signal WS and the drive signal DS output from the write scanning circuit 16 and the drive scanning circuit 17 are substantially at the ground potential GND (hereinafter referred to as “L” level), respectively. As shown, the TFTs 24 and 25 are in an off state. At this time, the TFT 22 as the driving transistor is designed to operate in a saturation region. That is, the TFT 22 operates as a constant current source.

  Next, the drive signal DS output from the drive scanning circuit 17 in a state where the TFT 24 is turned off is substantially at the power supply potential Vcc (hereinafter referred to as “H” level), so that the TFT 25 is turned on. At this time, as shown in FIG. 5, since a current flows through the TFT 25, the source potential Vs of the TFT 22 falls to the ground potential GND. Thereby, the organic EL element 21 will be in a non-light-emitting state.

  Next, the write signal WS output from the write scanning circuit 16 with the TFT 25 turned on becomes “H” level for one horizontal scanning period (1H), so that the TFT 24 is turned on as shown in FIG. Then, the input signal voltage Vin is written into the capacitor 23. At this time, since the source potential Vs of the TFT 22 is at the ground potential GND (0 [V]), the potential difference between the gate and the source of the TFT 22 becomes Vin, and this potential difference Vin is written into the capacitor 23.

  Thereafter, the write signal WS becomes “L” level, and the TFT 24 is turned off as shown in FIG. 7, thereby completing the writing of the input signal voltage Vin to the capacitor 23. Then, when the drive signal DS output from the drive scanning circuit 17 becomes “L” level, the TFT 25 is turned off as shown in FIG. As a result, the source potential Vs of the TFT 22 rises and a current flows through the organic EL element 21.

  Although the source potential Vs of the TFT 22 varies, the capacitor 23 is connected between the gate and the source of the TFT 22, so that the increase in the gate potential Vg follows the increase in the source potential Vs. Therefore, the potential difference between the gate and the source of the TFT 22 is always kept substantially at Vin. The rate of increase (gain) of the gate potential Vg relative to the increase of the source potential Vs is determined by the capacitance value of the capacitor 23.

  At this time, since the TFT 22 operates in the saturation region, the current value Ids flowing through the TFT 22 is determined by the potential difference Vin between the gate and the source. Since the current value Ids also flows in the organic EL element 21 in the same manner, the organic EL element 21 emits light. At this time, the potential of the connection node N11 rises to the gate potential of the TFT 22 when the current Ids flows through the organic EL element 21. As the gate potential rises, the potential at the connection node N12 also rises through the capacitor 23. Thereby, as described above, the potential difference between the gate and the source of the TFT 22 is kept substantially at Vin.

  Here, as described above, in the pixel circuit 11 having the source follower circuit configuration using the N-channel TFT, the capacitor 23 is connected between the gate and the source of the TFT 22 that is the driving transistor, and the source of the TFT 22 is the switching transistor. A description will be given of the operation and effect obtained by adopting a configuration in which the TFT 25 is selectively connected to a fixed potential (in this example, the ground potential GND).

  At the time when the input voltage Vin is written to the capacitor 23, the TFT 25 is turned on, the source potential Vs of the TFT 22 is set to the ground potential GND, and the voltage charged in the capacitor 23 is determined to be approximately Vin. After the writing to the capacitor 23 is completed, the TFT 25 is turned off during the light emission period of the organic EL element 21, whereby a current starts to flow through the organic EL element 21. At this time, since the capacitor 23 exists between the gate and the source of the TFT 22, the potential difference between the gate and the source of the TFT 22 is always approximately Vin regardless of the fluctuation of the source potential Vs of the TFT 22.

  Further, since the TFT 22 operates as a constant current source, even if the IV characteristic of the organic EL element 21 changes with time, and the source potential Vs of the TFT 22 changes accordingly, the capacitor 23 causes the gate / source of the TFT 22 to change. Since the inter-potential Vgs is kept constant (≈Vin), the current flowing through the organic EL element 21 does not change, and thus the light emission luminance of the organic EL element 21 is also kept constant. Hereinafter, this operation for luminance correction is referred to as a bootstrap operation. By this bootstrap operation, even if the IV characteristic of the organic EL element 21 changes with time, it is possible to display an image without luminance deterioration associated therewith.

  In addition, since the pixel circuit can be configured by a source follower circuit using N-channel transistors, the organic EL element can be driven even if the current organic EL elements of the anode and cathode electrodes are used as they are. In addition, a pixel circuit can be configured using only N-channel transistors, and an amorphous silicon (a-Si) process can be used in TFT fabrication, so that the cost of the TFT substrate can be reduced. become.

By the way, when the TFT 25 is turned off and a constant current is supplied to the organic EL element 21, if the source potential Vs of the TFT 22 is increased by the change amount ΔV, the gate potential Vg of the TFT 22 is adjusted to the following formula (2 ) Is increased by a value Vx0 represented by
Vx0 = (C + Cgs) × ΔV / (C + Ct + Cgs) (2)
In Expression (2), C is the capacitance (value) of the capacitor 23, Cgs is the gate-source capacitance of the TFT 22, and Ct is the parasitic capacitance of the TFT 24.

  Here, if the sum of the capacitance C of the capacitor 23 and the gate-source capacitance Cgs of the TFT 22, that is, the capacitance between the connection node N 11 and the connection node 12 is larger than the parasitic capacitance Ct of the TFT 24, The source-to-source potential Vgs varies while maintaining the input signal potential Vin. However, if the capacitance between the connection node N11 and the connection node 12 is about the same as the parasitic capacitance Ct of the TFT 24 or smaller than the parasitic capacitance Ct, the gate-source potential Vgs is caused by the change amount ΔV of the source potential Vs of the TFT 22. This changes the value of and the desired light emission cannot be expected.

  That is, as the number of pixels and the high definition of the display device increase, the pixel size decreases, and accordingly, the area of the capacitor 23 must be reduced, and a larger transistor is used if the display device is increased in size. As a result, the parasitic capacitance of the transistor increases, and the area of the capacitor 23 cannot be increased. The sum of the capacitance C of the capacitor 23 and the gate-source capacitance Cgs of the TFT 22 is larger than the parasitic capacitance Ct of the TFT 24. A smaller situation occurs. As a result, the value of the gate-source potential Vgs changes depending on the change amount ΔV of the source potential Vs.

  Therefore, the pixel circuit 11 according to the present embodiment has a structure in which the anode electrode layer of the organic EL element 21 and a layer forming the capacitor 23 (hereinafter referred to as “capacitor forming layer”) overlap in the layout. It is characterized by adoption. Below, this characteristic part is demonstrated more concretely.

  FIG. 9 is a schematic plan pattern diagram showing an example of the layout of the pixel circuit 11 according to the first embodiment. FIG. 10 shows a cross-sectional structure along the line AA ′ of FIG. Incidentally, although not shown in FIGS. 9 and 10, the organic EL element 21 sequentially deposits a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer on the anode electrode layer made of a transparent conductive film. Thus, an organic layer is formed, and a cathode electrode layer is formed on the organic layer.

  As shown in FIGS. 9 and 10, a capacitor 23 is formed on a substrate (not shown) with an insulating layer 31 interposed therebetween, and a data line 15, a power supply line 32 for supplying a power supply potential Vcc, and A ground line 33 for applying a ground potential GND is wired in parallel at a constant interval, and an anode electrode layer 211 of the organic EL element 21 is further formed over the most of the pixel area via an insulating layer 34 thereon. ing.

  The capacitor 23 is formed by disposing a capacitor forming layer 231 that is also a source layer of a TFT (driving transistor) 22 and a capacitor forming layer 232 that is also a gate layer of the TFT 22 with an insulating layer 31 interposed therebetween. The capacitor 23 preferably has the entire capacitor forming layer 232 so that the capacitor forming layer 232 (the same as the capacitor forming layer 231 disposed opposite thereto) overlaps the anode electrode layer 211 of the organic EL element 21. Is formed so as to overlap the anode electrode layer 211.

  In FIG. 9, the layer including the anode electrode layer 211 of the organic EL element 21 is indicated by a solid line, the layer including the capacitor formation layer 231, the scanning line 13 and the drive line 14 is indicated by a one-dot chain line, and the capacitor formation layer 232 is indicated. The included layers are indicated by dotted lines, and the wiring layers such as the data lines 15, the power supply lines 32, and the ground lines 32 are indicated by two-dot chain lines.

  In this way, the capacitor 23 is connected between the gate and source of the TFT 22 that is the driving transistor, and the source of the TFT 22 is selectively connected to the fixed potential (the ground potential GND in this example) via the TFT 25 that is the switching transistor. In the pixel circuit 11 configured as described above, the following operational effects are obtained by making the anode electrode layer 211 of the organic EL element 21 and the capacitor forming layers 231 and 232 forming the capacitor 23 overlap in terms of layout. Can be obtained.

  That is, the capacitor Cga is also formed between the anode electrode layer 211 and the capacitor formation layer 232 by overlapping the anode electrode layer 211 and the capacitor formation layers 231 and 232 of the organic EL element 21, so that the connection node The capacitance between N11 and the connection node 12 is the sum of the capacitance C of the capacitor 23, the gate-source capacitance Cgs of the TFT 22, and the capacitance Cga between the anode electrode layer 211 and the capacitor formation layer 232. That is, the capacity between the connection node N11 and the connection node 12 can be increased by the capacity Cga.

In this pixel circuit 11, when the TFT 25 is turned off and a constant current is passed through the organic EL element 21, the source potential Vs of the TFT 22 rises by a change amount ΔV, and the gate potential Vg of the TFT 22 is adjusted in accordance with this by the following equation: It rises by the value Vx1 represented by (3).
Vx1 = (C + Cgs + Cga) × ΔV
/ (C + Ct + Cgs + Cga) (3)

  As is clear from the comparison between the above formula (3) and the above formula (2), the anode electrode layer 211 of the organic EL element 21 and the capacitor forming layers 231 and 232 forming the capacitor 23 are overlapped. The amount of change Vx1 of the gate potential Vg of the TFT 22 in the case of adopting is larger than the amount of change Vx0 in the case of adopting a structure that does not overlap. That is, by adopting a structure in which the anode electrode layer 211 of the organic EL element 21 and the capacitor formation layers 231 and 232 are overlapped, the connection between the connection node N11 and the connection node 12 is compared with a structure in which the anode EL layer 21 and the capacitor formation layers 231 and 232 are not overlapped. Since the capacity can be increased by the capacity Cga, the rate of increase (gain) of the gate potential Vg with respect to the source potential Vs of the TFT 22 can be increased, and as a result, desired light emission can be easily obtained.

  Conversely, the capacitance between the connection node N11 and the connection node 12 can be increased by the amount of the capacitance Cga, which means that the characteristics of the pixel circuit 11 are improved by the anode electrode layer 211 of the organic EL element 21 and the capacitor formation layers 231 and 232. Means that the capacitance C of the capacitor 23 can be reduced by the amount of the capacitance Cga. Therefore, the size of the capacitor 23 should be reduced by that amount. Can do. As a result, the pixel size can be reduced, which can greatly contribute to the increase in the number of pixels and the high definition of the display device.

[Second Embodiment]
FIG. 11 is a circuit diagram showing a configuration example of a pixel circuit and an active matrix display device using the pixel circuit according to the second embodiment of the present invention. In FIG. It is attached.

  In FIG. 11, in addition to the scanning line 13 and the first drive line 14, a second drive line 41 and an auto-zero line 42 are wired in the pixel array unit 12 for each row. A second drive scanning circuit 43 and an auto zero circuit 44 that drive the second drive line 41 and the auto zero line 42 are arranged around the pixel array unit 12. In this example, the writing scanning circuit 16 and the first driving scanning circuit 17 are arranged on one side of the pixel array unit 12, and the second driving scanning circuit 43 and the auto zero circuit 44 are arranged on the opposite side. .

  The pixel circuit 51 according to the present embodiment has a configuration including, for example, N-channel TFTs 26 to 28 and a capacitor 29 in addition to the configuration of the pixel circuit 11 according to the first embodiment. The TFT 26 has a drain connected to the power supply potential Vcc, a source connected to the drain of the TFT 22, and a gate connected to the second drive line 41. The drain of the TFT 27 is connected to the connection node N13 between the drain of the TFT 22 and the source of the TFT 26, the source is connected to the connection node N12, and the gate is connected to the auto-zero line 42. The TFT 28 has a drain connected to the predetermined potential Vofs, a source connected to the drain of the TFT 24, and a gate connected to the auto-zero line 42. One end of the capacitor 29 is connected to the connection node 24 between the drain of the TFT 24 and the source of the TFT 28, and the other end is connected to the connection node N12.

  Subsequently, regarding the circuit operation of the active matrix organic EL display device in which the pixel circuits 51 according to the second embodiment having the above-described configuration are two-dimensionally arranged in a matrix, the timing chart of FIG. 12 and the operations of FIGS. This will be described using an explanatory diagram.

  In FIG. 12, when driving the pixel circuit 51 in a certain row, the write signal WS given from the write scanning circuit 16 to the pixel circuit 51 through the scanning line 13, and the driving lines 14 and 41 from the driving scanning circuits 17 and 43. 4 shows the timing relationship between the drive signals DS1 and DS2 supplied to the pixel circuit 51 via the auto-zero signal 44 and the auto-zero signal AZ supplied from the auto-zero circuit 44 to the pixel circuit 51 via the auto-zero line 42. In the operation explanatory diagrams of FIGS. 13 to 18, the TFTs 22 and 24 to 28 are illustrated using switch symbols.

  In a normal light emission state, the write signal WS output from the write scan circuit 16, the drive signal DS1 output from the drive scan circuit 17, and the auto zero signal AZ output from the auto zero circuit 44 are at "L" level, and drive scan is performed. Since the drive signal DS2 output from the circuit 43 is at the “H” level, as shown in FIG. 13, the TFTs 24, 25, 27, and 28 are in an off state, and the TFT 26 is in an on state. At this time, the TFT 22 as the driving transistor is designed to operate in a saturation region. Therefore, the TFT 22 operates as a constant current source and supplies a constant current Ids to the organic EL element 21.

  Next, when the TFTs 24, 27, and 28 are turned off and the TFT 26 is turned on, the drive signal DS output from the drive scanning circuit 17 becomes “H” level, so that the TFT 25 is turned on. At this time, as shown in FIG. 14, since a current flows through the TFT 25, the source potential Vs of the TFT 22 falls to the ground potential GND. Thereby, the organic EL element 21 will be in a non-light-emitting state.

  Next, in the non-emission period of the organic EL element 21, the TFT 24 is turned off, and the auto zero signal AZ output from the auto zero circuit 44 with the TFTs 25 and 26 turned on becomes “H” level. The threshold value cancel period for canceling (correcting) the threshold voltage Vth of the TFT 22 is entered. Thereafter, when the drive signal DS2 output from the drive scanning circuit 43 becomes “L” level, the TFT 26 is turned off as shown in FIG. At this time, the TFT 22 operates in the saturation region because the gate and the drain are connected via the TFT 27.

  Further, since the capacitors 23 and 29 are connected in parallel to the gate of the TFT 22, the gate-drain potential Vgd of the TFT 22 gradually decreases as time passes as shown in FIG. After a certain period, the gate-source potential Vgs of the TFT 22 becomes the threshold voltage Vth of the TFT 22. At this time, the capacitor 29 is charged with a voltage of (Vofs−Vth), and the capacitor 23 is charged with a voltage of Vth.

  Next, when the TFTs 24 and 26 are turned off and the TFT 25 is turned on, the auto zero signal AZ output from the auto zero circuit 44 transitions from the “H” level to the “L” level, so that the TFTs 27 and 28 are turned off. The threshold cancellation period ends. After the threshold cancellation period elapses, the drive signal DS2 output from the drive scanning circuit 43 transitions from the “L” level to the “H” level, whereby the TFT 26 is turned on as shown in FIG. As a result, the drain potential Vd of the TFT 22 becomes the power supply potential Vcc.

  Next, when the TFTs 24, 27, and 28 are turned off and the TFTs 25 and 26 are turned on, the write signal WS output from the write scanning circuit 16 is set to the “H” level, so that the write period of the input signal voltage Vin is reached. . In this writing period, the TFT 24 is turned on as shown in FIG. Thereby, the TFT 24 takes in the input signal voltage Vin supplied through the data line 15, thereby coupling the voltage change amount ΔV of the connection node N 14 to the gate of the TFT 22 through the capacitor 29.

At this time, the gate potential Vg of the TFT 22 is a value called the threshold voltage Vth, and the coupling amount ΔV is determined by the capacitance C1 of the capacitor 23, the capacitance C2 of the capacitor 29, and the parasitic capacitance C3 of the TFT 22 as shown in the following equation (4). Is done.
ΔV = {C2 / (C1 + C2 + C3)} · (Vin−Vofs) (4)

  Therefore, if the capacitances C1 and C2 of the capacitors 23 and 29 are set sufficiently larger than the parasitic capacitance C3 of the TFT 22, the coupling amount ΔV to the gate of the TFT 22 is determined only by the capacitances C1 and C2 of the capacitors 23 and 29. The Since the TFT 22 is designed to operate in the saturation region, as shown in FIG. 20, a constant current Ids is supplied according to the coupling amount ΔV to the gate. This current Ids flows through the TFT 25 as shown by a dotted line in FIG.

  After the writing period ends, the TFTs 24, 27, and 28 are turned off, and the drive signal DS1 output from the drive scanning circuit 17 becomes “L” level with the TFT 26 turned on. As a result, as shown in FIG. Is turned off. At this time, even if the TFT 25 is turned off, the TFT 22 causes the constant current Ids to flow through the organic EL element 21 because the gate-source potential Vgs is constant. Thereby, the organic EL element 21 emits light.

  Here, also in the pixel circuit 51 according to the present embodiment, the IV characteristic of the organic EL element 21 changes as the light emission time becomes longer. For this reason, the potential of the connection node N11 also changes. However, since the gate-source potential Vgs of the TFT 22 is maintained at a constant value, the current flowing through the organic EL element 21 does not change. Therefore, even if the IV characteristic of the organic EL element 21 deteriorates, the constant current Ids always flows, so that the luminance of the organic EL element 21 does not change. In addition, the threshold voltage Vth of the TFT 22 is canceled by the action of the TFT 27 during the threshold cancellation period, and a constant current Ids that is not affected by the variation of the threshold voltage Vth can be flowed, so that a high-quality image can be obtained. .

  In the above description of the operation, the timing relationship is such that the TFT 26 is turned on and then the TFT 24 is turned on to set the writing period. However, the timing relationship may be that the TFT 24 is turned off and the TFT 26 is turned on after the writing period ends. Is possible. However, when the TFT 24 is turned on after the TFT 24 is turned off, the TFT 22 operates from the linear region to the saturation region. Since the transistor has a longer channel length in the saturation region than in the linear region, the parasitic capacitance C3 of the TFT 22 is small.

  Therefore, the parasitic relationship C3 of the TFT 22 can be made smaller in the timing relationship in which the TFT 26 is turned on after the TFT 26 is turned on than in the timing relationship in which the TFT 26 is turned on after the TFT 24 is turned off. If the parasitic capacitance C3 can be reduced, when the TFT 26 is turned on, the coupling amount from the drain to the gate of the TFT 22 can be reduced, and the capacitances C1 and C2 of the capacitors 23 and 29 are compared with the parasitic capacitance C3. Therefore, the potential change amount of the connection node N14 when the TFT 24 is turned on is coupled to the gate of the TFT 22 according to the size of the capacitors C1 and C2.

  In the pixel circuit 51 having the above-described threshold cancel function, when the TFT 25 is turned off and a constant current is passed through the organic EL element 21, if the source potential Vs of the TFT 22 is increased by the change amount ΔV, the TFT 22 is adjusted accordingly. The gate potential Vg rises by a value Vx2 expressed by the following equation (5).

In equation (4), C1 is the capacitance (value) of the capacitor 23, C2 is the capacitance of the capacitor 29, Cgs is the gate-source capacitance of the TFT 22, Ct1 is the parasitic capacitance of the TFT 24, and Ct2 is the parasitic capacitance of the TFT 28.

  Also in this pixel circuit 51, the sum of the capacitance C1 of the capacitor 23 and the gate-source capacitance Cgs of the TFT 22, that is, the capacitance between the connection node N11 and the connection node 12, is the parasitic capacitance Ct1, of the TFTs 24, 28, 27. If it is larger than Ct2 and Ct3, the gate-source potential Vgs of the TFT 22 fluctuates while maintaining the input signal potential Vin. The value changes, and desired light emission cannot be expected. The reason why the capacitance C1 of the capacitor 23 cannot be increased is as described above.

  Therefore, the pixel circuit 51 according to the present embodiment also adopts a structure in which the anode electrode layer of the organic EL element 21 and the capacitor formation layer that forms the capacitor 23 are overlapped on the layout.

  FIG. 21 is a schematic plan pattern diagram showing an example of the layout of the pixel circuit 51 according to the first embodiment. FIG. 22 shows a cross-sectional structure along the line BB ′ of FIG. 21 and 22, the same parts as those in FIGS. 9 and 10 are denoted by the same reference numerals.

  As shown in FIGS. 21 and 22, a capacitor 23 is formed on a substrate (not shown) with an insulating layer 31 interposed therebetween, and a data line 15 and a power supply line 32 for supplying a power supply potential Vcc are provided on the insulating layer 31. An auto-zero line 35 for supplying an auto-zero signal Vofs and a ground line 33 for supplying a ground potential GND are wired in parallel at a predetermined interval, and an anode electrode layer 211 of the organic EL element 21 is further formed on the pixel via an insulating layer 34 thereon. It is formed over most of the area.

  The capacitor 23 is formed by disposing a capacitor forming layer 231 that is also a source layer of a TFT (driving transistor) 22 and a capacitor forming layer 232 that is also a gate layer of the TFT 22 with an insulating layer 31 interposed therebetween. The capacitor 23 preferably has the entire capacitor forming layer 232 so that the capacitor forming layer 232 (the same as the capacitor forming layer 231 disposed opposite thereto) overlaps the anode electrode layer 211 of the organic EL element 21. Is formed so as to overlap the anode electrode layer 211.

  In FIG. 21, the layer including the anode electrode layer 211 of the organic EL element 21 is indicated by a solid line, the layer including wiring such as the capacitor formation layer 231, the scanning line 13, and the drive line 14 is indicated by an alternate long and short dash line. The included layers are indicated by dotted lines, and the wiring layers such as the data line 15, the power supply line 32, the ground line 32, and the auto zero line 35 are indicated by two-dot chain lines.

  As described above, in the pixel circuit 51 having the threshold cancel function, in the layout, the anode electrode layer 211 of the organic EL element 21 and the capacitor formation layers 231 and 232 that form the capacitor 23 are overlapped. For the same reason as in the pixel circuit 11 according to the first embodiment, the capacitance between the connection node N11 and the connection node 12 can be increased by the capacitance Cga.

  In this pixel circuit 51, when the TFT 25 is turned off and a constant current is passed through the organic EL element 21, the source potential Vs of the TFT 22 rises by a change amount ΔV, and the gate potential Vg of the TFT 22 is adjusted in accordance with this by the following equation: It rises by the value Vx3 represented by (6).

  As apparent from the comparison between the above formula (6) and the above formula (5), by adopting a structure in which the anode electrode layer 211 of the organic EL element 21 and the capacitor forming layers 231 and 232 are overlapped, Since the capacitance between the connection node N11 and the connection node 12 can be increased by an amount corresponding to the capacitance Cga, the rate of increase (gain) of the gate potential Vg with respect to the source potential Vs of the TFT 22 can be increased as compared with a structure in which no overlap occurs. As a result, desired light emission can be easily obtained. In addition, since the size of the capacitor 23 can be reduced, it can greatly contribute to the increase in the number of pixels and the definition of the display device.

(Application example of the second embodiment)
In the above embodiment, on the layout, the anode electrode layer of the organic EL element 21 and the capacitor formation layer of the capacitor 23 are overlapped. However, the organic EL element 21 is also applied to the capacitor formation layer of the capacitor 29. It is also possible to adopt a configuration overlapping with the anode electrode layer.

  FIG. 23 is a schematic plan pattern diagram showing an example of the layout of the pixel circuit 51 according to the first embodiment. FIG. 24 shows a cross-sectional structure along the line CC ′ of FIG. 23 and 24, the same parts as those in FIGS. 21 and 22 are denoted by the same reference numerals.

  In particular, as is apparent from FIG. 24, the capacitor 29 is formed by arranging a capacitor forming layer 291 and a capacitor forming layer 292 that is also a gate layer of the TFT 22 so as to face each other with an insulating layer 31 interposed therebetween. The capacitor 29 preferably has the entire capacitor formation layer 292 so that the capacitor formation layer 292 (the same as the capacitor formation layer 291 disposed opposite thereto) overlaps the anode electrode layer 211 of the organic EL element 21. Is formed so as to overlap the anode electrode layer 211.

  As described above, in the pixel circuit 51 having the threshold cancel function, the anode electrode layer 211 of the organic EL element 21 and the capacitor formation layers 231 and 232 forming the capacitor 23 overlap with each other in the layout, and the capacitor formation of the capacitor 29 is performed. Since the layers 291 and 292 also have a structure overlapping the anode electrode layer of the organic EL element 21, a capacitance Caa is formed between the anode electrode layer 211 of the organic EL element 21 and the capacitor formation layer 292 of the capacitor 29. Therefore, in addition to the capacity between the connection node N11 and the connection node 12 being increased by the capacity Cga, the capacity can be increased by the capacity Caa.

  In this pixel circuit 51 ′, when the TFT 25 is turned off and a constant current is passed through the organic EL element 21, the source potential Vs of the TFT 22 rises by the change amount ΔV, and the gate potential Vg of the TFT 22 is adjusted in accordance with this. It rises by the value Vx4 expressed by the equation (7).

  As is clear from the comparison between the above equation (7) and the above equation (5), the anode electrode layer 211 of the organic EL element 21, the capacitor formation layers 231 and 232 of the capacitor 23, and the capacitor formation layer 291 of the capacitor 29. , 292 can be overlapped with each other, so that the rate of increase (gain) of the gate potential Vg with respect to the source potential Vs of the TFT 22 can be increased. In addition to greatly contributing to the increase in the number of pixels and the high definition, it is possible to obtain an effect that the voltage amplitude of the gate input of the TFT 22 with respect to the voltage amplitude of the input signal voltage Vin does not decrease.

  In the above embodiment, the pixel circuit in which the first and third power supply potentials are the ground potential GND and the second power supply potential is the positive power supply potential has been described as an example. However, the present invention is not limited to this potential relationship. For example, the present invention can be similarly applied to a pixel circuit in which the first power supply potential is set to a negative power supply potential, the second power supply potential is set to a ground potential GND, and the third power supply potential is set to a positive potential.

  In the above embodiment, the case where the present invention is applied to an organic EL display device using an organic EL element as a pixel display element has been described as an example. The present invention can be applied to all display devices using the electro-optical element as a pixel display element.

It is a block diagram which shows the outline of a structure of the active matrix type display apparatus with which this invention is applied. 1 is a circuit diagram illustrating a configuration example of a pixel circuit according to a first embodiment of the present invention. 3 is a timing chart for explaining the operation of the pixel circuit according to the first embodiment. FIG. 6 is an operation explanatory diagram (part 1) of the pixel circuit according to the first embodiment; FIG. 6 is an operation explanatory diagram (No. 2) of the pixel circuit according to the first embodiment. FIG. 6 is an operation explanatory diagram (part 3) of the pixel circuit according to the first embodiment; FIG. 10 is an operation explanatory diagram (part 4) of the pixel circuit according to the first embodiment; FIG. 10 is an operation explanatory diagram (No. 5) of the pixel circuit according to the first embodiment. It is a schematic plane pattern diagram showing an example of the layout of the pixel circuit according to the first embodiment. FIG. 10 is a cross-sectional structure diagram taken along the line AA ′ of FIG. 9. It is a circuit diagram which shows the structural example of the pixel circuit which concerns on 2nd Embodiment of this invention. 12 is a timing chart for explaining the operation of the pixel circuit according to the second embodiment. FIG. 10 is an operation explanatory diagram (part 1) of the pixel circuit according to the second embodiment. FIG. 12 is an operation explanatory diagram (part 2) of the pixel circuit according to the second embodiment. FIG. 12 is an operation explanatory diagram (part 3) of the pixel circuit according to the second embodiment. FIG. 12 is an operation explanatory diagram (part 4) of the pixel circuit according to the second embodiment. FIG. 12 is an operation explanatory diagram (No. 5) of the pixel circuit according to the second embodiment. FIG. 12 is an operation explanatory diagram (No. 6) of the pixel circuit according to the second embodiment. It is a characteristic view with which it uses for operation | movement description of the pixel circuit which concerns on 2nd Embodiment. It is a characteristic view with which it uses for operation | movement description of the pixel circuit which concerns on 2nd Embodiment. It is a schematic plane pattern figure which shows an example of the layout of the pixel circuit which concerns on 2nd Embodiment. FIG. 22 is a sectional structural view taken along line BB ′ of FIG. 21. It is a schematic plane pattern figure which shows an example of the layout of the pixel circuit which concerns on the application example of 2nd Embodiment. FIG. 24 is a sectional structural view taken along the line CC ′ of FIG. It is a circuit diagram which shows the pixel circuit which concerns on a prior art example. It is a characteristic view which shows a time-dependent change of the IV characteristic of an organic EL element. It is a circuit diagram which shows the pixel circuit which concerns on the prior art example comprised by N channel TFT. It is a figure which shows the operating point of TFT which is a drive transistor in an initial state, and an organic EL element. It is a figure which shows the operating point of TFT which is a drive transistor after a time-dependent change, and an organic EL element. It is a circuit diagram showing a pixel circuit having a configuration in which the source of an N-channel TFT is connected to the ground potential.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11,51 ... Pixel (pixel circuit), 12 ... Pixel array part, 13 ... Scanning line, 14, 41 ... Drive line, 15 ... Data line, 16 ... Write scanning circuit, 17, 43 ... Drive scanning circuit, 18 ... Data Line drive circuit, 21 ... Organic EL element, 22 ... Drive transistor (TFT), 23, 29 ... Capacitor, 24-28 ... Switching transistor (TFT), 42 ... Auto-zero line, 44 ... Auto-zero circuit

Claims (8)

  1. An electro-optic element having one end connected to the first power supply potential;
    A drive transistor connected between the other end of the electro-optic element and a second power supply potential;
    A first capacitor connected between the gate and source of the drive transistor;
    A first switching transistor that selectively takes in a signal according to luminance information to the gate of the driving transistor;
    A second switching transistor connected between the source of the driving transistor and a third power supply potential;
    A pixel circuit, wherein a layer on the one end side of the electro-optic element and a capacitor forming layer forming the first capacitor overlap.
  2. The pixel circuit according to claim 1, wherein the driving transistor is an N-channel field effect transistor.
  3. The pixel circuit according to claim 1, further comprising a circuit that cancels a variation in a threshold voltage of the driving transistor.
  4. A second capacitor connected between the gate of the driving transistor and the first switching transistor;
    4. The pixel circuit according to claim 3, wherein a layer on the one end side of the electro-optic element and a capacitor formation layer that forms the second capacitor overlap. 5.
  5. An electro-optic element having one end connected to the first power supply potential, a drive transistor connected between the other end of the electro-optic element and the second power supply potential, and between the gate and source of the drive transistor A first capacitor connected; a first switching transistor connected between a gate and a data line of the driving transistor; and a first switching transistor connected between a source of the driving transistor and a third power supply potential. A pixel array in which pixel circuits are arranged in a matrix, the switching circuit including two switching transistors, wherein the one end side layer of the electro-optic element and the capacitor forming layer forming the first capacitor overlap each other. And
    A data line driving circuit for supplying a signal corresponding to luminance information to the data line;
    A write scanning circuit for driving the first switching transistor;
    And a drive scanning circuit for driving the second switching transistor.
  6. The display device according to claim 5, wherein the driving transistor is an N-channel field effect transistor.
  7. The display device according to claim 5, wherein the pixel circuit further includes a circuit that cancels a variation in a threshold voltage of the driving transistor.
  8. The pixel circuit further includes a second capacitor connected between the gate of the driving transistor and the first switching transistor;
    The display device according to claim 7, wherein a layer on the one end side of the electro-optic element and a capacitor forming layer that forms the second capacitor overlap.
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