JP2005222530A - Data storing device, data storing controller, data storing control method, and data storing control program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data storing device which can store all data in a memory which consists of multiple memory banks and read out of requested multiple data simultaneously without heavy putting load on hardware. <P>SOLUTION: When all data are stored in a memory which consists of multiple memory banks, all the data are distributed into multiple areas with setting distribution unit as an area in which requested multiple data which is to be read out simultaneously by a data distribution decision part exist. The data within the area are distributed in the multiple memory banks constructing the memory, and are stored on one wordline of each memory bank, and all the data are allocated on the memory which consists of multiple memory banks. The multiple data which are targeted for simultaneous reading out within each area out of all the data allocated on the memory, and a part of the data within each area is substituted or updated sequentially with the data within the neighboring area. A memory controlling part, address translating part and address generating part perform read out controlling of the multiple data targeted for the next simultaneous read out. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a data storage device, a data storage control device, a data storage control method, and a data storage control program that store all data in a memory composed of a plurality of memory banks and simultaneously read out a desired plurality of data.

  As shown in FIG. 20, the semiconductor memory has a structure in which the memory cell MC is accessed by designating the word line WL and the bit line BL, and is located at a position where the activated one word line and the bit line intersect. Data stored in the memory cell MC is read out.

  In the semiconductor memory having such a structure, data of a plurality of word lines share the same bit line. Therefore, when a plurality of word lines WL1 and WL2 are designated as shown in FIG. Since it is broken, data on different word lines cannot be accessed simultaneously.

  Further, data can be read simultaneously from independent memory banks. As shown in FIG. 22, the memory is divided into a plurality of memory banks BK1 to BKn, and a plurality of addresses can be designated by specifying different addresses for each memory bank. However, data on different word lines in the memory bank cannot be accessed simultaneously. That is, data stored on the same word line from each memory bank can be read simultaneously, and data stored on different word lines in the same memory bank cannot be read simultaneously.

Here, the memory bank is an area having a certain capacity as a unit for managing the memory. Therefore, data access collision does not occur between independent memory banks.
The memory is composed of one or a plurality of memory banks.

  Conventionally, processing such as pattern recognition and motion detection of image data has been performed by recognizing a specific data array included in input data.

  For example, a buffer memory that can store several lines of image data and output in pixel units, a data processor that includes multiple processor elements that can process several bits of width data, and that can process data simultaneously in multiple processor elements, and matching A control information memory for storing reference data and control data, and each processor element of the data processor selects a group of image data in a matrix centered on a target pixel addressed to itself among the image data output from the buffer memory. Then, it is binarized using a threshold value, converted into target data divided into serial array bit widths that can be processed by the processor element, and it is determined whether it matches the reference data in the control information memory in the same format. (For example, refer to Patent Document 1).

  Also, in the field of moving image processing, motion, that is, the motion direction and size (or speed) of an object in a temporally different image is used. For example, motion is used for motion compensation inter-frame coding in high-efficiency coding of images, parameter control by motion in a television noise reduction device using an inter-frame time domain filter, and the like. A block matching method is known as a motion detection method for obtaining motion.

  In the motion detection method for detecting motion in an image signal, the applicant of the present application generates (a) an integrated value table by a matching method for each relatively large block obtained by dividing the entire screen or a screen into a plurality of blocks. Extracting one or a plurality of candidate vectors for each relatively large block obtained by dividing the whole screen or a screen into a plurality using the integrated value table; and (b) matching only the candidate vectors. A two-step motion detection method has been proposed which includes a step of detecting a motion vector for each pixel or each relatively small block. In this two-step motion detection method, any two or more pixel data in the image are simultaneously read out in the two-step process of representative point matching and vector assignment in which the motion detection of the image is performed by the two-step representative point matching. There is a need (see, for example, Patent Document 2).

JP 2003-203236 A JP 2001-61152 A

  By the way, in a semiconductor memory, if it is composed of only one word line per memory bank, it is possible to read data simultaneously without breaking the data as described above, but if the amount of data to be stored becomes enormous, the memory bank The number increases and the hardware is burdened, which is not realistic.

  Therefore, in the conventional technique, a buffer or cache for reading data and temporarily storing it is provided, and a plurality of desired data is divided into a plurality of times in time, temporarily stored in the buffer or cache, and read.

  However, when the number of desired plural data increases and the data input / output speeds up, the data read processing is delayed in time. In order to solve this problem, the number of buffers and caches to be temporarily stored has been increased. However, if the area becomes large, a burden is imposed on hardware.

  Therefore, in view of the conventional problems as described above, the object of the present invention is to store all data in a memory composed of a plurality of memory banks without causing a burden on hardware, and to simultaneously read a desired plurality of data. An object of the present invention is to provide a data storage device, a data storage control device, a data storage control method, and a data storage control program that can be performed.

  Other objects of the present invention and specific advantages obtained by the present invention will become more apparent from the description of embodiments described below.

  In the present invention, data in a range where a plurality of desired data exists can be read simultaneously, and all data is divided and periodically arranged in a cycle of the above range. The range in which simultaneous reading in the initial arrangement is possible is periodically read, and the replacement operation is sequentially performed. This enables simultaneous reading of a plurality of arbitrary data in all data.

  A data storage device according to the present invention includes a memory composed of a plurality of memory banks, and a data division determination unit that determines, as a data division unit, a range in which desired data to be simultaneously read is present based on a detection pattern. Memory control means for controlling writing / reading of data to / from the memory, and the memory control means divides all data into a plurality of ranges based on the division unit from the data division determination means, Are allocated to the plurality of memory banks, and each memory bank stores the data on a single word line, so that a plurality of data to be read simultaneously in the respective ranges can be obtained from all the data arranged on the memory. Read periodically and replace or rewrite a part of each range above with the data in the adjacent range in order. And performing control to read out a plurality data to be read.

  In addition, the data storage control device according to the present invention includes a data division determination means for determining a range where a plurality of pieces of desired data to be read simultaneously as a data division unit based on a detection pattern, and a plurality of memory banks. Memory control means for controlling writing / reading of data to / from the memory, wherein the memory control means divides all data into a plurality of ranges based on the division unit from the data division determination means, By allocating data to the plurality of memory banks and storing the data on one word line in each memory bank, a plurality of data to be read simultaneously in each of the ranges are periodically generated from all the data arranged on the memory. And then replace or rewrite a part of each of the above ranges with the data in the adjacent range in order, And performing control to read out a plurality data of interest out.

  In addition, the data storage control method according to the present invention, when storing all data in a memory composed of a plurality of memory banks, sets all the data as a division unit with a range in which desired multiple data to be read simultaneously exist. Dividing into a plurality of ranges, allocating the data in each range to the plurality of memory banks, and storing the data on one word line in each memory bank, from the all data arranged on the memory, each of the data A plurality of data to be simultaneously read in a range are periodically read, and a part of each of the above ranges is sequentially replaced or rewritten with data in an adjacent range, and the next plurality of data to be simultaneously read is read. .

  Furthermore, a data storage control program according to the present invention is a data storage control program for storing all data in a memory composed of a plurality of memory banks and executing a data storage control for simultaneously reading out a plurality of desired data by a computer. Then, when storing all the data in a memory composed of a plurality of memory banks, the entire data is divided into a plurality of ranges with the range where the desired plurality of data to be read simultaneously is present as a division unit, Data in the range is distributed to the plurality of memory banks, and in each memory bank, the data is stored on one word line, and from the all data arranged on the memory, a plurality of data to be read simultaneously in each range Are read out periodically and a part of each of the above ranges is sequentially replaced or rewritten with data in the adjacent range. Characterized by reading a plurality data of the next simultaneous read target.

  According to the present invention, it is possible to simultaneously read out a plurality of arbitrary data in all data without causing a burden on hardware.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Needless to say, the present invention is not limited to the following examples, and can be arbitrarily changed without departing from the gist of the present invention.

  The present invention is implemented by, for example, a data storage device 100 configured as shown in FIG.

  The data storage device 100 includes a memory control unit 10 to which an image data ID is supplied, a data division determination unit 20 to which a detection pattern DP is supplied, an address conversion unit 30 and a data selection unit 60, and the data division determination unit 20. And an address generation unit 40 that generates a logical address LA based on the output of the address conversion unit 30 and supplies the logical address LA to the memory control unit 10, and a plurality of memory banks in which pixel data PD is written / read by the memory control unit 10 The pixel data PD read from the memory 50 is output via the data selection unit 60.

  In the data storage device 100, the memory control unit 10 is configured by, for example, a microprocessor, and initially arranges data according to a data storage control program stored in a program memory (not shown) as shown in the flowchart of FIG. Then, a part of the initially arranged data is replaced and overwritten, and processing for simultaneously reading arbitrary plural pixel data is performed.

  That is, the memory control unit 10 first detects a spatial range of a plurality of pixel data to be read simultaneously indicated by the detection pattern DP by the data division determination unit 20 (step S1), and a data range that can be read simultaneously, The cycle is determined (step S2), and the memory banks of the data to be read simultaneously and the memory address of the word line are determined (step S3).

  Next, the memory control unit 10 determines a write address for all the image data, and initially writes it in the memory 50 (step S4).

  Here, the initial arrangement of all image data will be described.

  Data in a range in which some desired plural pixel data exists is arranged on the same word line of each memory bank. As a result, it is possible to simultaneously read certain desired plural pixel data. The first memory bank may store data on the Nth word line, and the second memory bank may store data on the Mth word line. N and M may be the same.

  Next, the entire image data is divided with the range where the data exists or the range on the range as one period. The data divided by the above range is arranged on the word line of each memory bank. Thereby, a plurality of pixel data existing in each range can be read simultaneously.

  However, in this initial arrangement state, a plurality of pixel data cannot be read out simultaneously when the above-described range is straddled.

  Therefore, the memory control unit 10 reads the initially arranged data from the memory 50, replaces a part thereof, and overwrites the memory 50 (step S5).

  That is, after a plurality of pixel data in each initially arranged range is read out, a part of the data is replaced so that the plurality of pixel data in the range that could not be read out simultaneously can be read out simultaneously.

  At this time, the original data in the data destination to be replaced is moved to another memory, or an unused part of the memory and a surplus part and saved. By simultaneously saving and overwriting so that the initial data is not deleted, it becomes possible to simultaneously read arbitrary plural pixel data. Note that the original data in the data destination to be replaced may be overwritten without being saved if it is known that it is unnecessary in the subsequent processing.

  Here, the data replacement overwrite movement may be performed in either the vertical direction or the horizontal direction, and after the movement, the initial arrangement may be restored again. In addition, the data replacement overwrite movement may be continuous or discontinuous, and the size is not limited. In order to prevent the data from being lost due to overwriting, the data is saved in the remaining part of the memory, and the size of the data may be prepared according to the capacity of the data to be replaced and overwritten.

  Before performing the process of step S5, it is possible to determine the replacement overwrite direction and range for the initially arranged data (step S5 ').

  The memory control unit 10 simultaneously reads a plurality of data from the memory 50 (step S6), replaces a part of the data and overwrites the memory 50 (step S7), and returns to the step S6. The processes in step S6 and step 7 are repeated.

  The type of the memory 50 may be any known one. Specific examples include SRAM, DRAM, MRAM, FeRAM, and the like.

  Here, for example, as shown in FIG. 3, the total image data is m0 × n0, there are N pieces of multiple pixel data YPD to be read out simultaneously, and the position in all the image data is (xi, yi; 0 <= i < N), the distribution of the plurality of pixel data is a0 × b0 (a0 = max.xi-min.xi, b0 = max.yi-min.xi) as shown in FIG.

  In the initial arrangement process in step S5, initial data arrangement is performed with a range of a1 × b1 (a1> = a0, b1> = b0) as a cycle.

  That is, as shown in FIG. 5, in the initial data arrangement, data in all the image data m0 × n0 is arranged with a range of a1 × b1 as a period. Data within the range of a1 × b1 indicated by hatching in FIG. 5 is arranged on the same word line of each memory bank so that it can be read simultaneously.

  Then, in the overwriting process in step S6, as shown in FIG. 6, after data in the range of a1 × b1 is periodically read out, a part thereof (gray portion in FIG. 6) is adjacent to the range of adjacent a1 × b1. Replace with data and overwrite. The range of the gray part to be replaced or overwritten may be equal to or less than the range of a1 × b1.

  In the initial data arrangement, when the reading of all image data is completed, that is, the replacement / overwriting of data is completed, the gray arrangement in FIG. 6 is shifted from the initial data arrangement as shown in FIG.

  That is, data in the range of a1 × b1 shifted only in the gray portion can be read simultaneously. In the arrangement of FIG. 7, data in the range of a1 × b1 when the gray portion in FIG. 6 is lowered by one step from the initial arrangement of FIG. 5 can be read simultaneously.

  Therefore, in step S6 and step S7, data in the range of all a1 × b1 on all the image data can be read simultaneously by continuing such periodic reading and replacement overwriting after reading.

  Next, as a specific example of storage of all image data and simultaneous readout of a plurality of pixel data in the data storage device 100, as shown in FIG. 8, there are 720 × 240 all image data, and seven pieces of multiple data YPD to be read out. A case will be described in which the distribution of a plurality of data to be read exists within a range of 128 × 64.

  In addition, the specific example demonstrated below is an example, and this invention is not limited to a specific example.

First, data in a range of 128 × 64 in which a plurality of data patterns to be read out first exists is initially arranged. Here, 8 memory banks are prepared, and a memory for storing 1024 pixels on one word line is prepared. As shown in FIGS. 9A and 9B, the 128 × 64 range is divided into 16 × 64 strips and 8 strips, and each 16 × 64 strip is stored on one word line of each memory bank. . For example, in FIG. 9 (B), the strip ST1 is stored in the _{n 1} word line of the first bank, strip ST2 is stored in the _{n 2} word line of the second bank.

  As a result, data existing in a 128 × 64 range including seven pieces of data to be read first is stored on one word line of each memory bank and can be read simultaneously.

  Next, as shown in FIG. 10, using this 128 × 64 cycle, the entire image data is divided into a plurality of ranges of data A1, A2,.

  Then, as shown in FIG. 11, the divided data in the 128 × 64 range A1, A2,... Is stored on one word line of each memory bank as before.

  Here, for the sake of convenience, numbers are assigned as 1, 2,... Data in the range of 128 × 64 is stored in the first memory bank, the second memory bank,... At a strip cycle of 16 × 64 from the left. The stored word lines are stored according to the divided 128 × 64 numbers. In the example shown in FIG. 11, since it is in the range A6, data is stored on the sixth word line of each memory bank. That is, the data of the strip A6_ST1 is stored on the sixth word line of the first bank, and the data of the strip A6_ST2 is stored on the sixth word line of the second bank. Similarly, the data of the strip A7_ST1 is stored on the seventh word line of the first bank, and the data of the strip A7_ST2 is stored on the seventh word line of the second bank.

  When all the image data is stored in the memory 50 in this way, as shown in FIG. 12, any plural pieces of data GP1, GP2, GP3 existing in the range of 128 × 64 divided in this way are read out simultaneously. It becomes possible.

  Next, in the case of straddling the range of 128 × 64, it is not possible to simultaneously read out a plurality of arbitrary, so in the initial arrangement as shown in FIG. Overwrite.

  For example, as shown in FIG. 14, 128 × 1 in the range of 128 × 64 is read, and overwriting is performed at the position of 128 × 1 in the adjacent range of 128 × 64.

  At that time, the data is saved in the remainder of the memory 50 so that the first 128 × 1 data is not lost.

  By repeating this operation, the 128 × 64 range moves in order, and the data existing in the 128 × 64 range can be read simultaneously, so by repeating this operation, arbitrary multiple data of all image data can be read out. Can do.

  Here, in the example shown in FIG. 13, after reading the hatched portion of the range A6, it is overwritten on the hatched portion of the range A5, and then after reading the hatched portion of the range A7, it is overwritten on the hatched portion of the range A6. This is repeated below.

  The present invention is applied to, for example, an image motion detection apparatus 9 having a configuration as shown in FIG. Note that the motion detection device 9 is an application example, and it goes without saying that the present invention can be applied to other application examples.

  The motion detection device 9 is supplied with a digital video signal at the input terminal 1. The digital video signal is obtained, for example, by sampling a luminance signal at a predetermined frequency and converting each sample (pixel) to 8 bits. The digital video signal is supplied to the representative point matching processing unit 2.

  The representative point matching processing unit 2 converts the image of the previous frame into an image composed of representative points by performing a thinning process, and similar to the block matching between the image of the current frame and the image composed of the representative points of the previous frame. In addition, a matching process is performed. As shown in FIG. 16, the representative point is data representing each block when an image of one frame, for example, one frame is divided into a plurality of (m pixels × n lines) blocks. As the representative point data, the value of the pixel at the center position of the block, the average value of the pixel values in the block, the intermediate value of the pixels in the block, and the like are used.

  The representative point matching processing unit 2 calculates the inter-frame difference between the reference frame image of the current frame and the candidate frame image of the previous frame configured by the representative point data within the set search range. That is, the value of each of the m × n pixels of the block at the same position in the current frame is subtracted from the representative point data of a block in the previous frame, and the absolute value of the subtraction output is integrated in one block. Are integrated in one frame. This integrated value is supplied to the evaluation value table forming unit 3. The evaluation value table forming unit 3 stores the integrated value obtained at each position within the search range in a memory, and forms an evaluation value table on the memory.

  With reference to the evaluation value table formed by the evaluation value table forming unit 3, the candidate vector extracting unit 4 extracts one or a plurality of candidate vectors. The extracted candidate vectors are supplied to the motion vector detection unit 5. Input video data is supplied to the motion vector detector 5 via the delay circuit 6. The delay circuit 6 delays the input video data for the time required to delay the candidate vector. When the input video data is read from the memory, the read video data only needs to be given to the motion vector detection unit 5, so that there is no need to provide the delay circuit 6.

  The motion vector detection unit 5 detects a motion vector in units of one pixel by matching processing using candidate vectors, and outputs the detected motion vector to the output terminal 7. Here, the motion vector detection for each pixel will be described. Even in the motion vector detection in units of one pixel, in order to obtain an evaluation value, blocking is performed. As shown in FIG. 17, for example, a 3 × 3 block B1 with the pixel P1 as the center is formed. Block B1 is a reference block of the current frame, for example. The candidate block of the previous frame is similarly configured. Then, an evaluation value table within the search range is formed by block matching. A motion vector is detected for the pixel P1 corresponding to the minimum evaluation value in the evaluation value table. Next, a reference block is similarly formed for the adjacent pixel P2. Then, an evaluation value table is similarly formed by block matching, and a motion vector related to the pixel P2 is detected based on the evaluation value table. In this way, a motion vector is detected for each pixel.

  In general, the process of detecting a motion vector for each pixel greatly increases the amount of calculation compared to the process of detecting a motion vector for each block, and the process becomes complicated. However, here, since the motion vector is detected only for one or a plurality of candidate vectors extracted by the candidate vector extraction unit 4, it is possible to prevent an increase in calculation amount and a complicated process.

  FIG. 18 is a diagram for explaining the processing of the candidate vector extraction unit 4. The evaluation value table formed in the evaluation value table forming unit 3 has an evaluation value as the z coordinate of the search range defined by the x and y coordinates. FIG. 18A conceptually shows an example of the distribution in the x direction of the evaluation value table. For example, the distribution in the horizontal direction passing through y = y1. FIG. 18B conceptually shows an example of the distribution in the y direction of the evaluation value table. For example, the distribution in the vertical direction passing through x = x1. From the evaluation value tables shown in FIGS. 18A and 18B, it can be seen that there are local minimum values at the origin on the coordinates and at the point (x = x1, y = y1). Such an evaluation value table is obtained in the case of an image in which an object moving obliquely with respect to the background (still image) exists.

  The candidate vector extraction unit 4 searches for such a minimum value from such an evaluation value table, and extracts a candidate vector corresponding to the minimum value. In the example of FIG. 18, a motion vector (x = 0, y = 0) and a motion vector (x = x1, y = y1) are extracted as candidate vectors. Here, for the sake of simplicity, an example of an evaluation value table in which two local minimum values clearly exist has been described. However, in practice, there are more local minimum values, the sizes of the local minimum values are different, and the shapes of curves drawn by the local minimum values and the surrounding evaluation values are different. In such a case, the candidate vector extraction unit 4 reduces the number of candidates so as to extract an appropriate candidate vector. In other words, the minimum value is compared with the threshold value, and the minimum value larger than the threshold value is processed as a candidate vector, and the steepness of the curve drawn by the minimum value and the surrounding evaluation value is detected. Then, the detected steepness is compared with a threshold value, and a process that does not use a candidate having a small steepness as a candidate vector is performed.

  The motion vector detection unit 5 targets only the candidate vectors extracted in this way, and determines a motion vector that seems to be the best from the candidate vectors for each pixel. As shown in the above example, when two candidate vectors are given, two evaluation values are formed for the target pixel by matching processing as shown in FIG. One evaluation value E0,0 corresponds to the motion vector of (x = 0, y = 0), and the other evaluation values Ex1, y1 are the motion vector of (x = x1, y = y1). Corresponding.

  An example of a method for determining the best motion vector based on the evaluation value will be described. Among the evaluation values obtained corresponding to the candidate vectors, the smallest evaluation value is generated, and the one whose size is sufficiently small is selected as the best motion vector. For example, when the evaluation value E0,0 is the minimum and the evaluation value E0,0 is a sufficiently small value, (x = 0, y = 0) is selected as the motion vector MV. On the other hand, when the evaluation values Ex1, y1 are minimum and the evaluation values Ex1, y1 are sufficiently small, (x = x1, y = y1) is selected as the motion motion vector MV of the target pixel. . If the pixel does not satisfy these conditions, the motion vector is indefinite. Other methods are possible as a method for determining the best motion vector from the candidate vectors.

  In the image motion detection device 9 having such a configuration, it is necessary to read a plurality of arbitrary data in the representative point matching process in the representative point matching processor 2 and the candidate vector assignment process in the candidate vector extraction unit 4. By providing the data storage device 100 having the configuration shown in FIG. 1 described above, a plurality of desired data are read from the data storage device 100, and the representative point matching processing process and candidate vector extraction unit in the representative point matching processing unit 2 are read out. The candidate vector assignment process in 4 is executed. In addition, after performing motion detection by representative point matching by the two-step method, a plurality of arbitrary data can be read from the data storage device 100 even in a tap pulling process in which peripheral pixels of the motion vector of each frame are pulled.

It is a block diagram which shows the structure of the data storage apparatus which implements this invention. It is a flowchart which shows the procedure of the data storage control performed by the memory control part in the said data storage device. It is a schematic diagram for demonstrating the position of the several pixel data which should be read simultaneously within all the image data. It is a schematic diagram which shows the distribution state of the said several pixel data. It is a schematic diagram for explaining the initial arrangement of data in the data storage device. It is a schematic diagram for explaining data exchange and overwriting in the data storage device. It is a schematic diagram which shows the data arrangement | positioning after replacement | exchange of the said data and overwrite. It is a typical figure which shows all the image data and the several pixel data which should be read simultaneously in the specific example of storing of all the image data in the said data storage device, and simultaneous reading of several pixel data. It is a schematic diagram for demonstrating the initial arrangement | positioning of all the image data in the said specific example. It is a schematic diagram for demonstrating the state which divided | segmented all the image data in the said specific example into the data of several each range. It is a typical figure for demonstrating the storage state to each memory bank of the data in each range divided | segmented in the said specific example. In the said specific example, it is a schematic diagram which shows the several data which can be read simultaneously by the initial arrangement which stored all the image data in the memory. It is a schematic diagram for demonstrating replacement of data and overwriting in the specific example. It is a schematic diagram which shows the position of overwriting in the said specific example. It is a block diagram which shows the structure of the image motion detection apparatus with which this invention is applied. It is a schematic diagram for demonstrating the representative block block matching in the said image motion detection apparatus. It is a schematic diagram for demonstrating the motion vector detection process of the pixel unit in the said motion detection apparatus. It is a figure which shows an example of distribution of the evaluation value in the said motion detection apparatus. It is a figure which shows an example of the evaluation value table in the said motion detection apparatus. It is a figure which shows typically the structure of a general semiconductor memory. It is a figure which shows typically the state which cannot access simultaneously in the said semiconductor memory. It is a figure which shows the memory structure of a several memory bank.

Explanation of symbols

10 memory control unit, 20 data division determination unit, 30 address conversion unit, 40 address generation unit, 50 memory, 60 data selection unit, 100 data storage device

Claims (10)

A memory consisting of a plurality of memory banks;
A data division determining means for determining, as a data division unit, a range in which a plurality of desired data to be read simultaneously is present based on a detection pattern;
Memory control means for controlling writing / reading of data to / from the memory, the memory control means divides all data into a plurality of ranges based on the division unit from the data division determination means, By allocating data to the plurality of memory banks and storing the data on one word line in each memory bank, a plurality of data to be simultaneously read in the respective ranges are periodically generated from all the data arranged on the memory. The data storage device is characterized in that the data is read out, and a part of each of the ranges is sequentially replaced or rewritten with data in an adjacent range to read out a plurality of data to be read at the same time.   The memory control means repeats periodically reading a plurality of data to be simultaneously read in each range and writing at least a part of the read plurality of data to be read after saving the write destination data. 2. A data storage device according to claim 1, wherein a plurality of desired data are simultaneously read from all data. A data division determining means for determining, as a data division unit, a range in which a plurality of desired data to be read simultaneously is present based on a detection pattern;
Memory control means for controlling writing / reading of data to / from a memory composed of a plurality of memory banks,
The memory control unit divides all the data into a plurality of ranges based on the division unit from the data division determination unit, and distributes the data in each range to the plurality of memory banks. By storing on a word line, a plurality of data to be read simultaneously in each range is periodically read out from all the data arranged on the memory, and a part of each range is data in an adjacent range. A data storage control device that performs a control of sequentially reading or reading out a plurality of data to be read simultaneously.   The memory control means repeats periodically reading a plurality of data to be simultaneously read in each range and writing at least a part of the read plurality of data to be read after saving the write destination data. 4. The data storage control device according to claim 3, wherein desired data are simultaneously read from all data. When all the data is stored in a memory composed of a plurality of memory banks, the entire data is divided into a plurality of ranges, with a range where a plurality of desired data to be simultaneously read exist as a division unit,
The data in each range is distributed to the plurality of memory banks, and in each memory bank, the data is stored on one word line so that all the data arranged on the memory is
A plurality of data to be simultaneously read in each of the above ranges is periodically read, and a part of each of the above ranges is sequentially replaced or rewritten with data in an adjacent range, and the next plurality of data to be simultaneously read is read. Data storage control method.   By repeating the periodic reading of a plurality of data to be read simultaneously in each range and writing at least a part of the read plurality of data to be read after saving the write destination data, it is desired for all the data. 6. The data storage control method according to claim 5, wherein a plurality of data are simultaneously read out.   6. The data storage control method according to claim 5, wherein in the process of detecting the motion of the image by the two-step method of representative point matching, a plurality of arbitrary pixel data patterns in the image are read simultaneously. A data storage control program for executing, by a computer, data storage control for storing all data in a memory composed of a plurality of memory banks and simultaneously reading desired multiple data,
When storing all the data in a memory consisting of a plurality of memory banks, dividing the entire data into a plurality of ranges, with a range in which a plurality of desired data to be simultaneously read exists as a division unit,
The data in each range is distributed to the plurality of memory banks, and in each memory bank, the data is stored on one word line so that all the data arranged on the memory is
A plurality of data to be simultaneously read in each of the above ranges is periodically read, and a part of each of the above ranges is sequentially replaced or rewritten with data in an adjacent range, and the next plurality of data to be simultaneously read is read. A data storage control program.   By repeating the periodic reading of a plurality of data to be read simultaneously in each range and writing at least a part of the read plurality of data to be read after saving the write destination data, it is desired for all the data. 9. The data storage control program according to claim 8, wherein a plurality of data are simultaneously read out. 9. The data storage control program according to claim 8, wherein in the process of detecting the motion of the image by the representative point matching of the two-step method, a plurality of arbitrary pixel data patterns in the image are read simultaneously.

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