JP2005197761A - Bay of semiconductor wafer production line, the semiconductor wafer production line, bay of liquid crystal production line and the liquid crystal production line - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bay that can prevent rate control of wafer transport and wafer take up scrambling caused by wafer treatment differences between processors in the bay, and that can prevent lowering of throughput. <P>SOLUTION: The bay 100 of the semiconductor production line is equipped with a single wafer transport line 120 which has a loop-like planar shape that transports semiconductor wafers W on a single piece basis, and is composed of: a transport line 121 having a nearly horizontal plane for semiconductor wafer transport that transports wafers on a single wafer basis; and another transport line 122 having a semiconductor wafer plane that counters the semiconductor wafer transport plane of the transport line 121 in the vertical direction. Inside the single-wafer transport line 120, there are provided a control system that controls the proper use of the transport line 121 or 122, based on semiconductor wafer treatment information, and transport devices 11 to 16 used for wafer delivery on a single wafer basis between the transport lines 121 and 122 and multiple processors 101 to 106, arranged side by side to perform predetermined treatment of semiconductor wafers. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a single wafer transfer method suitable for transferring wafers one by one (single wafer transfer) between apparatuses for processing a substrate (hereinafter referred to as a wafer) such as a semiconductor substrate, a liquid crystal substrate or a component substrate. It relates to the device.

The following technique is cited as a conventional technique for transferring a wafer between wafer processing apparatuses (see, for example, Non-Patent Document 1).
This prior art particularly discloses the following.
1. An automated line that allows efficient use of single-wafer processing equipment and cluster tools.
2. The concept of a production line that enables multi-variety variable-volume production by transporting sheets in the bay.
3. Variety and production volume can be changed by single wafer transfer.
4). In combination with the single wafer processing apparatus, the number of in-process wafers can be reduced.
5). Lot transport is used between bays.
6). At the start of mass production, different process processing chambers are connected to one cluster tool.
If the number of devices is small, the production capacity can be kept low. Even with a single cluster tool, the same processing chamber can be connected multiple times, or modules capable of processing multiple processes can be added to increase the processing capacity in an analog fashion.

Further, the following is illustrated.
A plurality of multi-process devices are arranged on both sides of the wafer transfer system whose plane shape is a deformed U-shape, thereby forming a bay. That is, a plurality of multi-process devices are arranged along each of two parallel transfer lines of the U-shaped wafer transfer system in the bay. The wafer transfer system has several shuttles with robots. An I / O is provided between the transfer line and each processing apparatus. In addition, a lot transfer system is adopted for transferring wafers between such bays.

FIG. 1 shows a second prior art. FIG. 2 is an example of module automation of a wafer single wafer production system shown by ITRS (International Technology Roadmap for Semiconductors) (see, for example, Non-Patent Document 2). Between processes, the FOUP is used for 25-sheet unit conveyance, and the inside of the process is directly conveyed for each wafer. Black circles in the figure represent wafers, and processing and transfer are performed in wafer units between process apparatuses and between process apparatuses. According to this system, the wafer waiting time of up to 25 sheets by the conventional FOUP transfer becomes zero by processing in wafer wafer units and direct transfer, and an attached device such as a FOUP opener or EFEM is not required.
Such cases are also disclosed in the same manner, for example (see Non-Patent Document 3).

  FIG. 2 shows a third prior art example. In FIG. 2, a process in which a plurality of processing units for performing a series of processes for etching the processed substrate after development is disposed on both sides of the conveyance path while performing resist coating and development after exposure on the processed substrate. And a main transfer device that moves along the transfer path and delivers substrates to and from each processing unit, and a carry-in / out unit that has a transfer mechanism that transfers the substrate to be processed to the main transfer device This is integrally provided with each processing unit of the processing unit, the transport path, and the carry-in / out unit.

FIG. 3 shows a fourth prior art example. In FIG. 3, for example, a layer for forming a glass substrate is formed along a conveyance path along which a conveyance device that conveys a glass substrate on which a TFT array used in a liquid crystal display (LCD) is formed travels. An etching apparatus, a first inspection apparatus, a resist stripping apparatus, a substrate standby buffer, a cleaning apparatus, a film forming apparatus, and a second inspection apparatus are arranged, a substrate carry-in portion is arranged at one end of the conveyance path, At the other end, the substrate carry-out section is provided with an elevating mechanism for raising and lowering the shelf so that the cassettes are accommodated in multiple stages and the transfer device can access each cassette.
Katsuhiro Nozaki "Special Issue on Production Technology Revolution of LSI Lines", NIKKEI MICRODEVICES August 1993, 25-32 Semiconductor Industry News December 5, 2001 Takehide Hayashi, “System LSI manufacturing is“ agility ”is vital. TAT is greatly shortened by single wafer production and transport”, Electronic Journal February 2002, PP95-99

In the above prior art, although the configuration of the bay is different, the wafer transfer system, the wafer single wafer direct transfer system, and the transfer path for transferring the wafer, the wafer, the substrate to be processed, and the glass substrate in each bay Even in the case of a single body, there is still a problem to be solved as follows.
1. Wafer transfer in the bay and wafer handling between the wafer transfer means and each processing apparatus is the longest of the wafer processing times in each processing apparatus (and the wafer transfer time in the processing apparatus). It is rate-limited. For this reason, a waiting time is generated in the wafer transfer in the bay and the wafer engagement with each processing apparatus, and the throughput in the bay is reduced. Such a problem occurs remarkably when the wafer processing is different for each processing apparatus as in the above-described prior art examples, particularly the second to fourth prior art examples shown in FIGS. .
2. For example, when the processing contents of the wafers in two FOUPs are different for each FOUP, for example, the wafer in one FOUP is different from the plasma etching process, and the wafer in the other FOUP is different from the plasma CVD process. In such a case, the processing time is long or short. For this reason, the transfer of the wafer in the bay and the wafer handling between the wafer transfer means and each processing apparatus take a long processing time. In this case, the rate is controlled by the plasma CVD process. For this reason, there is a waiting time in the transfer of wafers in the bay, in particular, wafers to be plasma-etched and the wafers in contact with the respective etching apparatuses, and the throughput in the bay is reduced.
3. Even if the wafer processing in each processing apparatus in the bay is the same (for example, processing contents, conditions, etc.), the wafer transport time in the bay transport means and the processing time + processing in each processing apparatus Since the wafer transfer time in the apparatus is different, there is a risk of confusion in wafer handling between the in-bay transfer means and each processing apparatus, and wafer transfer in the bay. There is concern about a decrease in throughput.
4). When a wafer with a long processing time and a wafer with a short processing time are mixed in the transfer line in the bay, even if the processing of a wafer with a short processing time is completed, the processing of the wafer with a long processing time preceding it in the transfer line Since the process is not completed, the transfer from the processing apparatus to the transfer line and to the next processing apparatus in the transfer line cannot be performed. That is, a waiting time occurs. In such a conventional technique, there is no recognition that a transfer line for a wafer having a short processing time and a wafer having a long processing time are selectively used. Therefore, in such a conventional technique, the conveyance time is limited to the longer processing time. As a result, the processing time is also slowed, the overall speed is lowered, and the throughput of the entire bay is lowered.
5). In the case of high-mix low-volume production, if a wafer requiring urgent delivery is received on one wafer transfer line, if there is a shuttle with a robot having a wafer for normal processing in front of it, this will get in the way and the designated device will be immediately I can't move. For this reason, a waiting time occurs for a wafer that requires an express train. For this reason, as a result, the processing of this wafer takes time, and it is not possible to cope with the high-mix low-volume production, thereby reducing the throughput.
6). For example, if one of the shuttles having a wafer transfer line robot fails, the transfer line in the bay stops and the wafer cannot be transferred to the multi-process apparatus. Therefore, the wafer cannot be processed by the multi-process apparatus, and processing of each wafer in the bay is stopped. In addition, the transfer of wafers from this bay to another bay cannot be performed by stopping the transfer line and each multi-process apparatus in this bay, and wafer processing in this other bay is also stopped. As a result, all wafer processing in the associated bay stops.
The present invention is intended to solve the above problems and achieve the following object.

The first object of the present invention is to carry out wafer transfer in the bay and wafer handling between the wafer transfer means and each processing apparatus even when wafer processing is different for each processing apparatus in the bay. It is an object of the present invention to provide a single-wafer transport method and apparatus capable of preventing the rate-determining rate and thereby preventing a decrease in throughput.
The second object of the present invention is to transfer a wafer in the bay and to transfer the wafer between the wafer transfer means and each processing apparatus even when the wafer processing contents differ for each means for holding the wafer. An object of the present invention is to provide a single-wafer carrying means and an apparatus for the same that can prevent the rate of the rate of contact from being limited thereby, thereby preventing a decrease in throughput.
In addition, a third object of the present invention is to carry out wafer handling between the processing means in the bay and each processing apparatus, which may occur when the wafer processing in the bay is the same, and to transfer the wafer in the bay. It is an object of the present invention to provide a single-wafer transport method and apparatus capable of preventing the confusion of the apparatus and thereby preventing a decrease in throughput in the bay.

A fourth object of the present invention is to provide a single wafer transfer method and apparatus capable of selectively using a wafer having a short processing time and a wafer having a long processing time even when wafers having different processing times are mixed, and preventing a decrease in throughput. It is to provide.
A fifth object of the present invention is to provide a single wafer transfer method that can prevent time-consuming processing of a wafer even when a wafer requiring urgent delivery is produced in the case of high-mix low-volume production, and prevents a reduction in throughput. The object is to provide such a device.
A sixth object of the present invention is to provide a single wafer transfer method and apparatus capable of preventing in-bay processing and processing in other bays from being stopped even if a wafer transfer line fails.

The first to third objects can be achieved by providing at least one other transport line in the bay so that it can be transported in parallel. In other words, even when wafer processing is different for each processing apparatus in the bay, by using a plurality of transfer lines in the bay that can be transferred in parallel, the wafer transfer in the bay and the wafer transfer means and each processing apparatus It is possible to prevent the wafer from being rate-limited by the wafer processing being different for each processing apparatus.
In addition, even when the wafer processing contents are different for each means for holding the wafer, it is accommodated in each wafer holding means by properly using the transfer lines that can be transferred in parallel in the transfer lines in the bay corresponding to these. Corresponding to the processing content of the wafer being processed, the wafer can be transferred in the bay and the wafer transfer between the wafer transfer means and each processing apparatus can be carried out smoothly.
Furthermore, by properly using the transfer lines that can be transferred in parallel in the bay transfer line, there is a risk that the wafers in the bay and each processing apparatus may be in contact with each other when there is a risk of wafer processing in the bay, and It is possible to prevent the wafer conveyance from being confused in the bay.

The fourth object can be achieved by providing another wafer express transfer line on the normal wafer transfer line as a transfer line that can be transferred in parallel with the transfer line in the bay. Here, the normal wafer transfer line indicates a transfer line for transferring a wafer having a long processing time in a processing apparatus. The wafer express transfer line refers to a transfer line for transferring a wafer having a short processing time in a processing apparatus. In other words, when a wafer with a short processing time and a wafer with a long processing time coexist, a wafer with a short processing time is used as an express wafer transfer line, and a wafer with a long processing time is used by using a normal wafer transfer line. I can do it.
The length of the processing speed is not quantitative. For example, the processing speed of a certain wafer is compared with the processing speed of another wafer, and the processing speed of a wafer accommodated in a certain wafer accommodating means is different from other processing speeds. This is determined by comparison with the processing speed of other wafers accommodated in the wafer accommodating means. Such a difference in processing speed is compared and calculated by the control device, and based on this result, it is selected whether to use the normal wafer transfer line or the wafer express transfer line.

The fifth object can be achieved by providing another skip sheet handling line in the bay. That is, in the case of high-mix low-volume production, when a wafer requiring urgent delivery comes, it can be moved by using a skip line in a designated apparatus.
The sixth object can be achieved by providing a separate sheet feeding line in the bay. That is, when a single wafer conveyance line in the bay fails for some reason, the failure is immediately detected, and another single wafer conveyance line starts operating. As a result, the transfer of the wafers in the bay is not stopped. Therefore, the processing in each processing apparatus is continuously processed and transported without stopping, and all operations in the bay are smoothly performed. Further, since the transfer / processing of the wafer in the bay is not stopped as described above, the transfer / processing of the wafer can be performed without stopping in the other related bays.

  As described above, according to the present invention, by providing at least one other transfer line in the bay so that it can be transferred in parallel, the problem relating to wafer transfer in the bay can be solved. Can be prevented from decreasing, and hence the throughput of the entire bay.

Embodiments of the present invention will be described below with reference to the drawings.
4 to 17 show an embodiment of the present invention.
4 partially shows a semiconductor production line having a plurality of bays 100, 200, 300. Each of the bays 100, 200, 300... Is connected to the inter-bay transfer line 400 via the bay stocker 130, 230, 330.
Hereinafter, the configuration and operation of the bay 100 as a representative example will be described in detail with reference to FIG. The other bays 200, 300,... Have substantially the same configuration / action as that of the bay 100, and thus description thereof is omitted.
In FIG. 4, the bay 100 is arranged and arranged in parallel in this case along the sheet conveyance line 120 whose loop shape is a loop shape and its longitudinal conveyance direction (direction intersecting the conveyance direction of the interbay conveyance line 400). The processing apparatuses 101 to 106 are configured. In this case, the processing apparatuses 101 to 103 are arranged adjacent to each other on one side of the single wafer conveyance line 120 and arranged in parallel. Further, the remaining processing devices 104 to 106 are arranged adjacent to each other on the other side and arranged in parallel. The processing apparatuses 101 to 106 are provided with transfer robots 11 to 16, respectively. The processing apparatuses 101 to 106 are provided with chambers (not shown) for processing the wafers W one by one, that is, by single wafers. In this example, six processing devices are used and arranged, but the number is not particularly limited. The type, number, and arrangement of the devices arranged along the single wafer transfer line 120 are selected and determined by the process flow of the wafer W as shown in the prior art example.

In FIG. 4, a single wafer transfer line 120 is a combination of a transfer line 121 for transferring wafers W by a single wafer and another transfer line 122 that can be transferred in parallel with this transfer line 121 and transfers wafers W. It consists of In this case, the transport lines are in a vertical positional relationship, and the transport line 121 is set at the lower position and the transport line 122 is set at the upper position. In this case, the transfer line 122 has a wafer transfer surface opposite to the wafer transfer surface of the transfer line 121. Further, in this case, the transfer line 121 has a substantially horizontal wafer transfer surface, and the transfer line 122 has a substantially horizontal wafer transfer surface opposite to the wafer transfer surface of the transfer line 121 in the vertical direction. In other words, the transfer lines 121 and 122 are configured to transfer the wafer W while maintaining the horizontal plane.
In the following description, an example in which the respective wafer transfer surfaces of the transfer lines 121 and 122 are opposed to each other in the vertical direction will be described, but this relationship is not particularly limited thereto. For example, the wafer transfer surfaces of both transfer lines 121 and 122 may be opposed to each other in the left-right direction. In this case, the wafers W are transported in the vertical posture on the surface to be processed due to their structure on the transport lines 121 and 122. It should be noted that the transfer of the wafer W to / from each processing apparatus may be performed in a posture in which the posture is changed from a vertical posture and is performed in a horizontal posture on the surface to be processed, or may be performed in a posture as it is. There is no particular problem in carrying out the invention.

Furthermore, in FIG. 4, one wafer W can be delivered between the transfer robots 11 to 16 of the processing apparatuses 101 to 106 and the transfer lines 121 and 122, that is, a single wafer. Further, the wafer W can be delivered between a stocker (not shown) of the bay stocker 130 and the transfer lines 121 and 122.
In FIG. 4, wafer transfer between the bays 100, 200, 300,...

5 and 6 show the detailed structure of the single wafer transfer line 120. FIG. FIG. 5 is a perspective external view of a portion of the single wafer conveyance line 120 on the side opposite to the bay stocker 130. 6 is a cross-sectional view taken along the line II of FIG.
In FIG. 6, the transfer line 121 includes a moving body 121a and a wafer holding table 121b. The wafer holder 121b is provided on the moving body 121a. The wafer holding table 121b has an upper surface as a wafer holding surface, and holds one wafer W thereon. The wafer W is placed in contact with the upper surface of the wafer holder 121b in a horizontal posture. The transfer line 122 includes a moving body 122a and a wafer holder 122b. The wafer holder 122b is provided on the moving body 122a. The wafer holder 122b is configured to hold one wafer W in a horizontal posture. In FIG. 6, the distance H between the wafer mounting surface of the wafer holder 121b, the wafer holder 122b, and the wafer holder is determined by the structure of each processing procedure. This will be described later.

In FIG. 7, for example, a non-contact moving body, in this case, a linear moving body including a linear rail 121a-1 and a linear carriage 121a-2 is used as the moving body 121a. The wafer holding table 121b is provided on the linear carriage 121a-2 of the moving body 121a. The wafer holding table 121b has an upper surface as a wafer holding surface, and holds one wafer W thereon. The wafer W is placed in contact with the upper surface of the wafer holder 121b in a horizontal posture.
In FIG. 7, a non-contact moving body, in this case, a linear moving body composed of a linear rail 122a-1 and a linear carriage 122a-2 is used as the moving body 122a. The wafer holder 122b is provided on the linear carriage 122a-2 of the moving body 122a. The wafer holder 122b is an outer peripheral portion of the wafer W, contacts the back surface portion thereof, and in this case, holds one piece.

Next, a case where the wafer W is transferred from the transfer line 121 to the transfer line 122 will be described.
In FIG. 7, first, one wafer W is placed and held on the wafer holding table 121 b of the transfer line 121. On the other hand, the wafer holder 122b of the transfer line 122 is in a state where no wafer is held. In this state, the positional relationship between the wafer holding table 121b and the wafer holder 122b is adjusted to a positional relationship in which the wafer can be delivered. Next, the wafer W on the wafer holder 121b is raised (arrow 600) toward the wafer holder 122b. The raising is stopped when the wafer holder 122b reaches a position where the wafer can be received. Prior to this, as shown in FIG. 10, the wafer holder 122b has been opened in the radial direction (arrow 602). The wafer holder 122b that is opened when the wafer W reaches the part is closed in the radial direction (arrow 602). As a result, the wafer W is scooped and received by the scooping portion of the wafer holder 122b at the outer peripheral back surface portion. Thereafter, the member (not shown) that raises the wafer W is lowered and stored in, for example, the wafer holding table 121b.

FIG. 8 shows a partial plan view of the transfer line 121.
In FIG. 8, the linear rail 121a-1 is provided in the bottom face along the single wafer conveyance line. In this case, three linear carriages are provided on the linear rail 121a-1 so that they can travel (arrow 603). Each linear carriage 121a-2 is provided with one wafer holding stage 121b.
In FIG. 8, the planar shape of the linear carriage 121a-2 is, for example, a rectangle. The shape of the wafer holder 121b is, for example, a substantially circular shape. The size of the wafer holder 121b is selected according to the size of the wafer. For example, when the diameter of the wafer is changed to 8 inches, 12 inches, 14 inches,..., The size of the wafer holding table 121b is changed according to the diameter of the wafer. Each of the linear carriages 121a-2 is provided with a sensor (not shown) that detects the front-rear distance. These sensors are connected to a control device (not shown). Further, a sensor (not shown) is provided on the linear carriage 121a-2 or the wafer holding stage 121b. This sensor has a function of detecting the presence / absence of a wafer and wafer information. This sensor is connected to a control device (not shown). As for this sensor, one sensor may have detection functions of both the presence / absence detection of the wafer and the wafer information detection. Moreover, you may have a separate function.
Further, the linear carriage 121a-2 is provided with sensors (not shown) for confirming the position information of the linear carriage 121a-2. This sensor is connected to a control device (not shown). For example, this sensor has a function of detecting whether or not the linear carriage 121a-2 has come to a position corresponding to a predetermined processing device. In addition, each processing apparatus may be provided with the sensor which has such a detection function, and may be provided in both each linear trolley | bogie and processing apparatus.

FIG. 9 shows a partial plan view of the transfer line 122.
In FIG. 9, a linear rail 122a-1 is provided on the bottom surface along the single wafer conveyance line. In this case, three linear carriages 122a-2 are provided on the linear rail 122a-1 so that they can travel (arrow 604). Each linear carriage 122a-2 is provided with a wafer holder 122b. For example, as shown in FIG. 10, the wafer holder 122b has three scoop portions 122b-1. The scooping portions 122b-1 are arranged at 120 ° intervals on the circumference, and are located on the outer peripheral portion of the wafer W. The wafer holder 122b can be opened and closed in the radial direction of the wafer (arrow 602) for receiving the wafer W.

In FIG. 9, the planar shape of the linear carriage 122a-2 is, for example, a rectangle. In addition, the linear carriage 122a-2 is provided with sensors (not shown) for detecting the front-rear distance. Each sensor is connected to a control device (not shown). Further, the linear carriage 122a-2 is provided with a sensor (not shown) having a function of detecting the presence / absence of a wafer and wafer information. Each sensor is connected to a control device (not shown). As for this sensor, one sensor may have detection functions for both wafer presence detection and wafer information detection. Moreover, you may have a separate function.
Furthermore, each linear carriage 122a-2 includes a sensor (not shown) for checking its own position information in the transport line 122. Each sensor is connected to a control device (not shown). For example, this sensor has a function of detecting whether or not the linear carriage 122a-2 has come to a position corresponding to a predetermined processing device. In addition, each processing apparatus may be provided with the sensor which has such a detection function, and may be provided in both each linear trolley | bogie and processing apparatus.

8 and 9, the number of linear carriages 121a-2 installed on the linear rails 121a-1 in the conveyance line 121 and the number of linear carriages 122a-2 installed on the linear rails 122a-1 in the conveyance line 122 May be the same or different numbers. FIGS. 8 and 9 show examples in which three linear carriages are provided, but the number of linear carriages may be determined as appropriate. Further, the control device to which each sensor or the like is connected may be an individual device or a single device.
Control of the positional relationship between the linear carriage 121a-2 of the conveyance line 121 and the linear carriage 122a-2 of the conveyance line 122 is appropriately performed by the action of each sensor and the control device.

In FIGS. 11 and 12, the bay stocker 130 is connected to the interbay transport line 400. In this case, an AGV (Automatic Guided Vehicle) 410 is employed as the interbay transport line 400. The AGV 410 includes a robot 411, a base 412, a rail 413, and a traveling frame 414. The traveling rail 413 is installed in the interbay transportation line 400. A travel frame 414 is movably provided on the rail 413. The traveling frame 414 is provided with a robot 411 and a table 412. The traveling frame 414 has a drive device (not shown). This drive device is connected to a control device (not shown). The traveling frame 414 includes a position detection sensor with the bay stocker 130. This sensor may be included in the bay stocker 130.
11 and 12, the table 412 has a plane on which a wafer storage means, for example, a FOUP (Front Opening Unified Pod) 500 can be mounted, in this case, two (500a, 500b). The FOUP 500 is placed on the mounting surface of the table 412 so that the processing surface of the wafer stored therein is held in a horizontal posture. In this case, for example, the robot 411 has an arm 416 that grips the grip portion of the FOUP at the tip thereof. The robot 411 includes driving means (not shown) that causes the arm 416 to turn, reciprocate left and right, and move up and down. This driving means is connected to a control device (not shown). In addition to the FOUP, other storage devices such as an open cassette can be used without any problem as the wafer storage device.

  11 and 12, the bay stocker 130 includes a table 131, a gate 132, a robot 133, and a rail 134. In this case, the bay stocker 130 is divided into a base 131 portion and a transfer robot portion 136. The base 131 part and the transfer robot part 136 are partitioned by a gate 132. A stand 131 is installed on the AGV 410 side of the gate 132. A transfer robot portion 136 is disposed on the transfer line 121 side of the gate 132. The base 131 has a plane on which three FOUPs 500 can be placed. The FOUP is placed on the mounting surface of the table 131 so as to hold the processing surfaces of a plurality of wafers stored therein in a horizontal posture. The FOUP 500 is placed adjacent to the mounting surface of the table 131 along the traveling direction of the AGV 410. In this case, three gates 132 are provided, and each of the gates 132a to 132c is arranged corresponding to the FOUP 500. A rail 134 is provided on the rail base 137 of the transfer robot 136. The rail 134 is placed in parallel with the mounting surface of the FOUP 500 on the table 131. A robot 133 is placed on the rail 134. The robot 133 has drive means (not shown) that travels on the rail 134. This driving means is connected to a control device (not shown). The robot 133 has an arm 138. The arm 138 has a drive means (not shown) that causes the arm 138 to swing, reciprocate left and right, and move up and down. This driving means is connected to a control device (not shown). In this case, the arm 138 includes a sensor (not shown) having detection functions for both the presence / absence detection of the wafer and the wafer information detection. This sensor is connected to a control device (not shown).

In the apparatus system configured as described above, the following wafer operations and processing are performed.
4 to 12, the wafer is transferred to the bay 100 from the upstream side of the bay 100 through the inter-bay transfer line 400. Specifically, the FOUPs 500a and 500b are placed side by side on the mounting surface of the base 412 of the AGV 410. For example, a wafer with high processing speed is stored in the FOUP 500b. A sensor detects whether the FOUPs 500a and 500b are placed on the table 412. This detection information is sent to the control device. Thus, it is confirmed that the FOUPs 500a and 500b are properly placed on the table 412. Thereafter, an operation signal is output from the control device to the driving means, and the operation of the driving means is started. As a result, the AGV 410 is caused to travel in the interbay transport line 400 toward the bay stocker 130 of the bay 100. Thereafter, the position detection sensor detects that the AGV 410 has come to a place corresponding to a predetermined position of the bay stocker 130. This detection signal is sent to the control device, and a stop signal is output from the control device. As a result, the AGV 410 is stopped. In this case, FOUPs 500c and 500d are placed on the FOUP placement surface of the base 131. The FOUP is not placed on the remaining FOUP placement surface. In this case, the wafer processing of the FOUP 500d placed on the base 131 of the bay stocker 130 is almost finished. The processing of the remaining wafers in the FOUP 500c is in the middle of processing. Further, for example, the FOUP 500d wafer has a lower processing speed than the FOUP 500b wafer. A sensor (not shown) for determining whether or not there is a FOUP on the mounting surface of the FOUP of the base 131, which is the remaining mounting surface, in this case, the mounting surface located on the right side of the FOUP 500d toward the gate 132b. Is detected. When the sensor detects that there is no FOUP, an operation signal is output from the control device to the driving means of the robot 411. In response to this operation signal, the robot 411 starts operating. This operation is stopped when the arm 416 is swung from the state of the arm 416 in FIG. 11 to a position corresponding to the FOUP 500b. Thereafter, the arm 416 is expanded to an interval at which the FOUP 500b can be gripped. Thereafter, the arm 416 is lowered to a position corresponding to the grip portion of the FOUP 500b. Thereafter, the arm 416 is closed, whereby the FOUP 500b is gripped by the arm 416. It is detected by the sensor that the arm 416 has gripped the FOUP 500b, and this signal is output to the control device. Thereafter, the FOUP 500b is conveyed to the remaining placement surface of the table 131 in this state. As a result, the FOUP 500b is placed on this placement surface. The placed signal is output from the sensor to the control device. On the other hand, the completion of the processing of the wafer of FOUP 500d is transmitted to the control device. In response to this, the arm 416 of the robot 411 is moved to a position where the FOUP 500d can be collected and stopped. Thereafter, the arm 416 of the robot 411 is moved toward the FOUP 500d with the gap therebetween being opened. This movement is stopped by the control device when the arm 416 can catch the side surface of the FOUP 500d. Thereafter, the arm 416 is closed, whereby the FOUP 500d is gripped by the arm 416. In this state, the FOUP 500d is placed on the placement surface of the table 412 on which the FOUP 500b was originally placed. That is, in this state, the surface of the table 131 on which the FOUP 500b is originally placed becomes the next FOUP receiving surface. The AGV 410 holding the FOUP 500a and the FOUP 500d is moved to the next bay direction arrow 605 or the upstream direction arrow 606.

  Next, the gate 132c is opened by a command from the control device. At this time, the door of the FOUP 500b is also opened. As a result, the inside of the FOUP 500b is in communication with the atmosphere of the transfer robot unit 136 and the single wafer transfer line 120. In this state, the robot 133 is moved to a position corresponding to the gate 132c and stopped by a command from the control device. Information on the wafer stored in the FOUP 500b is read by a sensor in the arm insertion 138. The read information is output to the control device. This information signal selects which of the wafers in the FOUP 500b is to be processed. The selected signal is output to the robot 133. As a result, the robot 133 is adjusted so that the arm 138 is at a predetermined height. Thereafter, the arm 138 is inserted into the FOUP 500b through the gate 132c. The movement of the arm 138 is stopped by the control device when the rake portion of the arm 138 reaches the back surface of a predetermined wafer in the FOUP 500b. Thereafter, the rake portion of the arm 138 is slightly raised. With this rise, the wafer is received by the scoop portion of the arm 138. Thereafter, the arm 138 is retracted to the original position. On the other hand, the linear carriage 122a-2 of the transfer line 122 at the upper position of the single wafer transfer line 120 is stopped at a position where the wafer can be delivered. The stop position and information are output from the sensor to the control device. The wafer holder 122b of the linear carriage 122a-2 is open in the radial direction. In this case, it does not matter whether the linear carriage 121a-2 is present at the lower position of the linear carriage 122a-2. The robot 133 having a wafer at the rake portion of the arm 138 is caused to travel on the rail 134 to a position corresponding to the linear carriage 122a-2. This traveling is stopped by the control device when the robot 133 reaches a position corresponding to the linear carriage 122a-2. During this time, the arm 138 having the wafer is rotated 180 ° in the rake portion. Thereafter, the scoop portion of the arm 138 is moved toward the linear carriage 122a-2. When the wafer scooped by the scooping portion of the arm 138 reaches a position below the linear carriage 121a-2, the movement of the arm 138 is stopped. Thereafter, the rake portion of arm 138 is raised. This rise is stopped by the control device when the wafer at the rake portion of the arm 138 reaches a position where the wafer holder 122b of the linear carriage 122a-2 can be raked. In this state, the wafer holder 122b is closed in the radial direction (arrow 602). As a result, the wafer is transferred from the scoop portion of the arm 138 to the wafer holder 122b. The arm 138 to which the wafer is transferred is retracted to the original position and waited.

  In FIG. 4, for example, when the FOUP 500b is set on the base 131 of the bay stocker 130, the processing conditions are set by the control device so that the processing units 103 and 106 can process a wafer having a high processing speed. . In the remaining processing apparatuses 101, 102, 104, and 105, processing of a wafer with a low processing speed is continued.

FIG. 13 is a detailed configuration diagram of portions of the processing apparatus 101 and the processing apparatus 103 in the single wafer conveyance line 120 in FIG. FIG. 13 shows a lower conveyance line 121 of the single wafer conveyance line 120. A linear carriage 121a-2 is located at the front portion of the processing apparatus 101. A gate 101d, a lock chamber 101a, a gate 101c, and a processing chamber 101b are sequentially arranged from the transfer line 121 side of the processing apparatus 101. A robot 11 having a rake portion 11-1 is disposed in the lock chamber 101a. The scooping portion 11-1 has a function of rotating with a link mechanism for delivering a wafer through the gate 101d, for example, and delivering the wafer to the processing chamber 101b through the gate 101c.
In addition, FIG. 13 shows a conveyance line 122 on the upper side of the single wafer conveyance line 120. A linear carriage 122a-2 is located at the front portion of the processing apparatus 103. A gate 103d, a lock chamber 103a, a gate 103c, and a processing chamber 103b are sequentially arranged from the transfer line 122 side of the processing apparatus 103. A robot 13 having a rake portion 13-1 is disposed in the lock chamber 103a. The scooping portion 13-1 has a function of pivoting with, for example, a link mechanism for delivering a wafer through the gate 103d and delivering the wafer to the processing chamber 103b through the gate 103c.
In addition, the connection structure between the processing apparatuses 102, 104, 105 for processing wafers with a low processing speed and the transfer line 121 is substantially the same as the connection structure between the processing apparatus 101 and the transfer line 121, and illustration and description thereof are omitted. To do. Further, since the connection structure between the processing apparatus 106 for processing a wafer having a high processing speed and the transfer line 122 is substantially the same as the connection structure between the processing apparatus 103 and the transfer line 122, illustration and description thereof are omitted.

FIG. 14 shows details of the connection between the processing apparatus 103 and the single wafer transfer line 122. In FIG. 14, the space of the single wafer transfer line 120 and the lock chamber 103a are partitioned by a gate 103d. In this case, the height of the single wafer transfer line 120 and the lock chamber 103a is substantially the same height. The lock chamber 103a and the processing chamber 103b are partitioned by a gate 103c.
The linear carriage 122a-2 that has received the wafer Wb1 in the FOUP 500b from the arm 138 of the robot 133 is moved from the position in FIG. 11 to a position corresponding to the processing apparatus 103 in FIG. This movement is controlled by the control device when the sensor detects that the linear carriage 122a-2 has come to a predetermined position (FIG. 14). In FIG. 14, clean gas, for example, nitrogen gas, is introduced into the lock chamber 103 a, and thereby the pressure in the lock chamber 103 a is adjusted to substantially the same pressure as the atmospheric pressure of the single wafer transfer line 120. Thereafter, the gate 103d is opened. Thereafter, the scooping portion 13-1 of the robot 13 is fed out to the single wafer transfer line 120 through the opened gate 103d (arrow 607). When the scooping portion 13-1 reaches a position below the wafer Wb1 held by the wafer holder 122b, the motion of the scooping portion 13-1 is stopped. Thereafter, the wafer holder 122b is lowered (arrow 601). This lowering is stopped when the back surface of the wafer Wb1 comes into contact with the scooping portion 13-1 (FIG. 15). Thereafter, the wafer holder 122b is opened in the radial direction (arrow 602). Thereby, the wafer Wb1 is transferred from the wafer holder 122b to the scooping portion 13-1. The scooping portion 13-1 that has received the wafer Wb1 is pulled back to the original position in the lock chamber 103a through the gate 103d. Thereafter, as shown in FIG. 15B, the gate 103d is closed, and the lock chamber 103a is evacuated. When the pressure in the lock chamber 103a becomes substantially the same as the pressure in the processing chamber 103b, the gate 103c is opened. In this state, the scooping portion 13-1 of the robot 13 is moved from the lock chamber 103a to the processing chamber 103b. As a result, the wafer Wb1 is loaded into the processing chamber 103b while being scooped by the scooping portion 13-1. Further, the wafer Wb1 is transferred onto a sample table (not shown) provided in the processing chamber 103b. The scooping portion 13-1 that has transferred the wafer Wb1 is retracted to the lock chamber 103a through the gate 103c, and is allowed to wait at the original position of the lock chamber 103a. Thereafter, the gate 103c is closed. In this state, the wafer Wb1 placed on the sample stage in the processing chamber 103b is subjected to predetermined processing, for example, plasma etching processing, in the processing chamber 103b. The wafer Wb1 that has been subjected to the plasma etching process in the processing chamber 103b sequentially passes through the gate 103c, the lock chamber 103a, and the gate 103d by an operation reverse to the above-described loading operation, and is unloaded to the single wafer transfer line 120 to be transferred to the wafer holder 122b. Passed to. The linear carriage 122a-2 holding the wafer Wb1 that has been subjected to the plasma etching process in the processing chamber 103b is guided by the linear rail 122a-1 and moved along the transfer line 122 toward the processing apparatus 106.

  11 and 12, the wafer Wb2 selected next in the FOUP 500b is scooped by the scooping portion of the arm 138 of the robot 133 and extracted from the FOUP 500b by the same operation as described above. The extracted second wafer Wb2 is transferred from the scoop portion of the arm 138 of the robot 133 to the wafer holder 122b of the linear carriage 122a-2 by the same operation as described above. The linear carriage 122a-2 that has received the wafer Wb2 in the wafer holder 122b is moved to a position corresponding to the processing apparatus 103 by the same operation as described above and stopped. Note that the processing in the processing apparatus 103 and the processing in the processing apparatus 106 are different in this case. The linear carriage 122a-2 holding the wafer Wb1 plasma-etched by the processing apparatus 103 is moved along the transfer line 122 toward the processing apparatus 106. Then, it stops when the linear carriage 122a-2 reaches the processing device 106. The wafer Wb1 held on the linear carriage 122a-2 is carried into a processing chamber (not shown) of the processing apparatus 106 by the same operation as the processing apparatus 103. The wafer Wb1 carried into the processing apparatus is subjected to a predetermined process, for example, a film forming process (CVD, PVD, etc.). The film-formed wafer Wb1 is unloaded from the processing chamber to the single wafer transfer line 120 through a gate (not shown), a lock chamber (not shown), and a gate (not shown). The unloaded wafer Wb1 is held by the wafer holder 122b of the linear carriage 122a-2 and moved to a position where the wafer can be delivered to the arm 138 of the robot 133. Thereafter, the wafer Wb1 held on the wafer holder 122b of the linear carriage 122a-2 is recovered to the original position of the FOUP 500b via the robot 133 by an operation reverse to the above-described operation.

On the other hand, the wafer Wb2 held by the wafer holder 122b of the linear carriage 122a-2 moved to a position corresponding to the processing apparatus 103 and stopped is processed by the same operation as that of the wafer Wb1 described above. 103 is carried into the processing chamber 103b, where plasma etching is performed. Thereafter, the processed wafer Wb1 is unloaded from the processing chamber 103b to the single wafer transfer line 120, and transferred to and held by the wafer holder 122b of the linear carriage 122a-2. Thereafter, the linear carriage 122a-2 is caused to travel toward the processing device 106.
Such an operation is repeatedly performed. Accordingly, the wafers Wb1, Wb2,... Wbn in the FOUP 500b are sequentially sent to the processing apparatuses 103 and 106 through the transfer line 122. The wafers Wb1, Wb2,... Wbn processed by the processing apparatuses 103 and 106 are sequentially returned to the FOUP 500b and collected at a predetermined position of the FOUP 500b.

FIG. 16 shows details of the connection between the processing apparatus 101 and the single wafer transfer line 121. In FIG. 16, the space of the single wafer transfer line 120 and the lock chamber 101a are partitioned by a gate 101d. In this case, the height of the single wafer transfer line 120 and the lock chamber 101a is substantially the same height. The lock chamber 101a and the processing chamber 101b are partitioned by a gate 101c.
Information on the wafer stored in the FOUP 500c is read by a sensor. The read information is output to the control device. In this case, the wafer in the FOUP 500c is a wafer having a low processing speed. Accordingly, in this case, information indicating that the processing speed is low is read by the sensor, and the read information is output to the control device. On the other hand, the linear carriage 121a-2 of the transfer line 121 at the lower position of the single wafer transfer line 120a is stopped at a position where the wafer can be delivered. The stop position and information are output from the sensor to the control device. In this case, the wafer push-up pins 121c of the wafer holding table 121b of the linear carriage 121a-2 are stored in the wafer holding table 121b. In this case, there are three wafer push-up pins, and each is arranged on the wafer holding base 121b at an interval of 120 ° with the center of the wafer holding base 121b as the center. These pins can be moved up and down at predetermined intervals. The robot 133 having a wafer at the rake portion of the arm 138 is caused to travel on the rail 134 to a position corresponding to the linear carriage 121a-2. This traveling is stopped by the control device when the robot 133 reaches a position corresponding to the linear carriage 121a-2. During this time, the rake portion of the arm 138 having the wafer is moved toward the linear carriage 121a-2. When the wafer Wcn scooped by the scooping portion of the arm 138 reaches the upper position of the linear carriage 121a-2, the movement of the arm 138 is stopped. Thereafter, the wafer push-up pins 121c are raised. This rise is stopped when the apex of the rake portion of the arm 138 comes into contact with the back surface of the wafer Wcn. As a result, the wafer Wcn is transferred from the scoop portion of the arm 138 to the wafer push-up pins. Thereafter, the arm 138 is returned to the original position and is made to wait.
The linear carriage 121a-2 that has received the wafer Wcn from the arm 138 of the robot 133 is moved to a position corresponding to the processing apparatus 101. This movement is detected by the sensor that the linear carriage 121a-2 has come to a predetermined position, and is controlled by the control device.

In FIG. 16, clean gas, for example, nitrogen gas, is introduced into the lock chamber 101 a, whereby the pressure in the lock chamber 101 a is adjusted to substantially the same pressure as that of the single wafer transfer line 120. Thereafter, the gate 101d is opened. Thereafter, the robot 11 is fed out to the single wafer transfer line 120 through the gate 101d where the rake portion 11-1 of the robot 11 is opened (arrow 607). On the other hand, the wafer Wcn held on the wafer holding table 121b of the linear carriage 121a-2 at the position corresponding to the processing apparatus 101 is transferred from the wafer holding table 121b to the wafer lifting pin 121c and held by the rising of the wafer lifting pin. Is done.
In this state, when the scooping part 11-1 of the robot 11 reaches the position below the wafer Wcn held by the wafer push-up pins 121c, the movement of the scooping part 11-1 is stopped (FIG. 17A). )). Thereafter, the wafer push-up pins 121c are lowered. By this lowering, the wafer Wcn is transferred from the wafer push-up pins 121c to the scooping part 11-1. The scooping part 11-1 that has received the wafer Wcn is pulled back to the position under the lock chamber 101a through the gate 101d. Thereafter, the gate 101d is closed, and the lock chamber 101a is evacuated (FIG. 17B). When the pressure in the lock chamber 101a becomes substantially the same as the pressure in the processing chamber 101b, the gate 101c is opened. In this state, the scooping part 11-1 of the robot 11 is moved from the lock chamber 101a to the processing chamber 101b. As a result, the wafer Wcn is loaded into the processing chamber 101b while being scooped by the scooping portion 11-1. Further, the wafer Wcn is transferred onto a sample table provided in the processing chamber 101b. The scooping portion 11-1 that has passed the wafer Wcn is retracted to the lock chamber 101a through the gate 101c and is kept at the original position of the lock chamber 101a. Thereafter, the gate 101c is closed. In this state, the wafer Wcn placed on the sample stage in the processing chamber 101b is subjected to predetermined processing, for example, plasma etching processing, in the processing chamber 101b.

It should be noted that the plasma etching processing conditions for the wafer Wb in the processing chamber 103b described above and the plasma etching processing conditions for the wafer Wc in the processing chamber 101b in this case are naturally different. In other words, the plasma etching processing conditions for the wafer Wb in the processing chamber 103b are such conditions that the processing time is short, while the plasma etching processing conditions for the wafer Wc in the processing chamber 101b are long in processing time. It is like that. The wafer Wcn that has been subjected to the plasma etching process in the processing chamber 101b sequentially passes through the gate 101c, the lock chamber 101a, and the gate 101d, and is transferred to the single wafer transfer line 120 by the operation opposite to the above-described loading operation. The wafer is transferred to the wafer holding table 121b through the push-up pins 121c.
The linear carriage 121 a-2 holding the wafer Wcn that has been subjected to the plasma etching process in the processing chamber 101 b is guided by the linear rail 121 a-1 to move the transfer line 121 toward the processing chamber 105.

11 and 12, the wafer Wcn + 1 selected next in the FOUP 500c is scooped by the scooping portion of the arm 138a of the robot 133 and extracted from the FOUP 500c by the same operation as described above. The extracted wafer Wcn + 1 is transferred from the scoop portion of the arm 138 of the robot 133 to the wafer holder 121b of the linear carriage 121a-2 by the same operation as described above. The linear carriage 121a-2 that has received the wafer Wcn + 1 on the wafer holding stage 121b is moved to a position corresponding to the processing apparatus 101 by the same operation as described above and stopped. In this case, the processing in the processing apparatus 101 and the processing in the processing apparatus 105 are different. The linear carriage 121 a-2 holding the wafer Wcn plasma-etched by the processing apparatus 101 is moved along the transfer line 121 toward the processing apparatus 105. Thereafter, when the linear carriage 121a-2 reaches a position corresponding to the processing apparatus 105, the movement is stopped. The wafer Wcn held on the linear carriage 121a-2 is carried into the processing chamber (not shown) of the processing apparatus 105 by the same operation as the processing apparatus 101. The wafer Wcn carried into the processing apparatus is subjected to a predetermined process, for example, a film forming process (CVD, PVD, etc.). The film-formed wafer Wcn is unloaded from the processing chamber to the single wafer transfer line 120 through a gate (not shown), a lock chamber (not shown), and a gate (not shown). The unloaded wafer Wcn is held on the wafer holding base 121b of the linear carriage 121a-2 and moved to a position where the wafer Wcn can be delivered to the arm 138 of the robot 133. Thereafter, the wafer Wcn held on the wafer holding table 121b of the linear carriage 121a-2 is recovered to the original position of the FOUP 500c via the robot 133 by an operation reverse to the above-described operation. On the other hand, the next wafer Wcn + 1 held on the wafer holding table 121b of the linear carriage 121a-2 that has been moved to a position corresponding to the processing apparatus 101 and stopped is processed by the same operation as that of the wafer Wcn described above. It is carried into the processing chamber 101b of the apparatus 101, where plasma etching is performed. Thereafter, the processed wafer Wcn + 1 is unloaded from the processing chamber 101b to the single wafer transfer line 120, and transferred to and held by the wafer holding table 121b of the wafer holding table 121b of the linear carriage 121a-2. Thereafter, the linear carriage 121 a-2 is moved toward the processing device 105. In this way, the wafers in the FOUP 500c are sequentially processed one by one by the transfer line 121 and the processing apparatuses 101, 102, 104, and 105 in parallel with the transfer / processing of the wafer in the FOUP 500b. The processed wafers are returned to the FOUP 500c one by one and collected at a predetermined position.
The example in which the processing conditions in the processing apparatus of the wafer in the FOUP 500b and the wafer in the FOUP 500c are different has been described. Next, a case where the processing conditions of the wafers in the FOUPs 500b and 500c are the same will be described.

  In FIG. 4, the processing apparatuses 101 to 103 are the same processing apparatus, for example, a plasma etching apparatus, and the processing apparatuses 104 to 106 are, for example, a plasma CVD apparatus. The processing apparatuses 101 to 103 are operated under the same wafer processing conditions. The processing apparatuses 104 to 106 are operated under the same wafer processing conditions. In FIG. 11, a wafer having a high processing speed is stored in the FOUP 500b. The FOUPs 500c and 500d store wafers with a low processing speed. The processing conditions and the like of the wafer processing apparatuses 101 to 103 and the processing apparatuses 104 to 106 stored in the FOUPs 500b to 500d are the same.

  First, the FOUP 500b of the table 412 is transported and mounted on the vacant mounting surface of the table 131 by the same operation as described above from the state of FIGS. Next, when the processing of the wafers stored in the FOUP 500d is completed, the FOUP 500d is transferred from the table 131 to the mounting surface of the table 412 by the robot 411 and mounted thereon. Thereafter, the AGV 410 is moved in the direction of the arrow 604 or 605. The wafer Wb1 stored in the FOUP 500b is taken out by the robot 133 by the operation as described above, and transferred to the wafer holder 122b of the linear carriage 122a-2 of the transfer line 122. On the other hand, the processing device in the processing waiting state among the processing devices 101 to 103 is detected by the sensor by the conveyance and placement of the FOUP 500b, and this signal is output to the control device. For example, when the processing apparatuses 101 to 103 detect that the processing apparatus 102 is in a processing waiting state, the linear carriage 122a-2 holding the wafer Wb1 is moved to a position corresponding to the processing apparatus 102 and stopped. Be made. This wafer Wb1 is then carried into the processing chamber of the processing apparatus 102, where it is subjected to plasma etching. The etched wafer Wb1 is taken out of the processing apparatus 102 and returned to the wafer holder 122b of the linear carriage 122a-2. In the processing apparatuses 101 and 103, the processing of the wafer Wcn... With a low processing speed of the FOUP 500c is performed in parallel.

  Next, the processing devices waiting for processing in the processing devices 104 to 106 are detected by the sensor and output to the control device. For example, when the processing apparatus 104 is detected as waiting for processing among the processing apparatuses 104 to 106, the linear carriage 122a-2 holding the wafer Wb1 is moved to a position corresponding to the processing apparatus 104 and stopped. Be made. This wafer Wb1 is then carried into the processing chamber of the processing apparatus 104, where it is subjected to plasma CVD processing. The CVD-processed wafer Wb1 is taken out of the processing apparatus 104 and returned to the wafer holder 122b of the linear carriage 122a-2.

  In the processing apparatuses 105 and 106, the processing of the wafer Wcn... With a low processing speed of the FOUP 500c is performed in parallel. The wafer Wb1 processed by the processing apparatus 104 is returned to the original position of the FOUP 500b by the transfer line 122 and the robot 133 and collected. At the same time, the wafers Wcn... Processed by the processing apparatuses 105 and 106 are returned to the original position of the FOUP 500c by the transfer line 121 and the robot 133 and collected. The next wafer Wb2 is selected from the FOUP 500b. On the other hand, when the processing apparatus 101 is waiting for processing in the processing apparatuses 101 to 103, the wafer Wb2 is carried into the processing chamber of the processing apparatus 101 by the robot 133 and the transfer line 122 and subjected to plasma etching. The wafer Wb <b> 2 that has been processed in the processing apparatus 101 is taken out of the processing chamber 101. Here, in the processing apparatuses 104 to 106, for example, when the processing apparatus 105 is in a process waiting state, the wafer Wb 2 that has been processed by the processing apparatus 101 is transferred to the processing apparatus 105 by the transfer line 122. This wafer Wb2 is carried into the processing chamber of the processing apparatus 105, where it is subjected to plasma CVD processing. The processed wafer Wb2 is taken out of the processing apparatus 105, returned to the original position of the FOUP 500b by the transfer line 122 and the robot 133, and collected. At the same time, in the processing apparatuses 104 and 106, plasma CVD processing is performed on the wafers Wcn + 1. The wafers Wcn + 1... After these processes are taken out from the processing apparatuses 104 and 106, returned to a predetermined position in the FOUP 500c by the transfer line 121 and the robot 133, and collected. In this way, the wafers Wb1, Wb2,... Wbn in the FOUP 500b are sequentially processed one by one by the processing apparatus in the processing waiting state in the processing apparatuses 101 to 103. The wafers Wb1, Wb2,... Wbn processed by these processing apparatuses are next subjected to plasma CVD processing in any of the processing apparatuses 104 to 106 that are in a processing waiting state. Transfer of these wafers Wb1, Wb2,... Wbn in the bay is performed by a transfer line 122. Wafers Wb1, Wb2,... Wbn that have been processed by any of the processing apparatuses 104 to 106 are returned to a predetermined position in the FOUP 500b by the transfer line 122 and the robot 133, and collected. At the same time, the processing of the wafers Wcn + 1... Wcm having a low processing speed in the FOUP 500c is sequentially performed in any one of the processing apparatuses 101 to 103 and any one of the processing apparatuses 104 to 106. In this case, the transfer of the wafer in the bay is performed by the transfer line 121. Wafers Wcn, Wcn + 1... Wcm, for which plasma CVD processing has been completed in any of the processing apparatuses 104 to 106, are returned to their original positions in the FOUP 500c by the transfer line 121 and the robot 133 and collected.

  11 and 12, it is assumed that the FOUP 500c is placed on the FOUP placement surface of the base 131 by the robot 411 of the AGV 410. In the FOUP 500c, a wafer having a high processing speed, that is, a wafer having a short processing time and a wafer having a low processing speed, that is, a wafer having a long processing time are mixed. Here, it is assumed that the processing conditions in the processing chamber of each wafer are different. First, in FIG. 4, the processing apparatuses 101 to 103 are plasma etching apparatuses, and the processing apparatuses 104 to 106 are plasma CVD apparatuses. Further, in the plasma etching apparatuses 101 to 103, the processing apparatus 103 is set to wafer processing conditions with a short processing time. The processing apparatuses 101 and 102 are set to wafer processing conditions with a long processing time. In the processing apparatuses 104 to 106, in this case, the processing apparatus 104 is set to a wafer processing condition with a short processing time. The processing apparatuses 105 and 106 are set to wafer processing conditions having a long processing time. Further, the transfer line 121 is used for transferring a wafer having a long processing time, and the transfer line 122 is used for transferring a wafer having a short processing time.

11 to 17, the arm 138 of the robot 133 is inserted into the FOUP 500c. At this time, the wafer information located above the arm 138 is detected by the sensor, and this is output to the control device. As a result, the control apparatus determines that the wafer is, for example, the wafer WcS1 having a short processing time. The wafer WcS1 having a short processing time is then transferred by the robot 133 to the wafer holder 122b of the linear carriage 122a-2 on the transfer line 122. The linear carriage 122a-2 that has received the wafer WcS1 by the wafer holder 122b is caused to travel along the transfer line 122 toward the processing apparatus 103. Thereafter, the sensor detects that the linear carriage 122a-2 having the wafer WcS1 has reached a position corresponding to the processing apparatus 103, and the traveling is stopped. Thereafter, the wafer WcS1 is loaded into the processing apparatus 103 and subjected to plasma etching. The plasma-etched WcS1 is taken out of the processing apparatus 103 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the linear carriage 122a-2 that has received the wafer WcS1 is caused to travel toward the processing apparatus 104 from the transfer line 122. On the other hand, the arm 138 of the robot 133 is inserted into the FOUP 500C. At this time, the wafer information located above the arm 138 is detected by the sensor, and this is output to the control device. As a result, the control apparatus determines that the wafer is, for example, a wafer having a low processing speed. The wafer WcL1 having a low processing speed is then transferred by the robot 133 to the wafer holding table 121b of the linear carriage 121a-2 of the transfer line 121. The linear carriage 121a-2 that has received the wafer WcL1 by the wafer holding stage 121b is caused to travel along the transfer line 121 toward the processing apparatus 102. Thereafter, the sensor detects that the linear carriage 121a-2 having the wafer WcL1 has arrived at a position corresponding to the processing apparatus 102, and this traveling is stopped. Thereafter, the wafer WcL1 is loaded into the processing apparatus 102 and subjected to plasma etching. The plasma etched wafer WcL1 is taken out of the processing apparatus 102 and transferred to the wafer holder 121b of the linear carriage 121a-2. Thereafter, the linear carriage 121a-2 that has received the wafer WcL1 is caused to travel from the transfer line 121 toward the processing apparatus 105. Thereafter, the wafer WcL1 is loaded into the processing apparatus 105 and subjected to plasma CVD processing. The plasma CVD processed wafer WcL1 is taken out of the processing apparatus 105 and transferred to the wafer holder 121b of the linear carriage 121a-2. Thereafter, the wafer WcL1 is returned to the original position of the FOUP 500c. On the other hand, the arm 138 of the robot 133 is inserted into the FOUP 500c. At this time, the wafer information located above the arm 138 is detected by the sensor, and this is output to the control device. As a result, the control apparatus determines that the wafer is, for example, a wafer having a long processing time. The wafer WcL2 having a long processing time is then transferred to the wafer holding table 121b of the linear carriage 121a-2 of the transfer line 121 by the robot 133. The linear carriage 121a-2 that has received the wafer WcL2 by the wafer holding stage 121b is caused to travel along the transfer line 121 toward the processing apparatus 101. Thereafter, the sensor detects that the linear carriage 121a-2 having the wafer WcL2 has arrived at a position corresponding to the processing apparatus 101, and the traveling is stopped. Thereafter, the wafer WcL2 is loaded into the processing apparatus 101 and subjected to plasma etching. The plasma etched wafer WcL2 is taken out of the processing apparatus 101 and transferred to the wafer holder 121b of the linear carriage 121a-2. Thereafter, the linear carriage 121a-2 that has received the wafer WcL2 is caused to travel from the transfer line 121 toward the processing apparatus 106. Thereafter, wafer WcL2 is carried into processing apparatus 106 and subjected to plasma CVD processing. The plasma CVD-processed wafer WcL2 is taken out of the processing apparatus 106 and transferred to the wafer holder 121b of the linear carriage 121a-2. Thereafter, the wafer WcL2 is returned to the original position of the FOUP 500c. On the other hand, the arm 138 of the robot 133 is inserted into the FOUP 500c. At this time, the wafer information located above the arm 138 is detected by the sensor, and this is output to the control device. As a result, the control apparatus determines that the wafer is, for example, a wafer with a short processing time. The wafer WcS2 having a short processing time is then delivered to the wafer holder 122b of the linear carriage 122a-2 of the transfer line 122 by the robot 133. The linear carriage 122a-2 that has received the wafer WcS2 by the wafer holder 122b is caused to travel along the transfer line 122 toward the processing apparatus 103. Thereafter, the sensor detects that the linear carriage 122a-2 having the wafer WcS2 has reached a position corresponding to the processing apparatus 103, and the traveling is stopped. Thereafter, the wafer WcS2 is loaded into the processing apparatus 103 and subjected to plasma etching. At this time, the wafer WcS1 is loaded into the processing apparatus 104 and subjected to plasma CVD processing. The plasma CVD processed wafer WcS1 is taken out of the processing apparatus 104 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the wafer WcS1 is returned to the original position of the FOUP 500c. Thereafter, the plasma-etched wafer WcS2 is taken out of the processing apparatus 103 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the linear carriage 122a-2 that has received the wafer WcS1 is caused to travel from the transfer line 122 toward the processing apparatus 104. Thereafter, wafer WcS2 is carried into processing apparatus 104 and subjected to plasma CVD processing. The plasma CVD processed wafer WcS2 is taken out of the processing apparatus 104 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the wafer WcS2 is returned to the original position of the FOUP 500C.
In this way, the wafers WcS1, WcS2,... WcSn in the FOUP 500c having a short processing time and the wafers WcL1, WcL2,. It is carried out sequentially and then returned to the original position of the FOUP 500C and collected.

  In FIGS. 11 to 14, FOUPs 500 a and 500 b are mounted on the base 412 of the AGV 410. In this state, AGV 410 is caused to travel in the direction of arrow 604. When the vehicle arrives at a position corresponding to the bay stocker 130 of the bay 100, the traveling of the AGV 410 is stopped. In the FOUP 500b, limited express wafers Whb1, Whb2,... Wbhn are stored. Based on the wafer information, the processing apparatuses 101 to 106 in FIG. 4 select an apparatus for processing the wafer and set processing conditions. In this case, for example, the processing apparatuses 101 and 105 are selected as apparatuses used for processing this express wafer. The remaining processing devices 102, 103, 104, and 106 are continuously used for processing in the FOUPs 500c and 500d. In this case, the transfer line 122 is selected as a line for transferring the express wafer on the single wafer transfer line 120. In the transfer line 121, the wafers in the FOUPs 500c and 500d are transferred.

  11 to 14, the FOUP 500 b is placed on the FOUP placement surface on the right side of the FOUP 500 d of the base 131 of the bay stocker 130. The gate 132c corresponding to the FOUP 500b is opened, and accordingly, the door (not shown) of the FOUP 500b is also opened. The arm 138 of the robot 133 is inserted into the FOUP 500b. At this time, the wafer information located above the arm 138 is detected by the sensor, and this is output to the control device. As a result, the control apparatus determines that the wafer is, for example, a wafer with an express processing speed. The express wafer Wbh1 at this processing speed is then transferred to the wafer holder 122b of the linear carriage 122a-2 of the transfer line 122 by the robot 133. The linear carriage 122a-2 that has received the wafer Wbh1 by the wafer holder 122b is caused to travel along the transfer line 122 toward the processing apparatus 101. Thereafter, the sensor detects that the linear carriage 122a-2 having the wafer Wbh1 has reached a position corresponding to the processing apparatus 101, and the traveling is stopped. Thereafter, the wafer Wbh1 is carried into the processing apparatus 101, where it is subjected to plasma etching. The etched wafer Wbh1 is taken out of the processing apparatus 101 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the linear carriage 122a-2 that has received the wafer Wbh1 is caused to travel toward the processing apparatus 105 from the transfer line 122. Thereafter, wafer Wbh1 is loaded into processing apparatus 105 and subjected to plasma CVD processing. The plasma CVD processed wafer Wbh1 is taken out of the processing apparatus 105 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the wafer Wbh1 is returned to the original position of the FOUP 500b. Thereafter, the arm 138 of the robot 133 is inserted into the FOUP 500b. At this time, the wafer information located above the arm 138 is detected by the sensor, and this is output to the control device. As a result, the control apparatus determines that the wafer is, for example, a wafer with an express processing speed. The express wafer Wbh2 at this processing speed is then transferred to the wafer holder 122b of the linear carriage 122a-2 of the transfer line 122 by the robot 133. The linear carriage 122a-2 that has received the wafer Wbh2 by the wafer holder 122b is caused to travel along the transfer line 122 toward the processing apparatus 101. Thereafter, the sensor detects that the linear carriage 122a-2 having the wafer Wbh2 has reached a position corresponding to the processing apparatus 101, and the traveling is stopped. Thereafter, the wafer Wbh2 is loaded into the processing apparatus 101 and subjected to plasma etching. The etched wafer Wbh2 is taken out of the processing apparatus 101 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the linear carriage 122a-2 that has received the wafer Wbh2 is caused to travel toward the processing apparatus 105 from the transfer line 122. Thereafter, wafer Wbh2 is carried into processing apparatus 105 and subjected to plasma CVD processing. The plasma CVD processed wafer Wbh2 is taken out of the processing apparatus 105 and transferred to the wafer holder 122b of the linear carriage 122a-2. Thereafter, the wafer Wbh2 is returned to the original position of the FOUP 500b. Assume that the FOUP 500b stores five of these express wafers. The remaining three express wafers are transported in the same manner as the previous wafers Wbh1 and Wbh2, and returned to their original positions in the FOUP 500b.

  In this case, it is assumed that either the wafer having the fast processing speed, that is, the processing time is short, or the wafer having the slow processing speed, that is, the processing time is long, is stored in the FOUP 500d. For example, when a wafer having a short processing time is stored, the wafer WdS is transferred by the transfer line 122 and is subjected to plasma etching processing by the processing apparatus 103 and subsequently plasma CVD processing by the processing apparatus 105. Thereafter, the processed wafer is returned to the original position of the FOUP 500d and collected. On the other hand, when a wafer having a long processing time is stored, this wafer WdL1 is transferred by the transfer line 121 and is subjected to plasma etching processing by the processing apparatuses 101 and 102 and subsequently plasma CVD processing by the processing apparatuses 104 and 106. Thereafter, the processed wafer FOUP 500d is returned to the original position and collected. Such processing is performed by using the interval (waiting time) between wafer processing in the FOUP 500c described above. This is handled smoothly by the sensor and the control device.

  The FOUP 500b that collects all the wafers that have been processed in this manner is then placed on the stage 412 of the AGV 410. The AGV 410 is then moved to another location, such as another bay (arrow 604 or 605). During this time, the wafers in the FOUPs 500c and 500d are transferred by the transfer line 121, and are sequentially processed by the processing apparatus 102 or 103 and the processing apparatus 104 or 106 during the transfer. The processed wafer is returned to the original position of the FOUPs 500c and 500d. Thereafter, when all processing of the express wafer in the FOUP 500b in the bay 100 is completed, the processing conditions of the processing apparatuses 101 and 105 selected corresponding to the express wafer are the processing conditions in the FOUP 500c and 500d. It will be restored. Thereafter, unprocessed wafers in the FOUPs 500c and 500d are transported by the carry-in line 121 and processed by the processing apparatuses 101 to 106. The processed wafer is returned to the original position of the FOUPs 500c and 500d and collected.

The embodiment of the present invention has been described above.
In such an embodiment, the following effects can be obtained.
1. Even if a wafer having a long processing time and a wafer having a short processing time are mixed in a transfer line in the same bay, the transfer line in the bay has two transfer lines that can be transferred in parallel in this case. The transfer and processing of a wafer with a long time and the transfer and processing of a wafer with a short processing time can be performed separately. In this way, the two transfer lines can be properly used depending on the processing / processing conditions of the wafer, that is, the transfer line for the wafer having a long processing time and the wafer having a short processing time can be used properly. It is possible to prevent the wafer transfer / processing waiting time from occurring. That is, in the prior art, the conveyance time is limited to the longer processing time, but in this embodiment, since two conveyance lines are used individually, such a rate limitation does not occur. Therefore, the processing time is not delayed, the overall speed is not lowered, and consequently the throughput of the entire bay can be prevented from being lowered.
2. Even if a wafer with a long processing time and a wafer with a short processing time are mixed in the transfer line in the same bay, the transfer line in the bay has two transfer lines that can be transferred in parallel. Therefore, the transfer / processing of a wafer having a long processing time and the transfer / processing of a wafer having a short processing time can be performed separately. In this way, even if the processing conditions are the same, a transfer line for a wafer having a long processing time and a wafer having a short processing time can be selectively used, so that it is possible to prevent a wafer transfer / processing waiting time from occurring as in the prior art. . That is, in the prior art, the transport time is limited to the longer processing time. However, in this embodiment, since the two transport lines are used individually, such a speed limit does not occur. Therefore, the processing time is not delayed, the overall speed is not lowered, and the overall throughput of the bay can be prevented from being lowered.
3. Even if a wafer with a long processing time and a wafer with a short processing time are mixed in the same bay transport line because of different processing conditions, the two transport lines can be transported in parallel in this case. Therefore, wafer transfer / processing with a long processing time and wafer transfer / processing with a short processing time can be separately performed. In this way, because the processing conditions are different and the transfer line for a wafer with a long processing time and a wafer with a short processing time can be used properly, there is a waiting time for wafer transfer processing as in the prior art. Can be prevented. That is, in the prior art, the transport time is limited to the longer processing time, but in this embodiment, since the two transport lines are used individually, such speed control does not occur. Therefore, the processing time is not delayed, the overall speed is not lowered, and the overall throughput of the bay can be prevented from being lowered.

4). When wafers with different processing contents are mixed in the same FOUP, even if a wafer with a long processing time and a wafer with a short processing time are mixed in the transfer line in the same bay, as a transfer line in the bay, Since the two transfer lines are provided so that transfer is possible, transfer / processing of a wafer with a long processing time and transfer / processing of a wafer with a short processing time can be performed separately. As described above, since the transfer lines for the wafer having the long processing time and the wafer having the short processing time are used in the same FOUP, the wafer transfer processing waiting time as in the prior art occurs. Can be prevented. In other words, in the prior art, the transport time is limited to the longer processing time, but in this embodiment, since two transport lines are used individually, such a speed limit does not occur. Therefore, the processing time is not delayed, the overall speed is not lowered, and the overall throughput of the bay can be prevented from being lowered.
5). Even if a wafer with a long processing time and a wafer with a short processing time are mixed in a transfer line in the same bay during express wafer processing, the transfer line in the bay has two transfer lines that can be transferred in parallel. Therefore, wafer transfer / processing with a long processing time and wafer transfer / processing with a short processing time can be separately performed. As described above, since the transfer line for a wafer having a long processing time and a wafer having a short processing time can be selectively used, it is possible to prevent occurrence of a wafer transfer processing waiting time as in the prior art. That is, in the prior art, the transport time is limited to the longer processing time. However, in this embodiment, since the two transport lines are used individually, such a speed limit does not occur. Therefore, the processing time is not delayed, the overall speed is not lowered, and the overall throughput of the bay can be prevented from being lowered.

Furthermore, in such an embodiment, the following effects can also be obtained.
6). In this case, the single wafer transfer line is composed of two transfer lines so that they can be transferred in parallel, and the two transfer lines are set at the upper and lower positions. An increase in the floor area (footprint) occupied by the clean room can also be suppressed. For this reason, a decrease in throughput per footprint can be prevented.
7). In this case, the transport space of the upper and lower transport lines constituting the single wafer transport line is maintained in a clean gas atmosphere, so that the cleanliness of the clean room in which the transport space is installed can be further reduced. For this reason, a clean room can also reduce construction costs.
8). The bay-to-bay transportation line and the bay transportation line are connected by an atmospheric loader type bay stocker. Can be
9. The bay stocker only needs to be configured with an atmospheric loader (loader between the atmosphere and clean gas atmosphere), and it is not necessary to provide an atmospheric loader section for each processing device in the bay. can do.

10. The clean gas atmosphere in the air loader section of the bay stocker communicates with the cleaning gas atmosphere in the transfer space of the single wafer transfer line. Can be saved.
11. In this case, the two transfer lines constituting the single wafer transfer line are set at the upper and lower positions, and the wafer can be transferred independently between each transfer line and the corresponding processing apparatus. It is possible to smoothly transfer the wafers, transfer the wafers between the respective transfer lines and the corresponding processing apparatuses, and process the wafers in the respective processing apparatuses. Thereby, even when wafers with different processing times are mixed, even when a wafer that requires express processing comes, it is possible to suppress a decrease in throughput in the bay and overall throughput.
12 In this embodiment, the height of the space of the single wafer transfer line and the height of the lock chamber of each processing chamber are substantially the same, so that each processing apparatus is not used in the single wafer transfer line without using a special interface unit. Can be installed continuously. Therefore, construction of each bay becomes easy, the time required for construction of each bay can be shortened, and the cost can be reduced.

  In the above-described embodiment, a failure detection device for detecting a failure is attached to the single wafer conveyance line (FIG. 4). With such a configuration, for example, when the conveyance line 121 fails for some reason, this failure is immediately detected by the failure detection device. This detection signal is sent to a control device (not shown), whereby, for example, the operation of the transport line 122 is started. For this reason, even if such an abnormal situation occurs, the wafer single wafer transfer in the bay is continued without being stopped. Accordingly, the processing in each processing apparatus can be continuously processed and transported without stopping, and all operations in the bay are smoothly performed. Further, since the wafer conveyance / processing in the bay is not stopped in this way, the wafer conveyance / processing in other related bays can be performed without stopping.

  Further, in the above-described embodiment, the single-wafer transport line is configured by a combination of the transport lines arranged at the upper and lower positions. For example, the transport line at the lower position is the same as that of the first embodiment. And OHT may be used for the transport line at the upper position.

18 and 19 show a second embodiment of the present invention. 18 and 19 are different from FIGS. 4, 6, 7 and 14 showing one embodiment of the present invention in that the single wafer transfer line 120b has a loop-like transfer line 121 and its longitudinal length. It is a point comprised with the conveyance line 123 on the straight line arrange | positioned in the direction center part.
In FIG. 18, the processing apparatuses 101 to 106 are arranged on each side of the three units along the longitudinal conveyance direction of the conveyance line 121 and the conveyance direction of the conveyance line 123.
In FIG. 18, in this case, two robots 123-1 and 123-2 having a wafer scooping portion are movably disposed on both sides of the transfer line 123 in the transfer direction. .

In FIG. 19, a moving body 121a including a linear rail 121a-1 and a linear carriage 121a-2 is provided on the bottom wall portion of the loop-shaped transfer chamber 700 of the transfer line 121, for example, as in the above embodiment. Yes. The linear carriage 121a-2 of the moving body 121a is provided with a wafer holding base 121b. Here, since the moving body 121a and the wafer holding base 121b are the same as those in the above-described embodiment, detailed description thereof is omitted.
In FIG. 19, gates 701 a and 701 b are provided on the facing sides of the transfer chamber 700. On the opposite side, for example, lock chambers 102a and 105a are provided via gates 102d and 105d, respectively. Robots 12 and 15 having rake portions 12-1 and 15-1 are arranged in the lock chambers 102a and 105a, respectively. The lock chambers 102a and 105a are provided with process chambers 102b and 105b through gates 102c and 105c, respectively. In FIG. 19, the other configurations are the same as those in FIG. 13 showing the above-described embodiment, and detailed description thereof is omitted. In FIG. 19, clean gas, for example, nitrogen gas, is supplied into the transfer chamber 700 and maintained in a nitrogen gas atmosphere.

  In FIG. 19, a transfer chamber 702 including the transfer line 123 therein is provided. In this case, a transfer line 123 is provided on the top wall of the transfer chamber 702. That is, the moving body 123 a is provided on the top wall portion of the transfer chamber 702. As the moving body 123a, a non-contact moving body, in this case, a moving body 123a including a linear rail 123a-1 and a linear carriage 123a-2 is used. A linear rail 123 a-1 is provided on the top wall portion of the transfer chamber 702. The linear carriage 123a-2 is guided and moved by the linear rail 123a-1. The linear carriage 123a-2 is provided with a robot 123-2 having a wafer rake portion. The atmosphere in the transfer chamber 702 may be an air atmosphere or a clean gas atmosphere.

18 and 19, the robot 123-2 of the linear transfer line 123 that has received a predetermined wafer by the bay stocker unit 130 moves the transfer line 123 linearly by moving the linear carriage 123a-2. It is done. Thereafter, this movement is stopped when the linear carriage 123a-2 reaches a position corresponding to a predetermined processing apparatus. Thereafter, the robot 123-2 having the wafer in the rake portion is lowered toward the bottom wall of the transfer chamber 702. This lowering is stopped at a height at which the wafer can be delivered to and from the wafer scoop portion 12-1 of the robot 12 in the lock chamber 102a. Thereafter, the gate 701a is opened, and the scooping portion having the wafer is drawn into the transfer chamber 700 through the gate 701a and stopped. On the other hand, the gate 102d is opened, and the scooping portion 12-1 of the robot 12 in the lock chamber 102a is fed into the transfer chamber 700 through the gate 102d and stopped for wafer transfer. The robot 123-2 that has transferred the wafer from the scooping portion is pulled back through the gate 701a, and then returned to the original position (height) and waited. The scooping portion 12-1 of the robot 12 that has received the wafer is pulled back into the lock chamber 102a through the gate 102d. Thereafter, the gate 102d is closed, and the lock chamber 102a is evacuated to the same pressure as that in the processing chamber 102b. Thereafter, the gate 102c is opened, and the wafer is transferred from the lock chamber 102a to the processing chamber 102b where it is subjected to predetermined processing. The processed wafer is returned to the bay stocker unit 130 by the reverse operation to the above operation.
In FIG. 18, the other robot 123-1 of the linear transfer line 123 has the same configuration and action, and thus detailed description thereof is omitted.
In FIG. 18, for example, the robot 123-1 arranged on the left side has a processing device arranged on the left side and the center, and the robot 123-2 arranged on the right side is arranged on the right side and the center. You may control to handle the processed apparatus.

18 and 19, for example,
A. Even when wafer processing is different for each processing apparatus in the bay, by using a loop-shaped transfer line and a linear transfer line properly, the wafer transfer in the bay and the wafer transfer apparatus and each processing apparatus It is possible to prevent the wafer handling of the wafers from being rate-limited by different wafer processing, thereby suppressing a decrease in throughput.
B. For example, even when the processing contents of a wafer are different for each FOUP, by using a loop-shaped transfer line and a straight-line transfer line properly, the wafer transfer in the bay and the wafer transfer apparatus and each processing apparatus Even if the wafer handling is different for each FOUP, it is possible to prevent the wafer handling from being limited by this, thereby suppressing a decrease in throughput.
C. There is a danger that occurs when the wafer processing in the bay is the same. The wafer transfer between the transfer device and each processing device in the bay and the wafer transfer in the bay may be confused with the loop transfer line. This can be prevented by properly using the line-shaped transport line, and this can suppress a decrease in throughput in the bay.

D. Even when wafers with different processing times are mixed, by using a loop-shaped transfer line and a linear transfer line properly, it is possible to selectively use a wafer with a short processing time and a wafer with a long processing time. Can be suppressed.
E. In the case of high-mix low-volume production, when a wafer that requires an express train arrives, for example, by utilizing a linear transport line, the wafer transport process requiring an express train is performed independently of the wafer transport process that is normally processed. Since it can be performed, it is possible to prevent the processing of the wafer from taking time and to suppress a decrease in throughput.
F. Even if the wafer transfer line breaks down, either the loop transfer line or the straight transfer line can be used, so that it is possible to prevent the processing in the bay or the processing in another bay from stopping.
G. In this case, the single wafer conveyance line is composed of two conveyance lines, a loop conveyance line and a linear conveyance line, and the linear conveyance line can be additionally installed within the installation range of the loop conveyance line. Thus, an increase in footprint can be suppressed, and a decrease in throughput per footprint can be prevented.
Further, in this embodiment, since the straight conveyance line is used as compared with the above-described one embodiment, the configuration and structure of the single wafer conveyance line becomes simpler, and the additional cost can be reduced.
In addition, the same effects as those of the above-described one embodiment can be obtained.

20 and 21 show a third embodiment of the present invention. 20 and 21 are different from FIGS. 4, 6, 7, 14, etc. showing one embodiment of the present invention in that the single wafer transfer line is the same as the straight transfer line in this case. It is a point comprised by the shape-like conveyance line.
20 and FIG. 21, in this case, the transport lines 124 and 125 are in a vertical positional relationship, and the transport line 125 is set at the lower position and the transport line 124 is set at the upper position. Furthermore, in FIG. 20, such a single wafer transfer line 120b is installed between the interbay transfer lines 400a and 400b, and bay stocker sections 130a and 130b are provided at both ends corresponding to each. Yes.
20 and 21, the specific structure of such a single wafer transfer line 120b is substantially the same as FIGS. 6 and 7 showing the previous embodiment, and detailed description thereof is omitted. In FIG. 20, in this case, six processing apparatuses 101 to 106 are arranged on each side of the single wafer conveyance line on the both sides with respect to the conveyance direction.
Furthermore, the configuration of the interbay transport line, the configuration of the bay stocker unit, the connection structure between this and the single wafer transfer line, and the connection structure between the single wafer transfer line and each processing apparatus are, for example, those of the embodiment described above. The detailed description is omitted.

20 and 21, for example,
A. Even when wafer processing is different for each processing device in the bay, by using two linear transfer lines properly, wafer transfer in the bay and wafer handling between the wafer transfer device and each processing device can be performed. Therefore, it is possible to prevent the wafer from being rate-limited by different processing of the wafer, thereby suppressing a reduction in throughput.
B. Even when the wafer processing chamber is different for each FOUP, for example, by using two linear transfer lines properly, wafer transfer in the bay and wafer interaction between the wafer transfer apparatus and each processing apparatus However, even if the processing contents of the wafer are different for each FOUP, it is possible to prevent the rate from being limited by this, and it is possible to suppress a decrease in throughput in the bay.
C. There is a risk that the wafer processing in the bay may occur when the wafer processing is the same. It can be prevented by properly using it, and this can suppress a decrease in throughput in the bay.

D. Even when wafers with different processing times are mixed, by using two linear transfer lines, it is possible to selectively use a wafer with a short processing time and a wafer with a long processing time, thereby suppressing a decrease in throughput. .
E. In the case of high-mix low-volume production, when a wafer that requires an express train arrives, for example, by using one of the linear transport lines, the wafer transport process that requires an express train is processed normally. Therefore, it is possible to prevent the processing of the wafer from taking time and suppress a decrease in throughput.
F. Even if the wafer transfer line breaks down, either one of the linear transfer lines can be used, so that it is possible to prevent wafer transfer and processing in the bay and processing in other bays from being stopped.

Further, in this embodiment, compared to the above-described one embodiment, the second embodiment, the single wafer transfer line can be configured with two linear transfer lines in this case, so that the increase in footprint can be further suppressed. A decrease in throughput per footprint can be further prevented. Further, in this case, since the single wafer conveyance line can be constituted by two linear conveyance lines, the structure and structure of the single wafer conveyance line can be further simplified, and the cost can be reduced.
Furthermore, when a wafer is transferred from a bay to another adjacent bay across the interbay transfer line as shown in FIG. The wafer can be transferred to the bay. For this reason, the wafer transfer time can be shortened and the throughput can be improved.

22 to 25 show a fourth embodiment of the present invention.
22 to 25 are different from FIGS. 13 to 17 showing one embodiment of the present invention in that a lock chamber 107a of the processing apparatus 107 is arranged at a position below the single wafer transfer line 120. FIG.

FIGS. 22 and 23 show an example of a connection structure between the upper transfer line 122 of the single wafer transfer line 120 and the processing apparatus 107 and an example of wafer transfer. FIG. 24 and FIG. 25 show an example of a connection structure between the transfer line 126 below the single wafer transfer line 120 and the processing apparatus 107 and an example of wafer transfer.
22 and 23, the lock chamber 107 a of the processing apparatus 107 is disposed at a position below the space of the single wafer transfer line 120. The space of the single wafer transfer line and the lock chamber 107a are partitioned by a gate 107e. In this case, the center of the wafer holder 122a-2 and the wafer holder 122b and the center of the opening of the gate 107e are aligned at a vertical position. The size of the opening of the gate 107e is at least larger than the size of the wafer W, that is, the size through which the wafer W can pass. In this case, the linear rail 126a-1 of the conveyance line 126 is separated into two. This linear rail is disposed across the gate 107e. Note that the configuration of the transfer line 122 is the same as in the embodiment, and a description thereof is omitted. A wafer holder 107g is provided on the bottom wall of the lock chamber 107a. The upper surface of the wafer holder 107g is a wafer holding surface, and the wafer holding surface corresponds to the opening of the gate 107e. A transfer chamber 107f is connected to the lock chamber 107a through a gate 107c, and a processing chamber 107b is connected to the transfer chamber 107f through a gate 107d. A robot 107h is provided in the transfer chamber 107f.

  In FIG. 22, the wafer W is held by the wafer holder 122 b, and in this state, the wafer holder 122 a-2 is moved along the transfer line 122 toward the processing apparatus 107. When the wafer holding table 122a-2 arrives at a position corresponding to the processing apparatus 107 as shown in FIG. 22, the movement of the wafer holding table 122a-2 is stopped (FIG. 23A). Thereafter, clean gas, for example, nitrogen gas, is introduced into the lock chamber 107a, whereby the pressure in the lock chamber 107a is adjusted to the atmospheric pressure of the single wafer transfer line. Thereafter, the gate 107e is opened. Thereafter, the wafer push-up pins 107j stored in the wafer holder 107g of the lock chamber 107a are raised. The raising of the wafer push-up pins 107j continues until the tip reaches the back surface of the wafer W whose outer peripheral surface is held by the wafer holder 122b through the opening of the gate 107e (FIG. 23B). . Thereafter, the wafer W is transferred from the wafer holder 122b to the wafer push-up pins 107j by opening the wafer holder 122b in the radial direction. Thereafter, the wafer push-up pins 107j that have received the wafer W are lowered. This lowering is stopped when the wafer W is transferred to the wafer holder 107g. Thereafter, the gate 107e is closed (FIG. 23C). In this state, the lock chamber 107a is evacuated. When the same pressure as the transfer chamber 107f is reached, the gate 107c is opened. Thereafter, the push-up pins 107j are restarted, so that the wafer W is floated from the wafer holder 107g. Thereafter, the scoop portion of the robot 107h is fed into the lock chamber 107a through the opening of the gate 107c. When the scooping portion of the robot 107h that has been drawn into the lock chamber 107a reaches the back surface of the wafer W, the movement is stopped (FIG. 23 (d)). Thereafter, the wafer push-up pins 107j are lowered and stored in the wafer holding base 107g. Thereafter, the robot 107h that has received the wafer W in the scooping portion is pulled back into the transfer chamber 107f through the gate 107c. Thereafter, the gate 107c is closed (FIG. 23 (e)). The subsequent driving operation is the same as that of the embodiment, and the description thereof is omitted. The wafer processed in the processing chamber 107b is returned to the space of the processing chamber 107b to 107h, the transfer chamber 107h to the lock chamber 107a, and the lock chamber 107a to the single wafer transfer line by the reverse operation to the above operation. It is transferred to and held by the wafer holder 122b. Thereafter, the wafer is transferred to another processing apparatus or FOUP.

In FIGS. 24 and 25, a wafer holding table is movably provided on the linear rail 126a-1 disposed across the gate 107e. A wafer holder is provided on the wafer holder. In this case, the wafer holder has a scooping tool that scoops the outer periphery of the back surface of the wafer. Three scooping tools are arranged at intervals of 120 ° and can be opened and closed in the radial direction. In this case, the center of the wafer holder and wafer holder and the center of the opening of the gate 107e are aligned at a vertical position. Other structures are substantially the same as those in FIGS. 22 and 23, and a description thereof will be omitted. In FIG. 24, the wafer W is held by the wafer holder of the wafer holding table, and in this state, the wafer holding table is moved along the transfer line toward the processing apparatus 107. The movement of the wafer holding table is stopped when the wafer holding table arrives at a position corresponding to the processing apparatus 107 as shown in FIG. 24 (FIG. 25A). Thereafter, a clean gas such as nitrogen gas is introduced into the lock chamber 107a, whereby the inside of the lock chamber 107a is adjusted to the pressure in the space of the single wafer transfer line, which is approximately atmospheric pressure. Thereafter, the gate 107e is opened. Thereafter, the wafer push-up pins 107j stored in the wafer holder 107g of the lock chamber 107a are raised. The raising of the wafer push-up pins 107j is continued until it passes through the opening of the gate 107e and reaches the back surface of the wafer W whose outer peripheral surface is held by the wafer holder. Thereafter, by opening the wafer holder in the radial direction, the wafer W is transferred from the wafer holder to the wafer push-up pins 107j. (FIG. 25B) Thereafter, the wafer push-up pins 107j that have received the wafer W are lowered. Thereafter, the gate 107e is closed (FIG. 25C).
Subsequent wafer transfer / processing is substantially the same as that shown in FIGS.

In this embodiment, the following effects can be obtained in addition to the effects of the one embodiment.
1. Since the vacuum chamber lock chamber is located directly below the single wafer transfer line, the depth of the vacuum chamber can be reduced by this amount, and the footprint can be reduced accordingly, and the throughput per footprint can be reduced. Can be further improved.
2. Since the vertical movement can be omitted from the operation of the transfer robot in the vacuum transfer chamber of the vacuum processing apparatus, it is possible to reduce the price and the occurrence rate of failure.
In this embodiment, the example in which the lock chamber of the processing apparatus is disposed below the single wafer transfer line has been described. However, in addition to this, the lock chamber of the processing apparatus is disposed above the single wafer transfer line. Also good. Also in this case, the same effect as in the present embodiment can be obtained.

FIG. 26 shows a fifth embodiment of the present invention, and relates to a configuration for connecting the interbay transport line, the bay stocker portion, and the single wafer transport line.
The difference from FIG. 11 showing an embodiment of the present invention is as follows.
First, the major difference between the present embodiment and one embodiment is that the wafers are all transferred by the single wafer in the interbay transfer line 400c, the bay stocker unit 130c, and the single wafer transfer line 120d. In the point.
In FIG. 26, the interbay transfer line 400c is configured such that the wafer is transferred in a single wafer. For example, the interbay transfer line 400c includes a tunnel-like transfer chamber (not shown) that forms a clean gas atmosphere or a decompressed atmosphere space, and means (not shown) that is installed in the transfer chamber and holds and transfers wafers one by one. )have. This wafer transfer means has, for example, a linear moving body as previously described in one embodiment, and a wafer holder provided on the linear moving body. For example, the wafer is held by the wafer holder in an upward posture on the surface to be processed. A plurality of wafer holders are provided on the linear moving body so as to be movable in conjunction or independently.

  In FIG. 26, the transfer chamber and linear moving body of the inter-bay transfer line 400c are branched on the upstream side of the bay stocker unit 130c, and then moved to the transfer chamber and linear moving body of the inter-bay transfer line 400c on the downstream side. Each is joined and connected. In this case, the bay stocker side portion of the loop-shaped single wafer conveyance line 120d is connected to the branch conveyance line 130c-1 of the bay stocker portion 130c. The single wafer transfer line 120d includes a loop-shaped transfer chamber (not shown) and means (not shown) installed in the transfer chamber for holding and transferring wafers one by one. And conveying means installed in the. The loop-shaped transfer chamber is adjusted to a clean gas atmosphere or a reduced pressure atmosphere. The two sets of wafer transfer means in this case have a linear moving body as described above and a wafer holder provided on the linear moving body. In the lower wafer holder, the wafer is held, for example, in an upward horizontal posture on the surface to be processed. Further, in the upper wafer holder, the wafer is held in, for example, a processing surface upward horizontal posture or a processing surface downward horizontal posture. On the lower side, a plurality of wafer holders are provided on the lower linear moving body so as to be movable in conjunction or independently. In addition, a plurality of wafer holders are attached to the upper linear moving body so as to be able to move in conjunction or independently on the upper side.

In FIG. 26, the transfer chamber and the linear moving body of the single wafer transfer line 120d are connected to the transfer chamber and the linear moving body of the branch transfer line 130c-1 of the bay stocker unit 130c, respectively. The transfer chamber of the single wafer transfer line 120d and the transfer chamber of the branch transfer line 130c-1 of the bay stocker unit 130c are in communication with each other.
In FIG. 26, for example, the linear moving body of the upper transfer line of the single wafer transfer line 120d is connected to the linear moving body of the branch transfer line 130c-1 so that the wafer can be delivered. In this case, the wafer delivery between the branch transfer line 130c-1 and the single wafer transfer line 120d is performed using the transfer line at the upper position. Further, the wafer can be transferred between the transfer line at the upper position and the transfer line at the lower position. That is, in such a case, the wafer that has been transferred along the branch transfer line 130c-1 is transferred from the branch transfer line 130c-1 to the transfer line at the upper position. Thereafter, according to the processing information possessed by the wafer, the wafer is transferred as it is on the upper transfer line and transferred to a predetermined processing apparatus, or is transferred from the upper transfer line to the lower transfer line. Thereafter, the transfer line is transferred to a predetermined processing apparatus. After that, the wafer that has been subjected to the predetermined processing in the bay is transferred to the bay stocker unit 130c from the transfer line after being transferred through the transfer line at the upper position, or is transferred to the transfer line at the lower position. Later, the transfer line is transferred from the transfer line to the upper transfer line, and then transferred from the transfer line to the bay stocker unit 130c.
Note that such control of proper use of the transport line is performed, for example, in substantially the same manner as in the case of the above-described one embodiment, and the details thereof are omitted.

In FIG. 26, the conveyance line branched from the downstream side of the branch conveyance line 130c-1 in the bay stocker unit 130c is then joined and connected to the branch conveyance line on the upstream side of the branch conveyance line. The transfer line 130c-2 includes a tunnel-shaped transfer chamber (not shown) and the linear rail of the linear moving body described above installed in the transfer chamber. In this case, the transfer chamber is connected to the branch transfer chamber, and the linear rail is connected to the linear rail of the branch transfer line. The transfer chamber and the branch transfer chamber are in communication.
In this case, the transfer chamber has a stocker function and a buffer function for organizing the transfer.

In FIG. 26, among the wafers that have been transferred through the inter-bay transfer line 400c one by one, the wafer that is determined to require processing in the bay is diverted and transferred from the inter-bay transfer line 400c to the branch transfer line 130c-1. The The wafers transferred to the branch transfer line 130c-1 are arranged on the upper side or the lower side of the single wafer transfer line 120d depending on the processing contents and the like, and are transferred one by one on the transfer line. In this way, each wafer is transferred to a predetermined processing apparatus and subjected to predetermined processing. The processed wafers are transferred one by one through the transfer line of the single wafer transfer line 120d and transferred to the inter-bay transfer line 400c via the bay stocker unit 130c. Thereafter, the wafer is transferred to another bay or the like by an interbay transfer line 400c.
In FIG. 26, the wafer before processing or after processing is temporarily stored in the bay stocker unit 130c as necessary. In FIG. 26, two wafers can be temporarily stored, but this number can be determined as appropriate.

In the embodiment as described above, the effect of the above-described embodiment can be obtained, and further the following effect can be obtained.
1. Since the inter-bay transfer line and the single wafer transfer line are lines for transferring wafers one by one, the configuration and structure of the bay stocker unit connected to these lines can be greatly simplified and downsized as compared with the embodiment. For this reason, the construction cost of a conveyance line can be reduced compared with one Example. Moreover, since the footprint can be reduced, the throughput per footprint can be improved.
2. Since the transfer line between bays, the bay stocker section, and the single wafer transfer line are in a clean gas atmosphere or a reduced pressure atmosphere, the cleanliness of the clean room in which these are installed can be made more gradual. Costs such as expenses can be saved.

In the above embodiment, an example in which the wafers are transferred and processed one by one has been described. However, in addition to this, for example, in a space in which a clean gas atmosphere or a reduced pressure atmosphere is maintained, only one wafer can be accommodated. A wafer holder having a space may be used to transfer and process wafers one by one.
In this case, the transfer chamber described with reference to FIG. 16, that is, the transfer chamber between the bays, the bay stocker portion, and the single wafer transfer line in the bay is not particularly required. However, it is necessary to install a moving body for moving the wafer holder, for example, a linear moving body including a linear rail and a linear carriage. Furthermore, in this case, for example, a means for connecting the communication between the lock chamber and the wafer holder in each processing apparatus and blocking the communication is required.

  For example, a wafer holder that contains one wafer is placed on a linear carriage on a linear rail of a transfer line between the transfer line between bays, a bay stocker unit, or a transfer line in the bay, and placed in a predetermined processing apparatus. It is conveyed to. Thereafter, the inside of the wafer holder and the lock chamber are communicated, and the wafer in the wafer holder is carried into the lock chamber, and is then carried from the lock chamber into the processing chamber where it is subjected to predetermined processing. The processed wafer is carried out from the processing chamber to the lock chamber, and returned to the wafer holder to be accommodated. Thereafter, the communication between the wafer holder and the lock chamber is blocked, and the wafer holder is separated from the lock chamber. Thereafter, the wafer holder is transported toward, for example, another processing apparatus or a bay stocker unit. The wafer holder that has been transferred to the bay stocker is then transferred to another bay or the like by an interbay transfer line.

In the case of such an example, in addition to the effect of the embodiment described with reference to FIG. 26, the following effect can be obtained.
1. Since the interbay transfer line, the bay stocker unit, and the single wafer transfer line in the bay can all be opened, these configurations and structures can be further simplified, and their construction costs can be reduced.
2. The interbay transfer line, the bay stocker unit, and the single wafer transfer line in the bay can all be opened, and wafers are housed in wafer holders and transferred, so the cleanliness in these transfer chambers should be more gradual. It is possible to reduce costs such as equipment costs.
3. Since the interbay transfer line, the bay stocker section, and the single wafer transfer line in the bay can all be opened, that is, open in the clean room, maintenance and repair can be easily performed.

FIG. 27 shows a sixth embodiment of the present invention. 27 differs from FIG. 4 and FIG. 13 showing an embodiment of the present invention in the following manner.
In FIG. 27, the processing apparatus 108 arranged along the single wafer conveyance line 120 has the following configuration. In FIG. 27, in this case, a common vacuum transfer chamber 108c is provided, and a plurality of vacuum processing chambers, for example, single-wafer type vacuum processing chambers 108d in which wafers are processed one by one are provided. In FIG. 27, the shape of the vacuum transfer chamber 108c is, for example, a hexagon. There are four vacuum processing chambers 108d, in this case, corresponding to the respective sides, and are provided on the side walls of the vacuum transfer chamber 108c via the gates 108h. The vacuum transfer chamber 108c is provided with a wafer transfer robot, in this case, a double arm type robot 108i having two wafer scooping portions separately.

In FIG. 27, the processing apparatus 108 disposed on the left side, that is, on the inter-bay transfer line 400 side, corresponds to the remaining two side walls of the vacuum transfer chamber 108c, and the wafer holding chamber via gates 108g. Two rooms 108b are provided. Each wafer holding chamber 108b is provided with a lock chamber 108a via a gate 108f. A wafer transfer robot 108j is provided in each lock chamber 108a. In addition, each lock chamber 108a and single wafer transfer line 120 have a joint structure in which a wafer can be delivered via a gate 108e, in this case, one by one. The connection structure and the like are substantially the same as those in the above-described embodiment, and the description thereof is omitted.
In the processing apparatus 108 arranged on the left side in FIG. 27, the wafer transferred on one of the transfer lines of the single wafer transfer line 120 is received by the robot 108j in the lock chamber 108a through the opened gate 108e. (Gate 108e is closed) and temporarily held in wafer holding chamber 108b. In the wafer holding chamber 108b, depending on the processing contents of the wafer in the vacuum processing chamber 108d, cleaning processing, baking processing, heating, and the like of the wafer are performed. Thereafter, the wafer is transferred from the wafer holding chamber 108b to the vacuum transfer chamber 108c by the robot 108i in the vacuum transfer chamber 108c through the opened gate 108h, and from the vacuum transfer chamber 108c to one of the vacuum processing chambers 108d. It is processed. In this way, the wafer is processed in each vacuum processing chamber. The wafer that has been processed in the vacuum processing chamber 108d is transferred to the wafer holding chamber 108b by the robot 108i in the vacuum transfer chamber 108c through the opened gate 108h, and temporarily held therein (the gate 108h is closed). For example, when the wafer is heated, the wafer holding chamber 108b is used as a cooling chamber. Thereafter, the wafer is transferred from the wafer holding chamber 108b to the lock chamber 108a by the robot 108j through the opened gate 108f (the gate 108f is closed). Thereafter, the wafer is transferred from the lock chamber 108a to one of the transfer lines of the single wafer transfer line 120 through the gate 108e to be opened, and transferred to another place, for example, another processing apparatus or FOUP.

In such a configuration, since the wafer holding chamber is provided, it is possible to prevent contamination in the vacuum transfer chamber and each vacuum processing chamber as compared with the configuration of one embodiment of the present invention, and suppress a decrease in throughput due to contamination. can do.
Further, for example, the left lock chamber 108a is engaged with the lower transfer line 121 of the single wafer transfer line 120, for example, via the gate 108e, and the upper right side of the right lock chamber 108a and the single wafer transfer line 120 is used. It is also possible to engage with the position transfer line 122 via the gate 108e.
When configured in this way, the transfer processing line is divided into a transfer line 121 at the lower position, a lock chamber 108a on the left side, a wafer holding chamber 108b on the left side, a vacuum transfer chamber 108c, two vacuum processing chambers 108d on the left side, and an upper position. The transfer line 122 can be separated into two lines: a lock chamber 108a on the right side, a wafer holding chamber 108b on the right side, a vacuum transfer chamber 108c, and two vacuum processing chambers 108d on the right side. For this reason, different wafers can be processed in parallel on the two lines, and a margin for the wafer processing can be further ensured. Further, even if one of the two lines is stopped due to a failure or the like, the remaining lines can continue to carry and process the wafer, thereby suppressing a decrease in wafer productivity.

Further, in FIG. 27, in the processing apparatus 109 arranged at the center portion thereof, a lock chamber 109a is provided via a gate 109g corresponding to the remaining side wall portion of the vacuum transfer chamber 109c. A wafer transfer robot 109j is provided in each lock chamber 109a. In addition, each lock chamber 109a and single wafer transfer line 120 have a joint structure in which wafers can be delivered one by one through a gate 109e. Since this connection structure and other structures are the same as those of the processing device 108 on the left side, description thereof will be omitted.
In FIG. 27, in the processing apparatus 109 disposed in the center portion, the wafer transferred through one of the transfer lines of the single wafer transfer line 120 is received by the lock chamber 109a through the opened gate 109e. (Gate 109e is opened). Thereafter, the wafer is transferred from the lock chamber 109a to the vacuum transfer chamber 109c through the opened gate 109g, and from the vacuum transfer chamber 109c to one of the vacuum processing chambers 109d by the robot 109j in the vacuum transfer chamber 109c. . In this way, wafer processing is performed in each vacuum processing chamber 109d. The wafer which has been processed in the vacuum processing chamber 109d is transferred from the vacuum transfer chamber 109c to the lock chamber 109a through the gate 109g opened by the robot 109i in the vacuum transfer chamber 109c (gate closed). Thereafter, the wafer passes through the opened gate 109e and is transferred from the lock chamber 109a to one of the transfer lines of the single wafer transfer line 120 by the robot 109j, and is transferred to another place, for example, another processing apparatus or FOUP. It is conveyed to.
In such a configuration, since the wafer holding chamber 108b is not provided as compared with the example arranged on the left side portion described above, the depth dimension of the processing apparatus can be reduced accordingly, and the footprint can be reduced. Therefore, in such a configuration, the throughput per footprint can be improved as compared with the example arranged on the left side. Such an effect is substantially the same as that in the embodiment of the present invention.

  In FIG. 27, in the processing apparatus 110 disposed on the side farthest from the inter-bay transfer line 400, that is, on the right side thereof, each lock chamber 110b is provided with a wafer transfer chamber 110a via a gate 110f. Yes. Each wafer transfer chamber 110a is provided with a wafer transfer robot 110j. In this case, the wafer transfer chamber 110a does not have a lock function and is always in communication with the space of the single wafer transfer line 120.

  In the processing apparatus 110 arranged on the right side in FIG. 27, the wafer transferred on one of the transfer lines of the single wafer transfer line 120 is received by the robot 110j in the wafer transfer chamber 110a and opened. It is carried into the lock chamber 110b through 110f (the gate 110f is closed). Thereafter, the wafer in the lock chamber 110b is transferred to the vacuum transfer chamber 110c by the robot 110i in the vacuum transfer chamber 110c through the opened gate 110g, and further transferred from the vacuum transfer chamber 110c to one of the vacuum processing chambers 110d. To be processed. The wafer that has been processed in the vacuum processing chamber 110d is transferred from the vacuum transfer chamber 110c to the lock chamber 110b by the robot 110i in the vacuum transfer chamber 110d through the opened gate 110h (gate closed 110g). Thereafter, this wafer is transferred from the lock chamber 110b to one of the transfer lines of the single wafer transfer line 120 by the robot 110j of the wafer transfer chamber 110a and transferred to another place, for example, another processing apparatus or FOUP. .

  In such a configuration, since the wafer transfer chamber 110a has a function as an interface between the single wafer transfer line 120 and each processing apparatus, installation work of each processing apparatus in the bay is facilitated. For example, each processing device is manufactured in a range that includes the lock chamber by the manufacturer of each processing device, resulting in dimensional deviations and errors in the connection with the single wafer transfer line in the bay, making installation extremely difficult It will be something. However, this problem can be solved by providing those interface units as in this embodiment. In addition, since the lock chamber is provided in such a configuration, contamination in the vacuum transfer chamber and each vacuum processing chamber can be prevented and the decrease in throughput due to contamination can be suppressed as compared with the configuration of the embodiment of the present invention. Can do. Further, for example, the left wafer transfer chamber is in contact with the transfer line at the lower position of the single wafer transfer line, and the right wafer transfer chamber is in contact with the transfer line at the upper position of the single wafer transfer line. You can also.

When configured in this manner, the transfer processing line is divided into a transfer line 121 at the lower position, a wafer transfer chamber 110a on the left side, a lock chamber 110b on the left side, a vacuum transfer chamber 110c on the left side, two vacuum processing chambers 110d on the left side, and an upper position. The transfer line 122 can be separated into two lines: a wafer transfer chamber 110a on the right side, a lock chamber 110b on the right side, a vacuum transfer chamber 110c on the right side, and two vacuum processing chambers 110c on the right side. For this reason, the effect similar to the effect in the case of the example arrange | positioned at the left side part can be obtained.
In such a configuration, it is not necessary to provide a decompression means in the wafer transfer chamber. If the space atmosphere of the single wafer transfer line is a clean gas atmosphere, a means for supplying the clean gas into the wafer transfer chamber communicating therewith. Should be provided. In addition, when the space of the single wafer transfer line is an open space, an open structure may be used similarly to this.

The seventh embodiment of the present invention has been described with reference to FIG. 27. However, in FIG. 27, the description of the same configuration, operation, etc. as those of FIG. 4, FIG. .
Furthermore, the following modifications and improvements can be made to the embodiment shown in FIG.
A. In FIG. 27, an example of a processing apparatus in which a plurality of single-wafer processing vacuum processing chambers are provided in a common vacuum transfer chamber has been described, but the present invention is not particularly limited thereto. For example, the present invention can be implemented even when the vacuum processing chamber processes a plurality of wafers at the same time, that is, only the batch processing chamber or a combination of such a batch processing chamber and a single wafer processing chamber. In particular, no problem occurs.
B. Even if the bay is constituted by a combination of a single-wafer multi-type processing device, a batch processing device, a (batch processing + single-wafer processing) device, a single processing device having one vacuum processing chamber, or the like, the present invention There is no particular problem in carrying out.
C. The bay may be configured by a combination of such a vacuum processing apparatus and other processing apparatuses, for example, a processing apparatus that processes a wafer under normal pressure, or a processing apparatus that processes a wafer under pressure. In implementing the present invention, no particular problem occurs.

For example, lithography, a plasma CVD apparatus, a sputtering apparatus, a plasma etching apparatus, an inspection / evaluation apparatus, a CMP (Chemical Mechanical Polisher), a vacuum deposition apparatus, a plating apparatus, and the like are employed for the bay configuration.
Needless to say, as such a processing apparatus, a processing apparatus necessary for processing a wafer in the bay is practically selected and arranged.

FIG. 28 shows a seventh embodiment of the present invention. FIG. 28 is a cross-sectional view of the sheet crossing the sheet conveyance line section.
In FIG. 28, a lock chamber and a processing chamber are sequentially connected to the left transfer chamber 703 via a gate in the left direction. In FIG. 28, a lock chamber and a processing chamber are sequentially connected to the right transfer chamber 703 via a gate in the right direction. In FIG. 28, in this case, the bottom wall surfaces of the transfer chamber 703, for example, the lock chamber 102a and the processing chamber 102c, have substantially the same height. In this case, the height H ₁ from the foundation (floor) surface. On the other hand, in FIG. 28, in this case, the top wall surfaces of the transfer chamber 703, for example, the lock chamber 105a ′ and the processing chamber 105b ′ are substantially the same height. In this case, the height H ₂ from the foundation (floor) surface. Accordingly, the height _{H 3} of the transfer chamber 703 in FIG. 28 _is a H 2 -H _1.

In such a transfer chamber 703 in FIG. 28, for example, a non-contact moving body linear rail 121a-1 of the lower transfer line 121 is provided on the bottom wall surface of the upper transfer line 122. For example, the non-contact moving body linear rail 122a-2 is provided on the top wall portion. Here, the configuration and structure of each of the transfer lines 121 and 122 are substantially the same as in the previous embodiment, and detailed description thereof is omitted. Each transfer chamber 703 has a clean gas atmosphere as in the previous embodiment.
In FIG. 28, transfer robots 12 and 15 ′ having wafer scooping portions 12-1 and 15-1 ′ similar to those of the embodiment are provided in the left and right lock chambers 102a and 105a ′. . In general, processing apparatuses including the lock chambers 102a and 105a ′ are separately manufactured by an apparatus manufacturer, and are carried into and installed in a bay of a semiconductor factory, for example. Here, for example, when the height of the lock chamber is unified to substantially the same height regardless of each device, there is no particular problem. However, in many cases, the height of the lock chamber is different in each device.

In the embodiment shown in FIG. 28, such a point is taken into consideration, and even if the height of the lock chamber is different for each apparatus as described above by using the single wafer transfer line as the interface unit, it depends on this. The problem can be solved and the bay can be constructed smoothly.
In FIG. 28, for example, the lower transfer line 121 has been transferred in the transfer chamber 703 on the left side, or the transfer of the transferred wafer to the robot 12 in the lock chamber 102a is the same as in the previous embodiment. Done as if. On the other hand, the transfer of the wafer transferred on the upper transfer line 122 to the robot 12 in the lock chamber 102a is performed as follows. First, the wafer holder 122b is lowered while holding the wafer. This lowering is stopped at a height (position) at which the wafer can be delivered between the robots 12 in the lock chamber 102a. Thereafter, the gate 102d is opened, and the wafer scoop portion 12-1 of the robot 12 in the lock chamber 102a is fed toward the wafer holder 122b. As a result, the wafer of the wafer holder 122b is fed to the scoop portion 12- of the robot 12. 1 scooped. Thereafter, the wafer is subjected to predetermined processing in the processing chamber 102b, as in the previous embodiment. During this time, the wafer holder 122b that has transferred the wafer is returned to its original height and is kept in a standby state so as not to hinder the transfer of the wafer on the lower transfer line 121. The wafer that has been processed in the processing chamber 102b is returned from the processing chamber 102b to the lock chamber 102a. Further, the wafer holder 122b that has been waiting is lowered and stopped at a predetermined height (position). Thereafter, the pressure in the lock chamber 102a is leaked and the gate 102d is opened. In this state, the processed wafer in the lock chamber 102a is transferred from the lock chamber 102a into the transfer chamber 703 by feeding out the robot 12, and is transferred again to the wafer holder 122b. Thereafter, the wafer is held by the wafer holder 122b and is transferred to, for example, a position corresponding to the right lock chamber 105a ′ in the transfer chamber. This wafer is transferred from the wafer holder 122b to the wafer scooping portion 15-1 ′ of the robot 15 ′ in the lock chamber 105a ′. Thereafter, the wafer is subjected to predetermined processing in the processing chamber 105b ′ as in the previous embodiment. The wafer that has been processed in the processing chamber 105b ′ is returned from the processing chamber 105b ′ to the lock chamber 105a ′. Thereafter, pressure is leaked in the lock chamber 105a ′, and the gate is opened. In this state, the processed wafer in the lock chamber 105a ′ is transferred from the lock chamber 105a ′ into the transfer chamber 703 by feeding the robot 15 ′, and is again transferred to the wafer holder 122b. Thereafter, the wafer is transferred in the transfer chamber 703 for processing by another processing apparatus, for example, or returned to the FOUP of the bay stocker unit.

  In FIG. 28, the transfer of the wafer, which has been further transferred on the lower transfer line 121, to the robot 12 in the lock chamber 122a is performed as follows. First, the wafer holding table 121b for holding the wafer is transferred on the lower transfer line 121, and this transfer is stopped when it reaches a position corresponding to the lock chamber 102a of the predetermined processing apparatus 102. Thereafter, the gate 102d is opened, and the wafer scooping part 12-1 of the robot 12 in the lock chamber 102a is fed out toward the wafer holding base 121b. 1 scooped. Thereafter, this wafer is subjected to predetermined processing in the processing chamber 102b as in the previous embodiment. During this time, for example, the wafer holding table 121b that has transferred the wafer is moved forward in the transfer chamber 703 so as not to hinder the transfer of the next wafer. The wafer that has been processed in the processing chamber 102b is returned from the processing chamber 102b to the lock chamber 102a. On the other hand, a wafer holding table 121b for receiving a wafer is moved to a position corresponding to the lock chamber 102a. Thereafter, the pressure in the lock chamber 102a is leaked and the gate 102d is opened. In this state, the processed wafer in the lock chamber 102a is transferred from the lock chamber 102a into the transfer chamber 703 by being fed out of the robot 12, and then transferred to the wafer holding table 121b. Thereafter, the wafer is held on the wafer holding table 121b and is transferred to the position corresponding to the right lock chamber 105a 'in the transfer chamber 703, for example. Thereafter, the wafer is raised in the transfer chamber 703 toward the top wall portion by a push-up pin as in the case of the embodiment. This rise is stopped when a predetermined height is reached. Thereafter, the gate 105d ′ is opened, and the wafer scoop portion 15-1 ′ of the robot 15 ′ in the lock chamber 105a ′ is fed out toward the wafer holding base 121b. As a result, the wafer on the wafer holding base 121b is transferred to the robot 15 It is scooped to 'no scoop part 15-1'. Thereafter, the wafer is subjected to predetermined processing in the processing chamber 105b 'as in the previous embodiment. During this time, for example, the wafer holding table 121b that has passed the wafer is advanced further forward in the transfer chamber 703 so as not to hinder the transfer of the next wafer. The wafer that has been processed in the processing chamber 105b 'is returned from the processing chamber 105b' to the lock chamber 105a '. On the other hand, a wafer holder 121b for receiving a wafer is moved to a position corresponding to the lock chamber 105a '. Thereafter, pressure is leaked in the lock chamber 105a ', and the gate is opened. In this state, the processed wafer in the lock chamber 105a 'is transferred from the lock chamber 105a' into the transfer chamber 703 by being fed out of the robot 15 ', and then transferred to the wafer holding table 121b. Thereafter, the wafer is transferred in the transfer chamber 703 for processing by another processing apparatus, for example, or returned to the FOUP of the bay stocker unit.

In such an embodiment, the same effect as in the above-described one embodiment can be obtained, and the following effect can be further obtained.
1. For example, even if the heights of the lock chambers of each processing apparatus installed in the bay are different, the bay can be constructed smoothly by using such a single wafer transfer line as an interface unit. . This can shorten the bay construction process and reduce the construction cost of the bay. In addition, the bay start-up time can be shortened, and the throughput can be improved.
In this embodiment, in the lock chamber of the processing apparatus, the height of the bottom wall of the transfer chamber is adjusted to the lock chamber having a low height, and the top of the transfer chamber is set to the lock chamber having a high height in the lock chamber of the processing apparatus. Although it is configured to match the height of the wall, this is not particularly limited to the present embodiment. That is, any structure may be used as long as the single wafer conveyance line is configured to have an interface unit corresponding to the height of each processing apparatus.

  29 and 30 show an eighth embodiment of the present invention. FIGS. 29 and 30 are the embodiments shown and described in particular in FIGS. 22 and 23, that is, another embodiment of the configuration in which the lock chamber 704 of the processing apparatus is disposed below the space of the single wafer transfer line 120. An example is given.

29 and 30 differ from FIGS. 22 and 23 showing the previous embodiment in the following points.
This difference is clearly illustrated in particular by FIG. In FIG. 29, the single-wafer transfer line 120, in this case, the lock chamber 704 disposed below the lower transfer line 126 is not only one processing apparatus, but also a plurality of processing apparatuses (101, 102). The two processing devices are configured in common. In the lock chamber 704, a wafer transfer means is provided. In this case, a non-contact moving body, in this case, a moving body 127a composed of a linear rail 127a-1 and a linear carriage 127a-2 is used as the conveying means. A linear rail 127 a-1 is provided on the bottom wall portion of the lock chamber 704. The linear rail 127 a-1 is provided in the direction in which the processing devices are arranged in the longitudinal direction of the lock chamber 704. At least one linear carriage 127a-2 is movably provided on the linear rail 127a-1. The wafer holding table 127b of the linear carriage 127a-2 is made to correspond to the opening of the gate 101d provided between the lock chamber 704 and the transfer chamber 101a. In this case, the gate 107e is provided corresponding to only one processing apparatus, in this case, one processing apparatus on the left side. 29 and 30, the same configurations and structures as those in FIGS. 22 and 23 showing the previous embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  In FIG. 29 and FIG. 30, for example, the wafer transferred on the lower transfer line 126 of the single wafer transfer line 120 is transferred into the lock chamber 704. The wafer carried into the lock chamber 704 is transferred to the wafer holder 127b. The wafer holding table 127b that has received the wafer is moved in the lock chamber 704 toward the transfer chamber 102a of the processing apparatus 102 arranged on the right side, for example. The movement of the wafer holding table 127b is stopped when the wafer holding table 127b arrives at a position corresponding to the gate 102d of the processing apparatus 102 arranged on the right side. Thereafter, the gate 102d is opened, and the wafers on the wafer holding table 127b are transferred to the transfer chamber 102a and the processing chamber 102b for predetermined processing. The processed wafer is transferred to the processing chamber 102b → the transfer chamber 102a → the lock chamber 704 and the lower transfer line 126 by the reverse operation to the previous operation, and is transferred to the wafer holder 126b. The wafer holder 126b that has received the processed wafer is transported along the lower transport line 126 toward another processing apparatus, a bay stocker unit, or the like.

  In FIG. 29 and FIG. 30, for example, the next wafer transferred by the lower transfer line 126 of the single wafer transfer line 120 is transferred into the lock chamber 704. The wafer carried into the lock chamber 704 is transferred to the wafer holder 127b. In this case, the wafer holder 127b that has received the wafer cannot be moved. That is, in this case, the wafer needs to be processed by the processing apparatus 101 on the left side, and the wafer holding table 127b is stopped at a position corresponding to the gate 101d. Thereafter, the gate 101d is opened, and the wafer on the wafer holding table 127b is transferred to the transfer chamber 101a and then to the processing chamber 101b for predetermined processing. The processed wafer is transferred to the processing chamber 101b → the transfer chamber 101a → the lock chamber 704 and the lower transfer line 126 by the reverse operation to the previous operation, and is transferred to the wafer holder 126b. The wafer holding table 126b that has received the processed wafer is transported on the lower transport line 126 toward another processing apparatus or a bay stocker unit.

29 and 30, compared with the embodiments of FIGS. 22 and 23, each gate can be simplified by reducing the number of gates and the like with the single wafer transfer line for each processing apparatus. it can.
In addition, although the case where the lower conveyance line is used in the single wafer conveyance line in FIGS. 29 and 30 has been described, the same applies to the case where the upper conveyance line is used and the upper and lower conveyance lines are used. Can be operated without any problem.
The following use is also effective in FIGS. 29 and 30. FIG.
A. The wafer is transferred in the processing apparatus through the lock chamber. For example, a wafer that has been subjected to predetermined processing by the left processing apparatus is transferred into the lock chamber and transferred to the processing chamber of the right processing apparatus, where the next predetermined processing is performed. This reverse operation can also be performed.

31 and 32 show a ninth embodiment of the present invention. FIGS. 31 and 32 show another embodiment in which the embodiment shown and described in FIGS. 22 and 23, that is, a configuration in which the lock chamber of the processing apparatus is arranged below the space of the single wafer transfer line. Is.
31 and 32 are different from FIGS. 22 and 23 showing the previous embodiment in that transfer chambers 101a and 102a of the processing apparatus are connected via a gate 800. FIG. In addition, the same components as those in FIGS. 22 and 23 are denoted by the same reference numerals, and description thereof is omitted.
In FIG. 31 and FIG.
A. As indicated by an arrow 610, the wafer is transferred and processed independently for each processing apparatus.
B. As indicated by an arrow 611, the wafer can be transferred and processed to one transfer chamber and the processing chamber via the lock chamber and transfer chamber of another apparatus. In such a case, when a wafer is transferred to a predetermined processing apparatus or a processed wafer is taken out to the single wafer transfer line 120, adverse effects due to the convenience of the transfer line can be suppressed to a small extent. For example, if the linear carriage of the transfer line holds the wafer and stops at a place corresponding to the lock chamber 706 of the right processing apparatus 102 for some reason, the left transfer chamber 101a and the lock chamber 705 should be used. Thus, the processed wafer from the processing chamber 102b of the right processing apparatus 102 can be smoothly transferred to the single wafer transfer line 120. Further, for example, when it is necessary to transfer the wafer transferred on the transfer line to the processing chamber 102b of the right processing apparatus 102 in the same state, the left lock chamber 706 and the transfer chamber 101a are used. The wafer can be transferred to the processing chamber 102b of the processing apparatus 102 on the right side.
C. Furthermore, in the case where three processing apparatuses are arranged side by side, for example, when the linear carriage stops for some reason at a position corresponding to the lock chamber of the central processing apparatus, the left lock chamber → the left transfer Wafers can be transferred while skipping the stopped linear carriage such as: chamber → central transfer chamber → right transfer chamber → right lock chamber → linear carriage wafer holding table.

D. Further, a wafer processed by one processing apparatus can be transferred to the transfer chamber → gate → the other transfer chamber → the other process chamber, and the same wafer can be processed continuously.
E. In addition, A. D. Wafer parallel transfer processing, Such a series transfer process of wafers may be configured to be performed independently or may be configured to be performed together.

In the above-described embodiment, a linear rail and a linear carriage are used in order to suppress the generation of particles that affect the throughput of the moving body using a moving body and a wafer holding table (tool) as a transfer line. Although the linear moving body which consists of is used, it is not limited to this in particular. For example, a moving body comprising a guide tape and a means for detecting and moving the guide tape may be used.
Moreover, although the atmosphere of the conveyance space of the single wafer conveyance line has been described as a clean gas, for example, nitrogen gas atmosphere in the above embodiments, this is not a necessary requirement for the purpose and purpose of the present invention. For example, the atmosphere of the transfer space may be a reduced pressure atmosphere. In such a case, the connection structure in the bay stocker portion is somewhat complicated. For example, it is necessary to connect the FOUP and the transfer space with a lock chamber. On the other hand, the connection structure between the transfer space and each processing apparatus is such that when these processing apparatuses are vacuum processing apparatuses (for example, a plasma etching apparatus, a plasma CVD apparatus, a sputtering apparatus, etc.), a lock chamber or the like is unnecessary. The structure can be further simplified. However, if there is a processing apparatus (for example, lithography, CMP, inspection / evaluation apparatus, etc.) in an air atmosphere among these processing apparatuses, conversely, means for connecting a lock chamber or the like is necessary. Furthermore, it is necessary to install a decompression exhaust device or the like for making the transfer space into a decompressed atmosphere, and the operation cost of these facilities is necessary.

  For example, the atmosphere of the transfer space may be, for example, the same atmosphere as in a clean room, that is, an atmosphere that does not have a special response. In such a case, it is necessary to connect the FOUP and the transfer space with a lock chamber for adjusting the atmosphere of each other. However, the connection structure between the transfer space and each processing apparatus can be made the same as in the above embodiment. Further, in the case of such a transfer space, it is not necessary to install a clean gas supply means, a low pressure exhaust means, and the like.

In the above, various examples of the atmosphere in the transfer space of the single wafer transfer line have been described. However, when the processing apparatus is a vacuum processing apparatus, a processing apparatus in an air atmosphere, etc., during transfer to these apparatuses, In order to prevent the adhesion of particles and the decrease in yield due to this, it is preferable to control the atmosphere of the transfer space to a clean gas atmosphere or a reduced pressure atmosphere. However, as described above, this is not the case when a wafer is transferred using a FOUP that can accommodate only one wafer.
In the above embodiment, an example in which AGV is used for the interbay transport line has been described, but other transport means such as OHT (Over Head Transfer) may be used.

The top view of the wafer single wafer production system which shows a 2nd prior art. The top view of the processing line of the to-be-processed substrate after the exposure which shows 3rd prior art. The top view of the TFT array formation line which shows a 4th prior art. The top view which shows partially one Example of the semiconductor manufacturing line by this invention. The perspective external view of the part on the opposite side to the bay stocker of the single wafer conveyance line of one Example of FIG. II sectional drawing of FIG. FIG. 6 is a detailed vertical sectional view of FIG. 5. The partial top view of the conveyance line of the lower position of the single wafer conveyance line of one Example of this invention of FIG. The fragmentary top view of the conveyance line of the upper position of the single wafer conveyance line of one Example of this invention of FIG. The top view for demonstrating the wafer holder of the wafer holding part of FIG. 9, and its effect | action. FIG. 5 is a partial plan view illustrating a connection between an inter-bay transfer line and a single-wafer transfer line in the bay, illustrating the single-sheet transfer line according to the embodiment of the present invention in FIG. 4. The front view of FIG. The partial top view which shows the example of a connection with the single wafer conveyance line of one Example of this invention of FIG. 4, and a vacuum processing apparatus. The longitudinal cross-sectional view which shows the connection structure of the conveyance line and vacuum processing apparatus of the upper position of FIG. The longitudinal cross-sectional view which showed typically the conveyance condition of the wafer of FIG. FIG. 14 is a partial plan view showing an example of a connection between a conveyance line at a lower position in FIG. FIG. 17 is a longitudinal sectional view schematically showing the state of conveyance of the wafer in FIG. 16. The top view which shows partially the 2nd Example of the semiconductor manufacturing line by this invention. The longitudinal cross-sectional view of the principal part of FIG. The top view which shows partially the 3rd Example of the semiconductor manufacturing line by this invention. The longitudinal cross-sectional view of the principal part of FIG. The longitudinal cross-sectional view which shows the 4th Example of the semiconductor manufacturing line by this invention, and shows 2nd Example of the connection structure of the conveyance line and vacuum processing apparatus of an upper position. The longitudinal cross-sectional view which showed typically the conveyance condition of the wafer of FIG. The longitudinal cross-sectional view which shows the 4th Example of the semiconductor manufacturing line by this invention, and shows the 2nd Example of the connection structure of the conveyance line of a lower side position with a vacuum conveyance apparatus. The longitudinal cross-sectional view which showed typically the conveyance condition of the wafer of FIG. The partial top view which shows the 5th Example of the semiconductor manufacturing line by this invention, and shows the connection with the conveyance line between bays, and the single wafer conveyance line in a bay. The top view of the bay part which shows the 6th Example of the semiconductor manufacturing line by this invention, and shows the connection with the sheet | seat conveyance line in a bay, and each processing apparatus. Sectional drawing which shows the 7th Example of the semiconductor manufacturing line by this invention, and crossed the single wafer conveyance line part. The partial top view which shows the 8th Example of the semiconductor manufacturing line by this invention, and shows another Example of a contact with a single wafer conveyance line and each processing apparatus. The longitudinal cross-sectional view of the principal part of FIG. The partial top view which shows the 9th Example of the semiconductor manufacturing line by this invention, and shows another Example of the connection with a single wafer conveyance line and each processing apparatus. The longitudinal cross-sectional view of the principal part of FIG.

Explanation of symbols

100, 200, 300 ... Bay, 101-111 ... Processing device, 107a, 704-706 ... Lock chamber, 120, 120a, 102b ... Single wafer transfer line, 121-126 ... Transfer line, 130, 130a ˜130c, 230, 330... Bay stocker, 400, 400a to 400c .. Bay-to-bay transfer line, 410... AGV, 500a to 500d. , 800 ... Gate, 900 to 902 ... Failure detection device

Claims (6)

A processing apparatus that performs predetermined processing of a semiconductor wafer; and a single wafer transfer line that transfers the semiconductor wafer in a single wafer; and a plurality of the processing apparatuses are arranged side by side, along the plurality of processing apparatuses arranged in parallel A bay of a semiconductor wafer production line in which a single wafer transfer line is arranged,
The single wafer transfer line has a substantially horizontal semiconductor wafer transfer surface, a transfer line for transferring the semiconductor wafer in a single wafer, and a semiconductor wafer transfer surface facing the semiconductor wafer transfer surface of the transfer line in the vertical direction. Consists of other transfer lines that transfer the semiconductor wafer one by one,
Within the single wafer transfer line, a control system for controlling the use of the transfer line and the other transfer line by processing information of the semiconductor wafer,
A bay of a semiconductor production line, comprising: the transfer line; the other transfer line; and a transfer device that transfers and transfers the semiconductor wafer in a single sheet between the processing device. A processing apparatus that performs predetermined processing of a semiconductor wafer; and a single wafer transfer line that transfers the semiconductor wafer in a single wafer; and a plurality of the processing apparatuses are arranged side by side, A semiconductor production line comprising a plurality of bays each having a single wafer transfer line,
An inter-bay transfer device for transferring the semiconductor wafer between the bays;
A semiconductor wafer transfer surface having a substantially horizontal semiconductor wafer transfer surface and a semiconductor wafer transfer surface facing the semiconductor wafer transfer surface of the transfer line in a vertical direction. The single-wafer transport line configured with other transport lines,
Among the single wafer transfer lines, a control system for controlling the proper use of the transfer line and the other transfer line by processing information of the semiconductor wafer transferred to the bay by the inter-bay transfer device;
A transfer apparatus for transferring and transferring the semiconductor wafer in a single wafer between the transfer line, the other transfer line, and the processing apparatus;
A semiconductor production line equipped with. A processing apparatus that performs predetermined processing of a semiconductor wafer; and a single wafer transfer line that transfers the semiconductor wafer in a single wafer; and a plurality of the processing apparatuses are arranged side by side, A semiconductor production line comprising a plurality of bays each having a single wafer transfer line,
An inter-bay transfer device for transferring the semiconductor wafer between the bays;
A semiconductor wafer transfer surface having a substantially horizontal semiconductor wafer transfer surface and a semiconductor wafer transfer surface facing the semiconductor wafer transfer surface of the transfer line in a vertical direction. The single-wafer transport line configured with other transport lines,
A bay stocker unit that delivers and conveys the substrate between the inter-bay conveyance device and the single wafer conveyance line;
Among the single wafer transfer line, the control system for controlling the use of the transfer line and the other transfer line by processing information of the semiconductor wafer transferred from the inter-bay transfer device to the bay stocker unit,
A transfer apparatus for transferring and transferring the semiconductor wafer in a single wafer between the transfer line, the other transfer line, and the processing apparatus;
A semiconductor production line equipped with. A processing apparatus that performs predetermined processing of a semiconductor wafer; and a single wafer transfer line that transfers the semiconductor wafer in a single wafer; and a plurality of the processing apparatuses are arranged side by side, A semiconductor production line having a bay in which a single wafer transfer line is disposed,
The single wafer transfer line constituted by a transfer line for transferring the semiconductor wafer in a single sheet, and another transfer line for transferring the semiconductor wafer in a single wafer to be transferred in parallel with the transfer line;
Among the single wafer transfer lines, a control system for controlling the proper use of the transfer line and the other transfer line by processing information of the semiconductor wafer transferred to the bay,
A transfer apparatus for transferring and transferring the semiconductor wafer in a single wafer between the transfer line, the other transfer line, and the processing apparatus;
A semiconductor production line equipped with. A processing apparatus that performs a predetermined process on the liquid crystal substrate; and a single-wafer transfer line that transfers the liquid crystal substrate in a single sheet, and a plurality of the processing apparatuses are arranged side by side, A bay of a liquid crystal production line in which a single wafer transfer line is arranged,
The single-wafer transport line is composed of a transport line that transports the liquid crystal substrate one by one, and another transport line that transports the liquid crystal substrate that is provided so as to be transportable in parallel with the transport line,
Within the single wafer transfer line, a control system for controlling the proper use of the transfer line and the other transfer line with the processing information of the liquid crystal substrate,
A bay of a liquid crystal production line, comprising: the transfer line, the other transfer line, and a transfer device that transfers and transfers the liquid crystal substrate in a single sheet between the processing device. A processing apparatus that performs a predetermined process on the liquid crystal substrate; and a single-wafer transfer line that transfers the liquid crystal substrate in a single sheet, and a plurality of the processing apparatuses are arranged side by side, In a liquid crystal production line with multiple bays with single-wafer transport lines,
An interbay transport device for transporting the liquid crystal substrate between the bays;
A bay stocker section for delivering and transporting the liquid crystal substrate between the inter-bay transport device and the single wafer transport line;
The single-wafer transport line configured by a transport line that transports the liquid crystal substrate as a single sheet, and another transport line that transports the liquid crystal substrate that can be transported in parallel with the transport line,
Among the single wafer transfer line, the control system for controlling the proper use of the transfer line and the other transfer line by the processing information of the liquid crystal substrate transferred from the inter-bay transfer device to the bay stocker unit,
A transfer device for transferring and transferring the liquid crystal substrate in a single sheet between the transfer line, the other transfer line, and the processing device;
LCD production line equipped with.

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