JP2005191222A - Current detecting circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent breakdown of an output MOS transistor by providing a current detecting circuit for generating a control signal to a protection circuit through detection of a current flowing into an output MOS transistor with higher accuracy. <P>SOLUTION: The current detecting circuit is formed of a p-type output MOS transistor M1 as an element to be protected, a clamping circuit 1 for clamping a gate-source voltage of the output MOS transistor M1, a detecting circuit 2 for detecting operation of the clamping circuit 1, and a comparator circuit 3 for comparing the reference potential Vref and potential of output signal Out. The detecting circuit 2 detects operation of the clamping circuit 1 to enable operation of the comparator circuit 3 and generate the control signal to the protection circuit. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a current detection circuit using characteristics of a MOS transistor.

  The current detection circuit detects a drain current of the output MOS transistor and outputs a control signal to a protection circuit for protecting the output MOS transistor.

  FIG. 7 is a circuit diagram of a conventional current detection circuit. As shown in FIG. 7, the current flowing through the output MOS transistor A is mirrored by the MOS transistor B, and the mirrored current is passed through, for example, the resistor R to generate a voltage. Based on this voltage, the current of the output MOS transistor A is Detect and limit current.

In the current detection circuit of FIG. 7, when the operating current of the output MOS transistor A does not exceed an arbitrary current value, the voltage generated in the resistor R is small, so that the output of the comparator is low. On the other hand, when an arbitrary current value is exceeded, the voltage generated in the resistor R increases, so that the output of the comparator becomes Hi.
US Patent 5,004,974

  However, for example, if the error of the current mirror due to the variation in the pair of the output MOS transistor A and the MOS transistor B is ± 20% and the variation in the absolute value of the resistance is ± 20%, the current detection error of the output MOS transistor A is as high as 44%. Therefore, the current of the output MOS transistor A cannot be detected with high accuracy.

  If the current of the output MOS transistor A cannot be detected with high accuracy, an error occurs in the control signal output to the protection circuit for protecting the output MOS transistor, and the output MOS transistor A cannot be protected by a desired operation. On the other hand, even if breakdown can be avoided by lowering the current detection level, the current driving capability of the output MOS transistor is lowered. Therefore, considering both the required current driving capability and prevention of breakdown, there is a problem that a MOS transistor having a larger area has to be used and the chip area has to be increased.

  An object of the present invention is to accurately detect the current flowing through the output MOS transistor with a simple configuration and generate a control signal to the protection circuit, so that the output MOS transistor can be formed without increasing the chip area more than necessary. It is possible to avoid breakdown and achieve both of the required current drive capability.

  A current detection circuit according to the present invention includes a MOS transistor whose gate receives an input signal, a clamp circuit that clamps the gate voltage of the MOS transistor, a detection circuit that detects that the clamp circuit has been operated, and the detection circuit And a comparison circuit that controls the drain-source voltage of the MOS transistor and a reference voltage.

According to the current detection circuit of the present invention, the current flowing through the output MOS transistor can be detected with high accuracy using a characteristic of the MOS transistor with a simpler configuration than the conventional one. Even if the signal supplied to the gate of the output MOS transistor exceeds an arbitrary value, it is possible to accurately generate a control signal to be output to the protection circuit, that is, without reducing the current detection level unnecessarily, that is, Breakdown can be avoided without lowering the current drive capability of the output MOS transistor. Therefore, it is possible to achieve both the required current driving capability and the prevention of destruction without using a MOS transistor having a larger area and without having to increase the chip area.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing the concept of a current detection circuit in the present invention. The current detection circuit of the present invention detects a p-type output MOS transistor M1, which is a protected element, a clamp circuit 1 that clamps the gate-source voltage of the output MOS transistor M1, and the operation of the clamp circuit 1. The detection circuit 2 and a comparator circuit (comparison circuit) 3 that compares the reference potential Vref with the potential of the output signal Out are configured.

  The output MOS transistor M1 has a gate supplied with a signal (input signal) from a circuit (not shown), a source connected to the power supply potential Vcc, and a drain connected to the output terminal.

  Here, when the clamp voltage of the output MOS transistor M1 is Vgmax, the operation region (current detection) of the present invention is the drain characteristic of the output MOS transistor M1 (Vg = Vgmax, Vg is the gate voltage of the output MOS transistor). This is a region where the source-to-source voltage Vds exceeds the reference voltage Vref (FIG. 2). In the region of Vds <Vgmax−Vth (Vth is the threshold voltage of the output MOS transistor M1), the static characteristic of the output MOS transistor M1 operates in the linear region, and the output MOS transistor M1 operates as a resistance element having a resistance value Ron. doing.

At this time, the limit current is
Limit current = Vcc / (Ron + load resistance)
Thus, the variation in limit current is almost determined by the variation in Ron (ON resistance). If the variation in Ron is, for example, ± 20%, the variation in limit current is also a variation of approximately ± 20%, and the current can be detected with higher accuracy than in the past.

  FIG. 3 is a circuit diagram of the current detection circuit according to the first embodiment of the present invention. The clamp circuit 1 according to the first embodiment of the present invention includes a PNP transistor Q1, a Zener diode D1, and a resistor R1. Transistor Q1 and Zener diode D1 are connected between power supply potential Vcc and the gate of output MOS transistor M1, one end of resistor R1 is connected to power supply potential Vcc, and the other end of resistor R1 is connected to the cathode of Zener diode D1. The anode of the Zener diode D1 is connected to the gate of the output MOS transistor M1.

  The transistor Q1 has an emitter connected to the power supply potential Vcc, a base connected to a connection node between the resistor R1 and the Zener diode D1, and a collector connected to one end of the resistor R2.

  The transistor Q1 forms a detection circuit 2 that detects that the clamp circuit 1 is operated in the first embodiment.

  The comparator circuit 3 of this embodiment is composed of PNP transistors Q2 and Q3, NPN transistors Q4 and Q5, and a resistor R3. The comparator circuit 3 becomes operable when the detection circuit 2 detects the operation of the clamp circuit 1.

  The base of the transistor Q2 is connected to the drain of the output MOS transistor M1, and the emitter is connected to the other end of the resistor R2. In the transistor Q3, the reference potential Vref is supplied to the base, and the emitter is connected to the other end of the resistor R2.

  The transistor Q4 has a base connected to the base of the transistor Q5, a collector connected to the collector of the transistor Q2, and an emitter connected to the ground potential GND. The transistor Q5 has a collector connected to the collector of the transistor Q3, a base connected to the collector, and an emitter connected to the ground potential GND.

  A resistor R3 is connected between the connection node of the transistors Q2 and Q4 and the ground potential GND, and the connection node of the transistors Q2 and Q4 is connected to the protection detection terminal LimitDet. Then, the potential of this connection node is output as a control signal to a protection circuit (not shown).

  Next, the operation of the current detection circuit in the first embodiment will be described. A signal (operating current) is supplied to the gate of the output MOS transistor M1 from a circuit (not shown). Consider a case where the operating current supplied to the output MOS transistor M1 does not exceed a desired current value. At this time, the clamp circuit 1 does not operate. That is, the transistor Q1 is in an OFF state. Therefore, no current flows through the comparator circuit 3, and the transistors Q2 to Q5 are turned off, so that the output of the protection detection terminal LimitDet of the comparator circuit 3 is Low (first level).

  On the other hand, a case is considered where the operating current increases and the output MOS transistor M1 reaches a gate-source voltage at which the clamp circuit 1 is turned on. At this time, the transistor Q1 is turned on, and the transistors Q2 to Q5 of the comparator circuit 3 are turned on.

  Here, when the transistors Q2 to Q5 of the comparator circuit 3 are in the ON state and the output signal Out is higher than the reference potential Vref, that is, the drain-source voltage of the output MOS transistor M1 is smaller than an arbitrary value. In the state, the current of the transistor Q2 becomes smaller than the current of the transistor Q3, and the current of the transistor Q4 becomes larger than the current of the transistor Q2, so that the output of the protection detection terminal LimitDet becomes Low.

  When the transistors Q2 to Q5 of the comparator circuit 3 are in the ON state and the output signal Out is lower than the reference potential Vref, that is, the drain-source voltage of the output MOS transistor M1 is larger than an arbitrary value. In this case, since the current of the transistor Q2 is larger than the current of the transistor Q3 and the current of the transistor Q4 is smaller than the current of the transistor Q2, the output of the protection detection terminal LimitDet becomes Hi (second level).

  When the output of the protection detection terminal LimitDet becomes Hi, a supply signal to the output MOS transistor M1 is controlled by a protection circuit (not shown), and the output MOS transistor M1 is protected.

According to the present invention, the current flowing through the output MOS transistor can be accurately detected with a simpler configuration than the prior art by utilizing the characteristics of the MOS transistor. Even if the signal supplied to the gate of the output MOS transistor exceeds an arbitrary value, it is possible to accurately generate a control signal to be output to the protection circuit, that is, without reducing the current detection level unnecessarily, that is, Breakdown can be avoided without lowering the current drive capability of the output MOS transistor. Therefore, it is possible to achieve both the required current driving capability and the prevention of destruction without using a MOS transistor having a larger area and without having to increase the chip area.

  FIG. 4 is a circuit diagram of a current detection circuit according to the second embodiment of the present invention. The clamp circuit 1 according to the second embodiment of the present invention includes an NPN transistor Q1. Transistor Q1 is connected between power supply potential Vcc and the gate of output MOS transistor M1, and the emitter of transistor Q1 is connected to the gate of output MOS transistor M1. A clamp voltage Vclmp is supplied to the base.

  The detection circuit 2 includes a resistor R1 and a PNP transistor Q2. The resistor R1 has one end connected to the power supply potential Vcc and the other end connected to the collector of the transistor Q1. Transistor Q2 has an emitter connected to power supply potential Vcc, a base connected to the other end of resistor R1 and the collector of transistor Q1, and a collector connected to one end of resistor R2.

  The comparator circuit 3 of this embodiment is composed of PNP transistors Q3 and Q4, NPN transistors Q5 and Q6, and a resistor R3. The comparator circuit 3 becomes operable when the detection circuit 2 detects the operation of the clamp circuit 1.

  The transistor Q3 has an emitter connected to the other end of the resistor R2, and a base connected to the drain of the output MOS transistor M1. The transistor Q4 has an emitter connected to the other end of the resistor R2, and a reference potential Vref supplied to the base.

  Transistor Q5 has a collector connected to the collector of transistor Q3, a base connected to the base of transistor Q5, and an emitter connected to ground potential GND. Transistor Q6 has a collector connected to the collector of transistor Q4, a base connected to the collector, and an emitter connected to ground potential GND.

  The resistor R3 is connected between the connection node of the transistors Q3 and Q5 and the ground potential GND, and the connection node of the transistors Q3 and Q5 is connected to the protection detection terminal LimitDet. Then, the potential of the connection node is output to a protection circuit (not shown).

  Next, the operation of the current detection circuit in the second embodiment will be described. An output current is supplied to the gate of the output MOS transistor M1 from a circuit (not shown). A clamp voltage Vclmp is supplied to the base of the transistor Q1.

  First, consider a case where the output current (operating current) supplied to the output MOS transistor M1 does not exceed an arbitrary current. At this time, the clamp circuit 1 is not operating. That is, when the transistor Q2 is in the OFF state, the transistors Q3 to Q6 of the comparator circuit 3 are in the OFF state, so that the output of the protection detection terminal LimitDet of the comparator circuit 3 is Low.

On the other hand, consider a case where the operating current increases and the output MOS transistor M1 reaches a gate-source voltage at which the clamp circuit 1 is turned on. At this time, the transistors Q1 and Q2 are turned on, whereby the transistors Q3 to Q6 of the comparator circuit 3 are also turned on.

  Here, when the transistors Q3 to Q6 of the comparator circuit 3 are in the ON state and the output signal Out is higher than the reference potential Vref, that is, the drain-source voltage of the output MOS transistor M1 is smaller than an arbitrary value. In this case, since the current of the transistor Q3 is smaller than the current of the transistor Q4 and the current of the transistor Q5 is larger than the current of the transistor Q3, the output of the protection detection terminal LimitDet becomes Low.

  When the transistors Q3 to Q6 of the comparator circuit are in the ON state and the output Out is lower than the reference potential Vref, that is, when the drain-source voltage of the output MOS transistor M1 is larger than an arbitrary value, the transistor Since the current of Q3 is larger than the current of transistor Q4 and the current of transistor Q5 is smaller than the current of transistor Q3, the output of protection detection terminal LimitDet becomes Hi.

  When the output of the protection detection terminal LimitDet becomes Hi, a supply signal to the output MOS transistor M1 is controlled by a protection circuit (not shown), and the output MOS transistor M1 is protected.

    According to the present invention, the current flowing through the output MOS transistor can be accurately detected with a simpler configuration than the prior art by utilizing the characteristics of the MOS transistor. Even if the signal supplied to the gate of the output MOS transistor exceeds an arbitrary value, it is possible to accurately generate a control signal to be output to the protection circuit, that is, without reducing the current detection level unnecessarily, that is, Breakdown can be avoided without lowering the current drive capability of the output MOS transistor. Therefore, it is possible to achieve both the required current driving capability and the prevention of destruction without using a MOS transistor having a larger area and without having to increase the chip area.

  FIG. 5 is a circuit diagram of a current detection circuit according to the third embodiment of the present invention. The clamp circuit 1 according to the third embodiment of the present invention includes NPN transistors Q1, Q2, and Q3. The transistor Q1 has a collector connected to the power supply potential Vcc and a clamp voltage Vclmp supplied to the base. Transistor Q2 has a collector connected to the emitter of transistor Q1, a base connected to the collector, and an emitter connected to the gate of output MOS transistor M1. The transistor Q3 has a base connected to the base of the transistor Q2 and an emitter connected to the emitter of the transistor Q2.

  The detection circuit 2 includes a resistor R1 and a PNP transistor Q4. The resistor R1 has one end connected to the power supply potential Vcc and the other end connected to the collector of the transistor Q3 of the clamp circuit 1. The transistor Q4 has an emitter connected to the power supply potential Vcc, a base connected to the other end of the resistor R1, and a collector connected to one end of the resistor R2.

  The comparator circuit 3 of this embodiment is composed of PNP transistors Q5 and Q6, NPN transistors Q7 and Q8, and a resistor R3. The comparator circuit 3 becomes operable when the detection circuit 2 detects the operation of the clamp circuit 1.

  The transistor Q5 has an emitter connected to the other end of the resistor R2, and a base connected to the drain of the output MOS transistor M1. The emitter of the transistor Q6 is connected to the other end of the resistor R2, and the reference potential Vref is supplied to the base.

  The transistor Q7 has a collector connected to the collector of the transistor Q5, a base connected to the base of the transistor Q8, and an emitter connected to the ground potential GND. Transistor Q8 has a collector connected to the collector of transistor Q6, a base connected to the collector, and an emitter connected to ground potential GND.

  A resistor R3 is connected between the connection node of the transistors Q5 and Q7 and the ground potential GND, and the connection node of the transistors Q5 and Q7 is connected to the protection detection terminal LimitDet. Then, the potential of the connection node is output to a protection circuit (not shown).

  Next, the operation of the current detection circuit in the third embodiment will be described. An output current is supplied to the gate of the output MOS transistor M1 from a circuit (not shown). A clamp voltage Vclmp is supplied to the base of the transistor Q1.

  First, consider a case where the output current (operating current) supplied to the output MOS transistor M1 does not exceed a desired current. At this time, the clamp circuit 1 is not operating. That is, the transistor Q4 is in an OFF state. Therefore, no current flows through the comparator circuit 3, and the transistors Q5 to Q8 are turned off, so that the output of the protection detection terminal LimitDet of the comparator circuit 3 is Low.

  On the other hand, a case is considered where the operating current increases and the output MOS transistor M1 reaches a gate-source voltage at which the clamp circuit 1 is turned on. At this time, the transistors Q1 to Q4 are turned on, a current flows through the comparator circuit 3, and the transistors Q5 to Q8 are turned on.

  Here, when the transistors Q5 to Q8 of the comparator circuit 3 are in the ON state and the output signal Out is higher than the reference potential Vref, that is, the drain-source voltage of the output MOS transistor M1 is smaller than an arbitrary value. In the state, the current of the transistor Q5 is smaller than the current of the transistor Q6, and the current of the transistor Q7 is larger than the current of the transistor Q5, so the output of the protection detection terminal LimitDet is Low.

  Further, when the transistors Q5 to Q8 of the comparator circuit 3 are in the ON state and the output signal Out is lower than the reference potential Vref, that is, the drain-source voltage of the output MOS transistor M1 is larger than an arbitrary value. In this case, the current of the transistor Q5 is larger than the current of the transistor Q6, and the current of the transistor Q7 is smaller than the current of the transistor Q5. Therefore, the output of the protection detection terminal LimitDet becomes Hi.

  When the output of the protection detection terminal LimitDet becomes Hi, a supply signal to the output MOS transistor M1 is controlled by a protection circuit (not shown), and the output MOS transistor M1 is protected.

According to the present invention, the current flowing through the output MOS transistor can be accurately detected with a simpler configuration than the prior art by utilizing the characteristics of the MOS transistor. Even if the signal supplied to the gate of the output MOS transistor exceeds an arbitrary value, it is possible to accurately generate a control signal to be output to the protection circuit, that is, without reducing the current detection level unnecessarily, that is, Breakdown can be avoided without lowering the current drive capability of the output MOS transistor. Therefore, it is possible to achieve both the required current driving capability and the prevention of destruction without using a MOS transistor having a larger area and without having to increase the chip area.

  FIG. 6 is a circuit diagram of a current detection circuit according to the fourth embodiment of the present invention. The clamp circuit 1 according to the fourth embodiment of the present invention includes a PNP transistor Q1, a Zener diode D1, and a resistor R1. A transistor Q1 and a Zener diode D1 are connected between the power supply potential Vcc and the gate of the output MOS transistor M1, one end of the resistor R1 is connected to the power supply potential Vcc, and the other end of the resistor R1 is connected to the cathode of the Zener diode D1. The anode of the Zener diode D1 is connected to the gate of the output MOS transistor M1.

  The transistor Q1 has a base connected to a connection node between the resistor R1 and the Zener diode D1, and an emitter connected to the power supply potential Vcc.

  The detection circuit 2 includes resistors R2 and R3 and an n-type MOS transistor M2. The collector of the transistor Q1 and one end of R2 are connected, R2 and R3 are connected in series, and one end of R3 is connected to GND. The gate of M2 is connected to the connection point of R2 and R3.

  The comparator circuit 3 of this embodiment is composed of PNP transistors Q2 and Q3, NPN transistors Q4 and Q5, and resistors R4 and R5. The transistor Q2 has an emitter connected to the drain of the output MOS transistor M1, and a base connected to the collector. The transistor Q3 has an emitter connected to the reference potential Vref and a base connected to the base of the transistor Q2.

The transistor Q4 has a collector connected to the source of M2, a base connected to the collector, and an emitter connected to the ground potential GND. The drain of M2 is connected to the collector of the transistor Q2 via the resistor R4. The transistor Q5 has a collector connected to the collector of the transistor Q3, a base connected to the base of the transistor Q4, and an emitter connected to the ground potential GND. ing. The connection node between Q3 and Q5 is connected to the protection detection terminal LimitDet. R5 is connected between the protection detection terminals LimitDet and GND. Then, the potential of the ground node is output to a protection circuit (not shown).
Next, the operation of the current detection circuit in the fourth embodiment will be described. In the current detection circuit of this embodiment, when the detection circuit 2 detects the operation of the clamp circuit 1, the ON / OFF state of the MOS transistor M2 of the detection circuit 2 is switched to output the protection detection terminal LimitDet of the comparator circuit 3 To control.

  An output current is supplied to the gate of the output MOS transistor M1 from a circuit (not shown). First, consider a case where the output current (operating current) supplied to the output MOS transistor M1 does not exceed a desired current. At this time, the clamp circuit 1 is not operating. That is, the transistor Q1 is in an OFF state. Then, the MOS transistor M2 is turned off, and Q2, Q3, Q4, and Q5 are also turned off. Therefore, the output of the protection detection terminal LimitDet of the comparator circuit 3 becomes Low.

  On the other hand, a case is considered where the operating current increases and the output MOS transistor M1 reaches a gate-source voltage at which the clamp circuit 1 is turned on. At this time, the transistor Q1 is turned on, and the MOS transistor M2 of the detection circuit 2 is turned on.

Here, when the output signal Out is higher than the reference potential Vref, that is, when the drain-source potential of the output MOS transistor M1 is smaller than an arbitrary value, the currents of the transistors Q2, Q4, and Q5 are Since it becomes larger than the current of the transistor Q3, the output of the protection detection terminal LimitDet becomes Low.

  When the output signal Out is lower than the reference potential Vref, that is, when the drain-source potential of the output MOS transistor M1 is higher than an arbitrary value, the currents of the transistors Q2, Q4, Q5 Since it is smaller than the current of Q3, the output of the protection detection terminal LimitDet becomes Hi.

  When the output of the protection detection terminal LimitDet becomes Hi, a supply signal to the output MOS transistor M1 is controlled by a protection circuit (not shown), and the output MOS transistor M1 is protected.

  According to the present invention, the current flowing through the output MOS transistor can be accurately detected with a simpler configuration than the prior art by utilizing the characteristics of the MOS transistor. Even if the signal supplied to the gate of the output MOS transistor exceeds an arbitrary value, the control signal to be output to the protection circuit can be generated with high accuracy, so that the current detection level is not reduced unnecessarily, that is, Breakdown can be avoided without reducing the current drive capability of the output MOS transistor. Therefore, it is possible to achieve both the required current driving capability and the prevention of destruction without using a MOS transistor having a larger area and without having to increase the chip area.

  In each embodiment of the present invention, the case where each circuit is configured with an output MOS transistor as a p-type has been described, but each circuit may be configured with an output MOS transistor as an n-type. In this case, what is necessary is just to change the polarity of the transistor etc. which comprise each circuit, and a signal. The same effect as the above embodiment can be obtained.

  Of course, various modifications can be made without departing from the scope of the present invention.

The block diagram of the electric current detection circuit in this invention. The circuit characteristic view of the current detection circuit in this invention. The circuit diagram of the current detection circuit in Example 1 of the present invention. The circuit diagram of the current detection circuit in Example 2 of this invention. The circuit diagram of the electric current detection circuit in Example 3 of this invention. The circuit diagram of the current detection circuit in Example 4 of this invention. The circuit diagram of the conventional electric current detection circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Clamp circuit 2 ... Detection circuit 3 ... Comparator circuit M1 ... Output MOS transistor Q1-Q8 ... Transistor R1-R7 ... Resistor D1 ... Zener diode

Claims (5)

A MOS transistor to which an input signal is supplied to the gate;
A clamp circuit for clamping the gate voltage of the MOS transistor;
A detection circuit for detecting the operation of the clamp circuit;
A current detection circuit comprising: a comparison circuit that is controlled based on a detection result of the detection circuit and compares a drain-source voltage of the MOS transistor with a reference voltage.   The current detection circuit according to claim 1, wherein the detection circuit controls the comparison circuit to operate when the clamp circuit is operating.   The current detection circuit according to claim 1, wherein the detection circuit controls to output a first level signal to the comparison circuit when the clamp circuit is not operating. The comparison circuit is
When the gate voltage of the MOS transistor exceeds an arbitrary value, the clamp circuit operates, and the drain-source voltage of the MOS transistor is larger than the reference voltage, a second level signal is output,
A first level signal is output when the gate voltage of the MOS transistor exceeds an arbitrary value, the clamp circuit operates, and the drain-source voltage of the MOS transistor is smaller than the reference voltage. The current detection circuit according to claim 1 or 2. The clamp circuit is
A first resistor having one end connected to a power supply potential;
A Zener diode having a cathode connected to the other end of the first resistor and an anode connected to the gate of the MOS transistor;
The current detection circuit according to claim 1, further comprising: a first transistor having an emitter connected to the power supply potential, a base connected to a cathode of the diode, and a collector connected to the comparison circuit. .

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