JP2005166745A - Multilayered inductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayered inductor which can prevent the peeling-off, scattering, etc. of a marker layer for indicating the position of an extraction section of a coil conductor. <P>SOLUTION: By exposing two sides on the chip side face side of each marker layer 14 on two side faces of a chip 11 and positioning one side on the chip end face side of each marker layer 14 inside the end face of the chip 11, the adhesiveness of top and bottom sheet layers which hold each marker layer 14 between can be kept at a sufficient level, resulting in preventing the peeling-off of the sheet layer which covers each marker layer 14 and each marker layer 14 and also preventing the scattering of the sheet layer which covers each maker layer 14 and each marker layer 14 due to the expansion or blowing-out of remaining air bubbles. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a multilayer inductor incorporating a coil conductor, and more particularly to a multilayer inductor provided with a mark for indicating the position of a lead portion of the coil conductor.

  A multilayer inductor includes a coil conductor formed by connecting a number of conductor layers in a spiral shape in a rectangular parallelepiped chip, and a pair of external electrodes that are electrically connected to a pair of lead portions of the coil conductor. It is provided at both ends in the length direction.

  By the way, since the low inductance laminated inductor used in the high frequency circuit has a magnetic permeability close to 1 as a chip material, the magnetic flux generated in the coil conductor leaks to the outside through the chip when energized.

  Since the form of this leakage flux differs depending on the direction of the coil conductor, to suppress the influence of the leakage flux on the surrounding electronic components and the change of its own inductance value due to the surrounding electronic components etc. It is necessary to manage (orientation) appropriately.

  Therefore, this type of multilayer inductor is provided with a mark for recognizing the direction of the coil conductor, specifically, a mark for indicating the position of the lead portion of the coil conductor.

  6 and 7 show conventional multilayer inductors each having the mark. 6A is a top view of the multilayer inductor in which the external electrode is indicated by an extra fine wire, FIG. 6B is a side view of the multilayer inductor shown in FIG. 6A, and FIG. FIG. 7B is a side view of the multilayer inductor shown in FIG. 7A. In addition, the coil conductors 22 and 32 in each figure are shown typically.

  The multilayer inductor 20 shown in FIG. 6 has a spiral coil conductor 22 in a rectangular parallelepiped chip 21 obtained by laminating and firing a large number of sheet layers, and the center line (axis) of the coil portion is vertically aligned. A pair of external electrodes 23 are provided at both ends in the longitudinal direction of the chip 21 so as to be electrically connected to the pair of lead portions 22 a of the coil conductor 22. Further, a rectangular marker layer 24 is provided between the upper sheet layer of the chip 21 and the lower sheet layer thereof to indicate the position of the one lead-out portion 22a existing in the upper left part of FIG. In addition, a rectangular marker layer 24 is provided between the lower surface side sheet layer of the chip 21 and the upper sheet layer thereof to indicate the position of the other leading portion 22a in the lower right part of FIG. ing. Each marker layer 24 has an area that is approximately ½ of the top surface area of the chip 21, and one of the four sides is located at approximately the center in the length direction of the chip 21, and two sides adjacent thereto. 24 a is exposed on the side surface of the chip 21, and the remaining one side is exposed on the end surface of the chip 21. The sheet layer of the chip 21 covering each marker layer 24 is extremely thin, and each marker layer 24 can be seen through them, so that each marker layer 24 can be sufficiently visually recognized from the outside.

On the other hand, the multilayer inductor 30 shown in FIG. 7 has a spiral coil conductor 32 in a rectangular parallelepiped chip 31 obtained by laminating and firing a large number of sheet layers, and the center line (axis) of the coil portion is A pair of external electrodes 33 are provided at both ends in the length direction of the chip 31 so as to be electrically connected to the pair of lead portions 32 a of the coil conductor 32. In addition, a rectangular marker layer 34 is provided between the upper surface side sheet layer of the chip 31 and the lower sheet layer thereof to indicate the position of the one extraction portion 32a existing in the upper left part of FIG. In addition, a rectangular marker layer 34 is provided between the lower surface side sheet layer of the chip 31 and the upper sheet layer thereof to indicate the position of the other lead portion 32a existing in the lower right part of FIG. ing. Each marker layer 34 is smaller than the marker layer 24, and one of the four sides is located at approximately the center in the length direction of the chip 31, and two adjacent sides are inside the side surface of the chip 31. The remaining one side is located inside the end surface of the chip 31. Since the sheet layer of the chip 31 covering each marker layer 34 is extremely thin and each marker layer 24 can be seen through them, the marker layer 34 can be sufficiently visually recognized from the outside.
JP 2000-353620 A JP-A-9-148134

  In the conventional multilayer inductor shown in FIG. 6A and FIG. 6B, each marker layer 24 has the same width as the chip 21 and one side thereof is exposed at the end face of the chip 21. Therefore, the adhesion of the upper and lower sheet layers sandwiching each marker layer 24 is reduced, and each marker is mounted when the firing process or barrel polishing process is performed after obtaining the unfired chip or when the multilayer inductor 20 is mounted on the substrate. The sheet layer covering the layer 24 and the marker layers 24 may be peeled off.

  In the conventional multilayer inductor shown in FIGS. 7A and 7B, each marker layer 34 is surrounded by an upper layer and a lower layer of the marker layer 34. When air is entrained and remains in a bubble state when forming the substrate by printing, when the firing step and external electrode formation step are performed after obtaining the unfired chip, or in the state where the multilayer inductor 30 is mounted on the substrate There is a possibility that the sheet layer covering each marker layer 34 and each marker layer 34 may be scattered due to expansion or rupture of the remaining bubbles.

  The present invention was created in view of the above circumstances, and an object of the present invention is to provide a multilayer inductor that can prevent peeling or scattering of a marker layer for indicating the position of a lead portion of a coil conductor. .

  In order to achieve the above object, the present invention has a spiral coil conductor in a rectangular parallelepiped chip obtained by laminating and firing a large number of sheet layers, and indicates the position of the lead portion of the coil conductor. Each of the marker layers is formed in a rectangular shape having the same width as the chip, and each marker layer is formed in a rectangular shape with each marker layer inside the upper surface sheet layer and the lower surface sheet layer constituting the chip. The two sides on the chip side surface of the layer are exposed on the two side surfaces of the chip, and one side on the chip end surface side is located on the inner side with a predetermined distance from the end surface of the chip. And

  According to this multilayer inductor, two sides on the chip side surface of each marker layer are exposed on the two side surfaces of the chip, and one side on the chip end surface side is spaced inward from the end surface of the chip by a predetermined distance. By positioning, the adhesiveness of the upper and lower sheet layers sandwiching each marker layer can be sufficiently maintained. Therefore, peeling does not occur in the sheet layer and each marker layer covering each marker layer in the manufacturing process or the substrate mounting state. Further, even when air is entrained and remains in a bubble state when forming the marker layer, it can be extracted from the two exposed side portions of each marker layer 14 on the side surface of the chip. In the state, the sheet layer covering each marker layer and each marker layer are not scattered due to expansion or rupture of the remaining bubbles.

  According to the present invention, peeling or scattering of the marker layer for indicating the position of the lead portion of the coil conductor can be reliably prevented.

  The above object and other objects, structural features, and operational effects of the present invention will become apparent from the following description and the accompanying drawings.

  1 to 5 show an embodiment of the present invention. FIG. 1 (A) is a perspective view of a multilayer inductor, and FIG. 1 (B) shows a coil conductor in the multilayer inductor shown in FIG. 1 (A). 2A is a top view of the multilayer inductor shown in FIG. 1A, FIG. 2B is a bottom view of the multilayer inductor shown in FIG. 1A, and FIG. FIG. 3A is a side view of the multilayer inductor shown in FIG. 1A, FIG. 3 is an explanatory diagram of a method for manufacturing the multilayer inductor shown in FIG. 1A, FIG. 4 is a perspective view of the chip, and FIG. 5B is a bottom view of the chip shown in FIG. 4, and FIG. 5C is a side view of the chip shown in FIG.

  A multilayer inductor 10 shown in FIGS. 1 and 2 includes a helical coil conductor 12 in a rectangular parallelepiped chip 11 obtained by laminating and firing a large number of sheet layers. The basic dimension of the chip 11 is length> width = height, but the width and the height are not necessarily coincident due to a tolerance relationship. The coil conductor 12 is configured by connecting a large number of conductor layers in a spiral shape, and includes a coil portion 12a having a predetermined number of turns and a pair of lead portions 12b provided at the ends of the coil portion 12a. The coil conductor 12 is arranged so that the center line (axis line) of the coil portion 12 a faces up and down, and the pair of lead portions 12 b are exposed at the end surfaces in the length direction of the chip 11. Further, a pair of external electrodes 33 that are electrically connected to the pair of lead portions 12 b of the coil conductor 12 are provided at both ends in the length direction of the chip 11.

  Further, a marker layer 14 for indicating the position of the lead portion 12b of the coil conductor 12 is provided on the inner side of the upper surface side sheet layer and the lower surface side sheet layer constituting the chip 11, respectively. Specifically, a rectangular marker layer 14 for indicating the position of one lead-out portion 12b existing in the upper left part in FIG. 1 (A) is provided between the upper surface side sheet layer of the chip 11 and the lower sheet layer. A marker layer 14 is provided between the lower sheet layer of the chip 11 and the upper sheet layer of the chip 11 to indicate the position of the other leading portion 12b existing in the lower right portion in FIG. .

  Each marker layer 14 has a rectangular shape with the same width as the chip 11, and two sides on the chip side surface side of each marker layer 14 are exposed on the two side surfaces of the chip 11, and on the chip end surface side. One side is located on the inner side of the end face of the chip 11 with a distance S described later, and the other one side is located at the approximate center in the length direction of the chip 11. That is, the upper and lower sheet layers sandwiching each marker layer 14 are regions where the marker layer 14 does not exist, that is, a region from the side located at the center of the marker layer 14 to one chip end surface, and the side opposite to the marker layer 14. To the other chip end face.

  Each marker layer 14 has a darker color than the sheet layer constituting the chip 11, for example, chromatic color, black or gray, and the sheet layer covering each marker layer 14 is extremely thin with a thickness of about 10 μm. Since 14 can be seen through from these, visual recognition from the outside of each marker layer 14 can be sufficiently performed.

  Here, a method of manufacturing the multilayer inductor 10 will be described with reference to FIGS.

  First, sheets S1 to S9 shown in FIG. 3 are prepared. FIG. 3 shows sheets S1 to S9 having a size corresponding to one part, but in an actual sheet, each sheet has a size that allows a large number of sheets to be stacked, laminated, and thermocompression bonded. , Through the cutting process, individual green chips are obtained.

  The sheet S1 is a ceramic green sheet formed by coating a slurry obtained by mixing and kneading a nonmagnetic ceramic powder, an organic binder, an organic solvent, and various additives at an appropriate weight ratio, and drying the slurry. It is. The sheet S1 has a rectangular shape and its basic dimension is length> width.

  The sheets S2 and S9 are printed on the surface of the sheet S1 with a marker material obtained by mixing a powder or liquid colorant into the slurry in a rectangular shape with a predetermined thickness, dried, and unfired marker layer ML1. , ML2 is formed. Both marker layers ML1 and ML2 have the same width as the sheet width, and one side of the sheet layer in the sheet length direction of the marker layer ML1 of the sheet S2 is positioned substantially at the center in the length direction, and the other side is in the sheet length direction. The side of the marker layer ML2 of the sheet S9 is located in the middle of the sheet length direction in the sheet length direction, and the other side is located in the sheet length direction. It is located inside the middle right end.

  Sheets S3 to S8 have a U-shaped conductor paste having a predetermined thickness obtained by mixing and kneading metal powder, an organic binder, an organic solvent, and various additives at an appropriate weight ratio on the surface of the sheet S1. Printed and dried to form unfired conductor layers CL1 to C6, and the conductor layers CL1 and CL6 of the sheets S3 and S8 have L-shaped lead portions LP1 for constituting the lead portions 12a and 12b. LP2 is provided integrally. The sheets S3 to S7 are formed with through holes (without reference numerals) for connection to the conductor layer of the lower sheet, and the through holes are filled with a part of the printing paste. The conductor layers CL1 to CL6 may have a shape other than the U shape, for example, a U shape or an L shape.

  Next, the prepared sheets S1 to S9 are laminated and thermocompression bonded in the order shown in FIG. 3 to obtain an unfired chip, and then fired to obtain a chip 11 shown in FIG. The chip 11 includes a coil conductor 12 formed by spirally connecting a large number of conductor layers (CL1 to CL6), and the upper lead portion 12b is exposed at one end face in the length direction of the chip 11. The lower lead portion 12 b is exposed at the other end surface in the length direction of the chip 11.

  Further, as can be seen from FIGS. 5A to 5C showing a top view, a bottom view, and a side view of the chip shown in FIG. 4, the chip in the upper marker layer 14 and the lower marker layer 14. Two sides on the side surface side are exposed on two side surfaces of the chip 11. One side on the chip end surface side of the upper marker layer 14 is located inward from the same end surface by a distance S, and one side on the chip end surface side of the lower marker layer 14 is spaced from the same end surface by a distance S. Located inside. The value of the distance S is arbitrarily set so that the adhesion described later can be obtained in an area corresponding to the distance S in consideration of the size of the chip 11.

  The upper and lower sheet layers sandwiching each marker layer 14 are laminated, and the region where the marker layer 14 does not exist by the thermocompression bonding process, that is, the region from the side located at the center of the marker layer 14 to one chip end surface, It is in close contact (integrated) in a region (region corresponding to the distance S) from the opposite side to the other chip end surface.

  That is, since the adhesiveness of the upper and lower sheet layers sandwiching each marker layer 14 is sufficiently maintained, the sheet layer covering each marker layer 14 and each marker layer 14 do not peel during the firing process. Further, even when air is entrained and remains in a bubble state when the marker layer 14 is formed by printing, it can be extracted from the two exposed side portions on the chip side surface of each marker layer 14, so that the firing step Occasionally, the sheet layer covering each marker layer 14 and each marker layer 14 do not scatter due to expansion or rupture of residual bubbles.

  Next, the chip 11 after firing is barrel-polished, and the same conductive paste as described above is applied to both ends of the chip 11 in the longitudinal direction, and this is baked to form the external electrode 13. As described above, since the adhesiveness between the upper and lower sheet layers sandwiching each marker layer 14 is sufficiently maintained, the sheet layer covering each marker layer 14 and each marker layer 14 when performing the barrel polishing process. There is no peeling. Further, when the external electrode forming step is performed, the sheet layer covering each marker layer 14 and each marker layer 14 are not scattered due to the expansion or rupture of residual bubbles.

  As described above, according to the multilayer inductor 10 described above, since the adhesiveness between the upper and lower sheet layers sandwiching each marker layer 14 is sufficiently maintained, the sheet layer covering each marker layer 14 in the manufacturing process or the substrate mounting state. In addition, no peeling occurs in each marker layer 14, and even when air is entrained and remains in a bubble state when the marker layer 14 is formed by printing, it remains on the chip side surface 2 of each marker layer 14. Since it can be extracted from one exposed side portion, the sheet layer covering each marker layer 14 and each marker layer 14 are not scattered due to the expansion or rupture of the remaining bubbles in the manufacturing process or the substrate mounting state. Thereby, peeling or scattering of the marker layer 14 for indicating the position of the lead portion 12b of the coil conductor 12 can be reliably prevented.

  Further, since each marker layer 14 is made of a nonmagnetic material, the magnetic flux generated in the coil conductor 12 when energized is not hindered by the marker layer 14 from being leaked (released) to the outside. The inductance value of the period can be secured.

FIG. 1A is a perspective view of a multilayer inductor showing an embodiment of the present invention, and FIG. 1B is a perspective view showing a coil conductor in the multilayer inductor shown in FIG. 2A is a top view of the multilayer inductor shown in FIG. 1A, FIG. 2B is a bottom view of the multilayer inductor shown in FIG. 1A, and FIG. 2C is FIG. It is a side view of the multilayer inductor shown in FIG. It is manufacturing method explanatory drawing of the multilayer inductor shown to FIG. 1 (A). FIG. 4 is a perspective view of the chip. 5A is a top view of the chip shown in FIG. 4, FIG. 5B is a bottom view of the chip shown in FIG. 4, and FIG. 5C is a side view of the chip shown in FIG. FIG. 6A is a top view of a conventional multilayer inductor in which external electrodes are indicated by ultrafine wires, and FIG. 6B is a side view of the multilayer inductor shown in FIG. FIG. 7A is a top view of a conventional multilayer inductor in which external electrodes are indicated by fine wires, and FIG. 7B is a side view of the multilayer inductor shown in FIG. 7A.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Multilayer inductor, 11 ... Chip, 12 ... Coil conductor, 12a ... Coil part, 12b ... Lead-out part, 13 ... External electrode, 14 ... Marker layer.

Claims (2)

A sheet on the upper surface side, which has a helical coil conductor in a rectangular parallelepiped chip obtained by laminating and firing a large number of sheet layers, and a marker layer for indicating the position of the lead portion of the coil conductor constituting the chip A multilayer inductor having an inner side of each layer and an inner side of the lower surface side sheet layer,
Each marker layer has a rectangular shape with the same width as the chip, two sides on the chip side surface of each marker layer are exposed on the two side surfaces of the chip, and one side on the chip end surface side is a chip. It is located inside a predetermined distance from the end face of
A multilayer inductor characterized by that. The marker layer is made of non-magnetic material,
The multilayer inductor according to claim 1.

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