JP2005150648A - Resin sealed semiconductor device and method for manufacturing same - Google Patents

Resin sealed semiconductor device and method for manufacturing same Download PDF

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JP2005150648A
JP2005150648A JP2003390030A JP2003390030A JP2005150648A JP 2005150648 A JP2005150648 A JP 2005150648A JP 2003390030 A JP2003390030 A JP 2003390030A JP 2003390030 A JP2003390030 A JP 2003390030A JP 2005150648 A JP2005150648 A JP 2005150648A
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resin
substrate
semiconductor device
semiconductor chip
manufacturing
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JP4446719B2 (en
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Masanori Nano
匡紀 南尾
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To increase mass production efficiency and realize an ultra-thin resin-sealed semiconductor device. <P>SOLUTION: A plurality of package units are continually formed in the plane of a lead frame 10. In the frame, a die pad 1 is not provided, and the frame is resin sealed with a semiconductor chip 4 mounted and bonded on and to an insulating material 13 located on the rear surface of the lead frame 10, to intentionally cause the warpage of the frame 10 itself to remain. When the frame is cut off into separated individual resin-sealed semiconductor devices under the remained warpage, The stress of the lead frame 10 received from the sealed resin 13 during the cut-off can be gradually reduced and the cutting off can be realized with the reduced warpage. Consequently, a mass production efficiency in a production line can be increased, an ultra-thin resin-sealed semiconductor device can be manufactured, and a method for manufacturing the semiconductor device can be obtained. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は複数のパッケージユニットを有した回路基板やリードフレーム等の単一基板を用いて、特に薄型の樹脂封止型半導体装置を製造する際、基板上の複数のパッケージエリアを一括で樹脂封止してＱＦＮ（Ｑｕａｄ Ｆｌａｔ Ｎｏｎ−ｌｅａｄｅｄ Ｐａｃｋａｇｅ），ＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ），ＬＧＡ（Ｌａｎｄ Ｇｒｉｄ Ａｒｒａｙ）等の樹脂封止型半導体装置を製造する樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法に関するものである。   The present invention uses a single substrate such as a circuit board or a lead frame having a plurality of package units, particularly when manufacturing a thin resin-encapsulated semiconductor device, a plurality of package areas on the substrate are collectively encapsulated with resin. Resin-encapsulated semiconductor device and resin-encapsulated semiconductor device for manufacturing resin-encapsulated semiconductor devices such as QFN (Quad Flat Non-leaded Package), BGA (Ball Grid Array), and LGA (Land Grid Array) It is related with the manufacturing method.

近年、携帯電子機器の小型化に対応するために、樹脂封止型半導体装置などの半導体部品の高密度実装が要求され、それにともなって、半導体パッケージの小型、薄型化が進んでいる。このような要求に応えるため、最近は小型薄型の樹脂封止型半導体装置としてＱＦＮタイプの樹脂封止型半導体装置が市場に投入されている。   In recent years, in order to cope with the miniaturization of portable electronic devices, high-density mounting of semiconductor components such as resin-encapsulated semiconductor devices is required, and along with this, semiconductor packages are becoming smaller and thinner. In order to meet such demands, recently, a QFN type resin-encapsulated semiconductor device has been put on the market as a small and thin resin-encapsulated semiconductor device.

以下、従来のＱＦＮタイプの樹脂封止型半導体装置の製造方法について説明する。
図４は従来の樹脂封止型半導体装置の製造方法で用いるリードフレームを示す平面図である。図５は従来の樹脂封止型半導体装置の製造方法を示す工程断面図，図６は従来のＱＦＮの断面図である。図４中のＢ−Ｂ１ラインは、図５，図６の製造工程の説明での断面箇所を示している。 A conventional method for manufacturing a QFN type resin-encapsulated semiconductor device will be described below.
FIG. 4 is a plan view showing a lead frame used in a conventional method for manufacturing a resin-encapsulated semiconductor device. FIG. 5 is a process sectional view showing a conventional method for manufacturing a resin-encapsulated semiconductor device, and FIG. 6 is a sectional view of a conventional QFN. A B-B1 line in FIG. 4 indicates a cross-sectional portion in the description of the manufacturing process in FIGS.

図４に示すように、従来の樹脂封止型半導体装置の製造方法で用いるリードフレームは、２００〜３００［μｍ］厚程度の金属板よりなるものであって、半導体チップが搭載されるダイパッド部１と、そのダイパッド部１の各辺にその先端部が対向配置した複数のリード部２を有し、ダイパッド部１は吊りリード部３によりその角部が支持されている。このリードフレームは個片タイプのリードフレームであり、個々の樹脂封止型半導体装置を構成するパッケージユニットＵ１は互いに連続することなく、面内にマトリックス状に配置されているものである。また、リードフレームの材質としては、銅（Ｃｕ）材をベースとした金属フレームなどがある。   As shown in FIG. 4, a lead frame used in a conventional method for manufacturing a resin-encapsulated semiconductor device is made of a metal plate having a thickness of about 200 to 300 [μm], and a die pad portion on which a semiconductor chip is mounted. 1 and a plurality of lead portions 2 whose tip portions face each other on each side of the die pad portion 1, and the corner portions of the die pad portion 1 are supported by suspension lead portions 3. This lead frame is an individual type lead frame, and the package units U1 constituting the individual resin-encapsulated semiconductor devices are arranged in a matrix in a plane without being continuous with each other. The lead frame material may be a metal frame based on a copper (Cu) material.

このようなリードフレームを用いて樹脂封止型半導体装置を製造するには、まず、図５（ａ）に示すように、リードフレームの各ダイパッド部１上に銀ペースト等の接着剤により半導体チップ４を接着搭載し、半導体チップ４の電極パッドとリード部２の上面の所定の接続箇所とを金線等の金属細線５で電気的に接続する。   In order to manufacture a resin-encapsulated semiconductor device using such a lead frame, first, as shown in FIG. 5A, a semiconductor chip is formed on each die pad portion 1 of the lead frame with an adhesive such as silver paste. 4 is bonded and mounted, and the electrode pad of the semiconductor chip 4 and a predetermined connection portion on the upper surface of the lead portion 2 are electrically connected by a thin metal wire 5 such as a gold wire.

次に、図５（ｂ）に示すように、各パッケージユニットごとに封止樹脂６でトランスファーモールドにより封止する。この樹脂封止の際には、リードフレームの上面領域を封止し、下面領域は封止しないために、例えば、リードフレームの下面に樹脂フィルムを介在させて封止する。これにより、リードフレーム裏面への封止樹脂の回り込みを防止し、確実にリード部２の下面を露出させて片面封止構造を実現できる。   Next, as shown in FIG. 5B, each package unit is sealed with a sealing resin 6 by transfer molding. In this resin sealing, the upper surface region of the lead frame is sealed and the lower surface region is not sealed. For example, a resin film is interposed on the lower surface of the lead frame and sealed. Thus, the sealing resin can be prevented from wrapping around the back surface of the lead frame, and the lower surface of the lead portion 2 can be surely exposed to realize a one-side sealing structure.

次に、図５（ｃ）に示すように、リードフレームから個片化した樹脂封止型半導体装置への分離は、切断金型のポンチ７により封止樹脂６側面側から切断し、リード部２の端面を封止樹脂６の側面とほぼ同等面に形成する。図５（ｃ）では、リードフレームの上面側から切断しているが、下面側から切断する場合もある。また、切断手段としてはポンチを用いているが、回転ブレードを用いてリードカットする方法もある。   Next, as shown in FIG. 5C, the separation from the lead frame into the resin-encapsulated semiconductor device is performed by cutting from the side surface of the encapsulating resin 6 with the punch 7 of the cutting mold, The end face of 2 is formed on a surface substantially equal to the side surface of the sealing resin 6. In FIG. 5C, the lead frame is cut from the upper surface side, but may be cut from the lower surface side. Moreover, although the punch is used as the cutting means, there is also a method of lead cutting using a rotating blade.

また、図６に示すように、リードフレームから分離させた個片化した樹脂封止型半導体装置は、リード部２が封止樹脂６の底面に配列するとともに、封止樹脂６の側面にそのリード部２の側端面が露出した構造のＱＦＮである。従来の製造方法では樹脂封止が個々のパッケージユニットごとに行われるため、リードフレームから切断分離した樹脂封止型半導体装置の外形は封止樹脂の外形をほぼそのまま受け、封止樹脂６の上面がテーパー状をなした形状となっている。   Further, as shown in FIG. 6, the resin-encapsulated semiconductor device separated from the lead frame has the lead portion 2 arranged on the bottom surface of the sealing resin 6 and the side surface of the sealing resin 6. The QFN has a structure in which the side end surface of the lead portion 2 is exposed. In the conventional manufacturing method, since resin sealing is performed for each individual package unit, the outer shape of the resin-encapsulated semiconductor device cut and separated from the lead frame receives the outer shape of the sealing resin almost as it is, and the upper surface of the sealing resin 6 Has a tapered shape.

以上、従来の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法では、リードフレームに対して半導体チップを搭載し、その後の樹脂封止は、個々のパッケージユニットごとに独立で樹脂封止するものである、また、この方法ではリードフレームの一部でダイエリアを形成し、チップを搭載するものである（例えば、特許文献１，特許文献２参照）。
特開平９−８２７４１号公報 特開２０００−１２４３８１号公報 As described above, in the conventional resin-encapsulated semiconductor device and resin-encapsulated semiconductor device manufacturing method, the semiconductor chip is mounted on the lead frame, and the subsequent resin encapsulation is performed independently for each package unit. In this method, a die area is formed by a part of the lead frame, and a chip is mounted (see, for example, Patent Document 1 and Patent Document 2).
Japanese Patent Laid-Open No. 9-82741 Japanese Patent Laid-Open No. 2000-124381

しかしながら、前記従来の樹脂封止型半導体装置の製造方法における量産工法では、近年の携帯機器の普及とそのスピードに対応することができないという課題があり、その工法上、半導体装置の薄型化への限界が顕在化してきている。すなわち量産化技術として、より早く、より安く、より高精度に、かつより小型・薄型化することが求められている。   However, the mass production method in the conventional method for manufacturing a resin-encapsulated semiconductor device has a problem that it cannot cope with the recent spread of mobile devices and the speed thereof. Limits are becoming apparent. That is, as a mass production technique, it is required to be faster, cheaper, more accurate, and smaller and thinner.

従来の樹脂封止型半導体装置の構造および製造方法では、リードフレームのダイパッド部に対して半導体チップを搭載し、その後の樹脂封止は、個々のパッケージユニットごと独立で樹脂封止するものであったため、リードフレームの厚みに対して更に半導体チップの厚みが加わることにより、より薄型化が困難とされてきた、また、リードフレーム面内における１つのパッケージユニットの面積も大きく、リードフレーム１枚の面内に設けられるユニット個数も大幅に増大できるものではなかった。そのため量産ラインで製造個数を増大させるには限界があった。   In the structure and manufacturing method of the conventional resin-encapsulated semiconductor device, a semiconductor chip is mounted on the die pad portion of the lead frame, and the subsequent resin encapsulation is performed independently for each package unit. Therefore, the thickness of the semiconductor chip is further added to the thickness of the lead frame, which makes it difficult to reduce the thickness of the lead frame. Also, the area of one package unit in the lead frame surface is large, The number of units provided in the plane could not be significantly increased. For this reason, there is a limit to increasing the number of products manufactured in a mass production line.

近年は前記した課題を解決すべく、１枚のリードフレーム面内にパッケージユニットを複数個、連続して形成したリードフレームを用いた「パンケーキモールド法」、または「一括成形法」と称される製造工法が開発されてきている。しかしながら、この工法においてもリードフレームを用いる上で、半導体チップを支えるため、ダイパッド部を配置する必要があり、構造上半導体装置の薄型化には限界の兆しさえ現れてきた。   In recent years, in order to solve the above-mentioned problems, it is called “pancake molding method” or “batch molding method” using a lead frame in which a plurality of package units are continuously formed in one lead frame surface. Manufacturing methods have been developed. However, even in this method, it is necessary to dispose a die pad portion in order to support a semiconductor chip when using a lead frame, and structurally, there has been a sign of a limit in making the semiconductor device thinner.

本発明は、前記した従来の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法において、生産工程での量産効率を向上すると共に、樹脂封止型半導体装置の極薄型化を目的とするものである。   The present invention aims at improving the mass production efficiency in the production process and reducing the thickness of the resin-encapsulated semiconductor device in the conventional resin-encapsulated semiconductor device and the method for producing the resin-encapsulated semiconductor device. To do.

前記従来の目的を達成するために、本発明における請求項１記載の樹脂封止型半導体装置の製造方法は、半導体チップを搭載する素子搭載領域を設けた複数のパッケージユニットにより構成される基板の底面に絶縁材料を付加する工程と、前記素子搭載部に半導体チップを搭載する工程と、搭載された前記各半導体チップと前記基板とを電気的に接続する工程と、前記各パッケージユニットに前記半導体チップを搭載した前記基板を前記絶縁材料が露出した状態で樹脂を用いて樹脂封止する工程と、前記絶縁材料を取り除く工程と、前記樹脂封止した基板を各パッケージユニットごとに切断して個片化した樹脂封止型半導体装置に分離する工程とを有することを特徴とする。   In order to achieve the above-described conventional object, a method for manufacturing a resin-encapsulated semiconductor device according to claim 1 of the present invention is a method for manufacturing a substrate composed of a plurality of package units provided with an element mounting region for mounting a semiconductor chip. A step of adding an insulating material to the bottom surface; a step of mounting a semiconductor chip on the element mounting portion; a step of electrically connecting each of the mounted semiconductor chips and the substrate; and the semiconductor in each package unit A step of resin-sealing the substrate on which the chip is mounted using a resin with the insulating material exposed; a step of removing the insulating material; and cutting the resin-sealed substrate into individual package units. And separating the separated resin-encapsulated semiconductor device.

請求項２記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記基板はリードフレームであることを特徴とする。
請求項３記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記基板は回路基板であることを特徴とする。 A method for manufacturing a resin-encapsulated semiconductor device according to claim 2 is the method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein the substrate is a lead frame.
A method for manufacturing a resin-encapsulated semiconductor device according to a third aspect is the method for manufacturing a resin-encapsulated semiconductor device according to the first aspect, wherein the substrate is a circuit substrate.

請求項４記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記搭載された各半導体チップと前記基板との電気的な接続を、金属細線で前記基板の接続箇所と前記半導体チップの電極とを各々接続することによって行うことを特徴とする。   The method for producing a resin-encapsulated semiconductor device according to claim 4 is the method for producing a resin-encapsulated semiconductor device according to claim 1, wherein the electrical connection between each of the mounted semiconductor chips and the substrate is as follows: It is characterized in that it is carried out by connecting the connection part of the substrate and the electrode of the semiconductor chip with a thin metal wire.

請求項５記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記搭載された各半導体チップと前記基板との電気的な接続を、前記半導体チップの電極に対して各々対向させて設けた前記基板の接続箇所と前記半導体チップの電極とを直接接続することを特徴とする。   The method for producing a resin-encapsulated semiconductor device according to claim 5 is the method for producing a resin-encapsulated semiconductor device according to claim 1, wherein the electrical connection between each mounted semiconductor chip and the substrate is as follows: The connection portion of the substrate provided to face the electrode of the semiconductor chip and the electrode of the semiconductor chip are directly connected.

請求項６記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記絶縁材料の厚みが０．０１〜０．０５ｍｍであることを特徴とする。   The method for producing a resin-encapsulated semiconductor device according to claim 6 is the method for producing a resin-encapsulated semiconductor device according to claim 1, wherein the insulating material has a thickness of 0.01 to 0.05 mm. And

請求項７記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記基板の複数のパッケージユニットに対する一体での樹脂封止を一枚の基板に一体で樹脂封止する領域が複数個存在するように分割させて、それぞれの領域を一体で樹脂封止することを特徴とする。   The method for manufacturing a resin-encapsulated semiconductor device according to claim 7 is the method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein the resin sealing is integrally performed on a plurality of package units of the substrate. The substrate is divided so that there are a plurality of regions that are integrally resin-sealed, and each region is integrally resin-sealed.

請求項８記載の樹脂封止型半導体装置の製造方法は、請求項１記載の樹脂封止型半導体装置の製造方法において、前記樹脂封止型半導体装置が略直方体状であることを特徴とする。   The method for producing a resin-encapsulated semiconductor device according to claim 8 is the method for producing a resin-encapsulated semiconductor device according to claim 1, wherein the resin-encapsulated semiconductor device has a substantially rectangular parallelepiped shape. .

請求項９記載の樹脂封止型半導体装置は、半導体チップを搭載する素子搭載領域を設けた基板と、前記素子搭載領域に前記基板の下面と略同一面に搭載され前記基板と電気的に接続される半導体チップと、前記半導体チップを保持するように前記基板と前記半導体チップを封止した封止樹脂とを有し、前記と前記半導体チップの下面が略同一面上にあり、封止樹脂より露出することを特徴とする。   The resin-encapsulated semiconductor device according to claim 9, wherein the substrate is provided with an element mounting area for mounting a semiconductor chip, and the element mounting area is mounted on the substantially same surface as the lower surface of the substrate and is electrically connected to the substrate. And a sealing resin that seals the substrate and the semiconductor chip so as to hold the semiconductor chip, and the lower surface of the semiconductor chip is substantially on the same surface, and the sealing resin It is more exposed.

請求項１０記載の樹脂封止型半導体装置は、請求項９記載の樹脂封止型半導体装置において、前記基板はリードフレームであることを特徴とする。
請求項１１記載の樹脂封止型半導体装置は、請求項９記載の樹脂封止型半導体装置において、前記基板は回路基板であることを特徴とする。 According to a tenth aspect of the present invention, in the resin-sealed semiconductor device according to the ninth aspect, the substrate is a lead frame.
The resin-sealed semiconductor device according to claim 11 is the resin-sealed semiconductor device according to claim 9, wherein the substrate is a circuit board.

請求項１２記載の樹脂封止型半導体装置は、請求項９記載の樹脂封止型半導体装置において、前記半導体チップと前記基板との電気的な接続を、金属細線で前記基板の接続箇所と前記半導体チップの電極とを各々接続することによって行うことを特徴とする。
請求項１３記載の樹脂封止型半導体装置は、請求項９記載の樹脂封止型半導体装置において、前記半導体チップと前記基板との電気的な接続を、前記半導体チップの電極に対して各々対向させて設けた前記基板の接続箇所と前記半導体チップの電極とを直接接続することを特徴とする。 The resin-encapsulated semiconductor device according to claim 12 is the resin-encapsulated semiconductor device according to claim 9, wherein the semiconductor chip and the substrate are electrically connected to each other at a connection portion of the substrate with a thin metal wire. This is performed by connecting each of the electrodes of the semiconductor chip.
The resin-encapsulated semiconductor device according to claim 13 is the resin-encapsulated semiconductor device according to claim 9, wherein an electrical connection between the semiconductor chip and the substrate is opposed to an electrode of the semiconductor chip. The connection portion of the substrate provided in this manner is directly connected to the electrode of the semiconductor chip.

以上、本発明の樹脂封止型半導体装置の製造方法により、基板自体の封止樹脂の応力による反りを低減しつつ、発生した反りを解消させながら個片化に切断できるので、生産工程での量産効率を向上すると共に、極薄型の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法を提供することができる。   As described above, the method for manufacturing a resin-encapsulated semiconductor device according to the present invention can be cut into pieces while eliminating the generated warp while reducing the warp due to the stress of the sealing resin of the substrate itself. In addition to improving mass production efficiency, it is possible to provide an extremely thin resin-encapsulated semiconductor device and a method for manufacturing the resin-encapsulated semiconductor device.

以上のように、１枚のリードフレーム面内にパッケージユニットを複数個、連続して形成したリードフレームを用いた「パンケーキモールド法」、または「一括成形法」において、ダイパッド部を設けず、リードフレームの裏面に配置された絶縁材料上に絶縁ペースト等の接着剤により半導体チップを接着搭載した状態で樹脂封止することにより、あえてリードフレーム自体の反りを残存させ、反りがある状態で個々の樹脂封止型半導体装置に切断分離することにより、リードフレームが反りのある状態で切断され、その切断にともない、封止樹脂内部の半導体チップ、電気的な接続部分へのダメージは影響がない程度に、リードフレームが封止樹脂から受ける応力は低減していき、反りを解消しながら切断できるので、生産工程での量産効率を向上すると共に、極薄型の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法を提供することができる。   As described above, in a “pancake molding method” or “batch molding method” using a lead frame in which a plurality of package units are continuously formed in one lead frame surface, a die pad portion is not provided, By sealing the semiconductor chip with an adhesive such as an insulating paste on the insulating material disposed on the back surface of the lead frame, the lead frame itself will remain warped, and the individual warp will remain. By cutting and separating into a resin-sealed semiconductor device, the lead frame is cut in a warped state, and there is no effect on the semiconductor chip inside the sealing resin and the electrical connection portion due to the cutting. The stress that the lead frame receives from the sealing resin is reduced to a certain extent, and it can be cut while eliminating warping. Together to improve, it is possible to provide a manufacturing method of an ultrathin resin-sealed semiconductor device and a resin-encapsulated semiconductor device.

以下、本発明の樹脂封止型半導体装置と樹脂封止型半導体装置の製造方法の一実施形態について、図面を参照しながら説明する。
まず本実施形態のリードフレームの製造方法の概要について説明する。 Hereinafter, an embodiment of a resin-encapsulated semiconductor device and a method for producing a resin-encapsulated semiconductor device of the present invention will be described with reference to the drawings.
First, the outline of the manufacturing method of the lead frame of this embodiment will be described.

図１は本発明の樹脂封止型半導体装置におけるリードフレームの製造方法を示す図である。
まず、図１（ａ）に示すように、複数のパッケージユニットを有したリードフレーム１０の各パッケージユニットの素子搭載部を空洞部１１として配置し、端子接続部１２でリードフレーム１０を格子配列にて連接するように、配置させたリードフレーム構成体を準備する。 FIG. 1 is a view showing a lead frame manufacturing method in a resin-encapsulated semiconductor device of the present invention.
First, as shown in FIG. 1A, the element mounting portion of each package unit of the lead frame 10 having a plurality of package units is arranged as the cavity portion 11, and the lead frame 10 is arranged in a lattice arrangement at the terminal connection portion 12. The lead frame structure is arranged so as to be connected to each other.

次に、図１（ｂ）に示す様に絶縁材料１３を端子接続部１２に貼り付け固定を行う。
最後に、図１（ｃ）に示す様に連接部位で分離することにより、各リードフレームを分離する。分離に際してはプレス金型・レーザー加工・エッチング加工を用いてもよい。 Next, as shown in FIG. 1B, the insulating material 13 is pasted and fixed to the terminal connection portion 12.
Finally, as shown in FIG. 1 (c), the lead frames are separated by separating them at the connection sites. In the separation, a press die, laser processing, or etching processing may be used.

次に、図２は本発明の樹脂封止型半導体装置を示す図であり、（ａ）は裏面平面図，（ｂ）は（ａ）のＡ−Ａ１における断面図を示す。
図２に示すように、本発明の樹脂封止型半導体装置の製造方法で用いるリードフレーム１０は、５０〜３００［μｍ］厚程度の金属板よりなるものであって、半導体チップ１４と、その半導体チップ１４の各辺にその先端部が対向配置した複数の端子接続部１２を有し、半導体チップ１４の上面はこのリードフレーム１０の略同一面に配置されており、半導体チップ１４は金属細線１５により端子接続部１２に接続されている。また、従来存在した半導体チップを保持するダイパッド部が無く、半導体チップは封止樹脂１６により保持固定されている。 Next, FIG. 2 is a figure which shows the resin-sealed semiconductor device of this invention, (a) is a back surface top view, (b) shows sectional drawing in AA1 of (a).
As shown in FIG. 2, a lead frame 10 used in the method for manufacturing a resin-encapsulated semiconductor device of the present invention is made of a metal plate having a thickness of about 50 to 300 [μm], and includes a semiconductor chip 14 and its Each side of the semiconductor chip 14 has a plurality of terminal connection portions 12 whose tip portions are opposed to each other, and the upper surface of the semiconductor chip 14 is disposed on substantially the same surface of the lead frame 10. 15 is connected to the terminal connection portion 12. In addition, there is no die pad portion for holding a conventional semiconductor chip, and the semiconductor chip is held and fixed by a sealing resin 16.

樹脂封止型半導体装置を構成するパッケージユニットは互いに連続するもので、面内にマトリックス状に配置されているものである。また、リードフレームの材質としては、銅（Ｃｕ）材をベースとした金属フレームなどがある。   The package units constituting the resin-encapsulated semiconductor device are continuous with each other and are arranged in a matrix in the plane. The lead frame material may be a metal frame based on a copper (Cu) material.

以下、本発明の樹脂封止型半導体装置の製造方法を図３を用いて説明する。
図３は本発明の樹脂封止型半導体装置の製造方法を示す工程断面図である。
このようなリードフレームを用いて樹脂封止型半導体装置を製造するには、まず、図３（ａ）および（ｂ）に示すように、リードフレーム１０の裏面に配置された絶縁材料１３上に絶縁ペースト等の接着剤により半導体チップ１４を接着搭載し、半導体チップ１４の電極パッドとリード部１２の上面の所定の接続箇所とを金線等の金属細線１５で電気的に接続する。ここでは金属細線（ファインワイヤー）１５を用いた接続例を示しているが、リードフレームとしてインナーリードボンディング（ＩＬＢ）用のリードフレームを用いた場合には、リードと半導体チップ１４とを各々対向させてバンプや接着剤等を介して直接に接続してもよい。 Hereinafter, the manufacturing method of the resin-encapsulated semiconductor device of the present invention will be described with reference to FIG.
FIG. 3 is a process cross-sectional view illustrating the method for manufacturing the resin-encapsulated semiconductor device of the present invention.
In order to manufacture a resin-encapsulated semiconductor device using such a lead frame, first, as shown in FIGS. 3A and 3B, an insulating material 13 disposed on the back surface of the lead frame 10 is used. The semiconductor chip 14 is bonded and mounted with an adhesive such as an insulating paste, and the electrode pads of the semiconductor chip 14 and a predetermined connection location on the upper surface of the lead portion 12 are electrically connected by a metal thin wire 15 such as a gold wire. Here, a connection example using a fine metal wire (fine wire) 15 is shown, but when a lead frame for inner lead bonding (ILB) is used as the lead frame, the lead and the semiconductor chip 14 are made to face each other. Alternatively, the connection may be made directly via a bump or an adhesive.

次に、図３（ｃ）に示すように、各パッケージユニットごとに封止樹脂１６でトランスファーモールドにより一括封止する。この樹脂封止の際には、リードフレーム１０の上面領域を封止し、下面領域は封止しないために、例えば、本実施例の場合、リードフレーム１０の下面に樹脂フィルムを介在させて封止する。これにより、リードフレーム裏面への封止樹脂１６の回り込みを防止し、確実に端子接続部１２の下面を露出させて片面封止構造を実現できる。このとき、樹脂封止した封止構成体１７は０．５０［ｍｍ］の平坦偏差で反りが発生するが、次工程の切断工程を行うことにより反りを解消して、封止樹脂１６中の半導体チップ１４等への悪影響をなくすことができる。もし、反り量が大きい場合、切断工程前の段階で、一旦、リードフレーム１０に対して押圧力を付加して反り量を半減させることも可能である。   Next, as shown in FIG. 3C, the package units are collectively sealed with a sealing resin 16 for each package unit. In the case of this resin sealing, since the upper surface region of the lead frame 10 is sealed and the lower surface region is not sealed, for example, in this embodiment, a resin film is interposed on the lower surface of the lead frame 10 and sealed. Stop. Thereby, the sealing resin 16 is prevented from wrapping around the back surface of the lead frame, and the lower surface of the terminal connection portion 12 is surely exposed to realize a one-side sealing structure. At this time, although the resin-sealed sealing structure 17 warps with a flat deviation of 0.50 [mm], the warping is eliminated by performing the cutting process of the next process, and the sealing structure 16 in the sealing resin 16 The adverse effect on the semiconductor chip 14 and the like can be eliminated. If the warpage amount is large, it is possible to halve the warpage amount by once applying a pressing force to the lead frame 10 before the cutting process.

次に、図３（ｄ）に示すように、前記にて片面封止を行った後、前記記載の絶縁材料１３を取り除く。その後、図３（ｅ）に示すように、一体で樹脂封止した樹脂構成体１７を各パッケージユニットごとに切断し、個片化した樹脂封止型半導体装置に分離する。ここでは、各パッケージごとに切断することによってリードフレーム１０の反りを解消させながら個々の樹脂封止型半導体装置に切断分離しているものである。また、図１３（ｅ）では回転ブレード１８により切断した例を示し、切断後の樹脂構成体１７の反りは解消されている。   Next, as shown in FIG. 3D, after the one-side sealing is performed as described above, the insulating material 13 described above is removed. Thereafter, as shown in FIG. 3E, the resin structure 17 integrally resin-sealed is cut for each package unit and separated into individual resin-sealed semiconductor devices. Here, each package is cut and separated into individual resin-encapsulated semiconductor devices while eliminating the warp of the lead frame 10 by cutting each package. FIG. 13E shows an example of cutting with the rotating blade 18, and the warping of the resin structure 17 after cutting is eliminated.

個片化した樹脂封止型半導体装置図１３（ｆ）は、一括成形ゆえにその外形が略直方体をなした形状となる。
以上、本実施形態の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法は、極薄型構造の半導体装置を実現でき、その製造方法は１枚のリードフレーム面内にパッケージユニットを複数個、連続して形成したリードフレームを用いた「パンケーキモールド法」、または「一括成形法」において、ダイパッド部を設けず、リードフレームの裏面に配置された絶縁材料上に絶縁ペースト等の接着剤により半導体チップを接着搭載した状態で樹脂封止することにより、あえてリードフレーム自体の反りを残存させ、反りがある状態で個々の樹脂封止型半導体装置に切断分離することにより、リードフレームが反りのある状態で切断され、その切断にともない、封止樹脂内部の半導体チップ、電気的な接続部分へのダメージは影響がない程度に、リードフレームが封止樹脂から受ける応力は低減していき、反りを解消しながら切断できるので、生産工程での量産効率を向上すると共に、高効率で極薄型の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法を提供することができる。 The resin-encapsulated semiconductor device shown in FIG. 13 (f) has a substantially rectangular parallelepiped shape due to batch molding.
As described above, the resin-encapsulated semiconductor device and the method for manufacturing the resin-encapsulated semiconductor device according to the present embodiment can realize a semiconductor device having an extremely thin structure, and the method for manufacturing a plurality of package units in one lead frame surface. In the “pancake mold method” or “batch molding method” using lead frames that are individually formed, adhesion of an insulating paste or the like on an insulating material disposed on the back surface of the lead frame without providing a die pad portion By sealing the resin in a state where the semiconductor chip is adhesively mounted with an agent, the lead frame is intentionally left to be warped, and the lead frame is cut and separated into individual resin-encapsulated semiconductor devices in the presence of warpage. It is cut in a warped state, and the damage to the semiconductor chip inside the sealing resin and the electrical connection part is not affected by the cutting. In addition, since the stress that the lead frame receives from the sealing resin is reduced and cutting can be performed while eliminating the warpage, the mass production efficiency in the production process is improved, and a highly efficient and extremely thin resin-encapsulated semiconductor device and A method for manufacturing a resin-encapsulated semiconductor device can be provided.

なお、本実施形態では基板としてリードフレームを用い、ＬＧＡを製造する例を中心に説明したが、テープ基板、有機基板（プラスチック基板）、セラミック基板などの回路基板を用いたＢＧＡ，ＬＧＡ等の樹脂封止型半導体装置の製造方法にも有効に適用可能である。要は、基板上を一体で封止して発生する反りの量を影響のない程度で抑え、後工程の切断工程で基板の反り自体を徐々に解消させて最終的に反りを解消して個片に分離するものである。   In this embodiment, an example of manufacturing an LGA using a lead frame as a substrate has been mainly described. However, a resin such as a BGA or LGA using a circuit substrate such as a tape substrate, an organic substrate (plastic substrate), or a ceramic substrate. The present invention can also be effectively applied to a method for manufacturing a sealed semiconductor device. In short, the amount of warpage that occurs when the substrate is integrally sealed is suppressed to an unaffected level, and the warpage of the substrate is gradually eliminated in the subsequent cutting process to finally eliminate the warpage. It separates into pieces.

また、上記説明では一枚の基板に一体で樹脂封止する場合について説明したが、樹脂封止する領域が複数個存在するように分割させて一体で樹脂封止することもできる。   In the above description, the case where resin sealing is integrally performed on one substrate has been described. However, the resin sealing may be performed by dividing the resin substrate so that there are a plurality of resin sealing regions.

本発明の樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法は、生産工程での量産効率を向上すると共に、極薄型の樹脂封止型半導体装置を提供することができ、基板上の複数のパッケージエリアを一括で樹脂封止してＱＦＮ（Ｑｕａｄ Ｆｌａｔ Ｎｏｎ−ｌｅａｄｅｄ Ｐａｃｋａｇｅ），ＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ），ＬＧＡ（Ｌａｎｄ Ｇｒｉｄ Ａｒｒａｙ）等の樹脂封止型半導体装置を製造する樹脂封止型半導体装置および樹脂封止型半導体装置の製造方法に有用である。   The resin-encapsulated semiconductor device and the method for producing the resin-encapsulated semiconductor device of the present invention can improve the mass production efficiency in the production process and provide an extremely thin resin-encapsulated semiconductor device on the substrate. Resin sealing for manufacturing resin-sealed semiconductor devices such as QFN (Quad Flat Non-Leaded Package), BGA (Ball Grid Array), LGA (Land Grid Array), etc. This is useful for manufacturing a semiconductor device and a resin-encapsulated semiconductor device.

本発明の樹脂封止型半導体装置におけるリードフレームの製造方法を示す図The figure which shows the manufacturing method of the lead frame in the resin-encapsulated semiconductor device of this invention 本発明の樹脂封止型半導体装置を示す図The figure which shows the resin-encapsulated semiconductor device of this invention 本発明の樹脂封止型半導体装置の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the resin sealing type semiconductor device of this invention 従来の樹脂封止型半導体装置の製造方法のリードフレームを示す平面図A top view showing a lead frame of a conventional method for manufacturing a resin-encapsulated semiconductor device 従来の樹脂封止型半導体装置の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the conventional resin sealing type semiconductor device 従来のＱＦＮの断面図Cross-sectional view of conventional QFN

符号の説明Explanation of symbols

１ ダイパッド部
２ リード部
３ 吊りリード部
４ 半導体チップ
５ 金属細線
６ 封止樹脂
７ ポンチ
１０ リードフレーム
１１ 空洞部
１２ 端子接続部
１３ 絶縁材料
１４ 半導体チップ
１５ 金属細線
１６ 封止樹脂
１７ 樹脂構成体
１８ 回転ブレード DESCRIPTION OF SYMBOLS 1 Die pad part 2 Lead part 3 Hanging lead part 4 Semiconductor chip 5 Metal fine wire 6 Sealing resin 7 Punch 10 Lead frame 11 Cavity part 12 Terminal connection part 13 Insulation material 14 Semiconductor chip 15 Metal fine wire 16 Sealing resin 17 Resin structure 18 Rotating blade

Claims (13)

半導体チップを搭載する素子搭載領域を設けた複数のパッケージユニットにより構成される基板の底面に絶縁材料を付加する工程と、
前記素子搭載部に半導体チップを搭載する工程と、
搭載された前記各半導体チップと前記基板とを電気的に接続する工程と、
前記各パッケージユニットに前記半導体チップを搭載した前記基板を前記絶縁材料が露出した状態で樹脂を用いて樹脂封止する工程と、
前記絶縁材料を取り除く工程と、
前記樹脂封止した基板を各パッケージユニットごとに切断して個片化した樹脂封止型半導体装置に分離する工程と
を有することを特徴とする樹脂封止型半導体装置の製造方法。 Adding an insulating material to the bottom surface of the substrate constituted by a plurality of package units provided with an element mounting region for mounting a semiconductor chip;
Mounting a semiconductor chip on the element mounting portion;
Electrically connecting each of the mounted semiconductor chips and the substrate;
A step of resin-sealing the substrate on which the semiconductor chip is mounted in each package unit using a resin with the insulating material exposed;
Removing the insulating material;
And a step of separating the resin-encapsulated substrate into individual resin-encapsulated semiconductor devices that are cut into individual package units, and manufacturing the resin-encapsulated semiconductor device. 前記基板はリードフレームであることを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   2. The method of manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein the substrate is a lead frame. 前記基板は回路基板であることを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   The method of manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein the substrate is a circuit substrate. 前記搭載された各半導体チップと前記基板との電気的な接続を、金属細線で前記基板の接続箇所と前記半導体チップの電極とを各々接続することによって行うことを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   2. The electrical connection between each of the mounted semiconductor chips and the substrate is performed by connecting a connection portion of the substrate and an electrode of the semiconductor chip with a thin metal wire, respectively. Manufacturing method of resin-encapsulated semiconductor device. 前記搭載された各半導体チップと前記基板との電気的な接続を、前記半導体チップの電極に対して各々対向させて設けた前記基板の接続箇所と前記半導体チップの電極とを直接接続することを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   Direct connection between the connection point of the substrate and the electrode of the semiconductor chip, which is provided so that the electrical connection between each mounted semiconductor chip and the substrate is opposed to the electrode of the semiconductor chip. The method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein: 前記絶縁材料の厚みが０．０１〜０．０５ｍｍであることを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   The method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein the insulating material has a thickness of 0.01 to 0.05 mm. 前記基板の複数のパッケージユニットに対する一体での樹脂封止を一枚の基板に一体で樹脂封止する領域が複数個存在するように分割させて、それぞれの領域を一体で樹脂封止することを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   Dividing the integral resin sealing with respect to the plurality of package units of the substrate so that there are a plurality of integrally resin-sealed regions on one substrate, and integrally sealing each region with the resin The method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein: 前記樹脂封止型半導体装置が略直方体状であることを特徴とする請求項１記載の樹脂封止型半導体装置の製造方法。   The method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein the resin-encapsulated semiconductor device has a substantially rectangular parallelepiped shape. 半導体チップを搭載する素子搭載領域を設けた基板と、
前記素子搭載領域に前記基板の下面と略同一面に搭載され前記基板と電気的に接続される半導体チップと、
前記半導体チップを保持するように前記基板と前記半導体チップを封止した封止樹脂と
を有し、前記と前記半導体チップの下面が略同一面上にあり、封止樹脂より露出することを特徴とする樹脂封止型半導体装置。 A substrate provided with an element mounting area for mounting a semiconductor chip;
A semiconductor chip that is mounted on the element mounting region on substantially the same surface as the lower surface of the substrate and is electrically connected to the substrate;
The substrate has a sealing resin that seals the semiconductor chip so as to hold the semiconductor chip, and the lower surface of the semiconductor chip is substantially on the same surface and is exposed from the sealing resin. A resin-encapsulated semiconductor device. 前記基板はリードフレームであることを特徴とする請求項９記載の樹脂封止型半導体装置。   The resin-encapsulated semiconductor device according to claim 9, wherein the substrate is a lead frame. 前記基板は回路基板であることを特徴とする請求項９記載の樹脂封止型半導体装置。   The resin-encapsulated semiconductor device according to claim 9, wherein the substrate is a circuit substrate. 前記半導体チップと前記基板との電気的な接続を、金属細線で前記基板の接続箇所と前記半導体チップの電極とを各々接続することによって行うことを特徴とする請求項９記載の樹脂封止型半導体装置。   10. The resin-sealed mold according to claim 9, wherein the electrical connection between the semiconductor chip and the substrate is performed by connecting a connection portion of the substrate and an electrode of the semiconductor chip with a thin metal wire. Semiconductor device. 前記半導体チップと前記基板との電気的な接続を、前記半導体チップの電極に対して各々対向させて設けた前記基板の接続箇所と前記半導体チップの電極とを直接接続することを特徴とする請求項９記載の樹脂封止型半導体装置。   The electrical connection between the semiconductor chip and the substrate is directly connected to a connection portion of the substrate provided to face the electrode of the semiconductor chip and the electrode of the semiconductor chip. Item 10. A resin-sealed semiconductor device according to Item 9.
JP2003390030A 2003-11-20 2003-11-20 Manufacturing method of resin-encapsulated semiconductor device Expired - Fee Related JP4446719B2 (en)

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Publication number Priority date Publication date Assignee Title
KR101542215B1 (en) * 2007-11-16 2015-08-05 스태츠 칩팩, 엘티디. - drop-mold conformable material as an encapsulation for an integrated circuit package system

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CN102354689B (en) * 2011-11-04 2013-12-04 北京工业大学 Quad flat non-lead (QFN) package with leads arranged in plane array and manufacturing method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101542215B1 (en) * 2007-11-16 2015-08-05 스태츠 칩팩, 엘티디. - drop-mold conformable material as an encapsulation for an integrated circuit package system

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