JP2005129923A - Nitride semiconductor, light emitting element using it, light emitting diode, laser element, lamp, and manufacturing method for those - Google Patents
Nitride semiconductor, light emitting element using it, light emitting diode, laser element, lamp, and manufacturing method for those Download PDFInfo
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Abstract
Description
本発明は、窒化物半導体、窒化物半導体発光素子、発光ダイオード、レーザー素子、ランプおよびそれらの製造方法に関する。 The present invention relates to a nitride semiconductor, a nitride semiconductor light emitting device, a light emitting diode, a laser device, a lamp, and a method for manufacturing them.
近年、短波長の光を発光する発光素子用の半導体材料として、窒化物半導体材料が注目を集めている。窒化物半導体は、一般にサファイア単結晶を始めとする種々の酸化物結晶やＩＩＩ−Ｖ族化合物半導体結晶等を基板として、その上に有機金属気相化学反応法（ＭＯＣＶＤ法）やエピタキシー法（ＭＢＥ法）あるいは水素化物気相エピタキシー法（ＨＶＰＥ法）等によってｎ型層、発光層およびｐ型層等が積層される。 In recent years, nitride semiconductor materials have attracted attention as semiconductor materials for light-emitting elements that emit light of short wavelengths. Nitride semiconductors generally use various oxide crystals such as sapphire single crystals and III-V group compound semiconductor crystals as substrates, and then metalorganic vapor phase chemical reaction method (MOCVD method) or epitaxy method (MBE). Method) or a hydride vapor phase epitaxy method (HVPE method) or the like to form an n-type layer, a light emitting layer, a p-type layer, and the like.
現在、工業レベルで最も広く採用されている化合物半導体の結晶成長方法は、有機金属気相化学反応法（ＭＯＣＶＤ法）である。この方法では、例えば、サファイア、ＳｉＣ、ＧａＮ、ＡｌＮ等の基板を設置した反応管内にＩＩＩ族の有機金属化合物とＶ族の原料ガスを供給し、温度７００℃〜１２００℃程度の領域でｎ型層、発光層およびｐ型層を成長させる。 At present, the most widely adopted method for crystal growth of compound semiconductors at the industrial level is the metal organic chemical vapor deposition (MOCVD) method. In this method, for example, a group III organometallic compound and a group V source gas are supplied into a reaction tube provided with a substrate of sapphire, SiC, GaN, AlN or the like, and n-type in a temperature range of about 700 ° C. to 1200 ° C. A layer, a light emitting layer and a p-type layer are grown.
そして、各半導体層の成長後、基板もしくはｎ型層に負極を形成し、ｐ型層に正極を形成することによって発光素子を得ることができる。 Then, after the growth of each semiconductor layer, a light emitting element can be obtained by forming a negative electrode on the substrate or n-type layer and forming a positive electrode on the p-type layer.
従来の発光層は、発光波長を調整する為に組成を調整したＩｎＧａＮを用い、これをＩｎＧａＮよりバンドギャップの高い層で挟むダブルへテロ構造や、量子井戸効果を使う多重量子井戸構造が使われている。 Conventional light-emitting layers use InGaN with a composition adjusted to adjust the emission wavelength, and use a double hetero structure in which this is sandwiched between layers with a higher band gap than InGaN, or a multiple quantum well structure that uses the quantum well effect. ing.
従来の多重量子井戸構造については、例えば、ＩＩＩ−Ｖ族のＧａＮ系発光素子であるＩｎＧａＮ−ＧａＮからなる量子井戸構造が知られている（非特許文献１）。この量子井戸構造の成長方法については、まず基板温度を１０００℃に保持し、高温での障壁層を形成し、続いて基板温度を下げて保持し、ＩｎＧａＮからなる井戸層を形成する。そして、前記障壁層と前記井戸層を交互に成長し、発光層を形成している。 As a conventional multiple quantum well structure, for example, a quantum well structure made of InGaN-GaN, which is a III-V group GaN-based light emitting element, is known (Non-Patent Document 1). With respect to the growth method of this quantum well structure, first, the substrate temperature is maintained at 1000 ° C., a barrier layer at a high temperature is formed, and subsequently, the substrate temperature is decreased and maintained to form a well layer made of InGaN. The barrier layer and the well layer are alternately grown to form a light emitting layer.
同種の技術において、昇温しながら障壁層を成長させること、積層中に高速で成長させること、およびキャリアガスを窒素から水素へ変更すること等が知られている（特許文献１）。この技術では発光効率の向上、発光層の形成時間の短縮化により製造コストを低減すること、および昇温しながら成長することによるＩｎの昇華防止などを利点としている。 In the same type of technology, it is known to grow a barrier layer while raising the temperature, to grow at a high speed during stacking, and to change the carrier gas from nitrogen to hydrogen (Patent Document 1). This technique has the advantages of improving the luminous efficiency, reducing the manufacturing cost by shortening the formation time of the light emitting layer, and preventing sublimation of In by growing while raising the temperature.
上述の方法で積層した発光素子は、逆耐圧（Ｐ−Ｎ接合を持つ発光素子に対し、逆方向に１０μＡの電流を流すために必要とする電圧の絶対値）がエージング（発光素子に対し順方向に３０ｍＡの電流を流し、一定時間保持の前後で発光素子の逆耐圧を測定、本明細書に記載の実験では、０時間、２０時間、４０時間後に測定を行なっている）において経時的に劣化を起こすという問題がある。 In the light emitting element stacked by the above method, the reverse withstand voltage (the absolute value of the voltage required to flow a current of 10 μA in the reverse direction with respect to the light emitting element having a PN junction) is aged (ordered with respect to the light emitting element). The reverse breakdown voltage of the light emitting element was measured before and after holding for a certain period of time by passing a current of 30 mA in the direction. In the experiment described in this specification, measurement was performed after 0, 20, and 40 hours). There is a problem of causing deterioration.
また、上記従来技術に開示された方法で積層した発光素子では、所望する発光強度に足りず、さらなる高効率化が望まれている。 In addition, in the light emitting element laminated by the method disclosed in the above prior art, the desired light emission intensity is insufficient, and further higher efficiency is desired.
本発明の目的は、逆耐圧が経時劣化を起こさず、初期の良好な逆耐圧を維持する窒化物半導体素子を提供することである。 An object of the present invention is to provide a nitride semiconductor device that maintains good initial reverse breakdown voltage without causing reverse breakdown with time.
また、本発明の別の目的は、良好な発光強度を有し、効率の良い窒化物半導体を提供することである。 Another object of the present invention is to provide an efficient nitride semiconductor having good emission intensity.
さらに、本発明の別の目的は、良好な逆耐圧を維持しつつ、順方向の駆動電圧の低い窒化物半導体素子を提供することである。 Furthermore, another object of the present invention is to provide a nitride semiconductor device having a low forward driving voltage while maintaining a good reverse breakdown voltage.
本発明は下記の各発明を提供する。
（１）基板上に窒化物半導体からなるｎ型層、発光層およびｐ型層をこの順で含み、発光層は井戸層を該井戸層よりもバンドギャップエネルギーが大きい障壁層で挟んだ量子井戸構造を含み、該障壁層は井戸層よりも高温で成長させた障壁層Ｃおよび障壁層Ｃよりも低温で成長させた障壁層Ｅを含み、障壁層Ｃは障壁層Ｅに対して基板側に位置することを特徴とする窒化物半導体。
The present invention provides the following inventions.
(1) A quantum well including an n-type layer made of a nitride semiconductor, a light-emitting layer, and a p-type layer on a substrate in this order, and the light-emitting layer sandwiching a well layer with a barrier layer having a larger band gap energy than the well layer The barrier layer includes a barrier layer C grown at a higher temperature than the well layer and a barrier layer E grown at a lower temperature than the barrier layer C, and the barrier layer C is on the substrate side with respect to the barrier layer E. A nitride semiconductor, characterized in that it is located.
（２）窒化物半導体が一般式ＩｎxＡｌyＧａ1-x-yＮ（０≦ｘ＜１、０≦ｙ＜１、０≦ｘ＋ｙ＜１）で表わされる上記（１）に記載の窒化物半導体。 (2) nitride according to above nitride semiconductor represented by the general formula In x Al y Ga 1-xy N (0 ≦ x <1,0 ≦ y <1,0 ≦ x + y <1) (1) Semiconductor .
（３）障壁層が障壁層Ｃよりも低温で成長させた障壁層Ａをさらに有し、障壁層Ａ、障壁層Ｃ、障壁層Ｅの順序で積層されていることを特徴とする上記（１）または（２）に記載の窒化物半導体。 (3) The barrier layer further includes a barrier layer A grown at a lower temperature than the barrier layer C, and the barrier layer A, the barrier layer C, and the barrier layer E are stacked in this order (1) Or the nitride semiconductor according to (2).
（４）障壁層が障壁層Ｃよりも低温で成長させた障壁層Ｂを障壁層Ａと障壁層Ｃとの間に有することを特徴とする上記（３）に記載の窒化物半導体。 (4) The nitride semiconductor according to (3), wherein the barrier layer has a barrier layer B grown at a lower temperature than the barrier layer C between the barrier layer A and the barrier layer C.
（５）障壁層が障壁層Ｃよりも低温で成長させた障壁層Ｄを障壁層Ｃと障壁層Ｅとの間に有することを特徴とする上記（１）〜（４）のいずれか一項に記載の窒化物半導体。 (5) Any one of the above (1) to (4), wherein the barrier layer has a barrier layer D grown at a lower temperature than the barrier layer C between the barrier layer C and the barrier layer E. The nitride semiconductor described in 1.
（６）障壁層Ｃの成長温度と井戸層の成長温度との差が５０℃以上であることを特徴とする上記（１）〜（５）のいずれか一項に記載の窒化物半導体。 (6) The nitride semiconductor as described in any one of (1) to (5) above, wherein the difference between the growth temperature of the barrier layer C and the growth temperature of the well layer is 50 ° C. or more.
（７）障壁層Ｃの成長温度と障壁層Ｅの成長温度との差が５０℃以上であることを特徴とする上記（１）〜（６）のいずれか一項に記載の窒化物半導体。 (7) The nitride semiconductor as described in any one of (1) to (6) above, wherein the difference between the growth temperature of the barrier layer C and the growth temperature of the barrier layer E is 50 ° C. or more.
（８）障壁層Ｃの成長温度と障壁層Ａの成長温度との差が５０℃以上であることを特徴とする上記（３）〜（７）のいずれか一項に記載の窒化物半導体。 (8) The nitride semiconductor as described in any one of (3) to (7) above, wherein the difference between the growth temperature of the barrier layer C and the growth temperature of the barrier layer A is 50 ° C. or more.
（９）井戸層の成長温度が６００℃以上１０００℃以下であることを特徴とする上記（１）〜（８）のいずれか一項に記載の窒化物半導体。 (9) The nitride semiconductor as described in any one of (1) to (8) above, wherein the growth temperature of the well layer is 600 ° C. or higher and 1000 ° C. or lower.
（１０）井戸層がＧａＩｎＮからなることを特徴とする上記（２）〜（９）のいずれか一項に記載の窒化物半導体。 (10) The nitride semiconductor as described in any one of (2) to (9) above, wherein the well layer is made of GaInN.
（１１）障壁層がＧａＩｎＮまたはＧａＮからなることを特徴とする上記（２）〜（１０）のいずれか一項に記載の窒化物半導体。 (11) The nitride semiconductor as described in any one of (2) to (10) above, wherein the barrier layer is made of GaInN or GaN.
（１２）井戸層および／または障壁層がｎ型ドーパントを含んでいることを特徴とする上記（１）〜（１１）のいずれか一項に記載の窒化物半導体。 (12) The nitride semiconductor as described in any one of (1) to (11) above, wherein the well layer and / or the barrier layer contains an n-type dopant.
（１３）ｎ型ドーパントがＳｉである上記（１２）に記載の窒化物半導体。
（１４）ｎ型ドーパントがＧｅである上記（１２）に記載の窒化物半導体。
(13) The nitride semiconductor according to (12), wherein the n-type dopant is Si.
(14) The nitride semiconductor according to (12), wherein the n-type dopant is Ge.
（１５）井戸層および／または障壁層のｎ型ドーパント濃度が周期的に変化していることを特徴とする上記（１２）〜（１４）のいずれか一項に記載の窒化物半導体。 (15) The nitride semiconductor as described in any one of (12) to (14) above, wherein the n-type dopant concentration in the well layer and / or the barrier layer is periodically changed.
（１６）ｎ型ドーパントを含む層とアンドープの層とが交互に積層されていることを特徴とする上記（１５）に記載の窒化物半導体。 (16) The nitride semiconductor as described in (15) above, wherein layers containing n-type dopants and undoped layers are alternately laminated.
（１７）ｎ型ドーパント濃度の低い層の厚さがｎ型ドーパント濃度の高い層の厚さ以上であることを特徴とする上記（１５）または（１６）に記載の窒化物半導体。 (17) The nitride semiconductor as described in (15) or (16) above, wherein the thickness of the layer having a low n-type dopant concentration is not less than the thickness of the layer having a high n-type dopant concentration.
（１８）ｎ型ドーパントが存在する層のｎ型ドーパント濃度が１×１０16ｃｍ-3以上で５×１０19ｃｍ-3以下であることを特徴とする上記（１２）〜（１７）のいずれか一項に記載の窒化物半導体。
(18) Any of the above (12) to (17), wherein the n-type dopant concentration of the layer in which the n-type dopant is present is 1 × 10 16 cm −3 or more and 5 × 10 19 cm −3 or less. The nitride semiconductor according to
（１９）上記（１）〜（１８）のいずれか一項に記載の窒化物半導体のｎ型層に負極が設けられ、かつｐ型層に正極が設けられた窒化物半導体発光素子。 (19) A nitride semiconductor light-emitting device in which a negative electrode is provided in the n-type layer of the nitride semiconductor according to any one of (1) to (18) and a positive electrode is provided in a p-type layer.
（２０）上記（１）〜（１８）のいずれか一項に記載の窒化物半導体を用いている発光ダイオード。 (20) A light-emitting diode using the nitride semiconductor according to any one of (1) to (18).
（２１）上記（１）〜（１８）のいずれか一項に記載の窒化物半導体を用いているレーザー素子。 (21) A laser device using the nitride semiconductor according to any one of (1) to (18).
（２２）上記（１）〜（１８）のいずれか一項に記載の窒化物半導体を用いているランプ。 (22) A lamp using the nitride semiconductor according to any one of (1) to (18).
（２３）基板上に窒化物半導体からなるｎ型層、量子井戸構造の発光層、およびｐ型層を順次積層させて量子井戸構造を有する窒化物半導体を製造する際に、量子井戸構造における障壁層の成長を、井戸層成長後昇温して井戸層よりも高温で成長させた後に降温し、降温された状態でさらに障壁層の成長を行なうことを特徴とする窒化物半導体の製造方法。 (23) When manufacturing a nitride semiconductor having a quantum well structure by sequentially laminating an n-type layer made of a nitride semiconductor, a light emitting layer having a quantum well structure, and a p-type layer on a substrate, a barrier in the quantum well structure A method for producing a nitride semiconductor, characterized in that the growth of the layer is performed after the well layer is grown and then heated to a temperature higher than that of the well layer, and then the temperature is lowered and the barrier layer is further grown in the lowered state.
（２４）昇温前にもさらに障壁層の成長を行なうことを特徴とする上記（２３）に記載の窒化物半導体の製造方法。 (24) The method for producing a nitride semiconductor as described in (23) above, wherein the barrier layer is further grown before the temperature rises.
（２５）昇温および降温中の少なくとも一の工程においてさらに障壁層を成長させることを特徴とする上記（２３）または（２４）に記載の窒化物半導体の製造方法。 (25) The method for producing a nitride semiconductor as described in (23) or (24) above, wherein a barrier layer is further grown in at least one step of raising and lowering the temperature.
（２６）障壁層がｎ型ドーパントを含有していることを特徴とする上記（２３）〜（２５）のいずれか一項に記載の窒化物半導体の製造方法。 (26) The method for producing a nitride semiconductor as described in any one of (23) to (25) above, wherein the barrier layer contains an n-type dopant.
（２７）上記（１）〜（１８）のいずれか一項に記載の窒化物半導体の発光層およびｐ型層の一部を除去してｎ型層を露出させる工程、露出したｎ型層に負極を設ける工程およびｐ型層に正極を設ける工程からなる窒化物半導体発光素子の製造方法。 (27) A step of removing a part of the light emitting layer and the p-type layer of the nitride semiconductor according to any one of (1) to (18) to expose the n-type layer, A method for manufacturing a nitride semiconductor light emitting device comprising a step of providing a negative electrode and a step of providing a positive electrode on a p-type layer.
（２８）上記（１９）に記載の窒化物半導体発光素子にリード線を設ける工程を含む発光ダイオードの製造方法。 (28) A method for manufacturing a light-emitting diode, including a step of providing a lead wire in the nitride semiconductor light-emitting device according to (19).
（２９）上記（１９）に記載の窒化物半導体発光素子にリード線を設ける工程を含むレーザー素子の製造方法。 (29) A method for manufacturing a laser device, comprising a step of providing a lead wire on the nitride semiconductor light emitting device according to (19).
（３０）上記（１９）記載の窒化物半導体発光素子に蛍光体を有するカバーを設ける工程を含むランプの製造方法。 (30) A method for manufacturing a lamp, comprising a step of providing a cover having a phosphor on the nitride semiconductor light emitting device according to (19).
本発明によれば、井戸層の成長に適した基板温度で井戸層を成長した後に、障壁層の成長温度を制御することにより、半導体の結晶性に優れ、発光効率が高く、逆耐圧特性の劣化が少ない窒化物半導体発光素子を形成することができる。 According to the present invention, after the well layer is grown at a substrate temperature suitable for the growth of the well layer, by controlling the growth temperature of the barrier layer, the semiconductor has excellent crystallinity, high luminous efficiency, and reverse breakdown voltage characteristics. A nitride semiconductor light emitting device with little deterioration can be formed.
また、成長温度を制御しつつ、井戸層および／または障壁層にｎ型ドーパントをドープすることにより、逆耐圧特性を維持しつつ、駆動電圧が低い窒化物半導体発光素子を形成することができる。 Further, by doping the well layer and / or the barrier layer with an n-type dopant while controlling the growth temperature, a nitride semiconductor light emitting device with a low driving voltage can be formed while maintaining the reverse breakdown voltage characteristics.
本発明は、基板上に窒化物半導体からなるｎ型層、発光層およびｐ型層を有し、発光層が井戸層と前記井戸層よりもバンドギャップエネルギーが大きい障壁層とを有する量子井戸構造の窒化物半導体において、その量子井戸構造を特定の温度条件で製造することを特徴とする。 The present invention has a quantum well structure having an n-type layer made of a nitride semiconductor, a light-emitting layer, and a p-type layer on a substrate, the light-emitting layer having a well layer and a barrier layer having a larger band gap energy than the well layer. In the nitride semiconductor, the quantum well structure is manufactured under a specific temperature condition.
図１は、本発明の一例である実施例１における窒化物半導体発光層の量子井戸構造成長温度プロファイルを示す図である。この成長温度プロファイル中、井戸層（６）に引き続いて低温で成長開始される障壁層（１）を以降「障壁層Ａ」、昇温過程で成長される障壁層（２）を「障壁層Ｂ」、高温度で実質的に保持されながら成長される障壁層（３）を「障壁層Ｃ」、温度降下中に成長される障壁層（４）を「障壁層Ｄ」、温度降下後に実質的に低温に保持させながら成長する障壁層（５）を「障壁層Ｅ」と表記する。 FIG. 1 is a graph showing a quantum well structure growth temperature profile of a nitride semiconductor light emitting layer in Example 1 which is an example of the present invention. In this growth temperature profile, the barrier layer (1) that starts growing at a low temperature following the well layer (6) is referred to as “barrier layer A”, and the barrier layer (2) that is grown in the temperature rising process is referred to as “barrier layer B”. The barrier layer (3) grown while being substantially held at high temperature is “barrier layer C”, the barrier layer (4) grown during the temperature drop is “barrier layer D”, and substantially after the temperature drop. The barrier layer (5) grown while being kept at a low temperature is denoted as “barrier layer E”.
本発明の窒化物半導体において、その組成はｎ型層、発光層およびｐ型層の各層において従来公知の如何なる組成のものも使用できる。通常、一般式ＩｎxＡｌyＧａ1-x-yＮ（０≦ｘ＜１、０≦ｙ＜１、０≦ｘ＋ｙ＜１）で表わされる組成のものが、各層においてそれぞれ特定の組成比で用いられる。ｎ型層およびｐ型層には一般式ＡｌyＧａ1-yＮ（０≦ｙ＜１）で表わされる組成が好ましい。その構造も従来公知の如何なる構造のものでも使用できる。通常の構造としては、発光層をｐ型層とｎ型層で挟む構造を持ち、ｐ型層、ｎ型層の一部に電極を設けるコンタクト層を設けても良い。ｐ型層とｎ型層に接した電極から電流の注入を行い発光させる。 In the nitride semiconductor of the present invention, any known composition can be used for each of the n-type layer, light-emitting layer, and p-type layer. Usually, of the general formula In x Al y Ga 1-xy N (0 ≦ x <1,0 ≦ y <1,0 ≦ x + y <1) composition represented by is used in each specific composition ratio in each layer . For the n-type layer and the p-type layer, a composition represented by the general formula Al y Ga 1-y N (0 ≦ y <1) is preferable. Any known structure can be used. As a normal structure, a light emitting layer may be sandwiched between a p-type layer and an n-type layer, and a contact layer may be provided in which electrodes are provided in part of the p-type layer and the n-type layer. Current is injected from the electrodes in contact with the p-type layer and the n-type layer to emit light.
本発明の窒化物半導体において、基板には、サファイア、ＳｉＣ、ＧａＮ、ＡｌＮ、Ｓｉ、ＺｎＯ等その他の酸化物基板等従来公知の如何なるものでも使用できる。好ましくはサファイアである。基板上に窒化物半導体をエピタキシャル成長させるために、バッファ層（ＧａＮバッファ、ＡｌＮバッファ、ＳｉＮバッファ、ＡｌＧａＮバッファ等）を設けておいてもよい。 In the nitride semiconductor of the present invention, any conventionally known substrate such as sapphire, SiC, GaN, AlN, Si, ZnO or another oxide substrate can be used as the substrate. Sapphire is preferable. In order to epitaxially grow a nitride semiconductor on the substrate, a buffer layer (GaN buffer, AlN buffer, SiN buffer, AlGaN buffer, etc.) may be provided.
本発明の窒化物半導体において、発光層はバンドギャップエネルギーの小さい井戸層をバンドギャップエネルギーの大きい障壁層で挟み込んだ量子井戸構造が好ましい。井戸層と障壁層からなる量子井戸構造のペア数（井戸層および障壁層の組を１ペアとする）としては、特に制限はないが、通常は１から１００、好ましくは１から５０、より好ましくは１から２０である。１００より大きいと通常生産性が落ちるので好ましくない。 In the nitride semiconductor of the present invention, the light emitting layer preferably has a quantum well structure in which a well layer having a small band gap energy is sandwiched between barrier layers having a large band gap energy. The number of pairs of quantum well structures composed of a well layer and a barrier layer (the pair of well layer and barrier layer is one pair) is not particularly limited, but is usually 1 to 100, preferably 1 to 50, more preferably Is from 1 to 20. If it is larger than 100, productivity is usually lowered, which is not preferable.
井戸層の組成はＩｎx1Ｇａ1-x1Ｎ（０≦ｘ１≦０．５）が所望の波長を得るために好ましい。ｘ１は、０．０１より大きいことがさらに好ましく、特に好ましくは０．０５より大きくする。そうすることにより所望の波長が得られやすくなる。障壁層の組成はＩｎx2Ｇａ1-x2Ｎ（０≦ｘ２＜ｘ１）がキャリアの閉じ込め効果の点で好ましい。ｘ１とｘ２との差（ｘ１-ｘ２）は０．０１より大きいことが好ましく、０．０５より大きいとさらに好ましい。この差が０．０１より小さいとキャリアの閉じ込めができない。また、ｘ２は０．１より小さいことが特に好ましい。 The composition of the well layer is preferably In x1 Ga 1 -x1 N (0 ≦ x1 ≦ 0.5) in order to obtain a desired wavelength. x1 is more preferably larger than 0.01, and particularly preferably larger than 0.05. By doing so, it becomes easier to obtain a desired wavelength. The composition of the barrier layer is preferably In x2 Ga 1 -x2 N (0 ≦ x2 <x1) from the viewpoint of the carrier confinement effect. The difference (x1−x2) between x1 and x2 is preferably greater than 0.01, and more preferably greater than 0.05. If this difference is smaller than 0.01, carriers cannot be confined. X2 is particularly preferably smaller than 0.1.
また、井戸層および／または障壁層にｎ型ドーパントを含有させることができる。ｎ型ドーパントを含有するか否かにかかわらず、従来例よりも高効率の発光が得られる。ｎ型ドーパントを含有した場合、輝度は若干低下するものの、駆動電圧が大幅に低下する。例えば電流２０ｍＡで、駆動電圧は０．４Ｖ程度低下する。特に、障壁層がｎ型ドーパントを含有する場合、駆動電圧の低下効果は大きい。 Further, an n-type dopant can be contained in the well layer and / or the barrier layer. Irrespective of whether or not it contains an n-type dopant, light emission with higher efficiency than the conventional example can be obtained. When the n-type dopant is contained, the luminance is slightly lowered, but the driving voltage is greatly lowered. For example, at a current of 20 mA, the drive voltage decreases by about 0.4V. In particular, when the barrier layer contains an n-type dopant, the effect of reducing the driving voltage is great.
ｎ型ドーパントとしては、従来公知のｎ型ドーパントを何ら制限なく用いることができる。例えば、シリコン（Ｓｉ）、ゲルマニウム（Ｇｅ）、錫（Ｓｎ）、硫黄（Ｓ）、セレン（Ｓｅ）およびテルル（Ｔｅ）等が挙げられる。なかでもシリコン（Ｓｉ）およびゲルマニウム（Ｇｅ）が好ましい。 As the n-type dopant, a conventionally known n-type dopant can be used without any limitation. Examples include silicon (Si), germanium (Ge), tin (Sn), sulfur (S), selenium (Se), and tellurium (Te). Of these, silicon (Si) and germanium (Ge) are preferable.
ｎ型ドーパントの含有量は、用いるドーパントの種類によって異なるが、通常１×１０16ｃｍ-3以上で５×１０19ｃｍ-3以下が好ましい。この範囲であれば、輝度はあまり低下せず、駆動電圧が大幅に低下する。 The content of the n-type dopant varies depending on the type of dopant used, but is usually 1 × 10 16 cm −3 or more and preferably 5 × 10 19 cm −3 or less. If it is this range, a brightness | luminance will not fall very much and a drive voltage will fall significantly.
ｎ型ドーパントの濃度（含有量）は井戸層および／または障壁層全体に亙って一様でもよいが、井戸層および／または障壁層において濃度を周期的に変化させることができる。周期的に変化させた場合、各層の表面平坦性が改良されるので好ましい。周期的に変化させる場合、ドーパントの供給を３〜３０秒間隔で切り替えることが好ましく、より好ましくは５〜２０秒間隔である。周期数がこの範囲内であれば、上述の効果が発揮される。 The concentration (content) of the n-type dopant may be uniform throughout the well layer and / or the barrier layer, but the concentration can be periodically changed in the well layer and / or the barrier layer. When it is changed periodically, the surface flatness of each layer is improved, which is preferable. When changing periodically, it is preferable to switch supply of a dopant at intervals of 3 to 30 seconds, and more preferably at intervals of 5 to 20 seconds. If the number of periods is within this range, the above-described effect is exhibited.
濃度を周期的に変化させる場合、高濃度層が上述の範囲の含有量であればよい。低濃度層の含有量はさらに少なくてもよい。むしろアンドープが表面平坦性の改良に優れ、駆動電圧が低下するという点で好ましい。高濃度層および低濃度層のそれぞれの厚さは、通常０．１〜０．２ｎｍの範囲が好ましい。この範囲内で低濃度層が高濃度層よりも厚い方が、ドーパント含有層で発生するピットをアンドープ層が埋めて、優れた平坦性が得られるので好ましい。 When the concentration is periodically changed, the high-concentration layer may have a content in the above range. The content of the low concentration layer may be further reduced. Rather, undoped is preferable in that the surface flatness is improved and the driving voltage is lowered. The thickness of each of the high concentration layer and the low concentration layer is usually preferably in the range of 0.1 to 0.2 nm. Within this range, it is preferable that the low-concentration layer is thicker than the high-concentration layer because the undoped layer fills the pits generated in the dopant-containing layer and excellent flatness is obtained.
本発明において、障壁層を形成させる際の温度は重要である。本発明の障壁層は、井戸層よりも高い温度で形成された障壁層Ｃおよび障壁層Ｃよりも低温で形成された障壁層Ｅの少なくとも２層がこの順序で積層されている。これらの層のどちらかを欠くと逆耐圧特性の経時劣化を防ぎ得ない。 In the present invention, the temperature at which the barrier layer is formed is important. In the barrier layer of the present invention, at least two layers of a barrier layer C formed at a temperature higher than that of the well layer and a barrier layer E formed at a temperature lower than that of the barrier layer C are laminated in this order. If one of these layers is missing, the reverse breakdown voltage characteristics cannot be prevented from aging.
井戸層の温度範囲は６００℃から１０００℃が好ましく、さらに好ましくは６５０℃から９５０℃であり、特に好ましくは７００℃から８００℃である。井戸層の温度が６００℃より低い場合には結晶性の悪化を招き、温度が１０００℃より高い場合は所望のＩｎ濃度を得ることが出来ない。障壁層Ｃの温度範囲は６５０℃から１３００℃が好ましく、さらに好ましくは７００℃から１２５０℃であり、特に好ましくは７５０℃から１２００℃である。障壁層Ｃの温度が６５０℃より低い場合は結晶性の悪化を招き、１３００℃より高い場合は井戸層へのダメージが懸念される。障壁層Ｅの温度範囲は６００℃から１２５０℃が好ましく、さらに好ましくは６５０℃から１０００℃であり、特に好ましくは７００℃から９００℃である。障壁層Ｅの温度が６００℃より低い場合は半導体の結晶性が悪化するため好ましくない。１２５０℃より高い場合は逆耐圧特性の経時劣化を防ぎ得ない。 The temperature range of the well layer is preferably 600 ° C to 1000 ° C, more preferably 650 ° C to 950 ° C, and particularly preferably 700 ° C to 800 ° C. When the temperature of the well layer is lower than 600 ° C., the crystallinity is deteriorated, and when the temperature is higher than 1000 ° C., a desired In concentration cannot be obtained. The temperature range of the barrier layer C is preferably 650 ° C. to 1300 ° C., more preferably 700 ° C. to 1250 ° C., and particularly preferably 750 ° C. to 1200 ° C. When the temperature of the barrier layer C is lower than 650 ° C., the crystallinity is deteriorated, and when it is higher than 1300 ° C., there is a concern about damage to the well layer. The temperature range of the barrier layer E is preferably 600 ° C. to 1250 ° C., more preferably 650 ° C. to 1000 ° C., and particularly preferably 700 ° C. to 900 ° C. When the temperature of the barrier layer E is lower than 600 ° C., the crystallinity of the semiconductor deteriorates, which is not preferable. When the temperature is higher than 1250 ° C., the deterioration with time of the reverse withstand voltage characteristic cannot be prevented.
井戸層と障壁層Ｃの温度差としては、実効温度で５０℃以上３００℃以下が好ましく、さらに好ましくは１００℃以上であり、特に好ましくは１５０℃以上である。また、障壁層Ｃと障壁層Ｅの温度差としても、実効温度で５０℃以上３００℃以下が好ましく、さらに好ましくは１００℃以上であり、特に好ましくは１５０℃以上である。井戸層と障壁層Ｃの温度差もしくは障壁層Ｃと障壁層Ｅの温度差が５０℃より小さい場合は本発明による高発光効率は得られず、エージングによる逆耐圧の低下防止効果も弱くなる。さらに温度差が３００℃より大きい場合は井戸層にダメージを与え、発光効率が低くなる。 The temperature difference between the well layer and the barrier layer C is preferably 50 ° C. or higher and 300 ° C. or lower in terms of effective temperature, more preferably 100 ° C. or higher, and particularly preferably 150 ° C. or higher. Further, the temperature difference between the barrier layer C and the barrier layer E is preferably 50 ° C. or more and 300 ° C. or less, more preferably 100 ° C. or more, and particularly preferably 150 ° C. or more in terms of effective temperature. When the temperature difference between the well layer and the barrier layer C or the temperature difference between the barrier layer C and the barrier layer E is smaller than 50 ° C., the high light emission efficiency according to the present invention cannot be obtained, and the effect of preventing the reverse breakdown voltage from being lowered due to aging is weakened. Further, when the temperature difference is larger than 300 ° C., the well layer is damaged and the luminous efficiency is lowered.
また、障壁層ＣおよびＥを成長させる際に、温度を変更しつつ（例えば障壁層Ｃを一定温度に保たず変温させながら）成長することによっても、障壁層Ｃの温度が障壁層Ｅの温度よりも高い限り、同様に優れた発光効率と逆耐圧の低下防止効果が得られる。 Further, when the barrier layers C and E are grown, the temperature of the barrier layer C is also changed by changing the temperature (for example, changing the temperature without changing the barrier layer C to a constant temperature). As long as the temperature is higher than the above temperature, similarly excellent luminous efficiency and the effect of preventing the reverse breakdown voltage from being lowered can be obtained.
さらに、障壁層Ｃよりも低温で成長させた障壁層Ａを、障壁層Ｃの手前に設けた障壁層Ａ、障壁層Ｃおよび障壁層Ｅがこの順序で積層した３層構造にすると、高い発光強度が得られるので好ましい。この場合、障壁層Ａの温度と障壁層Ｃの温度との差の好ましい範囲は、障壁層Ｅと障壁層Ｃとの場合の好ましい範囲と同様である。 Further, when the barrier layer A grown at a lower temperature than the barrier layer C has a three-layer structure in which the barrier layer A, the barrier layer C, and the barrier layer E provided in front of the barrier layer C are stacked in this order, high light emission. Since strength is obtained, it is preferable. In this case, the preferable range of the difference between the temperature of the barrier layer A and the temperature of the barrier layer C is the same as the preferable range in the case of the barrier layer E and the barrier layer C.
また、障壁層Ｃを形成するための昇温工程および障壁層Ｅを形成するための降温工程においても障壁層を成長させて、それぞれ障壁層Ｂおよび障壁層Ｄを形成してもよい。障壁層Ｂおよび障壁層Ｄを形成させた場合、高い発光強度が得られるので好ましい。 In addition, the barrier layer may be grown in the temperature raising step for forming the barrier layer C and the temperature lowering step for forming the barrier layer E to form the barrier layer B and the barrier layer D, respectively. The formation of the barrier layer B and the barrier layer D is preferable because high emission intensity can be obtained.
本発明による量子井戸構造をなすために適当な井戸層の膜厚範囲は１ｎｍから８ｎｍが好ましく、さらに好ましくは１ｎｍから６ｎｍであり、特に好ましくは１ｎｍから４ｎｍである。１ｎｍ未満では良い発光強度が得られないので好ましくなく、８ｎｍより大きいと井戸層の閉じ込め効果が得られないので好ましくない。障壁層Ａ〜Ｅの合計膜厚範囲は３ｎｍから４０ｎｍが好ましく、さらに好ましくは３ｎｍから３０ｎｍであり、特に好ましくは３ｎｍから２０ｎｍである。４０ｎｍより大きいと順方向の電流特性に悪影響を及ぼすため好ましくない。３ｎｍ未満ではキャリアの閉じ込め効果が不十分となるので好ましくない。障壁層Ｃおよび障壁層Ｅの厚さはそれぞれ少なくとも１ｎｍあることが好ましい。障壁層Ｃが１ｎｍより小さいと発光強度が十分でなく、障壁層Ｅが１ｎｍより小さいと逆耐圧の経時劣化防止効果が十分でない。他の障壁層の厚さは、障壁層全体が上記の範囲に入るように適宜決めればよい。 A suitable well layer thickness range for forming a quantum well structure according to the present invention is preferably 1 nm to 8 nm, more preferably 1 nm to 6 nm, and particularly preferably 1 nm to 4 nm. If it is less than 1 nm, it is not preferable because good light emission intensity cannot be obtained, and if it is more than 8 nm, it is not preferable because the confinement effect of the well layer cannot be obtained. The total film thickness range of the barrier layers A to E is preferably 3 nm to 40 nm, more preferably 3 nm to 30 nm, and particularly preferably 3 nm to 20 nm. If it is larger than 40 nm, the forward current characteristics are adversely affected, which is not preferable. If it is less than 3 nm, the carrier confinement effect becomes insufficient, which is not preferable. The thickness of each of the barrier layer C and the barrier layer E is preferably at least 1 nm. If the barrier layer C is smaller than 1 nm, the light emission intensity is not sufficient, and if the barrier layer E is smaller than 1 nm, the effect of preventing reverse breakdown over time is not sufficient. The thickness of the other barrier layer may be determined as appropriate so that the entire barrier layer falls within the above range.
本発明の窒化物半導体を作る方法としては、有機金属気相成長（ＭＯＣＶＤ）法が好ましいが、他に分子線エピタキシー法（ＭＢＥ法）あるいは水素化物気相エピタキシー法（ＨＶＰＥ法）等従来公知の如何なる方法を用いてもよい。 The method for producing the nitride semiconductor of the present invention is preferably a metal organic chemical vapor deposition (MOCVD) method, but other known methods such as a molecular beam epitaxy method (MBE method) or a hydride vapor phase epitaxy method (HVPE method). Any method may be used.
ＭＯＣＶＤ法はこの技術分野でよく知られており、従来公知の如何なる条件で行なってもよい。 The MOCVD method is well known in this technical field, and may be performed under any known condition.
例えば、キャリアガスとして水素または窒素を用いて、窒素源としてアンモニア（ＮＨ3）またはヒドラジンを用いることができる。ＩＩＩ族元素源としては、トリメチルガリウム（ＴＭＧ）、トリエチルガリウム（ＴＥＧ）、トリメチルアルミニウム（ＴＭＡ）およびトリメチルインジウム（ＴＭＩ）等を用いることができる。これら原料ガスの圧力は用いる装置によって異なるが一般に２０ｋＰａ〜１２０ｋＰａである。 For example, hydrogen or nitrogen can be used as a carrier gas, and ammonia (NH 3 ) or hydrazine can be used as a nitrogen source. As the group III element source, trimethylgallium (TMG), triethylgallium (TEG), trimethylaluminum (TMA), trimethylindium (TMI), or the like can be used. Although the pressure of these raw material gas changes with apparatuses to be used, it is generally 20kPa-120kPa.
また、ｎ型ドーパントの原料としては、Ｓｉ源として例えばモノシラン（ＳｉＨ4）等が使用できる。Ｇｅ源としてはゲルマンガス（ＧｅＨ4）や、テトラメチルゲルマニウム（（ＣＨ3）4Ｇｅ）やテトラエチルゲルマニウム（（Ｃ2Ｈ5）4Ｇｅ）等の有機ゲルマニウム化合物を利用できる。ＭＢＥ法では、元素状のゲルマニウムもドーピング源として利用できる。例えば、ＭＯＣＶＤ法では、Ｇｅドープｎ型窒化ガリウム層は、サファイア基板上に、（ＣＨ3）4Ｇｅを使用して形成する。ｐ型ドーパントとしてはジメチル亜鉛（Ｚｎ（ＣＨ3）2）またはシクロペンタジエニルマグネシウム（Ｃｐ2Ｍｇ）等を用いることができる。 Moreover, as a raw material of the n-type dopant, for example, monosilane (SiH 4 ) or the like can be used as the Si source. As the Ge source, germanium gas (GeH 4 ), organic germanium compounds such as tetramethyl germanium ((CH 3 ) 4 Ge) and tetraethyl germanium ((C 2 H 5 ) 4 Ge) can be used. In the MBE method, elemental germanium can also be used as a doping source. For example, in the MOCVD method, the Ge-doped n-type gallium nitride layer is formed on the sapphire substrate using (CH 3 ) 4 Ge. As the p-type dopant, dimethyl zinc (Zn (CH 3 ) 2 ), cyclopentadienyl magnesium (Cp 2 Mg), or the like can be used.
以下に、本発明に係わる窒化物半導体について実施例に基づいて説明するが、本発明はこれらの実施例に限定されるものではない。 Although the nitride semiconductor concerning this invention is demonstrated based on an Example below, this invention is not limited to these Examples.
（実施例１）
本実施例１では、ＭＯＣＶＤ法を用いて、サファイア基板上にバッファ層およびｎ型層を形成し、その上に多重量子井戸構造を積層させ、さらにＭｇをドープしたｐ型ＧａＮ層を積層して窒化物半導体を作製した。
(Example 1)
In Example 1, a MOCVD method is used to form a buffer layer and an n-type layer on a sapphire substrate, a multiple quantum well structure is laminated thereon, and a p-type GaN layer doped with Mg is further laminated. A nitride semiconductor was produced.
上記のＧａＮ層を含む窒化物半導体の作製は、ＭＯＣＶＤ法を用いて以下の手順で行なった。まず、サファイア基板を、誘導加熱式ヒータのＲＦコイルの中に設置された石英製の反応炉の中に導入した。サファイア基板は、加熱用のカーボン製サセプター上に載置した。基板載置後、反応炉内を真空引きしてガスを排出し、窒素ガスを流通して反応炉内をパージした。窒素ガスを１０分間に渡って流通した後、誘導加熱式ヒータを作動させ、１０分をかけて基板温度を１１７０℃に昇温した。基板温度を１１７０℃に保ったまま、水素ガスと窒素ガスを流通させながら９分間放置して、基板表面のサーマルクリーニングを行った。サーマルクリーニングを行っている間に、反応炉に接続された原料であるトリメチルガリウム（ＴＭＧ）、シクロペンタジエニルマグネシウム（Ｃｐ2Ｍｇ）の入った容器（バブラ）の配管に水素キャリアガスを流通して、バブリングを開始した。各バブラの温度は、温度を調整するための恒温槽を用いて一定に調整しておいた。バブリングによって発生した原料の蒸気は、ＧａＮ層の成長工程が始まるまでは、キャリアガスと一緒に除外装置への配管へ流通させ、除外装置を通して系外へ放出した。サーマルクリーニングの終了後、誘導加熱式ヒータを調節して基板の温度を５１０℃に降温し、窒素からなるキャリアガスのバルブを切り替え、反応炉内への窒素の供給を開始した。その１０分後に、ＴＭＧの配管およびアンモニアガスの配管のバルブを切り替え、ＴＭＧとアンモニアを反応炉内へ供給し、ＧａＮからなるバッファ層を基板上に形成した。約１０分間に渡ってバッファ層の成長を行ったあと、ＴＭＧの配管のバルブを切り替えて、ＴＭＧの供給を停止し、バッファ層の成長を終了した。 Fabrication of the nitride semiconductor including the GaN layer was performed by the following procedure using the MOCVD method. First, the sapphire substrate was introduced into a quartz reactor installed in an RF coil of an induction heating heater. The sapphire substrate was placed on a carbon susceptor for heating. After placing the substrate, the inside of the reaction furnace was evacuated to discharge the gas, and nitrogen gas was circulated to purge the inside of the reaction furnace. After flowing nitrogen gas for 10 minutes, the induction heater was activated, and the substrate temperature was raised to 1170 ° C. over 10 minutes. While maintaining the substrate temperature at 1170 ° C., the substrate surface was left to stand for 9 minutes while flowing hydrogen gas and nitrogen gas to perform thermal cleaning of the substrate surface. While performing thermal cleaning, hydrogen carrier gas was circulated through the piping of the vessel (bubbler) containing trimethylgallium (TMG) and cyclopentadienylmagnesium (Cp 2 Mg) as raw materials connected to the reactor. And started bubbling. The temperature of each bubbler was adjusted to be constant using a thermostatic bath for adjusting the temperature. The raw material vapor generated by the bubbling was circulated to the piping to the exclusion device together with the carrier gas until the GaN layer growth process started, and was discharged out of the system through the exclusion device. After completion of the thermal cleaning, the temperature of the substrate was lowered to 510 ° C. by adjusting the induction heating type heater, the carrier gas valve made of nitrogen was switched, and supply of nitrogen into the reaction furnace was started. Ten minutes later, the valves of the TMG pipe and the ammonia gas pipe were switched to supply TMG and ammonia into the reaction furnace to form a buffer layer made of GaN on the substrate. After growing the buffer layer for about 10 minutes, the TMG piping valve was switched to stop the supply of TMG, and the growth of the buffer layer was completed.
バッファ層を形成した後、ｎ型層を積層した。まず、基板の温度を１０６０℃に昇温させた。昇温中、バッファ層が昇華しないように、キャリアガスである窒素と水素に加えてアンモニアガスを反応炉内に供給した。その後１１５０℃に昇温し、温度が安定したのを確認した後、ＴＭＧの配管のバルブを切り替え、これらの原料の蒸気を含む気体を反応炉内へ供給して、バッファ層上にＧａＮ層の成長を行った。約１時間に渡って上記のＧａＮ層の成長を行ったあと、ＳｉＨ4の配管バルブを切り替え、ＳｉドープされたＧａＮ層を約１時間に渡って成長させた。その後バルブ操作により、成長を中断し、８００℃まで降温し、トリエチルガリウム（ＴＥＧ）、トリメチルインジウム（ＴＭＩ）およびアンモニアガスのバルブ操作によりＩｎ0.04Ｇａ0.96Ｎからなるクラッド層を成長させた。 After forming the buffer layer, an n-type layer was stacked. First, the temperature of the substrate was raised to 1060 ° C. During the temperature increase, ammonia gas was supplied into the reaction furnace in addition to the carrier gases nitrogen and hydrogen so that the buffer layer did not sublime. Thereafter, the temperature was raised to 1150 ° C., and after confirming that the temperature was stabilized, the valves of the TMG pipes were switched, and a gas containing vapors of these raw materials was supplied into the reactor, and the GaN layer was formed on the buffer layer. Made growth. After the growth of the GaN layer for about 1 hour, the SiH 4 piping valve was switched to grow the Si-doped GaN layer for about 1 hour. Thereafter, the growth was interrupted by valve operation, the temperature was lowered to 800 ° C., and a cladding layer made of In 0.04 Ga 0.96 N was grown by valve operation of triethylgallium (TEG), trimethylindium (TMI), and ammonia gas.
この後、本発明に関わる量子井戸構造の発光層を積層した。図１は本実施例に関わる量子井戸構造の温度の成長プロファイルを示す。 Then, the light emitting layer of the quantum well structure in connection with this invention was laminated | stacked. FIG. 1 shows a temperature growth profile of a quantum well structure according to this example.
基板の温度を８００℃に維持したままで、キャリアガスとして窒素（１４リットル／分）を使用し、アンモニア（１４リットル／分）およびＴＥＧ（３０ｃｃ／分）を供給して、ＧａＮからなる量子井戸構造の障壁層Ａを１分間成長させた。その後１０００℃まで２分間掛けて昇温させつつ、障壁層Ｂを成長させ、１０００℃にて２分間保持しつつ障壁層Ｃを成長させた。その後８００℃に２分間掛けて降温しながら障壁層Ｄを成長させ、最後に８００℃で４分間保持しつつ障壁層Ｅを成長させた。（以後量子井戸構造の最初の障壁層を障壁層１と記載する、同様に最初の井戸層を井戸層１、次の障壁層を障壁層２、以下順次障壁層３，４，５とする。）
While maintaining the substrate temperature at 800 ° C., nitrogen (14 liters / minute) is used as a carrier gas, ammonia (14 liters / minute) and TEG (30 cc / minute) are supplied, and a quantum well made of GaN The barrier layer A of the structure was grown for 1 minute. Thereafter, the barrier layer B was grown while raising the temperature to 1000 ° C. over 2 minutes, and the barrier layer C was grown while maintaining the temperature at 1000 ° C. for 2 minutes. Thereafter, the barrier layer D was grown while lowering the temperature at 800 ° C. for 2 minutes, and finally the barrier layer E was grown while maintaining at 800 ° C. for 4 minutes. (Hereinafter, the first barrier layer of the quantum well structure is referred to as a
その後８００℃の温度を維持した状態でさらにＴＭＩ（３０ｃｃ／分）を３分間供給し、Ｉｎ0.07Ｇａ0.93Ｎからなる量子井戸構造の井戸層１を成長させた。
Thereafter, TMI (30 cc / min) was further supplied for 3 minutes while maintaining a temperature of 800 ° C., thereby growing a
同様の手順を５回繰り返すことで、井戸層５まで成長させた後、さらに障壁層６を成長させ、多重量子井戸構造を作成した。原料ガスの供給圧力は５０ｋＰａであった。
By repeating the
このようにして、５層の井戸層からなる量子井戸構造を形成した後、温度を１，０５０℃まで加熱し、バルブ操作によりＴＭＧ、Ｃｐ2Ｍｇおよびアンモニアガスを供給し、ｐ型のＧａＮ層を成長させて本発明の窒化物半導体を作製した。 After forming a quantum well structure composed of five well layers in this way, the temperature is heated to 1,050 ° C., TMG, Cp 2 Mg and ammonia gas are supplied by valve operation, and a p-type GaN layer is formed. The nitride semiconductor of the present invention was produced.
ＧａＮ層の成長を終了した後、誘導加熱式ヒータを制御して、基板の温度を室温まで２０分掛けて降温した。降温中は、反応炉内の雰囲気を成長中と同じようにアンモニアと窒素と水素から構成したが、基板の温度が４００℃となったのを確認後、アンモニアと水素の供給を停止した。その後、窒素ガスを流通しながら基板温度を室温まで降温し、作製した窒化物半導体を大気中に取り出した。 After completing the growth of the GaN layer, the temperature of the substrate was lowered to room temperature over 20 minutes by controlling an induction heater. During the temperature drop, the atmosphere in the reactor was composed of ammonia, nitrogen and hydrogen in the same way as during the growth, but after confirming that the temperature of the substrate reached 400 ° C., the supply of ammonia and hydrogen was stopped. Thereafter, the substrate temperature was lowered to room temperature while flowing nitrogen gas, and the produced nitride semiconductor was taken out into the atmosphere.
以上の工程により、ＧａＮバッファ層を有するサファイア基板上に、厚さ２μｍからなるアンドープのＧａＮ層、厚さ２μｍからなるＳｉドープのｎ型ＧａＮ層、厚さ０．２μｍからなるＩｎＧａＮクラッド層、厚さ７ｎｍからなる障壁層と厚さ３ｎｍからなる井戸層を組み合わせた多重量子井戸構造の発光層、および厚さ１５０ｎｍからなるｐ型ＧａＮ層が順次積層された本発明の窒化物半導体を得た。 Through the above steps, on the sapphire substrate having the GaN buffer layer, the undoped GaN layer having a thickness of 2 μm, the Si-doped n-type GaN layer having a thickness of 2 μm, the InGaN cladding layer having a thickness of 0.2 μm, A nitride semiconductor of the present invention was obtained in which a light emitting layer having a multiple quantum well structure in which a barrier layer having a thickness of 7 nm and a well layer having a thickness of 3 nm were combined, and a p-type GaN layer having a thickness of 150 nm were sequentially stacked.
この半導体のＳｉドープのｎ型ＧａＮ層に負極を、ｐ型ＧａＮ層に正極をそれぞれこの技術分野でよく知られた慣用の手段により設けて窒化物半導体発光素子を作製した。 A nitride semiconductor light emitting device was fabricated by providing a negative electrode on the Si-doped n-type GaN layer of the semiconductor and a positive electrode on the p-type GaN layer by conventional means well known in the art.
この発光素子に順方向で３０ｍＡの電流を流し、スタート時、２０時間後および４０時間後に逆耐圧（Ｐ−Ｎ接合を持つ発光素子に対し、逆方向に１０μＡの電流を流すために必要とする電圧の絶対値）を測定するエージングテストを行なった。その結果を図５に示す。図中、１〜５が本実施例のサンプルである。４０時間後でも逆耐圧の劣化は全く観察されなかった。 A current of 30 mA is applied to the light emitting element in the forward direction, and a reverse breakdown voltage is required at the start, 20 hours and 40 hours later (necessary for supplying a current of 10 μA in the reverse direction to the light emitting element having a PN junction). An aging test was performed to measure the absolute value of the voltage. The result is shown in FIG. In the figure, 1 to 5 are samples of this example. Even after 40 hours, no deterioration of the reverse breakdown voltage was observed.
また、電流２０ｍＡでの発光は、発光波長４６２ｎｍ、順方向電圧３．４ｍＶおよび出力６．０ｍＷであり、優れた発光効率を示した。 Further, light emission at a current of 20 mA had an emission wavelength of 462 nm, a forward voltage of 3.4 mV, and an output of 6.0 mW, and showed excellent luminous efficiency.
さらに、この発光素子に慣用の手段によりリード線を設け、また、蛍光体を有するカバーを設けることにより、発光ダイオード、レーザー素子およびランプを作製した。 Further, a light-emitting diode, a laser element, and a lamp were manufactured by providing a lead wire to the light-emitting element by a conventional means and providing a cover having a phosphor.
（実施例２）
Ｉｎ0.04Ｇａ0.96Ｎからなるクラッド層の成長後すぐに昇温を始め、２分間掛けて１０００℃まで昇温し、障壁層Ｂを形成して障壁層Ａを形成しなかったこと以外は実施例１と同様に窒化物半導体および窒化物半導体発光素子を作製した。図２に本実施例に関わる量子井戸構造の温度の成長プロファイルを示す。
(Example 2)
Example except that the temperature was raised immediately after the growth of the clad layer made of In 0.04 Ga 0.96 N, raised to 1000 ° C. over 2 minutes, the barrier layer B was formed, and the barrier layer A was not formed A nitride semiconductor and a nitride semiconductor light emitting device were fabricated in the same manner as in Example 1. FIG. 2 shows the temperature growth profile of the quantum well structure according to this example.
図５中、６〜１０が本実施例のサンプルであり、実施例１と同様に４０時間後でも逆耐圧の劣化は全く観察されなかった。 In FIG. 5, 6 to 10 are samples of this example, and no deterioration in reverse breakdown voltage was observed even after 40 hours as in Example 1.
また、電流２０ｍＡでの発光は、発光波長４６２ｎｍ、順方向電圧３．４ｍＶおよび出力５．５ｍＷであり、優れた発光効率を示した。 Further, light emission at a current of 20 mA had an emission wavelength of 462 nm, a forward voltage of 3.4 mV, and an output of 5.5 mW, and showed excellent light emission efficiency.
（実施例３）
障壁層を成長させる際にＴＭＡ（２ｃｃ／分）をさらに添加し、Ａｌ0.03Ｇａ0.97Ｎからなる障壁層としたこと、および井戸層を成長させる際にＴＭＩの流量を１０ｃｃ／分とし、Ｉｎ0.03Ｇａ0.97Ｎからなる井戸層としたこと以外は実施例１と同様に窒化物半導体および窒化物半導体発光素子を作製した。
(Example 3)
Was added TMA (2 cc / min) further in growing the barrier layer, it has a barrier layer composed of Al 0.03 Ga 0.97 N, and the flow rate of
得られた発光素子を実施例１と同様に評価したところ、４０時間後でも逆耐圧の劣化は全く観察されなかった。また、電流２０ｍＡでの発光は、発光波長３９５ｎｍ、順方向電圧３．４ｍＶおよび出力６．５ｍＷであり、紫外の発光においても優れた発光効率を示した。 When the obtained light emitting device was evaluated in the same manner as in Example 1, no deterioration in reverse breakdown voltage was observed even after 40 hours. In addition, light emission at a current of 20 mA had a light emission wavelength of 395 nm, a forward voltage of 3.4 mV, and an output of 6.5 mW, and showed excellent light emission efficiency even in ultraviolet light emission.
（実施例４）
本実施例では、実施例１におけるＳｉドープのｎ型ＧａＮ層をＧｅドープのｎ型ＧａＮ層としたこと以外は実施例１と同様の窒化物半導体および窒化物半導体発光素子を作製した。
Example 4
In this example, a nitride semiconductor and a nitride semiconductor light emitting device similar to those of Example 1 were manufactured except that the Si-doped n-type GaN layer in Example 1 was replaced with a Ge-doped n-type GaN layer.
Ｇｅドープｎ型ＧａＮ層は以下の如く形成した。実施例１におけるＳｉＨ4の代わりに、テトラメチルゲルマニウム（以下（ＣＨ3）4Ｇｅ）を流通し、その後流通を停止するサイクルを１００回繰り返し、厚さ２．０μｍのＧｅ濃度が周期的に変化するＧｅドープｎ型ＧａＮ層を形成した。それ以外は全て実施例１と同様に窒化物半導体および窒化物半導体発光素子を作製した。 The Ge-doped n-type GaN layer was formed as follows. Instead of SiH 4 in Example 1, a cycle in which tetramethyl germanium (hereinafter (CH 3 ) 4 Ge) is circulated and then stopped is repeated 100 times, and the Ge concentration with a thickness of 2.0 μm changes periodically. A Ge-doped n-type GaN layer was formed. In all other respects, a nitride semiconductor and a nitride semiconductor light emitting device were fabricated in the same manner as in Example 1.
得られた発光素子を実施例１と同様に評価したところ、４０時間後でも逆耐圧の劣化は全く観察されなかった。また、電流２０ｍＡでの発光は、発光波長４６１ｎｍ、順方向電圧３．４ｍＶおよび出力５．４ｍＷであり、優れた発光効率を示した。 When the obtained light emitting device was evaluated in the same manner as in Example 1, no deterioration in reverse breakdown voltage was observed even after 40 hours. Further, light emission at a current of 20 mA had an emission wavelength of 461 nm, a forward voltage of 3.4 mV, and an output of 5.4 mW, and showed excellent light emission efficiency.
（実施例５）
本実施例では、実施例１におけるＳｉドープのｎ型ＧａＮ層を実施例４と同様にＧｅドープのｎ型ＧａＮ層にしたこと、およびＧａＮからなる厚さ７ｎｍの障壁層をＧｅドープＧａＮからなる厚さ１６ｎｍの障壁層にしたこと以外は実施例１と同様の窒化物半導体および窒化物半導体発光素子を作製した。なお、障壁層のＧｅドープ濃度は５×１０17ｃｍ-3になるようにした。
(Example 5)
In this example, the Si-doped n-type GaN layer in Example 1 was changed to a Ge-doped n-type GaN layer as in Example 4, and the 7-nm thick barrier layer made of GaN was made of Ge-doped GaN. A nitride semiconductor and a nitride semiconductor light emitting device similar to Example 1 were fabricated except that the barrier layer was 16 nm thick. Note that the Ge doping concentration of the barrier layer was set to 5 × 10 17 cm −3 .
障壁層の形成は、Ｇｅドープ濃度が５×１０17ｃｍ-3になるようにテトラエチルゲルマニウム（ＴＥＧｅ）をさらに添加したこと、障壁層Ｃおよび障壁層Ｅの成長時間をそれぞれ８分としたこと以外は実施例１と同様に行なった。 The barrier layer was formed except that tetraethyl germanium (TEGe) was further added so that the Ge doping concentration was 5 × 10 17 cm −3 , and the growth time of the barrier layer C and the barrier layer E was set to 8 minutes, respectively. Was carried out in the same manner as in Example 1.
得られた発光素子を実施例１と同様に評価したところ、４０時間後でも逆耐圧の劣化は全く観察されなかった。また、電流２０ｍＡでの発光は、発光波長４６１ｎｍ、順方向電圧３．０ｍＶおよび出力５．０ｍＷであり、優れた発光効率を示した。 When the obtained light emitting device was evaluated in the same manner as in Example 1, no deterioration in reverse breakdown voltage was observed even after 40 hours. Further, light emission at a current of 20 mA was an emission wavelength of 461 nm, a forward voltage of 3.0 mV, and an output of 5.0 mW, and showed excellent light emission efficiency.
（比較例１）
Ｉｎ0.04Ｇａ0.96Ｎからなるクラッド層の成長までは実施例１と同じである。その後すぐに、キャリアガスとして窒素を使用してアンモニアおよびＴＥＧを供給しつつ昇温を始め、２分間掛けて１０００℃まで昇温し、アンドープのＧａＮからなる障壁層Ｂを形成し、障壁層Ａは形成しなかった。次いで１０００℃で９分間保持して障壁層Ｃを成長させた。
(Comparative Example 1)
The process up to the growth of the cladding layer made of In 0.04 Ga 0.96 N is the same as in Example 1. Immediately thereafter, the temperature was raised while supplying ammonia and TEG using nitrogen as a carrier gas, and the temperature was raised to 1000 ° C. over 2 minutes to form a barrier layer B made of undoped GaN. Did not form. Subsequently, the barrier layer C was grown by holding at 1000 ° C. for 9 minutes.
次にＴＥＧの供給を止め、基板の温度を８００℃まで降温し、障壁層Ｄは形成しなかった。８００℃になった時点でＴＥＧの供給を再開すると同時にＴＭＩも供給して、３分間この温度に維持して、ＩｎＧａＮからなる量子井戸構造の最初の井戸層を成長させ、障壁層Ｅは形成しなかった。 Next, the supply of TEG was stopped, the temperature of the substrate was lowered to 800 ° C., and the barrier layer D was not formed. At the time when the temperature reaches 800 ° C., the supply of TEG is resumed and at the same time, TMI is supplied and maintained at this temperature for 3 minutes to grow the first well layer of the quantum well structure made of InGaN, and the barrier layer E is formed. There wasn't.
その後ＴＭＩの供給を止めて１０００℃まで昇温させ、障壁層２の障壁層Ｂを成長させた。同様の手順を５回繰り返すことで、井戸層５まで成長させた後、障壁層６を成長させ、多重量子井戸構造を作製した。原料ガスの流量および圧力は実施例１と同じである。図３に本比較例に関わる量子井戸構造の温度の成長プロファイルを示す。
Thereafter, the supply of TMI was stopped, the temperature was raised to 1000 ° C., and the barrier layer B of the
このようにして、５層の井戸層からなる量子井戸構造を形成し、その後ｐ型のＧａＮ層を形成して、窒化物半導体を作製した。この窒化物半導体に実施例１と同様に負極と正極を設けて窒化物半導体発光素子とした。 In this way, a quantum well structure composed of five well layers was formed, and then a p-type GaN layer was formed to produce a nitride semiconductor. The nitride semiconductor was provided with a negative electrode and a positive electrode in the same manner as in Example 1 to obtain a nitride semiconductor light emitting device.
実施例１と同様に、この窒化物半導体発光素子のエージングテストを行なった。その結果を図６に示す。図中、１〜５が本比較例のサンプルである。この図から明らかなとおり、２０時間後には逆耐圧が大幅に劣化した。 As in Example 1, an aging test was performed on this nitride semiconductor light emitting device. The result is shown in FIG. In the figure, 1 to 5 are samples of this comparative example. As is apparent from this figure, the reverse breakdown voltage deteriorated significantly after 20 hours.
また、電流２０ｍＡでの発光は、発光波長４６３ｎｍ、順方向電圧３．５ｍＶおよび出力３．０ｍＷであった。 The light emission at a current of 20 mA was an emission wavelength of 463 nm, a forward voltage of 3.5 mV, and an output of 3.0 mW.
（比較例２）
障壁層Ｃ形成後、１０００℃から８００℃に降温する際にもＴＥＧの供給を続けて障壁層Ｄを形成すること以外は、比較例１と同様に窒化物半導体および窒化物半導体発光素子を作製した。図４に本比較例に関わる量子井戸構造の温度の成長プロファイルを示す。
(Comparative Example 2)
After the formation of the barrier layer C, a nitride semiconductor and a nitride semiconductor light emitting device are fabricated in the same manner as in Comparative Example 1 except that the TEG is continuously supplied even when the temperature is lowered from 1000 ° C. to 800 ° C. to form the barrier layer D. did. FIG. 4 shows the temperature growth profile of the quantum well structure according to this comparative example.
図６中、６〜１０が本比較例のサンプルであり、比較例１と同様に２０時間後には逆耐圧が大幅に劣化した。また、電流２０ｍＡでの発光は、発光波長４６１ｎｍ、順方向電圧３．４ｍＶおよび出力３．０ｍＷであった。 In FIG. 6, 6 to 10 are samples of this comparative example, and the reverse breakdown voltage was significantly deteriorated after 20 hours as in Comparative Example 1. The emission at a current of 20 mA was an emission wavelength of 461 nm, a forward voltage of 3.4 mV, and an output of 3.0 mW.
（比較例３）
Ｓｉドープのｎ型ＧａＮ層およびアンドープＧａＮからなる障壁層を実施例５と同様にそれぞれＧｅドープのｎ型ＧａＮ層およびＧｅドープＧａＮからなる障壁層にしたこと以外は比較例１と同様に窒化物半導体および窒化物半導体発光素子を作製した。
(Comparative Example 3)
Nitride as in Comparative Example 1 except that the Si-doped n-type GaN layer and the undoped GaN barrier layer were changed to Ge-doped n-type GaN layer and Ge-doped GaN barrier layer, respectively, as in Example 5. Semiconductor and nitride semiconductor light emitting devices were fabricated.
得られた発光素子を実施例１と同様に評価したところ、比較例１に比べ逆耐圧の劣化は抑えられたが各実施例に比べては劣化した。また、電流２０ｍＡでの発光は、発光波長４６３ｎｍ、順方向電圧３．３Ｖおよび出力３．０ｍＷであった。 The obtained light emitting device was evaluated in the same manner as in Example 1. As a result, the reverse breakdown voltage was prevented from being deteriorated as compared with Comparative Example 1, but was deteriorated as compared with Examples. The emission at a current of 20 mA was an emission wavelength of 463 nm, a forward voltage of 3.3 V, and an output of 3.0 mW.
本発明によって提供される窒化物半導体は発光素子用材料として有用であり、これを用いて得られた発光素子は、青色発光素子として各種インジケーター等の電子機器に有用である。 The nitride semiconductor provided by the present invention is useful as a material for a light-emitting element, and a light-emitting element obtained using the nitride semiconductor is useful as a blue light-emitting element for electronic devices such as various indicators.
１ 障壁層Ａ
２ 障壁層Ｂ
３ 障壁層Ｃ
４ 障壁層Ｄ
５ 障壁層Ｅ
６ 井戸層
1 Barrier layer A
2 Barrier layer B
3 Barrier layer C
4 Barrier layer D
5 Barrier layer E
6 well layers
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