JP4617922B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP4617922B2
JP4617922B2 JP2005049884A JP2005049884A JP4617922B2 JP 4617922 B2 JP4617922 B2 JP 4617922B2 JP 2005049884 A JP2005049884 A JP 2005049884A JP 2005049884 A JP2005049884 A JP 2005049884A JP 4617922 B2 JP4617922 B2 JP 4617922B2
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剛志 琵琶
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本発明は、半導体装置の製造方法に関するものであり、より詳しくは、その活性層構造の形成方法に関するものである。   The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an active layer structure thereof.

従来、例えば、窒化物系III−V族化合物半導体は、このIII族元素の組成を変えて、直接型のバンドギャップエネルギーを調整することにより、紫外領域から赤色領域までの様々な波長光エネルギーに対応することができる。このため、紫外領域から可視領域に至るまで対応できる高効率の発光素子用材料として一般に用いられている。   Conventionally, for example, nitride-based III-V compound semiconductors have various wavelength light energies from the ultraviolet region to the red region by changing the composition of this group III element and adjusting the direct band gap energy. Can respond. For this reason, it is generally used as a highly efficient light-emitting element material that can be applied from the ultraviolet region to the visible region.

このような材料を用いることにより、例えば、InGaN系の量子井戸構造を有し、紫外領域や青色領域等を含む比較的短い発光波長領域に対応する発光素子が製造されている。この発光素子は、窒化物系III−V族化合物半導体の積層構造からなり、この積層構造の両面に、この積層構造よりもバンドギャップの大きい層であるクラッド層が形成された構造を有する。   By using such a material, for example, a light emitting element having an InGaN-based quantum well structure and corresponding to a relatively short emission wavelength region including an ultraviolet region, a blue region, and the like is manufactured. This light emitting element has a laminated structure of nitride III-V compound semiconductors, and has a structure in which a clad layer having a larger band gap than the laminated structure is formed on both sides of the laminated structure.

次に、図8について、このような構造を有する発光素子(又は発光装置)の一例としての半導体装置78を説明する。   Next, a semiconductor device 78 as an example of a light emitting element (or a light emitting device) having such a structure will be described with reference to FIG.

図8(A)に示すA−A’線断面図及び図8(B)に示す平面図によれば、基板71上に、バッファ層72、第1クラッド層(n型GaN:Si)73、活性層(マルチカンタムウェル:MQW)75及び第2クラッド層(p型GaN:Mg)が順次積層されている。また、第1クラッド層73、活性層75及び第2クラッド層76がメサ構造になっており、第1クラッド層73の一部がハーフエッチングによりその途中深さ位置で露出しており、この露出領域上に、Ti層74a(下層)及びAl層74b(上層)からなるn電極74が形成されている。また、第2クラッド層76上に、Ni層77a(下層)及びAu層77b(上層)からなるp電極77が形成されている。   According to the AA ′ line cross-sectional view shown in FIG. 8A and the plan view shown in FIG. 8B, the buffer layer 72, the first cladding layer (n-type GaN: Si) 73, An active layer (multi-quantum well: MQW) 75 and a second cladding layer (p-type GaN: Mg) are sequentially stacked. Further, the first cladding layer 73, the active layer 75, and the second cladding layer 76 have a mesa structure, and a part of the first cladding layer 73 is exposed at a halfway position by half-etching. An n-electrode 74 composed of a Ti layer 74a (lower layer) and an Al layer 74b (upper layer) is formed on the region. In addition, a p-electrode 77 composed of a Ni layer 77 a (lower layer) and an Au layer 77 b (upper layer) is formed on the second cladding layer 76.

図9には、この半導体装置78の特に活性層75の層構成を詳細に示す。   FIG. 9 shows in detail the layer configuration of the semiconductor device 78, particularly the active layer 75.

即ち、基板71上に、バッファ層72を介して形成された第1クラッド層73上に、バリア層(GaN)51、量子井戸層(InGaN)52、バリア層(GaN)53、量子井戸層(InGaN)54、バリア層(GaN)55、量子井戸層(InGaN)56及びバリア層(GaN)57が適切な層数(ここでは、量子井戸層は3層であるが、これは任意に変えられる。)で積層され、この積層体からなる活性層75上に第2クラッド層76が積層されている。   That is, a barrier layer (GaN) 51, a quantum well layer (InGaN) 52, a barrier layer (GaN) 53, a quantum well layer (on a first cladding layer 73 formed on a substrate 71 with a buffer layer 72 interposed therebetween. InGaN) 54, barrier layer (GaN) 55, quantum well layer (InGaN) 56, and barrier layer (GaN) 57 are appropriate in number (here, the quantum well layer is three layers, but this can be changed arbitrarily) The second cladding layer 76 is laminated on the active layer 75 made of this laminate.

次に、図10について、活性層75を含む半導体装置78の作製工程の例を説明するが、これは、各量子井戸層と各バリア層とを同じ温度で成長させるシーケンスによるものである。   Next, an example of a manufacturing process of the semiconductor device 78 including the active layer 75 will be described with reference to FIG. 10, which is based on a sequence in which each quantum well layer and each barrier layer are grown at the same temperature.

まず、サファイア基板71を有機金属気相成長(MOCVD)装置に配置し、キャリアガスである水素からなる雰囲気中で1050℃で10分間加熱(基板加熱)する。   First, the sapphire substrate 71 is placed in a metal organic chemical vapor deposition (MOCVD) apparatus and heated (substrate heating) at 1050 ° C. for 10 minutes in an atmosphere made of hydrogen as a carrier gas.

次いで、温度を500℃まで降温し、アンモニアの供給を開始後、トリメチルガリウム(TMGa)を供給して、バッファ層(GaN)72を30nmの厚さに成長させる。   Next, the temperature is lowered to 500 ° C., and after the supply of ammonia is started, trimethylgallium (TMGa) is supplied to grow a buffer layer (GaN) 72 to a thickness of 30 nm.

次いで、トリメチルガリウムの供給を停止後、温度を1020℃まで徐々に上昇し、1020℃に達した後、トリメチルガリウムの供給を再び開始し、GaN層60の成長を開始する。   Next, after the supply of trimethylgallium is stopped, the temperature is gradually increased to 1020 ° C., and after reaching 1020 ° C., the supply of trimethylgallium is started again, and the growth of the GaN layer 60 is started.

次いで、このGaN層60を1μmの厚さに成長させたところで、モノシラン(SiH4)の供給を開始し、シリコンドープの第1クラッド層(n型GaN:Si)73をドーピング濃度2×1018/cm3で成長させる。 Next, when the GaN layer 60 is grown to a thickness of 1 μm, supply of monosilane (SiH 4 ) is started, and the silicon-doped first cladding layer (n-type GaN: Si) 73 is doped at a doping concentration of 2 × 10 18. Grow at / cm 3 .

次いで、この第1クラッド層73を2μmの厚さに成長させたところで、トリメチルガリウムとモノシランとの供給を停止し、温度を700℃まで下げながら、水素の供給を停止し、キャリアガスを窒素に切り替える。このように水素の供給を停止するのは、次に成長させる量子井戸層のインジウムが水素でエッチングされて量子井戸層に取り込まれないことを防止するためである。   Next, when the first cladding layer 73 was grown to a thickness of 2 μm, the supply of trimethylgallium and monosilane was stopped, the supply of hydrogen was stopped while the temperature was lowered to 700 ° C., and the carrier gas was changed to nitrogen. Switch. The reason for stopping the supply of hydrogen in this way is to prevent indium in the quantum well layer to be grown next from being etched into the quantum well layer and not being taken into the quantum well layer.

次いで、700℃に温度が安定したところで、活性層(マルチカンタムウェル:MQW)75の成長を開始する。   Next, when the temperature is stabilized at 700 ° C., growth of an active layer (multi-quantum well: MQW) 75 is started.

即ち、原料は、トリエチルガリウム(TEGa)とトリメチルインジウム(TMIn)であり、量子井戸層(InGaN)を厚さ1〜5nm、例えば3nmに、バリア層(GaN)を厚さ5〜30nm、例えば15nmに積層させるが、ここでは、量子井戸層(InGaN)を3層有する3QW構造とする。通常は、量子井戸層(InGaN)を1層〜10層有する1QW〜10QW構造を形成する。   That is, the raw materials are triethylgallium (TEGa) and trimethylindium (TMIn), the quantum well layer (InGaN) has a thickness of 1 to 5 nm, for example, 3 nm, and the barrier layer (GaN) has a thickness of 5 to 30 nm, for example, 15 nm. Here, a 3QW structure having three quantum well layers (InGaN) is used. Usually, a 1QW to 10QW structure having 1 to 10 quantum well layers (InGaN) is formed.

この活性層75の成長工程においては、トリエチルガリウムの供給を開始して、量子井戸層52の成長を容易にするためのバリア層51を成長させ、この成長が終了した後に、トリメチルインジウムの供給を開始して量子井戸層52を成長させ、更にトリメチルインジウムの供給を停止して量子井戸層52の成長を停止する。   In the growth process of the active layer 75, the supply of triethylgallium is started to grow the barrier layer 51 for facilitating the growth of the quantum well layer 52. After the growth is completed, the supply of trimethylindium is performed. The quantum well layer 52 is grown to start, and further, the supply of trimethylindium is stopped to stop the growth of the quantum well layer 52.

次いで、バリア層53を成長させた後に、トリメチルインジウムの供給を開始して量子井戸層54を成長させてから、トリメチルインジウムの供給を停止して量子井戸層54の成長を停止する。   Next, after the barrier layer 53 is grown, the supply of trimethylindium is started to grow the quantum well layer 54, and then the supply of trimethylindium is stopped to stop the growth of the quantum well layer 54.

次いで、バリア層55を成長させた後に、トリメチルインジウムの供給を開始して量子井戸層56を成長させてから、トリメチルインジウムの供給を停止して量子井戸層56の成長を停止し、更に、バリア層57を成長させる。   Next, after the barrier layer 55 is grown, the supply of trimethylindium is started to grow the quantum well layer 56, and then the supply of trimethylindium is stopped to stop the growth of the quantum well layer 56. Layer 57 is grown.

こうして活性層75を形成した後、温度を700℃に維持したまま、トリエチルガリウムの供給を継続しながら、シクロペンタジエニルマグネシウム(Cp2Mg)の供給を開始し、Mgドープの第2クラッド層(p型GaN:Mg)76の一部である層76aを20nmの厚さに成長させる。 After forming the active layer 75 in this manner, the supply of cyclopentadienylmagnesium (Cp 2 Mg) was started while continuing the supply of triethylgallium while maintaining the temperature at 700 ° C., and the second cladding layer doped with Mg A layer 76a which is a part of (p-type GaN: Mg) 76 is grown to a thickness of 20 nm.

その後、トリエチルガリウムとシクロペンタジエニルマグネシウムとの供給を中断し、温度を950℃まで上げながら、窒素の供給を停止してキャリアガスを水素に切り替える。このように水素に切り替えることによって、GaNの結晶性を上げることができる。   Thereafter, the supply of triethylgallium and cyclopentadienylmagnesium is interrupted, and while raising the temperature to 950 ° C., the supply of nitrogen is stopped and the carrier gas is switched to hydrogen. By switching to hydrogen in this way, the crystallinity of GaN can be increased.

更にその後、トリメチルガリウムとシクロペンタジエニルマグネシウムとの供給を開始し、第2クラッド層(p型GaN:Mg)76の他の一部である層76bを200nmの厚さに成長させる。なお、このp型GaN:Mgの一部はp型AlGaN:Mgとしてもよい。   Thereafter, supply of trimethylgallium and cyclopentadienylmagnesium is started, and a layer 76b, which is another part of the second cladding layer (p-type GaN: Mg) 76, is grown to a thickness of 200 nm. A part of the p-type GaN: Mg may be p-type AlGaN: Mg.

成長終了後は、アンモニアの供給は続けながら降温させ、300℃程度でアンモニアの供給を停止する。そして、室温付近で有機金属気相成長装置から半導体装置78を取り出す。   After completion of the growth, the temperature is lowered while continuing the supply of ammonia, and the supply of ammonia is stopped at about 300 ° C. Then, the semiconductor device 78 is taken out from the metal organic vapor phase growth apparatus near room temperature.

この、取り出された半導体装置78(ウェハ)は、窒素雰囲気中で、800℃で10分間アニールしてp型不純物の活性化を行う。これは、水素とマグネシウム(Mg)とが結合してイオン化していないので、水素とマグネシウムを解離させてイオン化するためである。   The extracted semiconductor device 78 (wafer) is annealed at 800 ° C. for 10 minutes in a nitrogen atmosphere to activate p-type impurities. This is because hydrogen and magnesium (Mg) are not bonded and ionized, so that hydrogen and magnesium are dissociated and ionized.

更に、リソグラフィ工程、エッチング工程及び蒸着工程を順次経て、p型GaN:Mg層76上に、Ni層77a/Au層77bからなるp電極77を形成し、また第1クラッド層(n型GaN:Si)73の露出領域上に、Ti層74a/Al層74bからなるn電極74を形成する。   Further, a p-electrode 77 composed of a Ni layer 77a / Au layer 77b is formed on the p-type GaN: Mg layer 76 through a lithography process, an etching process, and a vapor deposition process, and the first cladding layer (n-type GaN: On the exposed region of Si) 73, an n-electrode 74 composed of a Ti layer 74a / Al layer 74b is formed.

このような構造の半導体装置78(例えば、発光ダイオードLED)の特性として、簡易的にウェハ上でプローブし、サファイア基板71下に配置したフォトディテクタで緑色の発光出力を観測する。ここで、上記した各量子井戸層と各バリア層とは共に700℃で成長させているが、この時の発光効率は約30mW/Aである(20mAの駆動電流で0.6mWが得られるので、発光効率は約30mW/Aとなる)。   As a characteristic of the semiconductor device 78 having such a structure (for example, a light emitting diode LED), a probe is simply probed on a wafer, and a green light emission output is observed with a photodetector disposed under the sapphire substrate 71. Here, each quantum well layer and each barrier layer described above are grown at 700 ° C., but the luminous efficiency at this time is about 30 mW / A (because 0.6 mW is obtained with a drive current of 20 mA). The luminous efficiency is about 30 mW / A).

こうした活性層と同様の活性層を成長させた構造は後記の特許文献1で知られている。また、活性層においてバリア層よりも量子井戸層の成長温度を高くして、発光波長を短波長にシフトするのを防止する方法は、後記の特許文献2で知られている。
特開2002−84000公報(第5頁[0016]〜第6頁[0019]、図3、図4、図7) 特開2003−209285公報(第3頁[0015]〜第4頁[0025]、第4頁[0030]〜第5頁[0034]、図1、図2)
A structure in which an active layer similar to the active layer is grown is known from Patent Document 1 described later. In addition, a method for preventing the emission wavelength from being shifted to a short wavelength by increasing the growth temperature of the quantum well layer in the active layer as compared with the barrier layer is known in Patent Document 2 described later.
JP 2002-84000 A (page 5 [0016] to page 6 [0019], FIG. 3, FIG. 4, FIG. 7) JP 2003-209285 A (page 3 [0015] to page 4 [0025], page 4 [0030] to page 5 [0034], FIG. 1 and FIG. 2)

通常、上記した有機金属気相成長法(MOCVD)によって、多重量子井戸層からなる構造を作製する場合、バルブの切り替えで原料を切り替え、連続成長するのが一般的である。   Usually, when a structure composed of multiple quantum well layers is produced by the above-described metal organic chemical vapor deposition (MOCVD), it is common to continuously grow by switching the raw material by switching the valve.

しかし、インジウムの組成比の大きい窒化ガリウム系化合物半導体素子等では、主にGaN層の格子定数と、量子井戸層であるInGaN層との格子定数とが異なっていて格子不整合が大きく、格子欠陥が生じ易くなり、良質な結晶を成長させることは困難である。この結果、青色発光のLEDの発光効率(量子効率)に比べて、量子井戸層のインジウム組成比の大きい緑色発光のLEDの発光効率(量子効率)は、半分程度と低い。これは、上記したようにバリア層の成長温度を量子井戸層の成長温度と同一としているために、十分にGaNの結晶が成長せず、従って量子井戸層の結晶性も劣化するからであると考えられる。これは、量子井戸層のインジウム組成比が大きくなる程顕著となる。   However, in gallium nitride compound semiconductor devices with a large indium composition ratio, etc., the lattice constant of the GaN layer is mainly different from the lattice constant of the InGaN layer, which is a quantum well layer. It is difficult to grow high-quality crystals. As a result, the light emission efficiency (quantum efficiency) of the green light emitting LED having a large indium composition ratio of the quantum well layer is as low as about half that of the light emission efficiency (quantum efficiency) of the blue light emitting LED. This is because, as described above, the growth temperature of the barrier layer is the same as the growth temperature of the quantum well layer, so that the GaN crystal does not grow sufficiently, and therefore the crystallinity of the quantum well layer also deteriorates. Conceivable. This becomes more remarkable as the indium composition ratio of the quantum well layer increases.

本発明は、このような状況に鑑みてなされたものであって、その目的は、特にインジウム組成比の大きい量子井戸層を成長させる場合に、LEDやレーザ等の発光効率を高めることのできる、半導体装置の製造方法を提供することにある。   The present invention has been made in view of such a situation, and its purpose is to increase the luminous efficiency of LEDs, lasers, etc., particularly when growing a quantum well layer having a large indium composition ratio. An object of the present invention is to provide a method for manufacturing a semiconductor device.

即ち、本発明は、量子井戸層とバリア層とを積層してなる多重積層構造を第1のクラッド層(例えば、n型GaN:Si)と第2のクラッド層(例えば、p型GaN:Mg)との間に挟んで配置する半導体装置(例えば、LED)の製造方法において、前記量子井戸層の成長温度と前記バリア層の成長温度とを異ならせて、前記量子井戸層の成長後に温度を上昇させて前記バリア層を成長させることを特徴とする、半導体装置の製造方法に係るものである。   That is, according to the present invention, a multi-layered structure in which a quantum well layer and a barrier layer are stacked has a first cladding layer (for example, n-type GaN: Si) and a second cladding layer (for example, p-type GaN: Mg). ) Between the quantum well layer and the barrier layer so that the temperature is increased after the quantum well layer is grown. The present invention relates to a method for manufacturing a semiconductor device, wherein the barrier layer is grown by raising the barrier layer.

本発明によれば、前記量子井戸層の成長温度と前記バリア層の成長温度とを異ならせて、前記量子井戸層の成長後に温度を上昇させて前記バリア層を成長させるので、前記バリア層の成長を十分に行い、格子欠陥が生じ難い良質な結晶構造を成長させることが可能となる。その結果、このバリア層上に特にインジウム組成比の大きい量子井戸層を結晶性良好に成長させることができ、緑色等の比較的長波長の発光を生じる半導体装置の発光効率を高めることができる。   According to the present invention, the growth temperature of the quantum well layer is different from the growth temperature of the barrier layer, and the barrier layer is grown by increasing the temperature after the growth of the quantum well layer. It is possible to grow a high-quality crystal structure that is sufficiently grown and hardly causes lattice defects. As a result, a quantum well layer having a particularly large indium composition ratio can be grown on this barrier layer with good crystallinity, and the light emission efficiency of a semiconductor device that emits light of a relatively long wavelength such as green can be increased.

本発明においては、格子欠陥を生じ難くして良質な結晶構造を成長させるために、前記量子井戸層の成長に引き続き、前記バリア層の成長開始後に温度を上昇させて前記バリア層を成長させ、前記バリア層の成長中に温度を下降させてから、再び前記量子井戸層を成長させることができる。   In the present invention, in order to make a crystal structure of good quality without causing lattice defects, the barrier layer is grown by increasing the temperature after the growth of the barrier layer following the growth of the quantum well layer, After the temperature is lowered during the growth of the barrier layer, the quantum well layer can be grown again.

また、格子欠陥をより生じ難くして一層良質な結晶構造を成長させるために、前記量子井戸層の成長に引き続き、前記バリア層の成長開始後に温度を上昇させて前記バリア層を成長させてから、このバリア層の成長を中断し、温度を下降させてから、上部バリア層を成長させ、続いて前記量子井戸層を成長させるのが望ましい。   Further, in order to make a crystal structure with better quality by making lattice defects less likely to occur, after the growth of the quantum well layer, after the growth of the barrier layer, the temperature is increased and the barrier layer is grown. It is desirable to interrupt the growth of the barrier layer and lower the temperature before growing the upper barrier layer and subsequently growing the quantum well layer.

また、格子欠陥を更に生じ難くして更に良質な結晶構造を成長させるため、前記量子井戸層の成長に引き続き、下部バリア層を成長させた後この成長を中断し、温度を上昇させてから、前記バリア層を成長させ、しかる後このバリア層の成長を中断し、温度を下降させてから、上部バリア層を成長させ、続いて前記量子井戸層を成長させるのが望ましい。   In order to further increase the quality of the crystal structure by making lattice defects less likely to occur, the growth of the lower barrier layer is continued after the growth of the quantum well layer, the growth is interrupted, and the temperature is increased. It is desirable to grow the barrier layer, then interrupt the growth of the barrier layer, lower the temperature, grow the upper barrier layer, and then grow the quantum well layer.

本発明において、格子欠陥を生じ難くして良質な結晶構造を確実に成長させるために、前記バリア層の成長温度と前記量子井戸層の成長温度との差を30℃以上、更には50℃以上、特に70℃以上とするのが望ましい。   In the present invention, the difference between the growth temperature of the barrier layer and the growth temperature of the quantum well layer is 30 ° C. or more, more preferably 50 ° C. or more, in order to make sure that a good quality crystal structure is grown without causing lattice defects. In particular, it is desirable that the temperature be 70 ° C. or higher.

この場合、前記量子井戸層を良好に成長させるためにはその成長温度を600℃〜800℃(例えば700℃)とし、また前記バリア層を良好に成長させるためにはその成長温度を630℃〜950℃(例えば770℃)とすることが望ましい。   In this case, the growth temperature is set to 600 ° C. to 800 ° C. (for example, 700 ° C.) in order to make the quantum well layer grow well, and the growth temperature is made to be 630 ° C. to make the barrier layer grow well. It is desirable to set it at 950 ° C. (for example, 770 ° C.).

また、前記量子井戸層を熱から保護して、その特性劣化を防止するために、前記量子井戸層の形成後に、前記下部バリア層又は前記バリア層を少なくとも3nmの厚さに成長させた後にその成長を中断するのが望ましい。   In addition, in order to protect the quantum well layer from heat and prevent deterioration of its characteristics, after the formation of the quantum well layer, the lower barrier layer or the barrier layer is grown to a thickness of at least 3 nm. It is desirable to interrupt growth.

本発明は、窒化ガリウム系化合物半導体素子を製造するのに好適であり、特に前記量子井戸層の材質に、インジウムを含む混晶物質を用いるのがよい。   The present invention is suitable for manufacturing a gallium nitride-based compound semiconductor device, and it is particularly preferable to use a mixed crystal material containing indium as the material of the quantum well layer.

この場合、前記量子井戸層における前記インジウムの組成比を18%以上、更には23%以上とすれば、発光波長が480nm以上、更には500nm以上のLED、レーザ等の発光素子を製造することができる。   In this case, if the composition ratio of the indium in the quantum well layer is 18% or more, further 23% or more, a light emitting element such as an LED or a laser having an emission wavelength of 480 nm or more, further 500 nm or more can be manufactured. it can.

以下、本発明の実施例を図面参照下に詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

実施例1Example 1

本実施例による発光素子は、活性層の作成方法を除けば、図8〜図10に示した従来例と同様の構造からなっており、以下の図において、従来例の各部分に付した符号の数字から50を差し引いた数字によって対応する部分を示す。   The light emitting device according to this example has the same structure as that of the conventional example shown in FIGS. 8 to 10 except for the method of forming the active layer. The corresponding part is indicated by a number obtained by subtracting 50 from the number.

図1について、本実施例による活性層25を含む発光素子28Aの作製工程を説明する。   With reference to FIG. 1, a manufacturing process of the light emitting element 28A including the active layer 25 according to the present embodiment will be described.

まず、サファイア基板21を有機金属気相成長(MOCVD)装置に配置し、キャリアガスである水素からなる雰囲気中で1050℃で10分間加熱(基板加熱)する。   First, the sapphire substrate 21 is placed in a metal organic chemical vapor deposition (MOCVD) apparatus and heated (substrate heating) at 1050 ° C. for 10 minutes in an atmosphere made of hydrogen as a carrier gas.

次いで、温度を500℃まで降温し、アンモニアの供給を開始後、トリメチルガリウム(TMGa)を供給して、バッファ層(GaN)22を30nmの厚さに成長させる。   Next, the temperature is lowered to 500 ° C., and after the supply of ammonia is started, trimethylgallium (TMGa) is supplied to grow the buffer layer (GaN) 22 to a thickness of 30 nm.

次いで、トリメチルガリウムの供給を停止後、温度を1020℃まで徐々に上昇し、1020℃に達した後、トリメチルガリウムの供給を再び開始し、GaN層10の成長を開始する。   Next, after the supply of trimethylgallium is stopped, the temperature is gradually increased to 1020 ° C., and after reaching 1020 ° C., the supply of trimethylgallium is started again and the growth of the GaN layer 10 is started.

次いで、このGaN層10を1μmの厚さに成長させたところで、モノシラン(SiH4)の供給を開始し、シリコンドープの第1クラッド層(n型GaN:Si)23をドーピング濃度2×1018/cm3で成長させる。 Next, when the GaN layer 10 is grown to a thickness of 1 μm, supply of monosilane (SiH 4 ) is started, and the silicon-doped first cladding layer (n-type GaN: Si) 23 is doped with a doping concentration of 2 × 10 18. Grow at / cm 3 .

次いで、この第1クラッド層23を2μmの厚さに成長させたところで、トリメチルガリウムとモノシランとの供給を停止し、温度を700℃まで下げながら、水素の供給を停止し、キャリアガスを窒素に切り替える。このように水素の供給を停止するのは、次に成長させる量子井戸層のインジウムが水素でエッチングされて量子井戸層に取り込まれないことを防止するためである。   Next, when the first cladding layer 23 is grown to a thickness of 2 μm, the supply of trimethylgallium and monosilane is stopped, the supply of hydrogen is stopped while the temperature is lowered to 700 ° C., and the carrier gas is changed to nitrogen. Switch. The reason for stopping the supply of hydrogen in this way is to prevent indium in the quantum well layer to be grown next from being etched into the quantum well layer and not being taken into the quantum well layer.

次いで、700℃に温度が安定したところで、活性層(マルチカンタムウェル:MQW)25Aの成長を開始する。   Next, when the temperature is stabilized at 700 ° C., growth of an active layer (multi-quantum well: MQW) 25A is started.

原料は、トリエチルガリウム(TEGa)とトリメチルインジウム(TMIn)であり、量子井戸層(InGaN)を厚さ1〜5nm、例えば3nmに、バリア層(GaN)を厚さ5〜30nm、例えば15nmに積層させるが、ここでは、量子井戸層(InGaN)を3層有する3QW構造とする。通常は、量子井戸層(InGaN)を1層〜10層有する1QW〜10QW構造を形成する。   The raw materials are triethylgallium (TEGa) and trimethylindium (TMIn), and the quantum well layer (InGaN) is laminated to a thickness of 1 to 5 nm, for example, 3 nm, and the barrier layer (GaN) is laminated to a thickness of 5 to 30 nm, for example, 15 nm. However, a 3QW structure having three quantum well layers (InGaN) is used here. Usually, a 1QW to 10QW structure having 1 to 10 quantum well layers (InGaN) is formed.

この活性層25Aの成長工程においては、トリエチルガリウムの供給を開始して、量子井戸層2の成長を容易にするためのバリア層1を成長させ、この成長が終了した後に、トリメチルインジウムの供給を開始して量子井戸層2を成長させ、更にトリメチルインジウムの供給を停止して量子井戸層2の成長を停止する。   In the growth process of the active layer 25A, the supply of triethylgallium is started to grow the barrier layer 1 for facilitating the growth of the quantum well layer 2, and after the growth is completed, the supply of trimethylindium is performed. The quantum well layer 2 is started to grow, and the supply of trimethylindium is stopped to stop the growth of the quantum well layer 2.

次いで、この量子井戸層2の成長に引き続き、バリア層3の成長開始後に温度を770℃に上昇させ、バリア層3を所定厚さに成長させ、更にこのバリア層3の成長中に温度を700℃に下降させてバリア層3の成長を終了した後に、トリメチルインジウムの供給を開始して量子井戸層4を成長させてから、トリメチルインジウムの供給を停止して量子井戸層4の成長を停止する。   Subsequently, following the growth of the quantum well layer 2, the temperature is increased to 770 ° C. after the growth of the barrier layer 3 is started, the barrier layer 3 is grown to a predetermined thickness, and the temperature is increased to 700 during the growth of the barrier layer 3. After the growth of the barrier layer 3 is finished by lowering to 0 ° C., the supply of trimethylindium is started to grow the quantum well layer 4, and then the supply of trimethylindium is stopped to stop the growth of the quantum well layer 4. .

次いで、この量子井戸層4の成長に引き続き、バリア層5の成長開始後に温度を770℃に上昇させ、バリア層5を所定厚さに成長させ、このバリア層5の成長中に温度を700℃に下降させてバリア層5の成長を終了した後に、トリメチルインジウムの供給を開始して量子井戸層6を成長させてから、トリメチルインジウムの供給を停止して量子井戸層6の成長を停止する。   Subsequently, following the growth of the quantum well layer 4, the temperature is increased to 770 ° C. after the growth of the barrier layer 5 is started, the barrier layer 5 is grown to a predetermined thickness, and the temperature is increased to 700 ° C. during the growth of the barrier layer 5. After the growth of the barrier layer 5 is finished, the supply of trimethylindium is started to grow the quantum well layer 6, and then the supply of trimethylindium is stopped to stop the growth of the quantum well layer 6.

次いで、この量子井戸層6の成長に引き続き、バリア層7の成長開始後に温度を770℃に上昇させ、バリア層7を所定厚さに成長させた後に、成長温度を770℃に維持したまま、バリア層7の成長を終了する。   Subsequently, following the growth of the quantum well layer 6, the temperature is increased to 770 ° C. after the growth of the barrier layer 7 is started, and after the barrier layer 7 is grown to a predetermined thickness, the growth temperature is maintained at 770 ° C. The growth of the barrier layer 7 is finished.

なお、バリア層3、5及び7の成長において、成長温度が700℃から770℃に上昇する途中に成長するバリア層3、5及び7の一部、及び成長温度が770℃から700℃に下降する途中に成長するバリア層3、5及び7の一部を、それぞれ3a、5a及び7a並びに3b及び5bとして示す。これらの各部は、成長温度が700℃〜770℃の範囲にあるため、成長する結晶が均一でなかったり、劣化する傾向があるが、厚みが小さいために実質的に支障はない。   In the growth of the barrier layers 3, 5 and 7, a part of the barrier layers 3, 5 and 7 that grow while the growth temperature rises from 700 ° C. to 770 ° C., and the growth temperature falls from 770 ° C. to 700 ° C. Part of the barrier layers 3, 5 and 7 that are grown in the middle are indicated as 3 a, 5 a and 7 a, and 3 b and 5 b, respectively. Since each of these parts has a growth temperature in the range of 700 ° C. to 770 ° C., the crystal to grow does not tend to be uniform or tends to deteriorate. However, since the thickness is small, there is substantially no problem.

こうして活性層25Aを形成した後、温度を770℃に維持したまま、トリエチルガリウムの供給を継続しながら、シクロペンタジエニルマグネシウム(Cp2Mg)の供給を開始し、Mgドープの第2クラッド層(p型GaN:Mg)26の一部である層26aを20nmの厚さに成長させる。 After forming the active layer 25A in this manner, the supply of cyclopentadienylmagnesium (Cp 2 Mg) was started while continuing the supply of triethylgallium while maintaining the temperature at 770 ° C., and the second cladding layer doped with Mg A layer 26a which is a part of (p-type GaN: Mg) 26 is grown to a thickness of 20 nm.

その後、トリエチルガリウムとシクロペンタジエニルマグネシウムとの供給を中断し、温度を950℃まで上げながら、窒素の供給を停止してキャリアガスを水素に切り替える。このように水素に切り替えることによって、GaNの結晶性を上げることができる。   Thereafter, the supply of triethylgallium and cyclopentadienylmagnesium is interrupted, and while raising the temperature to 950 ° C., the supply of nitrogen is stopped and the carrier gas is switched to hydrogen. By switching to hydrogen in this way, the crystallinity of GaN can be increased.

更にその後、トリメチルガリウムとシクロペンタジエニルマグネシウムとの供給を開始し、第2クラッド層(p型GaN:Mg)26の他の一部である層26bを200nmの厚さに成長させる。なお、このp型GaN:Mgの一部はp型AlGaN:Mgとしてもよい。   Thereafter, supply of trimethylgallium and cyclopentadienylmagnesium is started, and a layer 26b, which is another part of the second cladding layer (p-type GaN: Mg) 26, is grown to a thickness of 200 nm. A part of the p-type GaN: Mg may be p-type AlGaN: Mg.

成長終了後は、アンモニアの供給は続けながら降温させ、300℃程度でアンモニアの供給を停止する。そして、室温付近で有機金属気相成長装置から半導体装置28Aを取り出す。   After completion of the growth, the temperature is lowered while continuing the supply of ammonia, and the supply of ammonia is stopped at about 300 ° C. Then, the semiconductor device 28A is taken out from the metal organic vapor phase growth apparatus near room temperature.

この取り出された半導体装置28Aは、窒素雰囲気中で、800℃で10分間アニールしてp型不純物の活性化を行う。これは、水素とマグネシウム(Mg)とが結合してイオン化していないので、水素とマグネシウムを解離させてイオン化するためである。   The extracted semiconductor device 28A is annealed at 800 ° C. for 10 minutes in a nitrogen atmosphere to activate p-type impurities. This is because hydrogen and magnesium (Mg) are not bonded and ionized, so that hydrogen and magnesium are dissociated and ionized.

更に、リソグラフィ工程、エッチング工程及び蒸着工程を順次経て、p型GaN:Mg層26上に、図8に示したNi層77a/Au層77bからなるp電極77を形成し、また第1クラッド層(n型GaN:Si)23の露出領域上に、図8に示したTi層74a/Al層74bからなるn電極74を形成する。   Further, a p-electrode 77 composed of the Ni layer 77a / Au layer 77b shown in FIG. 8 is formed on the p-type GaN: Mg layer 26 through a lithography process, an etching process, and a vapor deposition process, and the first cladding layer. On the exposed region of (n-type GaN: Si) 23, an n-electrode 74 composed of the Ti layer 74a / Al layer 74b shown in FIG. 8 is formed.

このような構造の半導体装置28A(例えば発光ダイオードLED)の特性として、簡易的にウェハ上でプローブし、サファイア基板21下に配置したフォトディテクタで緑色の発光出力を観測する。   As a characteristic of the semiconductor device 28A having such a structure (for example, a light emitting diode LED), the probe is simply probed on the wafer, and the green light emission output is observed with the photodetector disposed under the sapphire substrate 21.

本実施例によれば、各量子井戸層2、4及び6の成長温度は700℃であるのに対して、各バリア層3、5及び7の成長温度は770℃と十分に高温とし、各層の成長は連続して行った。この時の発光効率は約70mW/Aであった。一方、各バリア層3、5及び7の成長温度を710℃とした場合は効果がなく、約30mW/Aのままであった。   According to this example, the growth temperature of each quantum well layer 2, 4 and 6 is 700 ° C., whereas the growth temperature of each barrier layer 3, 5 and 7 is 770 ° C., which is sufficiently high. The growth was continuous. The luminous efficiency at this time was about 70 mW / A. On the other hand, when the growth temperature of each barrier layer 3, 5 and 7 was set to 710 ° C., there was no effect and it remained at about 30 mW / A.

即ち、各量子井戸層の成長温度と各バリア層の成長温度とを異ならせて、各量子井戸層の成長後に温度を上昇させて各バリア層を成長させるので、各量子井戸層の成長後に成長する各バリア層が結晶性良好に成長し、その格子欠陥が生じ難くなる。この結果、このバリア層上に各量子井戸層が結晶性良好に成長し、インジウム組成比の大きい量子井戸層を有する緑色発光用の高発光効率の発光素子を作製することができる。   That is, the growth temperature of each quantum well layer is different from the growth temperature of each barrier layer, and each barrier layer is grown by increasing the temperature after the growth of each quantum well layer. Thus, each barrier layer grows with good crystallinity and its lattice defects are less likely to occur. As a result, each quantum well layer grows with good crystallinity on this barrier layer, and a light emitting element with high luminous efficiency for green light emission having a quantum well layer with a large indium composition ratio can be manufactured.

また、図2には、本実施例による発光素子28Aについて、発光効率(mW/A)と、バリア層と量子井戸層との成長温度差ΔT(℃)との関連を示す。これによれば、温度差ΔTが、0℃〜30℃では発光効率にあまり変化がないが、温度差ΔTが30℃以上となると発光効率が上昇し、特に温度差ΔTが50℃以上、更には70℃以上で発光効率が顕著に向上することが分る。   FIG. 2 shows the relationship between the luminous efficiency (mW / A) and the growth temperature difference ΔT (° C.) between the barrier layer and the quantum well layer for the light emitting device 28A according to this example. According to this, the light emission efficiency does not change much when the temperature difference ΔT is 0 ° C. to 30 ° C., but the light emission efficiency is increased when the temperature difference ΔT is 30 ° C. or more, and in particular, the temperature difference ΔT is 50 ° C. or more. It can be seen that the luminous efficiency is remarkably improved at 70 ° C. or higher.

実施例2Example 2

本実施例においては、図3に示すように、各量子井戸層の成長に引き続いて、各バリア層の成長を開始した後に温度を上昇させて各バリア層を成長させてから、このバリア層の成長を一旦中断し、温度を下降させてから、各上部バリア層を成長させ、続いて各量子井戸層を成長させること以外は、上述した実施例1と同様である。   In this embodiment, as shown in FIG. 3, after the growth of each quantum well layer, the growth of each barrier layer is started and then the temperature is increased to grow each barrier layer. Example 1 is the same as Example 1 described above except that the growth is interrupted and the temperature is lowered, then each upper barrier layer is grown, and then each quantum well layer is grown.

即ち、上述した実施例1と同様の工程を経て、基板21上に、バッファ層22、GaN層10、第1クラッド層23を順次成長させ、温度を700℃まで下げ、700℃に安定したところで、活性層(マルチカンタムウェル:MQW)25Bの成長を開始する。   That is, the buffer layer 22, the GaN layer 10, and the first cladding layer 23 are sequentially grown on the substrate 21 through the same process as in the first embodiment, and the temperature is lowered to 700 ° C. and stabilized at 700 ° C. The growth of the active layer (multi-quantum well: MQW) 25B is started.

原料は、トリエチルガリウムとトリメチルインジウムであり、量子井戸層2、4、6の厚さが3nm、バリア層3a及び3A、5a及び5A、7の厚さが14nm(3nm以上)、及びバリア層の一部である上部バリア層3c、5cの厚さが1nmである。   The raw materials are triethylgallium and trimethylindium, the quantum well layers 2, 4, and 6 have a thickness of 3 nm, the barrier layers 3a and 3A, 5a and 5A, and the thickness of 7 are 14 nm (3 nm or more), and the barrier layers The upper barrier layers 3c and 5c, which are a part, have a thickness of 1 nm.

ここで、量子井戸層は熱的に弱いが、バリア層は熱的に強いので、バリア層によって量子井戸層を保護するために、バリア層の厚さを3nm以上(この例では14nm)とするのが望ましい。また、上部バリア層(GaN)の存在によって、この上部バリア層の成長中にインジウムを取り込みながらGaNを成長させて量子井戸層(InGaN)を成長させ易くすることができる。   Here, the quantum well layer is thermally weak, but the barrier layer is thermally strong. Therefore, in order to protect the quantum well layer by the barrier layer, the thickness of the barrier layer is set to 3 nm or more (14 nm in this example). Is desirable. Also, the presence of the upper barrier layer (GaN) makes it easy to grow the quantum well layer (InGaN) by growing GaN while taking in indium during the growth of the upper barrier layer.

この活性層25Bの成長のシーケンスとしては、まず、トリエチルガリウムの供給を開始して、量子井戸層2の成長を容易にするためのバリア層1を成長させた後に、トリメチルインジウムの供給を開始して量子井戸層2を成長させ、更にトリメチルインジウムの供給を停止して量子井戸層2の成長を停止する。   As a sequence of the growth of the active layer 25B, first, supply of triethylgallium is started, the barrier layer 1 for facilitating the growth of the quantum well layer 2 is grown, and then supply of trimethylindium is started. Then, the quantum well layer 2 is grown, and further, the supply of trimethylindium is stopped to stop the growth of the quantum well layer 2.

次いで、この量子井戸層2の成長に引き続き、バリア層3の成長開始後に温度を770℃に上昇させ、バリア層3a及び3Aを成長させてから、トリエチルガリウムの供給を停止してバリア層3の成長を例えば3分間中断する。   Subsequently, after the growth of the quantum well layer 2, the temperature is increased to 770 ° C. after the growth of the barrier layer 3 is started, the barrier layers 3 a and 3 A are grown, the supply of triethylgallium is stopped, and the barrier layer 3 The growth is interrupted for eg 3 minutes.

次いで、この中断時間経過中に温度を700℃に下降させてから、トリエチルガリウムの供給を開始してバリア層3の一部である上部バリア層3cを厚さ約1nm成長させた後に、トリメチルインジウムの供給を開始して量子井戸層4を成長させ、更にトリメチルインジウムの供給を停止して量子井戸層4の成長を停止する。   Next, after the temperature is lowered to 700 ° C. during the lapse of the interruption time, the supply of triethylgallium is started and the upper barrier layer 3c which is a part of the barrier layer 3 is grown to a thickness of about 1 nm, and then trimethylindium is grown. Is started to grow the quantum well layer 4, and further, the supply of trimethylindium is stopped to stop the growth of the quantum well layer 4.

次いで、この量子井戸層4の成長に引き続き、バリア層5の成長開始後に温度を770℃に上昇させ、バリア層5a、5Aを成長させてから、トリエチルガリウムの供給を停止してバリア層5の成長を例えば3分間中断する。   Subsequently, after the growth of the quantum well layer 4, the temperature is increased to 770 ° C. after the growth of the barrier layer 5 is started, the barrier layers 5 a and 5 A are grown, the supply of triethylgallium is stopped, and the barrier layer 5 The growth is interrupted for eg 3 minutes.

次いで、この中断時間経過中に温度を700℃に下降させてから、トリエチルガリウムの供給を開始してバリア層5の一部である上部バリア層5cを厚さ約1nm成長させた後に、トリメチルインジウムの供給を開始して量子井戸層6を成長させてから、トリメチルインジウムの供給を停止して量子井戸層6の成長を停止する。   Next, after the temperature is lowered to 700 ° C. during the lapse of this interruption time, the supply of triethylgallium is started and the upper barrier layer 5c which is a part of the barrier layer 5 is grown to a thickness of about 1 nm, and then trimethylindium is grown. Is started to grow the quantum well layer 6, and then the supply of trimethylindium is stopped to stop the growth of the quantum well layer 6.

次いで、この量子井戸層6の成長に引き続き、バリア層7の成長開始後に温度を770℃に上昇させ、バリア層7a、7を成長させた後に、成長温度を770℃に維持したまま、バリア層7の成長を終了する。   Subsequently, following the growth of the quantum well layer 6, the temperature is increased to 770 ° C. after the growth of the barrier layer 7 is started. After the barrier layers 7 a and 7 are grown, the barrier layer is maintained at the growth temperature of 770 ° C. End the growth of 7.

なお、バリア層3、5及び7の成長において、成長温度が700℃〜770℃に上昇途中に成長するバリア層3、5及び7の一部を、それぞれ3a、5a及び7aとして示す。これらの各部は、成長温度が700℃〜770℃であるため、結晶成長が均一でなかったりすることがあるが、実質的に問題はない。   In the growth of the barrier layers 3, 5 and 7, portions of the barrier layers 3, 5 and 7 which are grown while the growth temperature is raised to 700 ° C. to 770 ° C. are shown as 3a, 5a and 7a, respectively. Since each of these parts has a growth temperature of 700 ° C. to 770 ° C., crystal growth may not be uniform, but there is substantially no problem.

これ以降の作製工程は、上述した実施例1と同様にして、第2クラッド層(p型GaN:Mg)26、p電極77及びn電極74を順次形成し、発光素子28Bの作製を完了する。   In the subsequent manufacturing steps, the second cladding layer (p-type GaN: Mg) 26, the p-electrode 77, and the n-electrode 74 are sequentially formed in the same manner as in Example 1 described above, thereby completing the manufacture of the light-emitting element 28B. .

本実施例によれば、各量子井戸層2、4、6の成長温度が700℃であるのに対して、各バリア層3A、5A、7の成長温度を770℃と十分に高温としたので上述した実施例1で述べたと同様に、各バリア層は格子欠陥が生じ難く、結晶性が向上する、   According to this example, the growth temperature of each quantum well layer 2, 4, 6 is 700 ° C., whereas the growth temperature of each barrier layer 3A, 5A, 7 is sufficiently high at 770 ° C. As described in Example 1 above, each barrier layer hardly causes lattice defects and improves crystallinity.

しかも、各バリア層の成長途中でその成長を一旦中断し、この間に成長温度を下げてから、バリア層の一部3c及び5c(厚さ約1nm)を成長させ、この上に量子井戸層4、6を成長させているので、上記の降温中にバリア層の成長を中断することにより、不均一に成長するか或いは低い温度で成長する結晶性の悪いバリア層を可能な限り少なくすることができる。この結果、緑色の発光効率が約125mW/Aの発光素子を得ることができた。   Moreover, during the growth of each barrier layer, the growth is temporarily interrupted, and during this time, the growth temperature is lowered, and then the barrier layers 3c and 5c (thickness of about 1 nm) are grown, on which the quantum well layer 4 6 is grown, the barrier layer growth is interrupted during the above-described temperature drop, so that the barrier layer having poor crystallinity that grows unevenly or grows at a low temperature can be reduced as much as possible. it can. As a result, a light emitting device having a green light emission efficiency of about 125 mW / A could be obtained.

図4は、従来例による発光素子78のX線回折スペクトル(XRD)と、本実施例による発光素子28BのX線回折スペクトルとを比較して示す。   FIG. 4 shows a comparison between the X-ray diffraction spectrum (XRD) of the light-emitting element 78 according to the conventional example and the X-ray diffraction spectrum of the light-emitting element 28B according to this example.

図4(A)に示すように、図10に示したシーケンスで作製した従来例による発光素子78では、GaN層のピークにショルダー(サブピーク)が生じており、サテライトピークもブロードとなっている。   As shown in FIG. 4A, in the light emitting element 78 according to the conventional example manufactured in the sequence shown in FIG. 10, a shoulder (sub peak) is generated at the peak of the GaN layer, and the satellite peak is also broad.

こうした不良な結果は、主に、各バリア層の成長温度が各量子井戸層の成長温度と同一(700℃)としていることによって、各InGaN層(量子井戸層)と各GaN層(バリア層)との格子不整合が生じたことに起因しており、各バリア層の結晶性が悪くて格子欠陥が生じ易くなり、各量子井戸層に悪影響を及ぼしているためと考えられる。   Such a bad result is mainly because the growth temperature of each barrier layer is the same (700 ° C.) as the growth temperature of each quantum well layer, so that each InGaN layer (quantum well layer) and each GaN layer (barrier layer). It is considered that the lattice mismatch is caused and the crystallinity of each barrier layer is poor and lattice defects are easily generated, which adversely affects each quantum well layer.

これに対して、図4(B)に示すように、本実施例による発光素子28Bは、GaN層のピークはきれいな単一ピークとなっており、サテライトピークも幅狭となっている。   On the other hand, as shown in FIG. 4B, in the light emitting device 28B according to this example, the peak of the GaN layer is a clean single peak, and the satellite peak is also narrow.

このような良好な結果は、主に、各バリア層の成長温度(770℃)を各量子井戸層の成長温度(700℃)よりも十分に高くしているために、これら各層間の格子整合が良好となり、各バリア層の結晶性が良くて格子欠陥が生じ難くなり、各量子井戸層に好影響を及ぼしているためと考えられる。   Such a good result is mainly due to the fact that the growth temperature of each barrier layer (770 ° C.) is sufficiently higher than the growth temperature of each quantum well layer (700 ° C.). This is probably because the crystallinity of each barrier layer is good and lattice defects are less likely to occur, which has a positive effect on each quantum well layer.

図5には、PL(フォトルミネセンス)発光波長(nm)及びPL発光強度(任意値)とQWからバリア層成長中断の界面までのGaN厚(nm)との相関性を示す。これによれば、QWから成長中断界面までのGaN厚が3nm未満の場合には、薄いために下層のInGaN層がダメージを受ける可能性があり、PL発光波長が500nm以下と短波長化が顕著となり、PL発光強度も0.8(任意値)以下と低くなることから、上記GaN厚は3nm以上とするのが望ましく、特に6nm以上とするのがよいことが分る。   FIG. 5 shows the correlation between PL (photoluminescence) emission wavelength (nm) and PL emission intensity (arbitrary value) and the GaN thickness (nm) from QW to the barrier layer growth interruption interface. According to this, when the GaN thickness from the QW to the growth interruption interface is less than 3 nm, the underlying InGaN layer may be damaged because it is thin, and the PL emission wavelength is 500 nm or less, and the wavelength shortening is remarkable. Since the PL emission intensity is also as low as 0.8 (arbitrary value) or less, it is understood that the GaN thickness is preferably 3 nm or more, and particularly preferably 6 nm or more.

即ち、成長中断前のGaN層厚が3nm未満であると、顕著な短波長化と強度の低下とが起きており、これは、InGaN層がGaN層の成長中断中に保護されないため、何らかの結晶の劣化(欠陥)が量子井戸層に生じるためと考えられる。   That is, if the GaN layer thickness before the growth interruption is less than 3 nm, a noticeable shortening of the wavelength and a decrease in the strength occur, and this is because the InGaN layer is not protected during the interruption of the growth of the GaN layer. This is thought to be because deterioration (defects) in the quantum well layer occurs.

また、InGaN層(QW)からGaN層成長中断界面までのGaN厚が3nm以上(特に6nm以上)の場合には、PL発光波長が500nm以上(特に510nm以上)、PL発光強度が0.8(特に1.0)近くとなり、発光波長の長波長化と発光強度の上昇を実現できる。   When the GaN thickness from the InGaN layer (QW) to the GaN layer growth interruption interface is 3 nm or more (especially 6 nm or more), the PL emission wavelength is 500 nm or more (particularly 510 nm or more), and the PL emission intensity is 0.8 ( In particular, near 1.0), it is possible to realize a longer emission wavelength and an increase in emission intensity.

こうした効果と共に発光効率の向上については、In組成比の少ない発光波長430nm以下の発光素子では殆ど効果がなく、また、図6に示す発光波長(nm)とEL(エレクトロルミネセンス)効率(mW/A)との相関性によれば、In組成比を多くした480nm(In18%に相当)以上、特に500nm(In23%に相当)以上の発光波長では、本実施例によるEL効率が従来例に対し2倍以上にもなることが分る。また、上述した実施例1による発光波長520nmでのEL効率も従来例に対して2倍以上向上しており、効率改善の効果が大きい。   With regard to the improvement of the light emission efficiency together with these effects, a light emitting element with a light emission wavelength of 430 nm or less with a small In composition ratio has little effect, and the light emission wavelength (nm) and EL (electroluminescence) efficiency shown in FIG. According to the correlation with A), the EL efficiency according to this example is higher than that of the conventional example at an emission wavelength of 480 nm (corresponding to In18%) or more, particularly 500 nm (corresponding to In23%) or more with an increased In composition ratio. It turns out that it becomes twice or more. Further, the EL efficiency at the emission wavelength of 520 nm according to Example 1 described above is improved more than twice as compared with the conventional example, and the effect of improving the efficiency is great.

その他、本実施例においては、上述した実施例1で述べたのと同様の作用及び効果が得られる。   In addition, in this embodiment, the same operations and effects as described in the first embodiment can be obtained.

実施例3Example 3

本実施例においては、図7に示すように、各量子井戸層の成長に引き続き、各下部バリア層を成長させてからその成長を中断し、この中断の間に温度を上昇させてから、各バリア層を成長させ、更にこれらのバリア層の成長を中断し、この中断の間に温度を下降させてから、各上部バリア層を成長させ、続いて各量子井戸層を成長させること以外は、上述した実施例1と同様である。   In this example, as shown in FIG. 7, following the growth of each quantum well layer, the growth of each lower barrier layer is interrupted and then the growth is interrupted. Other than growing the barrier layers, further interrupting the growth of these barrier layers, lowering the temperature during this interruption, then growing each upper barrier layer, followed by each quantum well layer, It is the same as that of Example 1 mentioned above.

即ち、上述した実施例1と同様の工程を経て、基板21上に、バッファ層22、GaN層10、第1クラッド層23を順次成長させ、温度を700℃まで下げ、700℃に安定したところで、活性層(マルチカンタムウェル:MQW)25Cの成長を開始する。   That is, the buffer layer 22, the GaN layer 10, and the first cladding layer 23 are sequentially grown on the substrate 21 through the same process as in the first embodiment, and the temperature is lowered to 700 ° C. and stabilized at 700 ° C. The growth of the active layer (multi-quantum well: MQW) 25C is started.

原料は、トリエチルガリウムとトリメチルインジウムであり、量子井戸層2、4、6の厚さが3nm、バリア層3A、5A、7a及び7の厚さが14nm(3nm以上)、バリア層の一部である上部バリア層3c、5cの厚さが1nm、及びバリア層の一部である下部バリア層3d、5dの厚さが3nmでる。   The raw materials are triethylgallium and trimethylindium, the quantum well layers 2, 4, and 6 have a thickness of 3 nm, the barrier layers 3A, 5A, 7a, and 7 have a thickness of 14 nm (3 nm or more). The upper barrier layers 3c and 5c have a thickness of 1 nm, and the lower barrier layers 3d and 5d, which are part of the barrier layer, have a thickness of 3 nm.

ここで、量子井戸層は熱的に弱いが、バリア層は熱的に強いので、下部バリア層によって量子井戸層を保護するのが望ましい。また、上部バリア層の成長中にインジウムを取り込んで量子井戸層を成長させる。   Here, although the quantum well layer is thermally weak, the barrier layer is thermally strong. Therefore, it is desirable to protect the quantum well layer by the lower barrier layer. Further, indium is taken in during the growth of the upper barrier layer to grow the quantum well layer.

この活性層25Cの成長シーケンスとしては、まず、700℃において、トリエチルガリウムの供給を開始して、量子井戸層2の成長を容易にするためのバリア層1を成長させた後に、トリメチルインジウムの供給を開始して量子井戸層2を成長させ、更にトリメチルインジウムの供給を停止して量子井戸層2の成長を停止する。   As a growth sequence of the active layer 25C, first, supply of triethylgallium is started at 700 ° C., the barrier layer 1 for facilitating the growth of the quantum well layer 2 is grown, and then supply of trimethylindium is performed. Is started to grow the quantum well layer 2, and the supply of trimethylindium is stopped to stop the growth of the quantum well layer 2.

次いで、この量子井戸層2の成長に引き続き、下部バリア層3dを成長させてから、トリエチルガリウムの供給を停止してバリア層3の成長を例えば3分間中断する。   Subsequently, after the growth of the quantum well layer 2, the lower barrier layer 3d is grown, and then the supply of triethylgallium is stopped and the growth of the barrier layer 3 is interrupted for 3 minutes, for example.

次いで、この中断の間に温度を770℃に上昇させてから、トリエチルガリウムの供給を開始してバリア層3Aを成長させた後に、トリエチルガリウムの供給を停止してバリア層3の成長を例えば3分間中断する。   Next, after the temperature is raised to 770 ° C. during this interruption, the supply of triethylgallium is started to grow the barrier layer 3A, and then the supply of triethylgallium is stopped to grow the barrier layer 3 to, for example, 3 Break for a minute.

次いで、この中断の間に温度を700℃に降下させてから、トリエチルガリウムの供給を開始して上部バリア層3cを成長させた後に、トリエチルガリウムの供給を停止して上部バリア層3cの成長を停止する。   Next, after the temperature is lowered to 700 ° C. during the interruption, the supply of triethylgallium is started to grow the upper barrier layer 3c, and then the supply of triethylgallium is stopped to grow the upper barrier layer 3c. Stop.

次いで、トリメチルインジウムの供給を開始して量子井戸層4を成長させてから、トリメチルインジウムの供給を停止して量子井戸層4の成長を停止する。   Next, the supply of trimethylindium is started to grow the quantum well layer 4, and then the supply of trimethylindium is stopped to stop the growth of the quantum well layer 4.

次いで、この量子井戸層4の成長に引き続き、下部バリア層5dを成長させてから、トリエチルガリウムの供給を停止してバリア層5の成長を例えば3分間中断する。   Subsequently, after the growth of the quantum well layer 4, the lower barrier layer 5 d is grown, and then the supply of triethylgallium is stopped and the growth of the barrier layer 5 is interrupted for 3 minutes, for example.

次いで、この中断の間に温度を770℃に上昇させてから、トリエチルガリウムの供給を開始してバリア層5Aを成長させた後に、トリエチルガリウムの供給を停止してバリア層5の成長を例えば3分間中断する。   Next, after the temperature is raised to 770 ° C. during this interruption, the supply of triethylgallium is started to grow the barrier layer 5A, and then the supply of triethylgallium is stopped to grow the barrier layer 5 to, for example, 3 Break for a minute.

次いで、この中断の間に温度を700℃に降下させてから、トリエチルガリウムの供給を開始して上部バリア層5cを成長させた後に、トリメチルインジウムの供給を開始して量子井戸層6を成長させてから、トリメチルインジウムの供給を停止して量子井戸層6の成長を停止する。   Next, after the temperature is lowered to 700 ° C. during this interruption, the supply of triethylgallium is started to grow the upper barrier layer 5 c, and then the supply of trimethylindium is started to grow the quantum well layer 6. Then, the supply of trimethylindium is stopped and the growth of the quantum well layer 6 is stopped.

次いで、この量子井戸層6の成長に引き続き、バリア層7の成長開始後に温度を770℃に上昇させ、バリア層7a、7を成長させた後に、成長温度を770℃に維持したまま、バリア層7の成長を終了する。   Subsequently, following the growth of the quantum well layer 6, the temperature is increased to 770 ° C. after the growth of the barrier layer 7 is started. After the barrier layers 7 a and 7 are grown, the barrier layer is maintained at the growth temperature of 770 ° C. End the growth of 7.

これ以降の作製工程は、上述した実施例1と同様にして、第2クラッド層(p型GaN:Mg)26、p電極77及びn電極74を順次形成し、発光素子28Cの作製を完了する。   In the subsequent manufacturing steps, the second cladding layer (p-type GaN: Mg) 26, the p-electrode 77, and the n-electrode 74 are sequentially formed in the same manner as in Example 1 described above, thereby completing the manufacturing of the light-emitting element 28C. .

本実施例によれば、各量子井戸層2、4、6の成長温度が700℃であるのに対して、各バリア層3A、5A、7の成長温度は770℃と十分に高温としたので、上述した実施例1で述べたと同様に、各バリア層は結晶性良好に成長する。   According to this example, the growth temperature of each quantum well layer 2, 4, 6 is 700 ° C., whereas the growth temperature of each barrier layer 3A, 5A, 7 is sufficiently high, 770 ° C. As described in the first embodiment, each barrier layer grows with good crystallinity.

しかも、各下部バリア層及び各バリア層の成長途中でその成長を一旦中断し、この間に成長温度を下降又は上昇してから、上部バリア層及びバリア層を成長させているので、降温中又は昇温中にバリア層又は下部バリア層の成長を中断することにより、不均一に成長するか或いは低い温度で成長する結晶性の悪いバリア層の一部(即ち、上部バリア層及び下部バリア層)を可能な限り少なくすることができる。この結果、緑色の発光効率が実施例2と同等な約130mW/Aとなった。   In addition, the growth of each lower barrier layer and each barrier layer is temporarily interrupted during the growth, and the growth temperature is lowered or raised during this time, and then the upper barrier layer and the barrier layer are grown. By interrupting the growth of the barrier layer or the lower barrier layer during the warm period, a part of the barrier layer having poor crystallinity that grows unevenly or grows at a low temperature (ie, the upper barrier layer and the lower barrier layer) is removed. As little as possible. As a result, the green luminous efficiency was about 130 mW / A equivalent to that in Example 2.

また、上述した実施例2と同様に、量子井戸層をダメージから保護するのに、下部バリア層の厚さは3nm以上とするのが望ましい。   Further, as in the second embodiment described above, the thickness of the lower barrier layer is preferably 3 nm or more in order to protect the quantum well layer from damage.

その他、本実施例においては、上述した実施例1で述べたのと同様の作用及び効果が得られる。   In addition, in this embodiment, the same operations and effects as described in the first embodiment can be obtained.

以上、本発明を実施の形態及び実施例に基づいて説明したが、これらの例は本発明の主旨を逸脱しない範囲で適宜変更可能であることは言うまでもない。   As mentioned above, although this invention was demonstrated based on embodiment and an Example, it cannot be overemphasized that these examples can be suitably changed in the range which does not deviate from the main point of this invention.

例えば、上述した各層の成長条件や使用する構成材料等は種々変更してよい。上述した図7において、破線で示すように、下部バリア層の成長開始時から昇温してよいが、この場合は下部バリア層の結晶性が良くなる。なお、本発明は、上述した材料以外にも、他の格子不整合の大きな量子井戸層を有する他の材料を用いる半導体装置にも適用することができる。   For example, the above-described growth conditions for each layer, the constituent materials used, and the like may be variously changed. In FIG. 7 described above, as indicated by a broken line, the temperature may be raised from the beginning of the growth of the lower barrier layer, but in this case, the crystallinity of the lower barrier layer is improved. Note that the present invention can also be applied to a semiconductor device using another material having a quantum well layer having a large lattice mismatch in addition to the above-described materials.

本発明の半導体装置の製造方法は、発光効率を高めた特に長波長発光用の発光ダイオード、レーザ等の製造に好適である。   The method for manufacturing a semiconductor device according to the present invention is suitable for manufacturing a light emitting diode, a laser and the like for light emission with a long wavelength emission with improved luminous efficiency.

本発明の実施例1による発光素子の作製工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the light emitting element by Example 1 of this invention. 同、発光効率と、バリア層及び量子井戸層の成長温度差との相関性を示すグラフである。It is a graph which shows the correlation with luminous efficiency and the growth temperature difference of a barrier layer and a quantum well layer. 本発明の実施例2による発光素子の作製工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the light emitting element by Example 2 of this invention. 同、GaN層のX線回折スペクトルを比較して示すグラフである。3 is a graph showing comparison of X-ray diffraction spectra of GaN layers. 同、PL発光波長及びPL発光強度と、QWから成長中断界面までのGaN厚との相関性を示すグラフである。3 is a graph showing the correlation between the PL emission wavelength and the PL emission intensity and the GaN thickness from the QW to the growth interruption interface. 同、EL効率と発光波長との相関性を示すグラフである。3 is a graph showing the correlation between EL efficiency and emission wavelength. 本発明の実施例3による発光素子の作製工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the light emitting element by Example 3 of this invention. 従来例による発光素子の断面図(A)及び平面図(B)である。It is sectional drawing (A) and the top view (B) of the light emitting element by a prior art example. 同、発光素子の部分詳細断面図である。FIG. 3 is a partial detailed cross-sectional view of the light emitting element. 同、発光素子の作製工程を示すフローチャートである。4 is a flowchart showing a manufacturing process of the light emitting element.

符号の説明Explanation of symbols

1…バリア層、2…量子井戸層、3…バリア層、3a、3b…バリア層の一部、
3c…上部バリア層、3d…下部バリア層、4…量子井戸層、5…バリア層、
5a、5b…バリア層の一部、5c…上部バリア層、5d…下部バリア層、
6…量子井戸層、7…バリア層、7a…バリア層の一部、10…GaN層、21…基板、
22…バッファ層、23…第1クラッド層、25A、25B、25C…活性層、
26…第2クラッド層、26a、26b…第2クラッド層の一部、
28A、28B、28C…発光素子
DESCRIPTION OF SYMBOLS 1 ... Barrier layer, 2 ... Quantum well layer, 3 ... Barrier layer, 3a, 3b ... A part of barrier layer,
3c ... Upper barrier layer, 3d ... Lower barrier layer, 4 ... Quantum well layer, 5 ... Barrier layer,
5a, 5b ... part of the barrier layer, 5c ... upper barrier layer, 5d ... lower barrier layer,
6 ... quantum well layer, 7 ... barrier layer, 7a ... part of barrier layer, 10 ... GaN layer, 21 ... substrate,
22 ... buffer layer, 23 ... first cladding layer, 25A, 25B, 25C ... active layer,
26 ... second cladding layer, 26a, 26b ... part of the second cladding layer,
28A, 28B, 28C ... Light emitting element

Claims (9)

量子井戸層とバリア層とを積層してなる多重積層構造を第1のクラッド層と第2のクラッド層との間に挟んで配置する半導体装置製造するに際し、前記量子井戸層の成長温度と前記バリア層の成長温度とを異ならせて、前記量子井戸層の成長後に温度を上昇させて前記バリア層を成長させる、半導体装置の製造方法であって、
互いに異なる第1及び第2の III族元素とV族元素とからなる前記量子井戸層の成長 に引き続き、前記第2の III族元素と前記V族元素とからなる前記バリア層の成長開始 後に温度を上昇させて前記バリア層を成長させてから、このバリア層の成長を中断し、 温度を下降させてから、前記バリア層と同一組成の上部バリア層を成長させ、続いて前 記量子井戸層を成長させる、
半導体装置の製造方法
Upon manufacturing a semiconductor device to place across the multiple layered structure formed by laminating a quantum well layer and a barrier layer between the first cladding layer and the second cladding layer, and the growth temperature of the quantum well layer A method for manufacturing a semiconductor device, wherein a growth temperature of the barrier layer is different, and the barrier layer is grown by increasing the temperature after the growth of the quantum well layer ,
Subsequent to the growth of the quantum well layer composed of the first and second group III elements and the group V element which are different from each other , the temperature after the start of the growth of the barrier layer composed of the second group III element and the group V element. from grown the barrier layer is raised to interrupt the growth of the barrier layer, after lowering the temperature, to grow a top barrier layer of the barrier layer and the same composition, followed by pre-Symbol quantum well layer Grow,
A method for manufacturing a semiconductor device .
前記量子井戸層の成長に引き続き、前記バリア層と同一組成の下部バリア層を成長させてからこの成長を中断し、温度を上昇させてから、前記バリア層を成長させ、しかる後にこのバリア層の成長を中断し、温度を下降させてから、前記上部バリア層を成長させ、続いて前記量子井戸層を成長させる、請求項1に記載の半導体装置の製造方法。 Subsequent to the growth of the quantum well layer, a lower barrier layer having the same composition as that of the barrier layer is grown, the growth is interrupted, the temperature is increased, and then the barrier layer is grown. The method for manufacturing a semiconductor device according to claim 1, wherein the growth is interrupted and the temperature is lowered, and then the upper barrier layer is grown, and then the quantum well layer is grown. 前記バリア層の成長温度と前記量子井戸層の成長温度との差を30℃以上とする、請求項1に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein a difference between a growth temperature of the barrier layer and a growth temperature of the quantum well layer is set to 30 ° C. or more. 前記量子井戸層の成長温度を600℃〜800℃とし、前記バリア層の成長温度を630℃〜950℃とする、請求項に記載の半導体装置の製造方法。 4. The method of manufacturing a semiconductor device according to claim 3 , wherein a growth temperature of the quantum well layer is 600 ° C. to 800 ° C., and a growth temperature of the barrier layer is 630 ° C. to 950 ° C. 5. 前記量子井戸層の形成後に、前記下部バリア層又は前記バリア層を少なくとも3nmの厚さに成長させた後にその成長を中断する、請求項又はに記載の半導体装置の製造方法。 Wherein after formation of the quantum well layer, interrupting its growth after said lower barrier layer or the barrier layer is grown to a thickness of at least 3 nm, a manufacturing method of a semiconductor device according to claim 1 or 2. 窒化ガリウム系化合物半導体素子を製造する、請求項1に記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 1, wherein a gallium nitride compound semiconductor element is manufactured. 前記量子井戸層の材質にInGaNを用い、前記バリア層の材質にGaNを用いる、請求項に記載の半導体装置の製造方法。 An InGaN the material of the quantum well layer, Ru using GaN as the material of the barrier layer, a method of manufacturing a semiconductor device according to claim 6. 前記量子井戸層における前記インジウムの組成比を18%以上とする、請求項に記載の半導体装置の製造方法。 The method for manufacturing a semiconductor device according to claim 7 , wherein a composition ratio of the indium in the quantum well layer is 18% or more. 発光波長が480nm以上の発光素子を製造する、請求項に記載の半導体装置の製造方法。 The method for manufacturing a semiconductor device according to claim 8 , wherein a light emitting element having an emission wavelength of 480 nm or more is manufactured.
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