JPH1012922A - Group iii nitride semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the emission efficiency of a light emitting element employing a group III nitride semiconductor. SOLUTION: An emission layer 5 has a multiple quantum well structure comprising six barrier layers 51 of At0.05 Ga-.95 N having thickness of about 50Å and five well layers 52 of In0.2 Ga0.8 N having thickness of about 50Å laminated alternately. The emission layer 5 has total thickness of about 0.055μm. The well layer 52 is added with zinc and silicon at concentration of 5×10<18> /cm<3> . Since the emission layer 5 comprises a strained superlattice, the emission intensity is enhanced.

Description

Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a light emitting device using a group III nitride semiconductor with improved blue and green light emission efficiency. 2. Description of the Related Art A blue light emitting device having a quantum well structure in which a light emitting layer is made of a group III nitride semiconductor has been proposed (JP-A-6-268257). In this device, the light emitting layer is In
_The multiple quantum well structure has a well layer of _0.2 Ga _0.8 N and a barrier layer of In _0.04 Ga _0.96 N. In the light emitting device having the above structure, a well layer and a barrier layer are preferably lattice-matched with each other.
It employs a multiple quantum well structure to mitigate lattice mismatch with the n-type GaN layer on which the growth is based. However, the light emitting intensity of the above light emitting element is not yet sufficient,
In GaN-based compound semiconductor light emitting devices, it is required to further increase the light emission intensity. The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to increase the emission intensity of a group III nitride semiconductor light emitting device. According to a first aspect of the present invention, in a light emitting device using a group III nitride semiconductor for a light emitting layer, the light emitting layer is made of a strained superlattice of a group III nitride semiconductor. It has a single or multiple quantum well structure. In the invention of claim 2, the light emitting layer is made of Al _X2 Ga _1-X2
N (0 <x2 ≦ 1) barrier layer and In _X1 Ga _1-X1 N (0 <x1 ≦
The quantum well superlattice of the present invention is a single or multiple quantum well superlattice laminated with a well layer comprising 1), and the light emitting layer of the present invention has an acceptor impurity or a donor impurity, or
In the fourth aspect of the present invention, both the acceptor impurity and the donor impurity are added only to each well layer of the light emitting layer. Further, according to the invention of claim 5, an acceptor impurity and a donor impurity are alternately added to a well layer adjacent to the light emitting layer, and an acceptor impurity is added to the well layer, a donor impurity is added to the barrier layer, or a donor impurity is added to the well layer.
The barrier layer is formed by adding an acceptor impurity to the barrier layer, and the invention according to claim 5 is characterized in that the acceptor impurity is zinc and the donor impurity is silicon.
In the invention of the present invention, the light emitting layer is made of a p-conductivity type Al _X3 Ga _1-X3 N (X2 ≦ X3) doped with an acceptor impurity, and an n conductivity type Al _X4 Ga _1-X4 doped with a donor impurity. It is characterized by being sandwiched between n layers composed of N (X2 ≦ X4). Further, the invention of claim 8 is that the acceptor impurity added to the p layer is magnesium, and the donor impurity added to the n layer is silicon. Incidentally, the degree of lattice mismatch between the well layer and the barrier layer is preferably 0.4 to 4.8%. If it is less than 0.4%, the properties of the strained superlattice cannot be used. Further, the thickness of the well layer and the barrier layer is preferably 1 to 20 nm. When the thickness is 1 nm or less, film formation becomes difficult. When the thickness is 20 nm or more, the strain effect of the bond is reduced and the characteristics of the strained superlattice cannot be used. When the well layer is composed of In _X1 Ga _1-X1 N (0 <x1 ≦ 1) and the barrier layer is composed of Al _X2 Ga _1-X2 N (0 <x2 ≦ 1), the desirable In Is from 0.03 to 0.5, and a desirable Al composition ratio x2 is from 0.03 to 0.3. Respectively,
If it is less than the above lower limit, strain does not occur, and the effect of the strained superlattice does not occur, so that it is not effective. If it is more than the above upper limit, misfit dislocations are often generated, which is not desirable. Further, the thicknesses of the well layer and the barrier layer are desirably in the above-described ranges for the above-described reasons. In addition, when an impurity is added to the light emitting layer,
The concentration of the acceptor impurity and the donor impurity to be added is 1 ×
The range is preferably 10 ¹⁷ / cm ³ to 1 × 10 ²⁰ / cm ³ . 1
If it is less than × 10 ¹⁷ / cm ³ , the luminous efficiency is reduced due to lack of the luminescent center, and if it is more than 1 × 10 ²⁰ / cm ³ , the crystallinity deteriorates and the Auger effect occurs, which is not desirable. According to the present invention, there is provided a light emitting device using a group III nitride semiconductor for a light emitting layer, wherein the light emitting layer is a single or multiple quantum well comprising a strained superlattice of a group III nitride semiconductor. Due to the structure, a high-quality crystal without dislocations can be obtained due to a bond distortion effect, and the concentration of electrons and holes contributing to light emission can be increased. As a result, the light emission intensity can be improved. Further, the light-emitting layer is composed of a p-conductivity type Al _X3 Ga _1-X3 N (X2 ≦ X3) doped with an acceptor impurity and an n-conductivity type Al _X4 Ga doped with a donor impurity.
_{By using a} double hetero junction structure sandwiched between n layers composed of _1-X4 N (X2 ≦ X4), luminous efficiency could be improved. Hereinafter, the present invention will be described with reference to specific examples. The present invention is not limited to the following examples. First Embodiment FIG. 1 shows an overall view of a light emitting device 100 according to an embodiment of the present invention. The light emitting device 100 has a sapphire substrate 1, and a 0.05 μm AlN buffer layer 2 is formed on the sapphire substrate 1. On the buffer layer 2, a film thickness of about
4.0 μm, silicon (Si) doped with 2 × 10 ¹⁸ / cm ³ electron concentration
High carrier concentration n ⁺ layer 3 made of GaN, thickness about 0.5 μm
Layer 4 composed of GaN doped with silicon (Si) having an electron concentration of 5 × 10 ¹⁷ / cm ³ , a well layer of In _0.2 Ga _0.8 N and Al _0.05 Ga _0.95 N
Emission layer composed of a strained superlattice having a multiple quantum well structure with a barrier layer having a total thickness of 0.055 μm, a film thickness of about 10 nm, a hole concentration of 2 × 10 ¹⁷ / cm ³ , and a magnesium (Mg) concentration of 5 × 10 ¹⁹ / cm ³
A p-type cladding layer 71 made of Al _0.08 Ga _0.92 N
The first of p-type conductivity of GaN with a film thickness of about 35 nm, a hole concentration of 3 × 10 ¹⁷ / cm ³ _{, and a} magnesium (Mg) concentration of 5 × 10 ¹⁹ / cm ³
Contact layer 72, thickness about 5 nm, hole concentration 6 × 10 ¹⁷
/ cm _^3, the second contact layer 73 of p ⁺ conductivity type of GaN of magnesium (Mg) concentration of 1 × 10 ²⁰ / cm ³ is formed. Then, Ni / Au is formed on the entire upper surface of the second contact layer 73.
And a transparent electrode 9 composed of a double layer of
The pad 10 for bonding is formed of a double layer of Ni / Au at the corners of. Also, on the n ⁺ layer 3
An electrode 8 made of Al is formed. As shown in FIG. 2, the detailed structure of the light emitting layer 5 is composed of six barrier layers 51 of Al _0.05 Ga _0.95 N with a thickness of about 50 ° and In _0.2 Ga _0.8 N with a thickness of about 50 °. It has a multiple quantum well structure in which five well layers 52 are alternately stacked, and has a total film thickness of about 0.055 μm. Further, zinc and silicon are added to the well layer 52 at a concentration of 5 × 10 ¹⁸ / cm ³ , respectively. Next, a method of manufacturing the light emitting diode 10 having this structure will be described. Light emitting diode 100
Was produced by vapor phase growth by metalorganic compound vapor phase epitaxy (hereinafter referred to as "M0VPE"). The gases used were NH ₃ and carrier gas H ₂ or N ₂ , trimethylgallium (Ga (CH ₃ ) ₃ ) (hereinafter referred to as “TMG”) and trimethylaluminum (Al (CH ₃ ) ₃ ) (hereinafter “TMA”). ), Trimethylindium (In (CH ₃ ) ₃ ) (hereinafter referred to as “TMI”), silane (SiH ₄ ), and diethylzinc (Zn (C ₂ H ₅ ) ₂ ) (hereinafter referred to as “DEZ”). And cyclopentadienyl magnesium (Mg (C ₅ H ₅ ) ₂ )
(Hereinafter referred to as “CP ₂ Mg”). First, a single-crystal sapphire substrate 1 is mounted on a susceptor placed in a reaction chamber of an MOVPE apparatus, with the a-plane cleaned by organic cleaning and heat treatment as a main surface. Next, the sapphire substrate 1 was baked at a temperature of 1100 ° C. while flowing H ₂ into the reaction chamber at a flow rate of 2 liter / min at normal pressure for about 30 minutes. Next, by lowering the temperature to 400 ° C., and H ₂
20 liter / min, NH ₃ 10 liter / min, TMA 1.8 × 10 ^-5
The AlN buffer layer 2 was supplied at about 0.1 mol / min for about 90 seconds.
It was formed to a thickness of 05 μm. Next, the temperature of the sapphire substrate 1 was maintained at 1150 ° C., H ₂ was 20 liter / min, and NH ₃ was 10 lite.
r / min, TMG 1.7 × 10 ^-4 mol / min, 0.86p by H ₂ gas
Silane diluted at 20 × 10 ⁻⁸ mol / min was introduced for 40 minutes at a film thickness of about 4.0 μm, an electron concentration of 1 × 10 ¹⁸ / cm ³ , and a silicon concentration of 4 × 10 ¹⁸ / cm ³ (Si). 3.) A high carrier concentration n ⁺ layer 3 made of doped GaN was formed. After forming the high carrier concentration n ⁺ layer 3, the temperature is maintained at 1100 ° C. and H ₂ is reduced to 20 liter / H _2.
Min, NH ₃ at 10 liter / min, TMG at 1.12 × 10 ^-4 mol / min
Min, silane to 10 × 10 diluted to 0.86ppm with H ₂ gas
Introduced at ^-9 mol / min for 30 minutes, film thickness approx.
× 10 ¹⁷ / cm ³ , silicon (Si) with a silicon concentration of 1 × 10 ¹⁸ / cm ³
An n layer 4 made of doped GaN was formed. Thereafter, the temperature of the sapphire substrate 1 is increased to 1100 ° C.
And N ₂ or H ₂ at 20 liter / min, NH ₃ at 10 liter / min.
Of TMG at 0.5 × 10 ^-4 mol / min and TMA at 0.8 × 10 ^-5 mol / min for 0.5 minute to form a layer 50 of Al _0.05 Ga _0.95 N.
The barrier layer 51 was formed. Subsequently, the temperature was maintained at 800 ° C., N ₂ or H ₂ was 20 liter / min, and NH ₃ was 10 liter / min.
0.5 × 10 ^-4 mol / min of TMG, 1.6 × 10 ^-4 mol / min of TMI, 0.15 silane diluted to 0.86 ppm with H ₂ gas.
At 10 × 10 ^-8 mol / min, DEZ was supplied at 0.2 × 10 ^-6 mol / min for 1.5 minutes, and silicon and zinc were respectively 5 × 10 ¹⁸ / c
A well layer 52 having a thickness of 50 ° made of In _0.20 Ga _0.80 N doped to m ³ was formed. By repeating such a procedure,
As shown in FIG. 2, five layers of barrier layers 51 and well layers 52 are alternately stacked to form a multiple quantum well structure having an overall thickness of 0.5.
A light emitting layer 5 having a thickness of 055 μm was formed. Subsequently, the temperature was maintained at 1100 ° C. and N ₂ or H ₂
20 liter / min, NH ₃ 10 liter / min, TMG 0.5 × 10
^-4 mol / min, TMA 0.47 × 10 ^-5 mol / min, and CP ₂ Mg
Was introduced at 2 × 10 ⁻⁵ mol / min for 2 minutes to form a cladding layer 71 of magnesium (Mg) -doped Al _0.08 Ga _0.92 N having a thickness of about 10 nm. The magnesium concentration of the cladding layer 71 is 5 × 10 ¹⁹ / cm ³ . In this state, the cladding layer 7
1 is an insulator having a resistivity of 10 ⁸ Ωcm or more. Next, the temperature is maintained at 1100 ° C. and N ₂ or H ₂ is added.
20 liter / min, NH ₃ 10 liter / min, TMG 0.5 × 10 ^-4
The mol / min and CP ₂ Mg were introduced at 2 × 10 ⁻⁸ mol / min for 4 minutes to form a first contact layer 72 of magnesium (Mg) -doped GaN having a thickness of about 35 nm. The magnesium concentration of the first contact layer 72 is 5 × 10 ¹⁹ / cm ³ . In this state, the first contact layer 72 still has a resistivity of 10
It is an insulator of ⁸ Ωcm or more. Next, the temperature is maintained at 1100 ° C., and N ₂ or H ₂ is added.
20 liter / min, NH ₃ 10 liter / min, TMG 0.5 × 10 ^-4
Mol / min and CP ₂ Mg were introduced at 4 × 10 ⁻⁸ mol / min for 1 minute to form a p ⁺ second contact layer 73 of magnesium (Mg) -doped GaN having a thickness of about 5 nm. . The magnesium concentration of the second contact layer 73 is 1 × 10 ²⁰ / cm ³ . In this state, the second contact layer 73 is still an insulator having a resistivity of 10 ⁸ Ωcm or more. Next, the second contact layer 73, the first contact layer 72, and the cladding layer 7 are formed using an electron beam irradiation device.
1 was uniformly irradiated with an electron beam. Electron beam irradiation conditions are: acceleration voltage about 10KV, data current 1μA, beam moving speed 0.2m
m / sec, beam diameter 60 μmφ, vacuum degree 5.0 × 10 ⁻⁵ Torr. By the irradiation of the electron beam, the second contact layer 73,
The first contact layer 72 and the cladding layer 71 have a hole concentration of 6 × 10 ¹⁷ / cm ³ , 3 × 10 ¹⁷ / cm ³ , 2 × 10 ¹⁷ / c, respectively.
A p-type semiconductor having m ³ and resistivity of 2 Ωcm, 1 Ωcm and 0.7 Ωcm was obtained. Thus, a wafer having a multilayer structure was obtained. Next, as shown in FIG. 3, an SiO ₂ layer 11 is formed on the second contact
Then, a photoresist 12 was applied on the SiO ₂ layer 11. Then, by photolithography, as shown in FIG. 3, on the second contact layer 73, the photoresist 12 at the electrode formation site A ^′ for the high carrier concentration n ⁺ layer 3 was removed. Next, as shown in FIG.
SiO ₂ layer 11 not covered by photoresist 12
Was removed with a hydrofluoric acid-based etching solution. Next, the photoresist 12 and the SiO ₂ layer 11
The second contact layer 73 not covered by the second contact layer 73,
First contact layer 72, cladding layer 71, light emitting layer 5, n
The layers 4, vacuum 0.04 Torr, RF power 0.44W / cm ^2, BCl ₃
After gas was supplied at a rate of 10 ml / min to perform dry etching, dry etching was performed using Ar. In this step, as shown in FIG. 5, a hole A for forming an electrode for the high carrier concentration n ⁺ layer 3 was formed. Thereafter, the photoresist 12 and the SiO ₂ layer 11 were removed. Next, two layers of Ni / Au were uniformly deposited, and a transparent electrode 9 was formed on the second contact layer 73 through application of a photoresist, a photolithography step, and an etching step. Then, Ni / Au is applied to a part of the transparent electrode 9.
Were deposited to form the pad 10. On the other hand, the electrode 8 was formed on the n ⁺ layer 3 by evaporating aluminum. Thereafter, the wafer processed as described above was cut into individual devices to obtain light emitting diodes having the structure shown in FIG. This light emitting element has a light emission peak wavelength of 47 at a driving current of 20 mA.
The emission intensity was 0 nm and the emission intensity was 2 mW. The emission intensity was doubled compared to the LED of the conventional structure. In the above embodiment, the light emitting layer 5 has In _0.2 Ga _0.8
A strained superlattice having a multiple quantum well structure of the N well layer 52 and the Al _0.05 Ga _0.95 N barrier layer 51 was used, but the lattice constant mismatch range was 0.4 to 4.8% and the thickness of each layer was 1-20
If nm, the general formula AlGa _y1 In _1-x1-y1 N (0 ≦ x1 ≦ 1 _, 0 ≦
well layer with y1 ≦ 1,0 ≦ x1 + y1 <1) and general formula Al _x2 Ga _y2 In
A barrier layer of _1-x2-y2N (0 ≦ x2 ≦ 1 _, 0 ≦ y2 ≦ 1,0 ≦ x2 + y2 ≦ 1) may be used. Further, the quantum well structure may have multiple periods or one period. Although the well layer 52 is doped with silicon and zinc, it may be non-doped. Also, n layer 4
Is Al _x4 Ga _{1-x4 having} a wider band gap than the barrier layer 51.
N may be used. For example, when the n-layer 4 has a syringe concentration of 2
Al _0.08 Ga _0.92 N having × 10 ¹⁸ / cm ³ and an electron concentration of 1 × 10 ¹⁸ / cm ³ may be used. Second Embodiment In the first embodiment, zinc and silicon are added to each well layer 52 at the same time. Light emitting diode 1 of second embodiment
As shown in FIG. 6, a plurality of well layers 5
20 is obtained by adding silicon and zinc alternately in order. In this structure, light emission by acceptor level and donor level can be performed, and blue luminous efficiency is improved. The light emitting device thus obtained has a driving current of 20 mA.
The emission peak wavelength was 470 nm and the emission intensity was 3 mW. This luminous efficiency is 45%, 3 times higher than that of the conventional configuration.
Improved by a factor of two. Third Embodiment As shown in FIG. 7, the light emitting diode 200 of the third embodiment has a structure in which zinc is added to all the well layers 521 and silicon is added to all the barrier layers 511. In this structure, paired light emission by the acceptor level and the donor level becomes possible, and the luminous efficiency of ultraviolet rays is improved. Conversely, silicon may be added to all the well layers 521, and zinc may be added to all the barrier layers 511. The light emitting device thus obtained had a drive current of 20 mA, an emission peak wavelength of 470 nm, and an emission intensity of 3 mW. This luminous efficiency is 4.
5%, three times higher than that of the conventional configuration. Fourth Embodiment In all the above embodiments, the barrier layers 51, 510,
Although magnesium is not added to 511, the p-type may be formed by heat treatment or electron beam irradiation treatment after adding magnesium. Fifth Embodiment The light emitting layer 5 may be configured as shown in FIG. That is, in the present embodiment, the light emitting layer 5 is made of Al _0.05 Ga _0.95
N 2 barrier layer 512 and impurity-free In _0.2 Ga _0.8
The well layer 522 made of N is formed in five periods. The thickness of all the barrier layers 512 is constant at 35 °, but the thickness of the well layer 522 is 35 °, 45 °, 55 °, 45 °, and 35 ° in order from the side present on the cladding layer 71 side. I have. When the thickness of the well layer is changed as described above, the bandwidth changes due to the quantum effect, and light emission having a different peak wavelength is obtained from each well layer. As a result, the emission spectrum can be broadened as a whole. . In a special case, white light can be obtained by changing the thickness of the well layer into many types as described above. In all the above embodiments, the contact layer has a two-layer structure, but may have a one-layer structure. In all of the above embodiments, the total thickness of the cladding layer 71, the first contact layer 72, and the second contact layer 73 was 50 nm, the growth temperature was 1100 ° C., and the total growth time was 7 minutes. ,
The total thickness can be in the range of 10 nm to 150 nm. In this case, the total growth time of these layers is between 1 and
20 minutes. If the thickness is smaller than 10 nm, the effect of confining carriers in the cladding layer 71 is reduced, and the first contact layer 72 and the second contact layer 73 are thinned, so that ohmic properties are deteriorated and contact resistance is increased, which is not desirable. or,
If the thickness is more than 150 nm, it takes a long time to grow, and the light emitting layer 5
Is prolonged, and the effect of improving the crystallinity is reduced, which is not desirable. The thickness of the cladding layer 71 is 2 nm to 70 nm,
Preferably, the thickness of the first contact layer 72 is 2 nm to 100 nm, and the thickness of the second contact layer 73 is 2 nm to 50 nm. If the thickness of the cladding layer 71 is smaller than 2 nm, the effect of confining carriers is reduced and the luminous efficiency is reduced, which is not desirable. When the thickness of the first contact layer 72 is smaller than 2 nm,
Since the number of holes to be injected is reduced, the luminous efficiency is reduced, which is not desirable. If the second contact layer 73 is thinner than 2 nm, the ohmic property becomes poor and the contact resistance increases, which is not desirable. On the other hand, when the thickness of each layer exceeds the above upper limit thickness, the time during which the light emitting layer is exposed to a temperature higher than its growth temperature becomes longer, and the effect of improving the crystallinity of the light emitting layer is not desirable. The hole concentration of the cladding layer 71 is 1 × 10
¹⁷ to 1 × 10 ¹⁸ / cm ³ is desirable. Hall concentration 1 × 10 ¹⁸
/ Cm ³ or more and becomes undesirable since crystallinity becomes higher impurity concentration is lowered luminous efficiency decreases, 1 × 10 ¹⁷ /
If it is less than cm ³ , the series resistance becomes too high, which is not desirable. The first contact layer 72 is made of magnesium (M
g) is added at a concentration lower than the magnesium (Mg) concentration of the second contact layer 73 in the range of 1 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ to form a layer exhibiting the p-conduction type, so that the hole of the layer is formed. The concentration can be an area including the maximum value of 3 × 10 ¹⁷ to 8 × 10 ¹⁷ / cm ³ . Thus, the luminous efficiency does not decrease. The second contact layer 73 is made of magnesium (M
g) It is desirable that the concentration be 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ . Magnesium (Mg) is 1 × 10 ²⁰ -1 × 10 ²¹ /
The p-type layer added to the cm ³ layer can improve the ohmic property of the metal electrode, but the hole concentration is slightly reduced to 1 × 10 ¹⁷ to 8 × 10 ¹⁷ / cm ³ . (Including the range in which the driving voltage can be reduced to 5 V or less, the Mg concentration is preferably in the above range for improving the ohmic property.) The silicon concentration and the zinc concentration of the light emitting layer 5 are 1 × 10 ¹⁷ to 1 respectively. × 10 ²⁰ / cm ³ is desirable. 1
If it is less than × 10 ¹⁷ / cm ³ , the luminous efficiency is reduced due to lack of the luminescent center, and if it is more than 1 × 10 ²⁰ / cm ³ , the crystallinity deteriorates and the Auger effect occurs, which is not desirable. More preferably, the range is 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ . Further, the concentration of silicon (Si) is preferably 10 times to 1/10, more preferably 1 to 1/1, as compared with zinc (Zn).
About 10 or less is more desirable. The acceptor impurities are group 2 elements beryllium (Be), magnesium (Mg), zinc (Zn), cadmium (C
d), mercury (Hg) may be used. When the group 2 element is used as the acceptor impurity, the group 4 element carbon (C), silicon (Si), germanium (Ge), tin (S
n) and lead (Pb) can be used. When the Group 4 element is used as an acceptor impurity, 6
Group elements such as sulfur (S), selenium (Se), and tellurium (Te) can also be used. The p-type conversion can be performed by electron beam irradiation, thermal annealing, heat treatment in N ₂ plasma gas, or laser irradiation. In the above embodiment, light emitting diodes are all used as light emitting elements, but laser diodes may be used.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a configuration diagram showing a configuration of a light emitting diode according to a first specific example of the present invention. FIG. 2 is a sectional view showing a manufacturing process of the light-emitting diode of the embodiment. FIG. 3 is a sectional view showing a manufacturing step of the light-emitting diode of the embodiment. FIG. 4 is a sectional view showing a manufacturing step of the light-emitting diode of the same embodiment. FIG. 5 is a sectional view showing the manufacturing process of the light emitting diode of the same embodiment. FIG. 6 is a configuration diagram showing a configuration of a light emitting diode according to a second embodiment. FIG. 7 is a configuration diagram showing a configuration of a light emitting diode according to a third embodiment. FIG. 8 is a configuration diagram showing a configuration of a light emitting layer of a light emitting diode according to a fifth embodiment. [Description of Signs] 10, 100, 200: Light-emitting diode 1: Sapphire substrate 2: Buffer layer 3: High carrier concentration n ⁺ layer 4: n-layer 5: Light-emitting layers 51, 510, 511, 512: Barrier layers 52, 520 , 521, 522 well layer 71 clad layer 72 first contact layer 73 second contact layer 8 electrode 9 transparent electrode 10 pad

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Norikazu Koide             Nagahata 1, Ochiai, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture             Address Toyota Gosei Co., Ltd. (72) Inventor Shiro Yamazaki             Nagahata 1, Ochiai, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture             Address Toyota Gosei Co., Ltd. (72) Inventor Junichi Umezaki             Nagahata 1, Ochiai, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture             Address Toyota Gosei Co., Ltd.

Claims (1)

[Claims] 1. A light emitting device using a group III nitride semiconductor for a light emitting layer.
In the child, The light-emitting layer is formed of a single layer of a strained superlattice of a group III nitride semiconductor.
Or a group III nitride having a multiple quantum well structure.
Compound semiconductor light emitting device. 2. The method according to claim 1, wherein the light emitting layer is made of Al._X2Ga_1-X2From N (0 <x2 ≤ 1)
Barrier layer and In_X1Ga_1-X1Well layer composed of N (0 <x1 ≤ 1)
Composed of single or multiple quantum well superlattices
3. The group III nitride according to claim 1, wherein
Object semiconductor light emitting device. 3. The method according to claim 1, wherein the light emitting layer includes an acceptor impurity or a donor.
-Characterized by the addition of impurities or both
The group III nitride semiconductor according to claim 1 or 2,
Light emitting element. 4. The method according to claim 1, wherein the acceptor is formed only in each well layer of the light emitting layer.
And the donor impurity are added together.
The group III nitride semiconductor light emitting device according to claim 3, characterized in that:
element. 5. The method according to claim 1, wherein the well layer adjacent to the light emitting layer is provided with the active layer.
Septa impurities and the donor impurities are alternately added.
4. The Group III nitride semiconductor according to claim 3, wherein
Body light emitting element. 6. The method according to claim 6, wherein the well layer of the light emitting layer includes the acceptor.
Impurity in the barrier layer of the light emitting layer.
Impurities are added, respectively, or
The donor layer has the donor impurity, and the barrier layer has the donor impurity.
It is noted that each of the sceptor impurities is added.
The group III nitride semiconductor light-emitting device according to claim 3, wherein: 5. The method according to claim 1, wherein the acceptor impurity is zinc.
The donor impurity is silicon.
The group III nitride according to any one of claims 3 to 6.
Semiconductor light emitting device. 7. The light emitting layer according to claim 1, wherein an acceptor impurity is added.
P-conductivity type Al_X3Ga_1-X3P layer composed of N (X2 ≤ X3)
And n-type Al doped with a donor impurity_X4Ga _1-X4N
(X2 ≦ X4)
The group III nitride semiconductor light emitting device according to claim 2, wherein 8. The acceptor added to the p-layer
The impurity is magnesium, which is added to the n-layer.
Wherein the donor impurity is silicon.
A group III nitride semiconductor light emitting device according to claim 7.