JP2008235758A - Method of manufacturing compound semiconductor epitaxial substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a compound semiconductor epitaxial substrate for light-emitting element having a high light emitting efficiency, which is capable of forming a well layer formed by a nitride system compound semiconductor with suppressing wavelength shortening with a good crystallinity. <P>SOLUTION: A compound semiconductor epitaxial substrate has a double hetero structure configured by laminating a GaN layer 15A as a barrier layer, an InGaN layer 15F as a well layer and a GaN layer 15B as a barrier layer in this order. In a method of manufacturing the compound semiconductor epitaxial substrate, when the GaN layer 15B is vapor-phase grown to a required layer thickness, a GaN layer 15K having a layer thickness thinner than the required layer thickness is grown on the InGaN layer 15F at first, and then, a GaN layer 15L is grown by remaining layer thickness subsequently to the growth of the GaN layer 15K. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a compound semiconductor epitaxial substrate suitable for manufacturing a light emitting device, and a compound semiconductor light emitting device manufactured using the method.

As a material of a semiconductor light emitting element such as an ultraviolet or blue light emitting diode or a laser diode, a general formula In _x Ga _y Al _z N (where x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ A compound semiconductor represented by 1) (hereinafter abbreviated as a nitride compound semiconductor) is known. Nitride-based compound semiconductors have the feature of being able to cope with light energy of a wide range of wavelengths by changing the composition of group 3 elements, and light-emitting elements using nitride-based compound semiconductors are widely used. It has become like this. In recent years, light emitting devices that exhibit high light emission output have been demanded, and light emitting devices using nitride compound semiconductors use quantum well layers of nitride compound semiconductors. Therefore, it is desired to improve the light emission efficiency by further improving the crystallinity quality.

  In general, the crystallinity of a compound semiconductor can be improved by increasing the growth temperature. However, in particular, when forming a nitride compound semiconductor containing In used in a well layer, if the growth temperature is increased, the amount of In taken into the nitride compound semiconductor crystal to be formed by re-evaporation of In or the like Has a problem that the emission wavelength is shortened accordingly. For this reason, when it is going to manufacture the light emitting element using a nitride type compound semiconductor, it may become difficult to adjust a light emission wavelength, especially a long wavelength, keeping the crystallinity high quality.

Therefore, various devices have been conventionally made. For example, Patent Document 1 discloses a technique for improving luminous efficiency by improving the quality of a well layer. This prior art is a method of manufacturing a group III nitride semiconductor having a quantum well structure having a laminated structure of a well layer made of a group 3 nitride semiconductor and a barrier layer at least one period. A cap layer having a band gap wider than that of the well layer and having the same or narrow band gap as that of the barrier layer is formed in the vicinity of the formation temperature of the well layer. The layer is removed, and a barrier layer is formed on the well layer.
Japanese Patent Laid-Open No. 11-68159

  According to the above-described prior art, a step of removing part or all of the cap layer of the well layer is required in the temperature rising process, but it is difficult to control the layer thickness in this removal step, and the thickness of the cap layer is set to a predetermined thickness. It is not easy to form. Therefore, the characteristics of the semiconductor light emitting device obtained by this conventional method tend to vary widely, which may be a serious problem in quality control.

  An object of the present invention is to provide an improved method of manufacturing a compound semiconductor epitaxial substrate and a compound semiconductor light emitting device that can solve the above-described problems in the prior art.

  Another object of the present invention is to produce a compound semiconductor epitaxial substrate for a light emitting device with high luminous efficiency, which can improve the crystallinity by suppressing the short wavelength of a well layer formed of a nitride compound semiconductor. The present invention provides a method and a compound semiconductor light emitting device using the epitaxial substrate.

In order to solve the above problems, the present inventors have intensively studied the structure of an epitaxial substrate for a compound semiconductor light emitting device. As a result, the first layer represented by the general formula In _a Ga _b Al _c N (where 0 ≦ a <1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1, a + b + c = 1), A second layer represented by the general formula In _x Ga _y Al _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z <1, x + y + z = 1) having a smaller band gap than the layer; formula larger band gap than the second layer in _s Ga _t Al _u N (However, 0 ≦ s <1,0 ≦ t ≦ 1,0 ≦ u ≦ 1, s + t + u = 1) a third layer represented by When the third layer is grown in the method of manufacturing the structure in which the two are in contact with each other in this order, a thin layer (fourth layer) is first grown, and then the remaining portion of the third layer (fifth layer) ) Is grown, the third layer is incorporated with the amount of In incorporated compared with the case where the fourth layer is not grown. It found that it is possible to reduce effectively suppressed by the a good crystallinity layer. The present invention is based on this novel knowledge, and further various studies are added to this knowledge, and an epitaxial substrate for a compound semiconductor light emitting device capable of producing a light emitting device with high light emission efficiency while suppressing shortening of the emission wavelength. It came to invent the manufacturing method of this.

According to the first aspect of the present invention, the first layer represented by the general formula In _a Ga _b Al _c N (where 0 ≦ a <1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1, a + b + c = 1). And the band gap is smaller than that of the first layer and is represented by the general formula In _x Ga _y Al _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z <1, x + y + z = 1). and a second layer, in general larger band gap than the second layer type in _s Ga _t Al _u N (However, 0 ≦ s <1,0 ≦ t ≦ 1,0 ≦ u ≦ 1, s + t + u = 1) In the method of manufacturing a compound semiconductor epitaxial substrate having a structure in which the third layer represented is in this order, when the third layer is grown on the second layer to a required layer thickness, After the fourth layer having a thickness smaller than the required layer thickness is grown on the second layer, the growth of the fourth layer is continued. 5 layers of a method of manufacturing a compound semiconductor epitaxial substrate which is characterized in that so as to grow only the remaining layer thickness component is proposed.

  According to a second aspect of the present invention, there is proposed a method for manufacturing a compound semiconductor epitaxial substrate according to the first aspect, wherein the second layer has a thickness of 5 to 90 mm.

  According to a third aspect of the present invention, there is proposed a method for producing a compound semiconductor epitaxial substrate according to the first or second aspect, wherein the second layer is a light emitting layer.

  According to the invention of claim 4, in the invention of any one of claims 1 to 3, the compound semiconductor epitaxial substrate having a temperature history exceeding the growth temperature of the fourth layer in the growth history of the third layer A manufacturing method is proposed.

  According to a fifth aspect of the present invention, there is proposed a method of manufacturing a compound semiconductor epitaxial substrate according to any one of the first to fourth aspects, wherein the thickness of the fourth layer is 3 to 50 mm.

  According to the invention of claim 6, in the invention of any one of claims 1 to 5, a method for producing a compound semiconductor epitaxial substrate, wherein the growth temperature of the fourth layer is the same as the growth temperature of the second layer Is proposed.

  According to the invention of claim 7, in the invention of any one of claims 1 to 6, the compound semiconductor epitaxial substrate includes an n-type nitride compound semiconductor layer, a nitride compound semiconductor layer as a light emitting layer, and p. A method for manufacturing a compound semiconductor epitaxial substrate, which is an epitaxial substrate for a compound semiconductor light-emitting device, containing a double-heterostructure nitride compound semiconductor having a type nitride compound semiconductor layer in this order is proposed.

  According to an eighth aspect of the present invention, there is proposed a compound semiconductor light emitting device manufactured using the compound semiconductor epitaxial substrate manufactured by the method according to any one of the first to eighth aspects.

  The compound semiconductor light emitting device using the epitaxial substrate for compound semiconductor of the present invention is more reproducible than the conventional compound semiconductor light emitting device, and the light emission efficiency is improved particularly in the light emission region of a long wavelength. It can be suitably used for industrial applications and is extremely useful industrially.

  Hereinafter, an example of an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a cross-sectional view schematically showing a layer structure of a compound semiconductor epitaxial substrate manufactured by the method of the present invention. In the compound semiconductor epitaxial substrate 1, the base crystal layer 2 and the multiple quantum well layer 15 are formed on the sapphire substrate 11. Hereinafter, the epitaxial crystal structure formed on the sapphire substrate 11 will be described in detail. The underlying crystal layer 2 is formed by laminating a low-temperature buffer layer 12 made of GaN, an n-type contact layer 13 made of an n-type GaN layer, and a nitride compound semiconductor layer 14 made of a non-doped GaN layer as shown in the figure. The multiple quantum well layer 15 is a multiple quantum well layer in which the GaN layers 15A to 15E and the InGaN layers 15F to 15J are repeatedly made five compositions long. A GaN cap layer 16 made of a GaN layer is formed in contact with the multiple quantum well layer 15, thereby forming a light emitting layer. On this light emitting layer, an AlGaN: Mg cap layer 17 made of an AlGaN: Mg layer and a p-type contact layer 18 made of a GaN: Mg layer are further laminated. As described above, the compound semiconductor epitaxial substrate 1 has a layer structure of a compound semiconductor epitaxial crystal necessary for constituting a compound semiconductor light emitting device.

  Next, a method for manufacturing the compound semiconductor epitaxial crystal having the crystal layer structure shown in FIG. 1 on the substrate will be described in detail.

As the substrate, in addition to the sapphire substrate, a substrate made of SiC, Si, MgAlO ₄ , LiTaO ₃ , GaN, AlN, ZrB ₂ , CrB ₂ or the like can be used. From the viewpoints of reactivity with a nitride-based compound semiconductor, difference in thermal expansion coefficient, stability at high temperature, ease of wafer acquisition, and the like, the substrate material is preferably sapphire or SiC, and more preferably sapphire.

  Examples of a method for producing a compound semiconductor epitaxial crystal include a metal organic chemical vapor deposition method (MOVPE method), a hydride vapor phase epitaxy method (HVPE method), and a molecular beam epitaxy method (MBE method). Preferably used. Hereinafter, an epitaxial film forming technique that can be used to form each layer of the compound semiconductor epitaxial crystal by the MOVPE method will be described first.

  When each layer as described above is grown using the MOVPE method, it can be appropriately selected from the following raw materials and used.

Examples of Group 3 gallium raw materials include general formulas R ₁ R ₂ R ₃ Ga such as trimethyl gallium (TMG) and triethyl gallium (TEG) (where R ₁ , R ₂ and R ₃ represent lower alkyl groups). And trialkylgallium.

As an aluminum raw material, general formula R ₁ R ₂ R ₃ Al such as trimethylaluminum (TMA), triethylaluminum (TEA), triisobutylaluminum (wherein R ₁ , R ₂ and R ₃ represent lower alkyl groups). ) Represented by trialkylaluminum.

As an indium raw material, a trialkyl represented by a general formula R ₁ R ₂ R ₃ In (wherein R ₁ , R ₂ and R ₃ represent lower alkyl groups) such as trimethylindium (TMI) and triethylindium. Examples thereof include those obtained by exchanging 1 to 3 alkyl groups with halogen atoms from trialkylindium such as indium and diethylindium chloride, and indium halides represented by the general formula InX (X is a halogen atom) such as indium chloride.

  Among these Group 3 materials, TMG is preferred as the gallium source, TMA as the aluminum source, and TMI as the indium source.

  Examples of Group 5 materials include ammonia, hydrazine, methyl hydrazine, 1,1-dimethylhydrazine, 1,2-dimethylhydrazine, t-butylamine, ethylenediamine, and the like. These may be used alone or in any combination. Among these raw materials, ammonia and hydrazine do not contain carbon atoms in the molecule, and therefore are less affected by carbon contamination in the semiconductor. From the viewpoint of easy availability of high-purity products, ammonia is more preferable. is there.

  The above-mentioned source gas can be introduced into the reaction furnace to grow the nitride compound semiconductor layer. As the reaction furnace, one having a raw material supply line for supplying a raw material gas from a raw material supply apparatus to the reaction furnace, and a susceptor for heating the substrate can be used in the reaction furnace. The susceptor has a structure that can be rotated by a rotating device in order to uniformly grow the nitride-based compound semiconductor layer, and a heating device such as an infrared lamp for heating the susceptor is provided inside the susceptor. A structure having a certain structure is generally used. By this heating, the source gas supplied to the reactor through the source supply line is thermally decomposed on the growth substrate, and a desired compound can be vapor-phase grown on the substrate. Of the raw material gas supplied to the reaction furnace, unreacted raw material gas is discharged from the exhaust line to the outside of the reaction furnace and sent to the exhaust gas treatment device.

  In addition, a required nitride-based compound semiconductor can be crystal-grown using the HVPE method. In this case, the following compounds can be used as starting materials. Examples of the Group 3 raw material include gallium chloride gas produced by reacting gallium metal with hydrogen chloride gas at high temperature, and indium chloride gas produced by reacting indium metal with hydrogen chloride gas at high temperature. An example of the Group 5 material is ammonia. As the carrier gas, a gas such as nitrogen, hydrogen, argon or helium can be used alone or in combination, and hydrogen or helium is preferable. The above source gas is introduced into the reaction furnace to grow a nitride compound semiconductor.

  In addition, a required nitride-based compound semiconductor can be crystal-grown using the MBE method. In this case, the following compounds can be used as starting materials. Examples of the Group 3 material include metals such as gallium, aluminum, and indium. Examples of Group 5 materials include gases such as nitrogen and ammonia. The above source gas is introduced into the reaction furnace to grow a nitride compound semiconductor.

  Next, the structure of the compound semiconductor epitaxial substrate 1 having the laminated structure shown in FIG. 1 as a compound semiconductor epitaxial substrate including a nitride compound semiconductor will be described.

  The compound semiconductor epitaxial substrate 1 has a double hetero structure in which an n-type nitride compound semiconductor layer, a nitride compound semiconductor layer as a light emitting layer, and a p-type nitride compound semiconductor layer are stacked in this order. The structure has a nitride compound semiconductor. Specifically, focusing on the InGaN layer 15F that is the first quantum well layer, the InGaN layer 15F is provided so as to be in contact with the GaN layer 15A that is the barrier layer. On the InGaN layer 15F, a GaN layer 15B, which is still another barrier layer, is provided in contact with the InGaN layer 15F. The band gap of the InGaN layer 15F is smaller than the band gap of the GaN layer 15A, and the band gap of the GaN layer 15B is larger than the band gap of the InGaN layer 15F.

That is, the barrier layer is made of a Group 3-5 compound semiconductor represented by the general formula In _a Ga _b Al _c N (where 0 ≦ a <1, 0 <b ≦ 1, 0 ≦ c ≦ 1, a + b + c = 1). The working GaN layer 15A has a smaller band gap than the GaN layer 15A and is represented by the general formula In _x Ga _y Al _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z <1, x + y + z = 1). it is an InGaN layer 15F made of group III-V compound semiconductor containing In and Ga, larger band gap than InGaN layer 15F formula In _s Ga _t Al _u N (However, 0 ≦ s <1,0 ≦ t ≦ 1 and 0 ≦ u ≦ 1, s + t + u = 1), and a GaN layer 15B, which is a barrier layer represented by s + t + u = 1), is provided on the underlying crystal layer 2 in this order so as to form a quantum well structure. ing.

In this embodiment, five sets of the quantum well structures described above are provided, but at least one is sufficient. If necessary, undoped nitride compound semiconductor layers may be provided above and below the n-type nitride compound semiconductor layer. An n ⁺ type nitride compound semiconductor layer may be provided on the p type nitride compound semiconductor.

The layer structure shown in FIG. 1 is an example, and as an epitaxial substrate for a compound semiconductor light emitting device that is an object of the present invention, GaN, AlGaN, AlN, InGaN, InGaAlN, InN, SiC, ZnO, etc. are formed on a substrate such as sapphire. Buffer layer made of n-type, n-type layer made of n-type GaN, n-type AlGaN, etc., light-emitting layer made of InGaN, GaN, AlGaN, AlInGaN, etc., cap layer made of undoped GaN, undoped AlGaN, etc., Mg-doped AlGaN, Mg-doped GaN p-type layer made of the n ⁺ -type layer made of n ⁺ -type InGaN, include those having a layered structure epitaxially grown in this order.

Also in this case, if necessary, an undoped nitride compound semiconductor layer made of InGaN, GaN, AlGaN, AlN, AlInGaN or the like can be provided above and below the n-type nitride compound semiconductor. An n ⁺ type nitride-based compound semiconductor layer made of n ⁺ type InGaN or the like can be provided on the compound semiconductor.

  The n-type layer can be generally composed of a nitride semiconductor doped with Si, O, Se, C, or Ge. A nitride-based semiconductor in which Si or Ge is highly doped is preferable. The p-type layer can be generally composed of a nitride-based semiconductor doped with Mg, Zn, Cd, Be, C, Ca, or Hg. A nitride-based semiconductor doped with Mg and Ca at a high concentration is preferable.

  As the n-type dopant material, silane, disilane, germane, tetramethylgermanium, tetraethylgermanium and the like are suitable.

As a raw material of Mg which is a p-type dopant, for example, biscyclopentadiethyl magnesium [(C ₅ H ₅ ) ₂ Mg], bismethylcyclopentadiethyl magnesium [(C ₅ H ₄ CH ₃ ) ₂ Mg], bisethylcyclo Pentadiethyl magnesium [(C ₅ H ₄ C ₂ H ₅ ) ₂ Mg] and the like can be used. As a raw material of Ca, biscyclopentadienyl calcium ((C ₅ H ₅ ) ₂ Ca) and its derivatives, for example, bismethylcyclopentadienyl calcium ((C ₅ H ₄ CH ₃ ) ₂ Ca), bisethyl Cyclopentadienyl calcium ((C ₅ H ₄ C ₂ H ₅ ) ₂ Ca), bisperfluorocyclopentadienyl calcium ((C ₅ F ₅ ) ₂ Ca), or di-1-naphthalenyl calcium and Derivatives thereof, or calcium acetylide and derivatives thereof, such as bis (4,4-difloro-3-buten-1-ynyl) -calcium, bisphenylethynyl calcium and the like can be used. These raw materials may be used alone or in combination.

  When the nitride compound semiconductor is grown directly on a substrate other than the nitride compound semiconductor substrate, a sufficiently high quality crystal may not be obtained due to lattice mismatch. In such a case, as a buffer layer, for example, a layer of GaN, AlGaN, AlN, InGaN, InGaAlN, InN, SiC, ZnO or the like is first grown on the substrate, and then the nitride compound semiconductor is formed on the buffer layer. High quality crystals can be obtained by growing and using the two-stage growth method. Further, the thicker the nitride compound semiconductor is grown, the greater the effect that the dislocation is bent in the lateral direction. Therefore, the crystal defects can be reduced by growing the nitride compound semiconductor thickly. Also, crystal defects can be reduced by using a selective growth method of a nitride compound semiconductor.

  Next, a specific method for manufacturing the compound semiconductor epitaxial substrate 1 having the configuration shown in FIG. 1 using the compound semiconductor epitaxial crystal growth technique described above will be described in detail.

  A low temperature buffer layer 12 is formed on the sapphire substrate 11, and an n-type contact layer 13 is further formed on the low temperature buffer layer. The thickness of the low temperature buffer layer 12 is desirably 10 to 100 nm. In addition, the substrate and buffer layer described above can be used.

The n-type contact layer 13 preferably has a space charge density of 1 × 10 ¹⁸ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less so as not to increase the operating voltage of the light emitting element. This space charge density corresponds to the ionized impurity concentration in the layer and corresponds to the thermally activated carrier concentration. Generally, it is a value obtained by a capacitance-voltage (CV) measurement method. Such an n-type contact layer has a growth temperature of 900 ° C. to 1200 ° C. and a formula In _x Ga _y Al _z N (where x + y + z = 1, 0 ≦ x <1, 0 ≦ y ≦ 1, 0 ≦ z <1 ) Can be easily obtained by a known method in which an appropriate amount of an n-type dopant gas or an organic metal raw material is mixed during the growth of a compound semiconductor crystal. Further, when the space charge density exceeds 1 × 10 ²¹ cm ⁻³ , the crystallinity tends to be deteriorated, which may adversely affect the characteristics of the light emitting device, which is not preferable.

  In addition, when the mixed crystal ratio of In and Al is high, the crystal quality is deteriorated particularly at a low temperature and the space charge density is increased. Therefore, the In composition is preferably 5% or less, more preferably 1% or less. The Al composition is preferably 5% or less, more preferably 1% or less. The n-type contact layer 13 is most preferably GaN.

Next, on the n-type contact layer 13, nitriding represented by the formula In _x Ga _y Al _z N (where x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). A physical compound semiconductor layer 14 is provided. The nitride-based compound semiconductor layer 14 can be omitted.

The nitride-based compound semiconductor layer 14 is preferably non-doped, and thereby, better electrostatic withstand voltage characteristics, better LED emission characteristics, and electrical characteristics can be obtained. The growth temperature is usually in the range of 900 ° C to 1200 ° C, preferably in the range of 1000 ° C to 1150 ° C. At this time, the n-type dopant gas and the p-type dopant gas are not intentionally mixed and are set to non-doping conditions. The space charge density of the nitride-based compound semiconductor layer 14 formed under such crystal growth conditions can be less than 5 × 10 ¹⁶ cm ⁻³ of n-type. It is preferably 1 × 10 ¹⁶ cm ⁻³ or less. However, if such a low space charge density layer is too thick, it becomes a series resistance component of the light emitting element, and therefore the thickness of the nitride-based compound semiconductor layer 14 is preferably 600 nm or less. More preferably, it is 10 nm to 300 nm. More preferably, it is 50 nm-300 nm.

  The nitride-based compound semiconductor layer 14 has an In composition of preferably 5% or less, more preferably 1% or less because the crystal quality is lowered and the carrier concentration is increased particularly at low temperatures when the mixed crystal ratio of In and Al is high. It is. The Al composition is preferably 5% or less, more preferably 1% or less. Most preferred is GaN.

Further, between the light-emitting layer 15 and the nitride based compound semiconductor layer 14, the formula In _x Ga _y Al _z N (provided that, x + y + z = 1,0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1 1 may be provided, but the example shown in FIG. 1 is an example in which such a non-doped nitride compound semiconductor layer is not provided.

The non-doped nitride compound semiconductor layer described above is grown usually in the range of 550 ° C. to 850 ° C., preferably in the range of 700 ° C. to 800 ° C. For example, crystal growth can be performed by setting the growth temperature to 775 ° C., using ammonia gas as the Group 5 material, and triethylgallium as the Group 3 material. At this time, it is important that the n-type dopant gas and the p-type dopant gas are not mixed intentionally and the non-doping condition is used. The space charge density of the non-doped nitride compound semiconductor layer formed under such crystal growth conditions can be n-type and 1 × 10 ¹⁷ to 1 × 10 ¹⁸ cm ⁻³ .

  This non-doped nitride-based compound semiconductor layer has a high In / Al mixed crystal ratio, so that the crystal quality is lowered and the carrier concentration is increased particularly at a low temperature. Therefore, the In composition is preferably 5% or less, more preferably 1 % Or less. The Al composition is preferably 5% or less, more preferably 1% or less. Most preferred is GaN.

  In addition, the electrostatic withstand voltage can be further improved by adjusting the film thickness of the non-doped nitride compound semiconductor layer. However, if the film thickness of the non-doped nitride-based compound semiconductor layer is too thin, the effect of improving the electrostatic withstand voltage tends to decrease, and if it is too thick, the device characteristics such as a tendency to increase the leakage current during operation of the light-emitting element. May adversely affect Therefore, the film thickness of the non-doped nitride-based compound semiconductor layer is usually in the range of 70 nm to 500 nm, and preferably in the range of 70 nm to 250 nm.

  The non-doped nitride compound semiconductor layer may also serve as a barrier layer in contact with the well layer that is the light emitting layer, or may be provided between the n-type contact layer 13 and the nitride compound semiconductor layer 14. good. It may also serve as a barrier layer in contact with the well layer, or may be provided between the cap layer and the p-type contact layer 18.

Note that, between the nitride-based compound semiconductor layer 14 and the light emitting layer 15, not a non-doped nitride-based compound semiconductor layer, but a general formula In _x Ga _y Al _z N (where x + y + z = 1, 0 ≦ x ≦ A nitride-based compound semiconductor layer doped with In, Ga, and Al that is isoelectronic represented by 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1) may be provided. Preferably, an In-doped nitride compound semiconductor is preferable. In this case, n-type doping similar to that of the n-type contact layer may be performed.

The nitride compound semiconductor layer doped with isoelectronic doping is usually grown in the range of 900 ° C. to 1200 ° C., preferably in the range of 1000 ° C. to 1150 ° C. The space charge density of the doped nitride compound semiconductor layer formed under such crystal growth conditions can be n-type and 1 × 10 ¹⁷ to 1 × 10 ¹⁸ cm ⁻³ .
The doped nitride-based compound semiconductor layer has a high In / Al mixed crystal ratio, so that the crystal quality is lowered and the carrier concentration is increased particularly at a low temperature. Therefore, the In composition is preferably 5% or less, more preferably 1%. It is as follows. The Al composition is preferably 5% or less, more preferably 1% or less. Most preferred is GaN. Luminous efficiency can be further improved by adjusting the thickness of the doped nitride compound semiconductor layer.

Next, a method for forming the light emitting layer 15 shown in FIG. 1 will be described. The barrier layers GaN layers 15A to 15E are compound semiconductors represented by In _a Ga _b Al _c N (where 0 ≦ a <1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1, a + b + c = 1). is formed, InGaN layer 15F~15J a well layer has a smaller band gap than the barrier layer in _x Ga _y Al _z N (However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z <1, x + y + z = 1). In the present embodiment, a double quantum structure of multiple quantum wells composed of GaN layers 15A to 15E which are barrier layers and InGaN layers 15F to 15J which are well layers.

  In the configuration example shown in FIG. 1, five well layers are provided, but at least one well layer is sufficient. Here, the film thicknesses and mixed crystal ratios of the GaN layers 15A to 15E and the InGaN layers 15F to 15J can be appropriately determined according to the characteristics of the target light emitting element. For example, if a blue light emitting device having an emission wavelength of about 470 nm is intended, the GaN layers 15A to 15E have a thickness of 3 nm to 30 nm, the InGaN layers 15F to 15J have a thickness of 1 nm to 10 nm, and the average In composition is 5 It may be about ˜40%. The growth temperature of the GaN layers 15A to 15E that are barrier layers is usually 500 ° C. to 1000 ° C., preferably 700 ° C. to 900 ° C., and the growth temperature of the InGaN layers 15F to 15J that are well layers is usually 600 ° C. to It is 850 degreeC, Preferably it is 650 degreeC-850 degreeC. In addition, n-type doping may be performed on the well layer and the barrier layer as described above to the extent that crystallinity does not deteriorate as necessary.

The present invention relates to a first layer represented by _a general formula In _a Ga _b Al _c N (where 0 ≦ a <1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1, a + b + c = 1), A second layer represented by the general formula In _x Ga _y Al _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z <1, x + y + z = 1) having a smaller band gap than the layer of generally larger band gap than the second layer type in _s Ga _t Al _u N (However, 0 ≦ s <1,0 ≦ t ≦ 1,0 ≦ u ≦ 1, s + t + u = 1) third represented by the In the manufacturing method of the structure in which the layers are in contact with each other in this order, the third layer is grown in two stages of forming the fifth layer remaining after forming the thin fourth layer.

  Therefore, the present invention can be particularly preferably applied to a method for manufacturing an epitaxial substrate for a compound semiconductor light emitting device having a light emitting portion having such a three-layer structure, particularly a method for manufacturing a quantum well. For example, the present invention can be applied to manufacturing a superlattice with a large In incorporation.

  When the light emitting layer 15 shown in FIG. 1 is formed, first, a GaN layer 15A (corresponding to the first layer) is grown on the underlying crystal layer 2, and then an InGaN layer 15F (corresponding to the second layer) is formed. Grow and form. Thereafter, a GaN layer 15B corresponding to the third layer is grown.

  FIG. 2 is a diagram for explaining a method of forming the InGaN layer 15F and the GaN layer 15B shown in FIG. 1 according to the present invention. In this case, the InGaN layer 15F (second layer) serving as the well layer is grown by 30 cm, and then the GaN layer 15B (third layer) serving as the barrier layer is formed to have a thickness of 150 mm and grown. Will be described.

  As shown in FIG. 2, after the GaN layer 15A is grown, an InGaN layer 15F is grown at 30 ° C. and 725 ° C. After that, first, a GaN layer 15K (fourth layer) is grown as a barrier layer at 725 ° C. The growth temperature of the GaN layer 15K (fourth layer) is preferably the same as the growth temperature of the InGaN layer 15F (second layer). The layer thickness of the GaN layer 15K (fourth layer) is preferably 3 to 50 mm. When the GaN layer 15K is too thin, it is difficult to control the film thickness, and it is difficult to obtain the reproducibility of the luminous efficiency improvement by the heat treatment described later. When the layer thickness is too thick, it is difficult to obtain the effect of the luminous efficiency improvement by the heat treatment. . It is considered that the GaN layer 15K (fourth layer) having a small thickness is first grown to give an effect of improving the luminous efficiency. This is because a decrease in the amount of In taken into the nitride-based compound semiconductor crystal accompanying InGaN re-evaporation or the like, which occurs as a side effect of the heat treatment, can be suppressed, and this effect is considered to reduce the emission wavelength.

  Next, after raising the temperature in the growth furnace to 774 ° C., which exceeds the growth temperature of the GaN layer 15K (fourth layer), the GaN layer 15L (fifth layer) having a layer thickness that remains the design thickness of the GaN layer 15B. ) As the remaining barrier layer. The lower limit of the growth temperature of the GaN layer 15L is preferably a growth temperature that exceeds the growth temperature of the GaN layer 15K in order to obtain the effect of improving the light emission efficiency accompanying the improvement of crystallinity by heat treatment. The upper limit of the growth temperature of the GaN layer 15L (fifth layer) is not particularly limited. However, if the growth temperature is too high, light emission due to effects such as interdiffusion between the InGaN layer 15F (second layer) and the GaN layer 15K (fourth layer) is caused by the effect of improving the light emission efficiency associated with the crystallinity improvement by heat treatment. Since it is thought that the fall of efficiency exceeds, 900 degrees C or less is preferable. Further, the growth temperature of the fifth layer is preferably higher by 1 ° C. to 400 ° C. than the growth temperature of the fourth layer. More preferably, it is 5 degreeC-250 degreeC, and 10 degreeC-120 degreeC is especially preferable. That is, the growth history of the GaN layer 15B (third layer) has a temperature history that exceeds the growth temperature of the GaN layer 15K (fourth layer).

  As described above, after the growth of the InGaN layer (well layer) 15F, the GaN layer (barrier layer) 15B is replaced by a GaN layer that is a remaining barrier layer composed of the thin GaN layer (fourth layer) 15K and the GaN layer. (Fifth layer) 15L, the growth conditions are changed as described above, and the growth is performed in two stages, so that the emission wavelength is shorter than that in the case where the GaN layer (barrier layer) 15B is grown in one stage. The crystallinity of the InGaN layer serving as the quantum well layer can be greatly improved while suppressing the wavelength, and a special effect that a nitride-based compound semiconductor with high emission efficiency can be produced can be obtained. In this case, in order to produce a nitride-based compound semiconductor with higher luminous efficiency, after the GaN layer 15A is grown, the GaN layer 15K (fourth layer) as the barrier layer is subsequently grown. The growth temperature of the (fourth layer) is substantially the same as the growth temperature of the GaN layer 15A, and then the GaN layer 15L (fifth layer) of the remaining layer thickness of the designed thickness of the GaN layer 15B is further replaced with the remaining barrier. The growth temperature when growing as a layer preferably exceeds the growth temperature of the GaN layer 15K. If the growth temperature when the GaN layer 15L (fifth layer) is grown as the remaining barrier layer is higher than the growth temperature of the GaN layer 15K, a nitride-based compound semiconductor with even higher luminous efficiency is produced. This is preferable.

  The two-stage growth method of the barrier layer in the light emitting layer 15 described above may be applied to all the GaN layers 15B to 15E of the multiple quantum well layer of the light emitting layer 15, or one or more of the multiple quantum well layers Any quantum well layer or only a single quantum well layer may be applied. Further, in the case of the present embodiment, it is effective even if it is applied to the GaN cap layer 16 on the well layer.

  In the above case, the second layer corresponds to the InGaN layers 15F to 15J, and when the thickness of the second layer is 5 to 90 mm, the nitride-based compound semiconductor crystal associated with the quantum well effect and InGaN reevaporation or the like This is preferable because the effect of suppressing the decrease in the amount of In taken in is increased and the light emission efficiency is improved.

  The GaN layer 15K, which is a thin layer, and the GaN layer 15L, which is a remaining barrier layer, have a high mixed crystal ratio of In and Al. Since control of the layer thickness becomes difficult due to evaporation or the like, the In composition is usually 50% or less, preferably 10% or less, more preferably 1% or less. The Al composition is preferably 50% or less, preferably 20% or less, more preferably 10% or less, and still more preferably 1% or less. Most preferred is GaN.

  Next, a GaN cap layer 16 made of non-doped GaN, an AlGaN: Mg cap layer 17 made of AlGaN: Mg, and a p-type contact layer 18 made of GaN: Mg are formed on the light emitting layer 15.

  Since the GaN cap layer 16 is formed at the same relatively low growth temperature as the normal light emitting layer 15 so as not to deteriorate the crystallinity of the light emitting layer 15 containing In having low heat resistance, it is derived from crystal defects without doping. It has n-type conductivity. The growth temperature is usually 500 ° C to 1000 ° C, preferably 700 ° C to 900 ° C.

  If the thickness of the GaN cap layer 16 is too thick, the crystallinity is impaired, and the hole injection efficiency is lowered, so that the light emission efficiency is lowered. If the thickness is too thin, the heat-resistant protective function is lowered and the light emitting layer 15 is deteriorated. The layer thickness is preferably in the range of approximately 3 nm to 30 nm. The preferable range of the layer thickness depends on the Al composition of the GaN cap layer 16 and the growth temperature of the AlGaN: Mg cap layer 17. The smaller the Al composition of the GaN cap layer 16, the more sufficient the protective function is expressed. It is necessary to increase the thickness, and as the growth temperature of the AlGaN: Mg cap layer 17 increases, it is necessary to increase the layer thickness in order to prevent deterioration of the light emitting layer due to high temperature. Further, when the mixed crystal ratio of In and Al is high, the crystal quality is deteriorated particularly at a low temperature, and the In composition is preferably 5% or less, more preferably 1% or less. The Al composition is preferably 20% or less, more preferably 5% or less, and still more preferably 1% or less. The GaN cap layer 16 may be replaced with another compound semiconductor material instead of GaN, but this material is most preferably GaN.

  The AlGaN: Mg cap layer 17 preferably has a high Al composition so that the potential barrier in the conduction band can be increased with respect to the light emitting layer 15 from the viewpoint of improving the light emission characteristics by making carrier confinement effective. However, if the Al composition of the AlGaN: Mg cap layer 17 is too high, the crystallinity is impaired, and it becomes difficult to achieve p-type or low-concentration n-type, thereby impairing hole injection efficiency. Therefore, there is a preferable range for the Al composition of the AlGaN: Mg cap layer 17, generally 0.1% to 30%, more preferably 1% to 15%.

  The lower the growth temperature of the AlGaN: Mg cap layer 17, the easier it is to become n-type due to crystal defects, and the hole injection efficiency is lowered. In order to prevent this, the Al composition is reduced to maintain good crystallinity. There is a need. Similarly, the smaller the supply amount of p-type dopant, the easier it is to make n-type and the hole injection efficiency decreases. Therefore, in order to prevent this, it is necessary to reduce the Al composition to suppress the n-type of the crystal. . As the thickness of the AlGaN: Mg cap layer 17 increases, the crystallinity may decrease due to an increase in strain due to lattice mismatch. Therefore, in order to prevent this, it is necessary to reduce the Al composition.

In the case of p-type, the space charge density of the AlGaN: Mg cap layer 17 may be within a technically feasible range, and is approximately 1 × 10 ¹⁶ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less. Is desirable. In the case of the n-type, it is preferable that it is as small as possible in order not to impair the hole injection efficiency, and it is preferably about 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁸ cm ⁻³ or less. Control of space charge density is controlled by growth temperature, II / III ratio (p-type dopant and group 3 source supply ratio, p-type dopant supply rate when group 3 source supply is constant), V / III ratio (group 3). The ratio of the raw material to the Group 5 raw material) can be controlled.

  When the layer thickness of the AlGaN: Mg cap layer 17 is n-type, if the layer thickness is too thick, the crystallinity is likely to be lowered, and the injection efficiency into the light emitting layer 15 may be lowered to impair the light emitting efficiency. The thinner one is better, and the thickness is generally 5 to 500 mm, preferably 50 to 500 mm. Also in the case of the p-type, the range is wider than the case of the n-type from the viewpoint of the injection efficiency, but if the layer thickness is too thick, the crystallinity is impaired, so it is approximately 5 to 30000 mm, preferably 50 to 3000 mm.

  Next, the growth temperature of the AlGaN: Mg cap layer 17 is preferably as close as possible to the growth temperature of the light emitting layer 15 so that the protective function of the GaN cap layer 16 is maintained and the light emitting layer 15 is not harmed. However, a higher growth temperature is better for improving the crystallinity of the AlGaN: Mg cap layer 17 and controlling conductivity. Therefore, the growth temperature of the AlGaN: Mg cap layer 17 has a preferable temperature range. A preferred temperature range is approximately 700 ° C to 1150 ° C.

  It is known as the so-called memory effect that the p-type dopant material tends to remain in the reactor and may adversely affect the quality of the light-emitting layer 15 produced by growth after the growth using the p-type dopant material. It has been. Therefore, the reactor design with a small p-type dopant memory effect, the furnace using the p-type dopant raw material, and the furnace not using the p-type dopant raw material for mainly growing up to the light emitting layer 15 were separated. It is effective to perform crystal growth using a plurality of furnaces. Since the GaN cap layer 16 is a protective layer grown next to the light emitting layer 15, it is preferably grown in a furnace that does not use a p-type dopant material.

  In order to avoid these problems caused by the memory effect, a light emitting device structure as shown in FIG. 1 is utilized by using a reaction furnace using a p-type dopant material and a reaction furnace not using a p-type dopant material. A method of growing the epitaxial substrate, a so-called regrowth method can be used.

  More specifically, when the compound semiconductor epitaxial substrate 1 having the layer structure shown in FIG. 1 is manufactured, after the GaN cap layer 16 is grown, the substrate is once taken out from the reaction furnace and grown after the AlGaN: Mg cap layer 17. Can be grown in a separate reactor using a p-type dopant material to avoid the memory effect and to stably produce an epitaxial substrate with good characteristics.

The p-type contact layer 18 is preferably p-type having a space charge density of 5 × 10 ¹⁵ cm ⁻³ or more so as not to increase the operating voltage of the light emitting element. More preferably, it is 1 * 10 < ¹⁶ > -5 * 10 < ¹⁹ > cm < ^-3 >. Such a p-type contact layer is made of In _a Ga _b Al _c N at _a growth temperature of 800 ° C. to 1100 ° C. (where a + b + c = 1, 0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1). It can be easily obtained by a known method such as heat treatment after crystal growth by mixing an appropriate amount of dopant source gas during crystal growth.

  Since the p-type contact layer 18 tends to have high contact resistance when the mixed crystal ratio of Al is high, the Al composition is usually 5% or less, preferably 1% or less. More preferred is InGaN, GaN, and most preferred is GaN.

The p-type contact layer 8 may be a multilayer film. In this case, a laminated structure of In _a Ga _b Al _c N (a + b + c = 1, 0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1) having different compositions can be obtained. However, in order to reduce the contact resistance with the electrode, the layer in contact with the electrode should have a higher space charge density, and is preferably InGaN or GaN. Here, if the film thickness of the p-type contact layer 8 is too thin, good contact resistance cannot be obtained. Preferably, it is 300 nm, more preferably 400 nm, still more preferably 500 nm or more, and most preferably 600 nm or more. By increasing the thickness of the p-type contact layer 8, the electrostatic withstand voltage is further improved. When the film thickness is 500 nm or more, the light output is further improved. Therefore, by providing the total film thickness of the p-type contact layer 8 to 500 nm or more, a light emitting device with further excellent light output and electrostatic withstand voltage is provided. can do. On the other hand, if the thickness of the p-type contact layer 8 is too thick, problems such as warping of the substrate and an increase in manufacturing time occur. Therefore, the thickness is preferably 3 μm or less.

  FIG. 3 is a schematic cross-sectional view schematically showing a cross section of a compound semiconductor light emitting element chip manufactured by using the compound semiconductor epitaxial substrate 1 for a light emitting element shown in FIG. 1 manufactured by the method of the present invention. .

With reference to FIG. 3, the process of producing a compound semiconductor light emitting element chip using the compound semiconductor epitaxial substrate 1 will be described. First, the compound semiconductor epitaxial substrate 1 having the layer structure shown in FIG. 1 is prepared, and the p-electrode 19 is formed on the p-type contact layer 18 of the compound semiconductor epitaxial substrate 1. In this electrode forming step, the surface of the grown compound semiconductor epitaxial substrate 1 is cleaned as necessary, and an ohmic p electrode made of Ni / Au, Ni / Au / Pt, Ni / ITO, Au particles / Pt, or the like is used. 19 or, if necessary, an ohmic n ⁺ electrode (not shown) made of Ti / Al, Al, V / Al, ITO, ZnO or the like is formed on the p-type contact layer 18.

  Next, mesa processing is performed to expose n-type contact layer 13 made of n-type GaN in the lower layer of compound semiconductor epitaxial substrate 1 by dry etching or the like, and Ti / An ohmic n electrode 20 made of Al, Al, V / Al, ITO, ZnO or the like is formed. The n electrode 20 is provided corresponding to the p electrode 19 provided in the previous step.

  The compound semiconductor epitaxial substrate 1 in which these electrode forming processes are completed is cut through an element isolation process, a substrate peeling process, a tape sticking / peeling process, a scribe / braking process, a dicing process, and the like as necessary. Thus, a large number of compound semiconductor light emitting device chips can be obtained from one epitaxial substrate. FIG. 3 shows one of the compound semiconductor light emitting device chips.

  The compound semiconductor light emitting device chip thus obtained is packaged to obtain a compound semiconductor light emitting device. As described in detail with reference to FIG. 2, this compound semiconductor light-emitting device can suppress the shortening of the wavelength while maintaining high crystal quality in the manufacturing process of the light-emitting well layer. The high-brightness compound semiconductor light-emitting element possessed can be obtained with good reproducibility. Therefore, a high quality compound semiconductor light emitting device can be manufactured with a high yield.

  EXAMPLES Hereinafter, although this invention is demonstrated further in detail based on one Example, this invention is not limited to the Example described below. Prior to the description of the embodiments of the present invention, a plurality of comparative examples based on the prior art will be described first.

(Comparative Example 1)
Film formation by crystal growth using the MOVPE method was performed, and a light-emitting element having a layer structure shown in FIG. 4 was formed on a sapphire (0001) substrate according to the following procedure. Among the parts shown in FIG. 4, parts corresponding to the parts in FIG. 3 are given the same reference numerals. First, the pressure in the growth furnace is set to 1 atm, hydrogen is used as a carrier gas, ammonia, TMG, and silane are used as raw materials, and a GaN layer as a low-temperature GaN buffer layer 12 is grown by about 50 nm at 485 ° C. Then, n-type GaN doped with Si was grown to about 4 μm to form an n-type contact layer 13, and then non-doped GaN was grown to 0.3 μm to form a nitride-based compound semiconductor layer 4.

  Next, the temperature in the growth furnace is lowered to 725 ° C., the pressure in the growth furnace is set to 1/2 atm, the carrier gas is nitrogen, TEG, ammonia, and silane are supplied at 610 sccm, 40 slm, and 10 sccm, respectively, and Si is doped. The 15 nm GaN layer was grown to form a GaN layer 15A as a barrier layer. Next, after holding for 3 minutes without supplying the Group 3 material, 610 sccm, 1160 sccm, and 40 slm were successively supplied to TEG, TMI, and ammonia, respectively, to grow a 3 nm InGaN layer 15 F as a well layer. Thereafter, holding was performed for 5 minutes without supplying the Group 3 raw material. Further, TEG and ammonia were supplied at 610 sccm and 40 slm, respectively, to grow 18 nm of non-doped GaN to form a GaN cap layer 16 as a cap layer, and the substrate was taken out of the growth furnace.

Next, this substrate is set in another growth furnace, the pressure in the growth furnace is set to 1 atm, nitrogen as a carrier gas, ammonia, TEG and TMA are supplied at 6.6 slm, and TEG is supplied at 120 sccm and 7.2 sccm, respectively. Then, 400 sccm of bisethylcyclopentadienylmagnesium (EtCp ₂ Mg) is supplied as an Mg raw material and grown at 800 ° C., and an n-type Al _0.05 Ga _0.95 N layer: Mg layer (AlGaN: AlGaN: Mg cap layer 17). Mg layer) was grown to 25 nm. Thereafter, the temperature is raised to 1040 ° C., hydrogen is used as a carrier gas, ammonia, TMG, and EtCp ₂ Mg are supplied at 7.5 slm, 40 sccm, and 800 sccm, respectively, and a GaN: Mg layer is grown as a p-type contact layer 18 by 150 nm. Thus, an epitaxial substrate for a compound semiconductor light emitting device was obtained, and this was taken out from the growth furnace.

The grown group 3-5 nitride semiconductor is heat-treated at 800 ° C. for 20 minutes in an N ₂ atmosphere, and its uppermost layer has a low resistance p-type having a space charge concentration of about 1 × 10 ¹⁹ cm ^−3. The contact layer 18 was formed.

  Next, in order to form the ohmic p-electrode 19 on the surface of the nitride semiconductor epitaxial substrate obtained as described above, the substrate surface is cleaned by ultrasonic cleaning with an acetone solution, sulfuric acid and hydrogen peroxide solution. This was performed in the order of ultrasonic cleaning with the mixed solution and ultrapure water. After the resist coating, resist baking, pattern exposure, and pattern development were sequentially performed on the surface of the substrate, Ni was deposited to a thickness of 15 nm and then Au was deposited to a thickness of 30 nm in a vacuum deposition apparatus in order to form an NiAu electrode serving as an ohmic p electrode. . Next, a NiAu electrode pattern was formed by a lift-off method, and an ohmic p-electrode 19 was formed. After the pattern formation, the remaining resist was peeled off.

  Next, in order to form the ohmic n electrode 20 on the n-type contact layer 13, the exposed region of the n-type contact layer 13 was patterned. Specifically, resist coating, resist baking, pattern exposure, and pattern development were sequentially performed on the surface of the substrate, and the exposed region of the n-type contact layer 13 was patterned. Next, the epitaxial crystal on the substrate was etched to a depth at which the n-type contact layer 13 was exposed by dry etching, and the surface of the n-type contact layer 13 was exposed (mesa shape). After the dry etching was completed, the excess mask was removed with an organic solvent. Next, in order to form an Al electrode to be the ohmic n electrode 20 on the exposed surface of the n-type contact layer 13, resist coating, resist baking, pattern exposure, and pattern development are sequentially performed on the surface. Al was deposited with a thickness of 100 nm using a vacuum deposition apparatus. Next, an Al electrode pattern was formed by a lift-off method to form an ohmic n electrode 20.

  When this light emitting device was driven at 20 mA, blue light was emitted. The emission wavelength was 484 nm. The light output was measured, and the light output value of Comparative Example 1 was set to 1.

(Comparative Example 2)
A light emitting device was fabricated in the same manner as in Comparative Example 1 except that the thickness of the InGaN layer 15F was 3 nm and 18 nm of non-doped GaN was grown at 774 ° C. as the GaN cap layer 16. When this light-emitting element was driven at 20 mA, the emission wavelength was 386 nm, which was shifted to the short wavelength side by 98 nm with respect to Comparative Example 1, and the light output was not more than the light output value of Comparative Example 1.

(Comparative Example 3)
A light emitting device was fabricated in the same manner as in Comparative Example 1 except that the GaN cap layer 16 was formed by growing 18 nm of non-doped GaN at 774 ° C. When this light emitting device was driven at 20 mA, the emission wavelength was 435 nm, which was 49 nm shifted from the comparative example 1 to the short wavelength side. The light emission output value was equivalent to that of Comparative Example 1.

Example 1
Similarly to Comparative Example 1, a low-temperature GaN buffer layer 12 is grown on a sapphire (0001) substrate by about 50 nm, and then n-type GaN doped with Si at 1040 ° C. is grown as an n-type contact layer 12. Further, a nitride-based semiconductor layer 4 was formed by growing non-doped GaN by 0.3 μm.

  Next, the temperature in the growth furnace is lowered to 725 ° C., the pressure in the growth furnace is ½ atm, the carrier gas is nitrogen, and TEG, ammonia, and silane are supplied at 610 sccm, 40 slm, and 10 sccm, respectively. After growing for 15 minutes without supplying a Group 3 source material, TEG, TMI, and ammonia were successively supplied at 610 sccm, 1160 sccm, and 40 slm, respectively. The InGaN layer 15F was grown as a well layer. Further, a GaN cap layer 16 was formed by growing in two steps as follows as a well layer cap barrier layer having a design layer thickness of 18 nm. First, TEG and ammonia are supplied at 610 sccm and 40 slm, respectively, to grow 1 nm as an initial layer of non-doped GaN, and then the temperature in the growth furnace is increased to 774 ° C. for 5 minutes without supplying the Group 3 material. Retention was performed. Next, 610 sccm and 40 slm of TEG and ammonia are respectively supplied, and non-doped GaN is grown as a subsequent layer by 17 nm as the remaining 17 nm GaN cap layer, thereby forming a GaN cap layer 16 having a layer thickness of 18 nm. Removed from the growth furnace.

  Next, in the same manner as in Comparative Example 1, this substrate was set in another growth furnace, and an n-type AlGaN: Mg layer was grown as an AlGaN: Mg cap layer 17 by 25 nm at 800 ° C. A GaN: Mg layer was grown to 150 nm as the mold contact layer 18 to obtain a compound semiconductor epitaxial substrate for a light emitting device, which was taken out from the growth furnace.

  Furthermore, the ohmic p electrode 19 and the ohmic n electrode 20 were produced like the comparative example 1, and the light emitting element was obtained.

  When this light emitting device was driven at 20 mA, clear blue light emission was exhibited. The emission wavelength is 472 nm, which is 12 nm shifted to the short wavelength side with respect to the case of Comparative Example 1, and a shorter wavelength can be suppressed than in Comparative Examples 2 and 3. The light output value of Example 1 was 5.5 times that of Comparative Example 1, and the light emission characteristics were high enough to withstand practical use.

(Example 2)
In the case where the GaN cap layer 16 is grown in two stages, it is the same as in Example 1 except that the holding temperature after 1 nm growth of non-doped GaN in the first stage (initial layer formation stage) is raised to 855 ° C. Thus, a light emitting element was manufactured.

  When this light emitting device was driven at 20 mA, clear blue light emission was exhibited. The emission wavelength is 454 nm, which is shifted to the short wavelength side by 30 nm with respect to Comparative Example 1, and the shorter wavelength can be suppressed than Comparative Examples 2 and 3. The light output value was 2.9 times that of Comparative Example 1, and the light emission characteristic was high enough to withstand practical use.

(Comparative Example 4)
When the GaN cap layer 16 was grown in two stages, the light emitting device was fabricated in the same manner as in Example 1 except that the holding temperature after growing the first stage non-doped GaN to 1 nm was increased to 699 ° C. Produced.

  When this light emitting device was driven at 20 mA, blue light was emitted. The emission wavelength was 484 nm, and the light output value was not more than the light output value of Comparative Example 1.

(Example 3)
Film formation by crystal growth using the MOVPE method was performed, and the light-emitting element having the layer structure of FIG. 3 having a multiple quantum well structure on a sapphire (0001) substrate was produced. The detailed procedure is as follows.

  First, the pressure in the growth furnace is set to 1 atm, hydrogen is used as a carrier gas, ammonia, TMG, and silane are used as raw materials, and GaN as a low-temperature GaN buffer layer 12 is grown at about 485 ° C. by about 50 nm, and then at 1040 ° C. N-type GaN doped with Si was grown to about 4 μm to form an n-type contact layer 13, and then non-doped GaN was grown to 0.3 μm to form a nitride compound semiconductor layer 4.

  Next, the temperature in the growth furnace is lowered to 725 ° C., the pressure in the growth furnace is set to 1/2 atm, the carrier gas is nitrogen, TEG, ammonia, and silane are supplied at 610 sccm, 40 slm, and 10 sccm, respectively, and Si is doped. The 15 nm GaN layer was grown to form a GaN layer 15A as a barrier layer. Next, after holding for 3 minutes without supplying the Group 3 material, 610 sccm, 1160 sccm, and 40 slm were successively supplied to TEG, TMI, and ammonia, respectively, to grow a 3 nm InGaN layer 15 F as a well layer. Next, holding was performed for 5 minutes without supplying the Group 3 raw material. The operation of growing the 15 nm thick Si-doped GaN barrier layer and the 3 nm thick InGaN well layer is repeated four more times to form the remaining GaN layers 15B to 15E and InGaN layers 15G to 15J in the same manner, thereby emitting light. Layer 15 was formed.

  Next, in order to form the GaN cap layer 16 by growing in two stages, first, TEG and ammonia were supplied at 610 sccm and 40 slm, respectively, and 1 nm of non-doped GaN was grown to form an initial layer of the GaN cap layer 16. After the formation of the initial layer, the temperature was continuously raised to 755 ° C., and holding was performed for 5 minutes without supplying the Group 3 raw material. Subsequently, TEG and ammonia were supplied at 610 sccm and 40 slm, respectively, and non-doped GaN was grown to 17 nm as a subsequent layer, which was the remaining GaN cap layer, thereby forming a GaN cap layer 16 having a design layer thickness of 18 nm. Thereafter, the substrate was taken out of the growth furnace. In this way, the well layer was repeatedly formed 5 times.

  Next, in the same manner as in Comparative Example 1, this substrate was set in another growth furnace, and after growing an n-type AlGaN: Mg layer as an AlGaN: Mg cap layer 17 by 25 nm at 800 ° C., at 1040 ° C., A GaN: Mg layer was grown to 150 nm as the p-type contact layer 18 to obtain an epitaxial substrate for a compound semiconductor light emitting device, which was taken out from the growth furnace.

  Further, in the same manner as in Comparative Example 1, an ohmic p electrode 19 and an ohmic n electrode 20 were formed to obtain a light emitting device.

  When this light emitting device was driven at 20 mA, clear blue light emission was exhibited. The emission wavelength was 463 nm and the wavelength was shifted by 21 nm to the short wavelength side with respect to Comparative Example 1, and the shorter wavelength than Comparative Examples 2 and 3 was suppressed. The light output value was 5 times that of Comparative Example 1, and the light emission characteristic was high enough to withstand practical use.

Sectional drawing which shows typically the layer structure of the compound semiconductor epitaxial substrate manufactured by the method of this invention. The figure for demonstrating the formation method by this invention of the InGaN layer and GaN layer which are shown in FIG. The typical sectional view showing typically the section of the compound semiconductor light emitting element chip produced using the compound semiconductor epitaxial substrate for light emitting elements shown in FIG. 1 is a schematic cross-sectional view of an embodiment of a light emitting device according to the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Compound semiconductor epitaxial substrate 11 Sapphire substrate 12 Low-temperature buffer layer 13 N-type contact layer 14 Nitride type compound semiconductor layer 15 Light emitting layer 15A-15E GaN layer 15F-15J InGaN layer 15K Thin barrier layer 15L Remaining barrier layer 16 GaN Cap layer 17 AlGaN: Mg cap layer 18 p-type contact layer 19 n-electrode 20 p-electrode

Claims (8)

A first layer represented by the general formula In _a Ga _b Al _c N (where 0 ≦ a <1, 0 ≦ b ≦ 1, 0 ≦ c ≦ 1, a + b + c = 1), and a band from the first layer A second layer having a small gap and a general formula In _x Ga _y Al _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z <1, x + y + z = 1), generally larger band gap than the layer type in _s Ga _t Al _u N (However, 0 ≦ s <1,0 ≦ t ≦ 1,0 ≦ u ≦ 1, s + t + u = 1) and the third layer represented by this In the method of manufacturing a compound semiconductor epitaxial substrate having a structure in contact with each other,
When the third layer is grown on the second layer to a required layer thickness, a fourth layer that is thinner than the required layer thickness is first grown on the second layer. A method for producing a compound semiconductor epitaxial substrate, wherein the fifth layer is grown by the remaining layer thickness following the growth of the fourth layer.   The method for producing a compound semiconductor epitaxial substrate according to claim 1, wherein the second layer has a thickness of 5 to 90 mm.   The method for producing a compound semiconductor epitaxial substrate according to claim 1, wherein the second layer is a light emitting layer.   4. The method for manufacturing a compound semiconductor epitaxial substrate according to claim 1, wherein the growth history of the third layer has a temperature history exceeding the growth temperature of the fourth layer.   5. The method of manufacturing a compound semiconductor epitaxial substrate according to claim 1, wherein a thickness of the fourth layer is 3 to 50 mm.   6. The method for producing a compound semiconductor epitaxial substrate according to claim 1, wherein a growth temperature of the fourth layer is the same as a growth temperature of the second layer.   The compound semiconductor epitaxial substrate has an n-type nitride-based compound semiconductor layer, a nitride-based compound semiconductor layer as a light emitting layer, and a p-type nitride-based compound semiconductor layer in this order. The method for producing a compound semiconductor epitaxial substrate according to claim 1, wherein the compound semiconductor epitaxial substrate comprises a semiconductor.   A compound semiconductor light-emitting device manufactured using the compound semiconductor epitaxial substrate manufactured by the method according to claim 1.

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