JP2005079207A - Wafer for cmp peeling analysis, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wafer for CMP peeling analysis which can evaluate quantitatively peeling of a low dielectric constant film in a CMP (chemical mechanical polishing) process, and to provide its manufacturing method. <P>SOLUTION: The analysis is provided with a semiconductor substrate 1, the low dielectric constant film 3 formed on the semiconductor substrate, a plurality of dummy pattern 7 groups formed in the low dielectric constant film, and a metal film 6 formed on the surface of the low dielectric constant film. In a plurality of the dummy pattern groups, density and scale or shape of the dummy patterns are different. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a CMP delamination analysis wafer capable of quantitatively evaluating delamination of a low dielectric constant film in a chemical mechanical polishing process of a metal film, and a method for manufacturing the same.

  In recent years, new microfabrication techniques have been developed along with higher integration and higher performance of semiconductor integrated circuits (hereinafter referred to as LSIs). A chemical mechanical polishing method (hereinafter referred to as CMP) is one of them, and is frequently used in the LSI manufacturing process, in particular, the planarization of the interlayer insulating film, the metal plug formation, and the embedded wiring formation in the multilayer wiring forming process (for example, Patent Document 1).

  Recently, in order to achieve high-speed performance of LSI, there is a movement to replace a wiring material from a conventional Al alloy to a low resistance Cu alloy (hereinafter referred to as Cu). Cu is difficult to be finely processed by the dry etching method frequently used in the formation of Al alloy wiring. Therefore, a so-called damascene method is mainly adopted in which a Cu film is deposited on an insulating film that has been subjected to groove processing, and a Cu film other than a portion embedded in the groove is removed by CMP to form a buried wiring. Yes. The Cu film is generally formed to a thickness of 100 nm to 1000 nm by electrolytic plating after forming a thin seed layer such as sputtering.

In order to reduce the parasitic capacitance between the wirings, a low dielectric constant film (Low-k film) having a k of 3.5 or less is used instead of the SiO ₂ film having a relative dielectric constant k of about 4.2 as an interlayer insulating film. The LSI used is being put into practical use. In addition, low dielectric constant materials having k of 2.5 or less are being developed, and many of these are porous materials in which pores are contained in the material. A method of manufacturing a semiconductor device having a multilayer wiring structure in which such a low dielectric constant film or a porous low dielectric constant film and a Cu wiring are combined is as follows. However, description of the method for forming the device portion is omitted.

  First, a diffusion prevention film is formed on the Cu wiring or contact plug by CVD or the like, and a low dielectric constant film is formed thereon. Next, a cap film is formed on the low dielectric constant film by CVD or the like. Then, patterning is performed by photolithography and dry etching to form a groove structure (opening) for forming a metal wiring or a contact plug in the cap film, the low dielectric constant film, and the diffusion prevention film. Next, a barrier metal film, a seed Cu film, and an electrolytic plating Cu film are sequentially formed, and annealed at a temperature of 150 to 400 ° C. for about 30 minutes. Here, Ta, TaN, TiN, Ti, WN, WSiN, or the like is used as the barrier metal. Of these, Ta and TaN are frequently used, and their laminated films are often used. Finally, the Cu film and the barrier metal film on the cap film are removed by CMP to form a Cu wiring inside the trench. In addition, when forming multilayer wiring, this process is repeated and laminated | stacked.

However, since the mechanical strength of the low dielectric constant film is weaker than that of the SiO ₂ film, structural breakdown occurs due to the polishing load of CMP, the cap CVD film is peeled off from the low dielectric constant film, or the low dielectric constant film And delamination occurs at the interface between the diffusion barrier film. This exfoliation is noticeable for low dielectric constant materials with low Young's modulus and hardness, and materials with low adhesive strength between the cap CVD film and low dielectric constant film. It is reported that it becomes easy to do (for example, refer nonpatent literature 1). Therefore, development of a method for evaluating low dielectric constant film peeling by CMP is required.
U.S. Pat. 4944836 IITC 2001, pages 146-148

  There are two conventional evaluation methods: a method using a blanket wafer without a wiring pattern and a method using a wafer with a wiring pattern. The former evaluation method is a simple evaluation in which CMP is performed by laminating a low dielectric constant film and a cap CVD film and, if necessary, a barrier metal film and a Cu film on a semiconductor substrate. You can easily evaluate the absence. However, a blanket wafer without a wiring pattern once peels off, the peeling of the low dielectric constant film spreads over the entire wafer surface, and the low dielectric constant film on the entire wafer surface disappears in an instant. Evaluation was difficult. On the other hand, in the latter evaluation method, since the peeling of the low dielectric constant film is stopped by the Cu wiring, the peeling of the low dielectric constant film is rarely spread over the entire surface of the wafer. However, even if this method can confirm the presence or absence of peeling, it cannot be quantitatively evaluated.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a CMP delamination analysis wafer capable of quantitatively evaluating delamination of a low dielectric constant film in a CMP process and a method for manufacturing the same. It is.

  A CMP peeling analysis wafer according to the present invention includes a semiconductor substrate, a low dielectric constant film formed on the semiconductor substrate, and a plurality of dummy pattern groups formed in the low dielectric constant film and having different dummy pattern densities. And a metal film formed on the surface of the low dielectric constant film. Other features of the present invention will become apparent below.

  According to the present invention, the peeling of the low dielectric constant film in the CMP process can be quantitatively evaluated.

Embodiment 1 FIG.
As shown in FIG. 1, the CMP peeling analysis wafer according to the first embodiment has seven types of dummy pattern groups having densities of 32%, 16%, 8%, 4%, 2%, 1%, and 0%. It has a test pattern arranged in sections. As described above, by setting the density of the dummy pattern in each section in several stages in the range of 0% to 50%, it is possible to evaluate in which dummy pattern density the low dielectric constant film is peeled. .

  Here, in order to divide into sections, the periphery of each dummy pattern group is surrounded by Cu wiring having a width of 1 μm or more. Thereby, it is possible to prevent the peeling of the low dielectric constant film from expanding beyond the section.

  The size of one section of the dummy pattern group is 2 mm in length and 1 mm in width. Thus, by setting the area of one section to 10000 square μm or more, the probability that the low dielectric constant film peels increases. Furthermore, the evaluation of peeling by visual observation becomes easy by setting the area of one section to 0.1 square mm or more.

  Next, an example of a dummy pattern group arranged at a density of 32% is shown in FIG. This is a square pattern of 2 μm squares arranged at a pitch of 5 μm. An example of a dummy pattern group arranged at a density of 16% is shown in FIG. This is a square pattern of 2 μm squares arranged at a pitch of 7.08 μm. An example of a dummy pattern group arranged at a density of 1% is shown in FIG. This is a 2 μm square square dummy pattern arranged at a pitch of 28.28 μm.

FIG. 5 is a cross-sectional view of the CMP delamination analysis wafer of the present invention. The manufacturing process of this CMP peeling analysis wafer will be described below. First, an underlying CVD film 2 made of a SiO ₂ film having a thickness of 500 nm and a SiC film having a thickness of 50 nm is deposited on a semiconductor substrate 1 made of a silicon wafer having a diameter of 300 mm by a CVD method. Here, a SiCN film, a SiCO film, a SiN film, or the like can be used as the base CVD film. The film thickness of the underlying CVD film is preferably 30 nm to 1000 nm.

  Next, a low dielectric constant film 3 having a thickness of 350 nm is deposited thereon by a spin coating method. The wafer is then placed on a hot plate and baked at 150 ° C. for 75 seconds in a nitrogen atmosphere, and further baked at a temperature of 250 ° C. for 75 seconds. Thereafter, curing is performed at 450 ° C. for 10 minutes in a nitrogen atmosphere while being placed on the hot plate. Here, MSQ (Methyl Silsesquioxane) is used as the low dielectric constant film. However, two types with Young's modulus of 2 GPa and 5 GPa are used. Both low dielectric constant materials have a composition of 30% for Si, 53% for 0, and 17% for C, and both have different porosity.

Next, helium plasma irradiation is performed in the CVD apparatus to modify the surface of the low dielectric constant film 3. This is to improve the adhesion with the film deposited on the low dielectric constant film 3. The gas flow rate is 1000 sccm, the gas pressure is 1000 Pa, the high frequency power is 500 W, the low frequency power is 400 W, and the temperature is 400 ° C. Then, NH ₃ , N ₂ 0, H ₂ , He, 0 ₂ , SiH ₄ , Ar, N ₂ or the like is used as the plasma gas. Among these, He plasma is particularly effective because it causes little damage to the low dielectric constant film. Moreover, you may use what mixed these gas as plasma gas. For example, it is effective to use He gas mixed with other gases.

Then, a cap CVD film 4 having a film thickness of 50 nm is deposited on the low dielectric constant film 3 by the CVD method. Here, as the cap CVD film 4, any of a SiO ₂ film, a SiC film, a SiCN film, a SiCO film, a SiN film, or a laminated film thereof can be used. The film thickness of the cap CVD film 4 is preferably 30 nm to 200 nm. However, when the low dielectric constant film 3 is formed by the CVD method, the cap CVD film 4 may not be formed. The cap film may also be formed by coating.

  Next, patterning is performed by photolithography and dry etching using a mask in which a plurality of dummy patterns having different densities are formed, thereby forming a groove structure in the low dielectric constant film 3 and the cap CVD film 4.

  Next, a barrier metal film 5 made of a TaN film having a thickness of 10 nm, a Ta film having a thickness of 15 nm, and a seed Cu film having a thickness of 75 nm is deposited in a sputtering apparatus. As this barrier metal film 5, Ta, TaN, TiN, Ti, WN, WSiN or the like can be used, and Ta and TaN are particularly desirable, and among these, a laminated film of Ta and TaN is more desirable. Then, a metal film 6 including a Cu film having a thickness of 500 nm is deposited on the entire surface by electrolytic plating to bury the groove structure. Thereafter, annealing is performed at 250 ° C. for 30 minutes. Thus, the metal film embedded in the groove structure becomes the dummy pattern 7. The CMP peeling analysis wafer according to the first embodiment is manufactured through the above steps.

  Next, an experiment for peeling a low dielectric constant film by CMP will be described. The CMP apparatus is an orbital system and uses a Momentum 300 manufactured by Novellus Systems. The CMP load is 1.5 psi, the orbital rotation speed is 600 rpm, the head rotation speed is 24 rpm, the slurry supply speed is 300 cc / min, and a single layer pad made of polyurethane foam (IC1000 manufactured by Rodel) is used as the polishing pad. An abrasive-free slurry (HS-C430-TU manufactured by Hitachi Chemical Co., Ltd.) is used for Cu as the slurry.

  Under this condition, the metal film 6 on the low dielectric constant film 3 in the above-described CMP peeling analysis wafer is polished by CMP for 3 minutes. At this time, part or all of the cap CVD film 4 may be removed. The dummy pattern 7 remains as a dummy Cu wiring in the low dielectric constant film 3 after performing CMP.

  Thereafter, when the peel area, peel amount, peel number or peel rate of the low dielectric constant film in each dummy pattern group in the wafer is examined, the dependence of the low dielectric constant film peel on the dummy pattern density as shown in FIG. 6 is obtained. It was. That is, it was found that the higher the density of the dummy pattern, the lower the peeling rate. Further, when a low dielectric constant material having a Young's modulus of 5 GPa and a low dielectric constant material having a 2 GPa were compared, it was found that the 2 GPa material had a peeling rate approximately twice as high.

  As described above, the CMP peeling analysis wafer of the first embodiment is subjected to CMP to examine the peeling of the low dielectric constant film in each dummy pattern group, whereby the dependence of the low dielectric constant film peeling rate on the dummy pattern density is determined. And the peeling of the low dielectric constant film generated by CMP can be quantitatively evaluated.

  In the present invention, the composition of the MSQ film, which is a low dielectric constant film, is such that the silicon concentration is 20% to 40%, the carbon concentration is 10% to 30%, and the oxygen concentration is 40% to 60%. It is effective for evaluation of peeling. Moreover, it is applicable also when HSQ (Hydrogen Silsesquioxane) or a polymer is used as a low dielectric constant film. This is effective for a low dielectric constant film having a relative dielectric constant of 3.0 or less, particularly 2.5 or less. In addition, the low dielectric constant film is not limited to the CVD film but can be applied to the case where a spin coating film is used. However, when both are compared, it is particularly effective for the spin coating film. Furthermore, the film thickness of the low dielectric constant film is desirably in the range of 100 nm to 1000 nm.

  In addition, by forming various low dielectric constant films on the CMP peeling analysis wafer, the superiority or inferiority of the adhesion of each low dielectric constant film can be evaluated. For example, peeling by CMP can be evaluated for low dielectric constant films having different densities, specific permittivity, porosity, Young's modulus, hardness, and refractive index. Then, by performing CMP using a silicon wafer in which the same low dielectric constant film is formed by different film formation processes, the influence of each film formation process on the adhesion of the low dielectric constant film can be evaluated. Furthermore, the superiority or inferiority of each CMP condition can be evaluated by performing CMP under different conditions using a silicon wafer on which the same low dielectric constant film is formed.

  Further, when an active region is formed on the CMP peeling analysis wafer, the dummy pattern group is formed in a region away from the active region. Then, by setting the interval between the Cu wiring group in the active region and the dummy pattern group in each section in several stages, the relationship between the interval and the separation of the low dielectric constant film can be quantitatively evaluated.

Embodiment 2. FIG.
The CMP debonding analysis wafer of the second embodiment has a test pattern in which five types of dummy pattern groups each having a side length of 1 μm, 2 μm, 4 μm, 8 μm, and 16 μm are divided into sections and arranged. The size of this section is 2 mm in length and 1 mm in width. The density of the dummy patterns is the same at 32%. In this way, by setting the size of the dummy pattern in each section in several stages with an area of 0.1 square μm to 50 square μm, which dummy pattern size was easy to peel off by CMP? Can be evaluated.

  Here, an example of a dummy pattern group in which square patterns of 2 μm square are arranged is the same as FIG. An example of a dummy pattern group in which square patterns of 4 μm square are arranged is shown in FIG. The pitch between the square patterns is 10 μm.

  The CMP peeling analysis wafer of the second embodiment is manufactured by the same method as that of the first embodiment except that photolithography is performed using a mask having a plurality of dummy pattern groups having different dummy pattern sizes. Can do.

  Then, after CMP by the same method as in the first embodiment, when the peel area, peel amount, peel number or peel rate of the low dielectric constant film in each dummy pattern group in the wafer is examined, as shown in FIG. The size dependence of the dummy pattern of the low dielectric constant film peeling was obtained. That is, it was found that the larger the dummy pattern, the higher the peeling rate. Further, when a low dielectric constant material having a Young's modulus of 5 GPa and a low dielectric constant film material having a 2 GPa were compared, it was found that the 2GPa material had a peeling rate approximately twice as high.

  As described above, the CMP peeling analysis wafer of the second embodiment is subjected to CMP to examine the peeling of the low dielectric constant film in each dummy pattern group. The dependence can be obtained, and the peeling of the low dielectric constant film generated by CMP can be quantitatively evaluated.

Embodiment 3 FIG.
The CMP debonding analysis wafer according to the third embodiment has a test pattern in which a dummy pattern group having three types of square, rectangular and T-shaped dummy patterns is divided into sections. Then, as in the first embodiment, the dummy pattern group having the dummy patterns of each shape is divided into seven types having densities of 32%, 16%, 8%, 4%, 2%, 1%, and 0%. Separate them into The size of this section is 2 mm in length and 1 mm in width. Thereby, it can be evaluated which dummy pattern shape is easy to peel off by CMP.

  Here, a dummy pattern group having a square dummy pattern is the same as that in the first embodiment. An example of a dummy pattern group having a rectangular dummy pattern is shown in FIG. This is a rectangular dummy pattern having a length of 2 μm and a width of 5 μm alternately arranged 90 degrees and shifted for each column. The repetition period is 15.8 μm and the pattern density is 32%.

  An example of a dummy pattern group having a T-shaped dummy pattern is shown in FIG. This is a T-shaped pattern formed by combining rectangles having a length of 2 μm and a width of 5 μm, and the directions are alternately changed by 90 degrees and are shifted for each column. The repetition period is 15.8 μm, and the pattern density is also 32%.

  The CMP peeling analysis wafer according to the present embodiment is manufactured by the same method as in the first embodiment except that photolithography is performed using a mask having a plurality of dummy pattern groups having different dummy pattern shapes as described above. can do.

  Then, after CMP by the same method as in the first embodiment, when the peel area, peel amount, peel number or peel rate of the low dielectric constant film in each dummy pattern group in the wafer is examined, as shown in FIG. The dummy pattern shape dependence of the low dielectric constant film peeling was obtained. That is, it was found that even when dummy patterns having the same density are arranged, the square dummy pattern is most difficult to peel off, and then the rectangular dummy pattern is hard to peel off, and the T-shaped dummy pattern is most easily peeled off. Further, when a low dielectric constant material having a Young's modulus of 5 GPa and a low dielectric constant material having a 2 GPa were compared, the 2 GPa material had a peeling rate approximately twice as high. However, the dependency on the dummy pattern shape was the same for all materials.

  As described above, CMP of the CMP peeling analysis wafer according to the third embodiment is performed to examine the peeling of the low dielectric constant film in each dummy pattern group, so that the peeling rate of the low dielectric constant film depends on the shape of the dummy pattern. And the peeling of the low dielectric constant film generated by CMP can be quantitatively evaluated.

  In addition, by changing the direction of the dummy pattern in each section, it is possible to evaluate which direction is easily peeled off by CMP. Further, the shape of the dummy pattern can be set to the shape of a mouth other than a square, a rectangle and a T-shape.

Embodiment 4 FIG.
The CMP peeling analysis wafer of the fourth embodiment has a test pattern in which a plurality of dummy pattern groups having different intervals are arranged in sections. An example of this test pattern is shown in FIG. In this test pattern, nine dummy pattern groups are arranged at intervals of 1000 μm, 400 μm, 200 μm, 100 μm, 80 μm, 60 μm, 40 μm, and 20 μm, respectively. Each dummy pattern group has a length of 2 mm and a width of 1 mm, which is the same as that shown in FIG.

  The CMP peeling analysis wafer of this embodiment is manufactured by the same method as that of Embodiment 1 except that photolithography is performed using a mask having a plurality of dummy pattern groups with different intervals as described above. be able to.

  Then, after CMP by the same method as in the first embodiment, when the peeling area, the peeling amount, the peeling number, or the peeling rate of the low dielectric constant film in each dummy pattern group in the wafer is examined, as shown in FIG. The spacing dependence between the dummy patterns of the low dielectric constant film peeling was obtained. That is, in the case of the low dielectric constant film used in this experiment, it has been found that peeling of the low dielectric constant film tends to occur as the distance between the dummy pattern groups increases. Further, when a low dielectric constant material having a Young's modulus of 5 GPa and a low dielectric constant material having a 2 GPa were compared, the 2 GPa material had a peeling rate approximately twice as high. However, in any of the materials, the distance dependency between the dummy pattern groups had the same tendency.

  As described above, the CMP dependency of the separation rate of the low dielectric constant film is obtained by CMP of the CMP separation analysis wafer of the fourth embodiment and examining the separation of the low dielectric constant film in each dummy pattern group. Therefore, it is possible to quantitatively evaluate the peeling of the low dielectric constant film generated by CMP.

Embodiment 5 FIG.
The CMP peeling analysis wafer according to the fifth embodiment has a test pattern in which a plurality of dummy pattern groups each having an area without a dummy pattern are arranged in sections. An example of this test pattern is shown in FIG. In this test pattern, the area of the area without the pattern in each dummy pattern group is changed, and the area of the area without the pattern is a maximum of 1600 μm square and a minimum of 25 μm square. In this manner, a region without a pattern having an area of 100 square μm to 100 square mm is arranged in the dummy pattern group, and peeling is quantitatively evaluated by evaluating which area of the low dielectric constant film is peeled off. it can. Further, when at least one of the regions having no dummy pattern has an area of 1 mm 2 or more, the peeling of the low dielectric constant film at this portion can be visually evaluated.

  In addition, areas without patterns are arranged with different lengths. For this reason, when the area is the same and the length and width are different, it is possible to examine whether or not the separation probability is different. Further, a dummy pattern shown in FIG. 1 is formed in a region having a pattern in each dummy pattern group.

  The CMP peeling analysis wafer of this embodiment is the same as that of Embodiment 1 except that photolithography is performed using a mask having a plurality of dummy pattern groups having regions without dummy patterns as described above. Can be manufactured.

  Then, after CMP by the same method as in the first embodiment, when the peel area, peel amount, peel number, or peel rate of the low dielectric constant film in each dummy pattern group in the wafer is examined, as shown in FIG. The pattern area dependence of the low dielectric constant film peeling was obtained. That is, in the case of the low dielectric constant film used in this experiment, it was found that peeling of the low dielectric constant film is more likely to occur as the area of the region without the pattern increases. It was also found that the rectangle was easier to peel even with the same area. Further, when a low dielectric constant material having a Young's modulus of 5 GPa and a low dielectric constant material having a 2 GPa were compared, the 2 GPa material had a peel rate approximately twice as high. However, the area dependence of the region without the pattern has the same tendency in any material.

  As described above, CMP of the CMP peeling analysis wafer according to the fifth embodiment is performed to examine the peeling of the low dielectric constant film in each dummy pattern group, so that the peeling rate of the low dielectric constant film depends on the area of the non-pattern region. Therefore, it is possible to quantitatively evaluate the peeling of the low dielectric constant film generated by CMP.

It is a figure which shows the test pattern which the wafer for CMP peeling analysis which concerns on Embodiment 1 of this invention has. It is a figure which shows the example of the dummy pattern group which has arrange | positioned the square pattern of 2 micrometers square by the density of 32%. It is a figure which shows the example of the dummy pattern group which has arrange | positioned the square pattern of 2 micrometers square by the density of 16%. It is a figure which shows the example of the dummy pattern group which has arrange | positioned the square pattern of 2 micrometers square by the density of 1%. It is sectional drawing of the wafer for CMP peeling analysis of this invention. It is a figure which shows the density dependence of the dummy pattern of low dielectric constant film peeling. It is a figure which shows the example of the dummy pattern group which has arrange | positioned the square pattern of 4 micrometers square by the density of 32%. It is a figure which shows the magnitude dependence of the dummy pattern of low dielectric constant film peeling. It is a figure which shows the example of the dummy pattern group which has a rectangular dummy pattern. It is a figure which shows the example of the dummy pattern group which has a T-shaped dummy pattern. It is a figure which shows the shape dependence of the dummy pattern of low dielectric constant film peeling. It is a figure which shows the test pattern which the wafer for CMP peeling analysis which concerns on Embodiment 4 of this invention has. It is a figure which shows the space | interval dependence between the dummy pattern groups of low dielectric constant film peeling. It is a figure which shows the test pattern which the wafer for CMP peeling analysis which concerns on Embodiment 5 of this invention has. It is a figure which shows the non-pattern area | region area dependence of low dielectric constant film peeling.

Explanation of symbols

1 Semiconductor substrate 3 Low dielectric constant film 6 Metal film 7 Dummy pattern

Claims (10)

A semiconductor substrate;
A low dielectric constant film formed on the semiconductor substrate;
A plurality of dummy pattern groups formed in the low dielectric constant film and having different dummy pattern densities,
A CMP exfoliation analysis wafer comprising a metal film formed on a surface of the low dielectric constant film. A semiconductor substrate;
A low dielectric constant film formed on the semiconductor substrate;
A plurality of dummy pattern groups formed in the low dielectric constant film and having different dummy pattern sizes,
A CMP exfoliation analysis wafer comprising a metal film formed on a surface of the low dielectric constant film. A semiconductor substrate;
A low dielectric constant film formed on the semiconductor substrate;
A plurality of dummy pattern groups formed in the low dielectric constant film and having different dummy pattern shapes;
A CMP exfoliation analysis wafer comprising a metal film formed on a surface of the low dielectric constant film. A semiconductor substrate;
A low dielectric constant film formed on the semiconductor substrate;
A plurality of dummy pattern groups formed in the low dielectric constant film and having different intervals from each other;
A CMP exfoliation analysis wafer comprising a metal film formed on a surface of the low dielectric constant film. A semiconductor substrate;
A low dielectric constant film formed on the semiconductor substrate;
A plurality of dummy pattern groups formed in the low dielectric constant film and having regions without dummy patterns;
A metal film formed on the surface of the low dielectric constant film;
A CMP debonding analysis wafer characterized in that at least one of the regions without the dummy pattern has an area of 1 mm 2 or more.   6. The CMP delamination analysis wafer according to claim 1, wherein the plurality of dummy pattern groups are partitioned into sections.   7. The CMP delamination analysis wafer according to claim 6, wherein the area of the section is 0.1 square mm or more. Forming a low dielectric constant film on a semiconductor substrate;
Patterning by photolithography and dry etching using a mask having a plurality of dummy pattern groups having different dummy pattern densities, and forming a groove structure in the low dielectric constant film; and
A method for manufacturing a CMP debonding analysis wafer, comprising a step of depositing a metal film on the entire surface and embedding the groove structure. Forming a low dielectric constant film on a semiconductor substrate;
Patterning by photolithography and dry etching using a mask having a plurality of dummy pattern groups having different dummy pattern sizes, and forming a groove structure in the low dielectric constant film; and
A method for manufacturing a CMP debonding analysis wafer, comprising a step of depositing a metal film on the entire surface and embedding the groove structure. Forming a low dielectric constant film on a semiconductor substrate;
Patterning by photolithography and dry etching using a mask having a plurality of dummy pattern groups having different dummy pattern shapes, and forming a groove structure in the low dielectric constant film; and
A method for manufacturing a CMP debonding analysis wafer, comprising a step of depositing a metal film on the entire surface and embedding the groove structure.

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