JP2005072304A - Via plug and its manufacturing method - Google Patents

Via plug and its manufacturing method Download PDF

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JP2005072304A
JP2005072304A JP2003300924A JP2003300924A JP2005072304A JP 2005072304 A JP2005072304 A JP 2005072304A JP 2003300924 A JP2003300924 A JP 2003300924A JP 2003300924 A JP2003300924 A JP 2003300924A JP 2005072304 A JP2005072304 A JP 2005072304A
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base material
manufacturing
via plug
insulating
plug
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Masashi Nomura
昌史 野村
Ryuji Doi
隆二 土井
Toshiaki Ishii
俊明 石井
Akihisa Takahashi
明久 高橋
Yasunori Tamaki
靖紀 玉木
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Toppan Inc
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Toppan Printing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a via plug having no long process and long construction period and lowering a manufacture cost, by having no irregular height of a via-plug and simplifying a formation method of the via plug in the manufacturing method of the via plug used as input and output terminals with a semiconductor device in a wiring board for the semiconductor device, and to provide the via plug for improving connection with a soldering ball during packaging. <P>SOLUTION: The method for manufacturing the via plug comprises a process for manufacturing a via hole in an insulation base material consisting of an insulating material, a process for manufacturing a projection-shaped via structure by using a photo-etching method of a photo-process on a semiconductor base material consisting of a conductive material, and a process for fitting and sticking the conductor base material consisting of the conductive material forming the projection-shaped via structure and the insulation base material consisting of the insulating material molding the via-hole with the via-structure and the via hole. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、半導体装置用配線基板に形成するビアプラグ及びその製造方法に関する。   The present invention relates to a via plug formed on a wiring board for a semiconductor device and a manufacturing method thereof.

従来のビアプラグの製造方法では、銅めっきやニッケルめっき法による導電層のプラグを製造する方法と、予め形成した凹部に導電性ペーストを埋め込みプラグを製造する方法がある。   As a conventional via plug manufacturing method, there are a method of manufacturing a plug of a conductive layer by copper plating or nickel plating, and a method of manufacturing a plug by embedding a conductive paste in a recess formed in advance.

図3は、従来のめっきによるビアプラグの形成方法を説明する工程図で、(a)〜(e)は側断面図である。図3に示すめっきによるビアプラグの製造方法(以下めっき工法と記す)を順番に説明する。   3A to 3E are process diagrams for explaining a conventional method for forming a via plug by plating, and FIGS. 3A to 3E are side sectional views. A method for manufacturing via plugs by plating shown in FIG. 3 (hereinafter referred to as a plating method) will be described in order.

図3(a)では、ポリイミド等の絶縁材からなるフイルムの絶縁基材にビア用孔を形成する。接着剤を有した絶縁基材(9)にビア形状(8)が形成されたビア用孔を有する絶縁基材(1)となる。図3(b)では、前記絶縁基材(1)の片側に銅箔からなる下層導体層(4)を張り合わせ形成する。   In FIG. 3A, via holes are formed in an insulating base material of a film made of an insulating material such as polyimide. The insulating base material (1) has a via hole in which the via shape (8) is formed in the insulating base material (9) having the adhesive. In FIG.3 (b), the lower-layer conductor layer (4) which consists of copper foil is bonded together and formed on the one side of the said insulating base material (1).

図3(c)では、下層導体層(4)にレジスト層(13)を塗布し、前記絶縁基材(1)面より、下層導体層(4)上に電解めっきを行い、前記ビア用孔(8)の凹型部内にめっき材を析出し、ビア(3)を形成する。図3(d)では、フォトプロセス法を用いて、レジスト層(13)を形成後、フォトマスクのパターンを露光転写し、現像処理と、エッチング処理と、剥膜処理とを行い、下層導体層(4)の配線層(4a)を形成する。   In FIG. 3 (c), a resist layer (13) is applied to the lower conductor layer (4), electrolytic plating is performed on the lower conductor layer (4) from the surface of the insulating base (1), and the via hole is formed. A plating material is deposited in the concave part of (8) to form a via (3). In FIG. 3 (d), after forming the resist layer (13) using the photo process method, the pattern of the photo mask is exposed and transferred, and the development process, the etching process, and the film removal process are performed. The wiring layer (4a) of (4) is formed.

最後に、前記ビア(3)表面にニッケル及び銀、又は金等からなるめっき表面層を形成した後、基板保護のため、ソルダーレジスト等の基板保護層を塗布して基板が完成する。   Finally, after forming a plating surface layer made of nickel, silver, gold, or the like on the surface of the via (3), a substrate protection layer such as a solder resist is applied to protect the substrate, thereby completing the substrate.

また、別の方法の導電性ペーストを埋め込むプラグの製造方法(以下導電性ペースト工法と記す)は、ビアの孔内に液状の導電性ペーストを前記孔内部まで塗布し完全に埋め込む方法でビアプラグを製造する。前記塗布方法は、シルクスクリーン印刷法を用いることが一般的な方法である。   Another method of manufacturing a plug for embedding a conductive paste (hereinafter referred to as a conductive paste method) is a method in which a liquid conductive paste is applied to the inside of a via and then completely embedded in the hole. To manufacture. The coating method is generally a silk screen printing method.

めっき工法では、下層の銅の導体層とめっき導体層との接着面で、経時劣化により界面強度の劣化、更に局部剥離若しくは界面剥離する問題があり、実装時では、使用する半田ボールとの接合性でのバラツキ等の危険性がある。また、めっき工法では、電流密度のばらつきによりビアプラグの高さが変動し、品質面でのばらつきが発生する場合がある(特許文献1参照)。さらに、工程が長くなり、工期が長期化し、その製造コストも上昇する。導電性ペースト工法では、長期間の信頼性試験を行うと、品質面で不安定となる問題がある。   In the plating method, there is a problem of deterioration of interfacial strength due to deterioration over time, and further local peeling or interfacial peeling at the bonding surface between the copper conductor layer and the plating conductor layer, and at the time of mounting, the bonding with the solder ball to be used There is a risk of variation in sex. Further, in the plating method, the height of the via plug varies due to the variation in current density, and variations in quality may occur (see Patent Document 1). Furthermore, the process becomes longer, the construction period becomes longer, and the manufacturing cost also increases. In the conductive paste method, there is a problem that the quality becomes unstable when a long-term reliability test is performed.

以下に公知文献を示す。
特開2002−9198号公報
The known literature is shown below.
Japanese Patent Laid-Open No. 2002-9198

本発明の課題は、ビアプラグの高さがばらつかない、又はビアプラグの形成方法が簡易化することにより、工程が長くならずに、工期が長期化しない、その製造コストも低下す
るビアプラグの製造方法を提供することである。また、実装時、半田ボールとの接合性が向上するビアプラグを提供することである。
An object of the present invention is to provide a via plug manufacturing method in which the height of the via plug does not vary or the method for forming the via plug is simplified, so that the process is not lengthened, the construction period is not prolonged, and the manufacturing cost is reduced. Is to provide. Another object of the present invention is to provide a via plug that improves the bondability with a solder ball during mounting.

本発明の請求項1に係る発明は、半導体装置用配線基板に形成され、半導体装置との入出力の端子として用いるビアプラグにおいて、下層の導体層と、絶縁層と、表層の導体層が順番に積層され、ビアを介して電気的に接続された構造のビアプラグが、下層の導体層と同一の材料から凸型の形状に成形したビアの導体層と、ビア用孔を成形した絶縁層基材とを用いて、前記凸型のビアと、ビア用孔とを嵌着したことを特徴とするビアプラグである。   According to a first aspect of the present invention, in a via plug formed on a wiring board for a semiconductor device and used as an input / output terminal for the semiconductor device, a lower conductor layer, an insulating layer, and a surface conductor layer are sequentially formed. A via plug having a structure in which layers are stacked and electrically connected via vias is formed into a convex shape from the same material as the underlying conductor layer, and an insulating layer base material in which via holes are formed A via plug in which the convex via and the via hole are fitted.

本発明の請求項2に係る発明は、半導体装置用配線基板に形成され、半導体装置との入出力の端子として用いるビアプラグの製造方法において、少なくとも下記の製造工程からなることを特徴とする請求項1記載のビアプラグの製造方法である。
(a)接着剤と絶縁材からなる絶縁基材にビア用孔を設ける工程。
(b)導電性材からなる導体基材にフォトプロセスのフォトエッチング法を用いて、凸型形状のビアを製造する工程。
(c)凸型形状のビアを成形した導電性材からなる導体基材と、ビア用孔を形成した接着剤と絶縁材からなる絶縁基材とを、前記ビアとビア用孔を嵌着して、貼り合わせる工程。
The invention according to claim 2 of the present invention is a method of manufacturing a via plug formed on a wiring board for a semiconductor device and used as an input / output terminal for the semiconductor device, and comprises at least the following manufacturing steps. 1 is a manufacturing method of a via plug according to 1;
(A) A step of providing a via hole in an insulating base material made of an adhesive and an insulating material.
(B) The process of manufacturing a convex-shaped via | veer using the photo-etching method of a photo process for the conductor base material which consists of an electroconductive material.
(C) A conductor base material made of a conductive material formed with a convex-shaped via, and an insulating base material made of an adhesive and an insulating material formed with a via hole are fitted into the via and the via hole. And bonding.

本発明の請求項3に係る発明は、前記接着剤と絶縁材からなる絶縁基材が、樹脂フイルムからなる基材であることを特徴とする請求項2記載のビアプラグの製造方法である。   The invention according to claim 3 of the present invention is the method of manufacturing a via plug according to claim 2, wherein the insulating base material made of the adhesive and the insulating material is a base material made of a resin film.

本発明の請求項4に係る発明は、前記導電性材からなる導体基材が、銅箔からなる基材であることを特徴とする請求項2、又は3記載のビアプラグの製造方法である。   The invention according to claim 4 of the present invention is the via plug manufacturing method according to claim 2 or 3, wherein the conductive base material made of the conductive material is a base material made of copper foil.

本発明のビアプラグの製造方法を用いたことにより、ビアプラグでは、局部剥離が無い、界面剥離も発生しない、高さが安定したビアプラグが提供できた。さらに、本発明の製造方法では、製造工程を簡易化したことにより、高アスペクト比のビアにも対応できる、ビアの小径化にも対応できる効果がある。また、実装時、本発明のビアプラグを用いたことにより、半田ボールとの接合性が向上する効果もある。さらに、長工程化と、長工期化と、その製造の高コスト化等うの問題を解消できる効果がある。   By using the method for manufacturing a via plug according to the present invention, a via plug having no heightwise separation and no interface peeling can be provided. Furthermore, in the manufacturing method of the present invention, the manufacturing process is simplified, so that there is an effect that it is possible to deal with a via having a high aspect ratio and a diameter of the via. Further, the use of the via plug of the present invention at the time of mounting also has an effect of improving the bondability with the solder ball. Furthermore, there is an effect that it is possible to solve problems such as a long process, a long construction period, and a high manufacturing cost.

本発明の実施の形態を以下に説明する。図1は、本発明のビアプラグの製造方法を説明する工程図で、(a)〜(i)は側断面図である。   Embodiments of the present invention will be described below. FIG. 1 is a process diagram for explaining a method of manufacturing a via plug according to the present invention, wherein (a) to (i) are side sectional views.

図1(a)では、ポリイミド等の絶縁材からなるフイルムの絶縁基材にビア用孔を形成する。接着剤を有する絶縁基材(9)にビア形状(8)が形成されたビア用孔を有する絶縁基材(1)となる。図1(b)では、銅等よりなる導体基材(11)を用いて、導体基材(11)の片側面に、ビアを形成するレジスト層(12)を形成する。レジスト形成方法は、スピンコート法、ロールコート法等が一般的に採用されている。   In FIG. 1A, via holes are formed in an insulating base material of a film made of an insulating material such as polyimide. The insulating base material (1) having a via hole in which the via shape (8) is formed in the insulating base material (9) having an adhesive is obtained. In FIG.1 (b), the resist layer (12) which forms a via is formed in the single side | surface of a conductor base material (11) using the conductor base material (11) which consists of copper etc. FIG. As a resist forming method, a spin coating method, a roll coating method or the like is generally employed.

図1(c)では、フォトマスクを用いて、前記レジスト層(12)にビア用のマスクのパターンを露光転写する。その後、現像処理を終了して、導体基材(11)上にレジストパターンが形成後、導体基材(11)の他方側面に、エッチング防止層(22)を形成する。図1(d)では、前記レジストパターンをレジストとして、導体基材(11)の露出面より片側エッチングを行う。前記エッチングの深さは、導体基材(11)の厚さの半分近傍までを標準とする。なお、場合に応じて深度は最適化することが重要である。   In FIG. 1C, a via mask pattern is exposed and transferred to the resist layer 12 using a photomask. Thereafter, the development process is terminated, and after the resist pattern is formed on the conductor base material (11), the etching prevention layer (22) is formed on the other side surface of the conductor base material (11). In FIG.1 (d), the one side etching is performed from the exposed surface of a conductor base material (11) by making the said resist pattern into a resist. The etching depth is standard up to about half the thickness of the conductor base material (11). It is important to optimize the depth depending on the case.

図1(e)では、レジストを剥膜後、ビア(3)と、それ以外はおよそ厚さが半分程度の導体基材(11)の下層導体層(4)からなる凸型形状のビアを有する導体基材(10)ができあがる。図1(f)では、(a)のビア用孔を有する絶縁基材(1)と、(e)の凸型形状のビアを有する導体基材(10)とを張り合わせる。張り合わせ時、前記凸型のビアと、ビア用孔とを嵌着する方法で位置あわせをすることが重要となる。   In FIG. 1 (e), after stripping the resist, a convex via made of the via (3) and the lower conductor layer (4) of the conductor base (11) having a thickness of about half other than that is formed. The conductor base material (10) which has is completed. In FIG. 1 (f), the insulating base material (1) having the via hole of (a) and the conductive base material (10) having the convex-shaped via of (e) are bonded together. At the time of pasting, it is important to align by the method of fitting the convex via and the via hole.

図1(g)では、フォトプロセス法を用いて、レジスト(13)を形成後、フォトマスクのパターンを露光転写する。図1(h)では、現像処理と、エッチング処理とを行う。図1(i)では、剥膜処理を行い、下層導体層(4)の配線層(4a)を形成する。   In FIG. 1G, a photomask pattern is exposed and transferred after forming a resist (13) using a photo process method. In FIG. 1H, development processing and etching processing are performed. In FIG. 1 (i), a film removal process is performed to form a wiring layer (4a) of the lower conductor layer (4).

最後に、前記ビア(3)表面にニッケル及び銀、又は金等からなるめっき表面層を形成した後、基板保護のため、ソルダーレジスト等の基板保護層を塗布して本発明の製造方法を用いたビアプラグが完成する。   Finally, after forming a plating surface layer made of nickel, silver, gold, or the like on the surface of the via (3), a substrate protective layer such as a solder resist is applied to protect the substrate, and the manufacturing method of the present invention is used. The completed via plug was completed.

次に、本発明の、以下に具体的な実施例に従って説明する。図2は、本発明の実施例1のビアプラグの製造方法を説明する工程図で、(a)〜(c)は側断面図である。
<実施例1>
図2(a)では、12μm厚の接着剤の付いた50μm厚のポリイミドのフイルムをパンチングして、ビア用孔(8)を形成した。ビア用の孔形状は、200μmφのパンチ用金型でプレス打ち抜き法により形成した。ビア用孔を有する絶縁基材(1)が完成した。
Next, the present invention will be described with reference to specific examples. 2A to 2C are process diagrams for explaining a method of manufacturing a via plug according to the first embodiment of the present invention, and FIGS. 2A to 2C are side sectional views.
<Example 1>
In FIG. 2 (a), a via hole (8) was formed by punching a 50 μm thick polyimide film with a 12 μm thick adhesive. The via hole shape was formed by a press punching method using a punching die of 200 μmφ. An insulating substrate (1) having via holes was completed.

図2(b)では、50μm厚の銅箔を導体基材(11)とした。前記導体基材にフォトプロセスのフォトエッチング法を用いて、凸型形状のビア(3)と、下層導体層(4)を形成し、凸型形状のビアを有する導体基材(10)が完成した。   In FIG.2 (b), 50 micrometer-thick copper foil was made into the conductor base material (11). A convex via (3) and a lower conductor layer (4) are formed on the conductor base material using a photo-etching process of a photo process, and a conductive base material (10) having a convex via is completed. did.

図2(c)では、凸型形状のビアを有する導体基材(10)と、ビア用孔を有する絶縁基材(1)とを、貼り合わせ温度115℃で、前記ビア(3)とビア用孔(8)とを嵌着し、貼り合わせた。前記ビア用孔(8)は、200μmφの内径に形成され、前記ビア(3)では、エッチングのサイドエッチングの影響により180μmの外径で形成された。   In FIG. 2C, a conductor base material (10) having a convex-shaped via and an insulating base material (1) having a via hole are bonded at a bonding temperature of 115 ° C. The use hole (8) was fitted and bonded together. The via hole (8) was formed with an inner diameter of 200 μmφ, and the via (3) was formed with an outer diameter of 180 μm due to the influence of side etching.

本発明のビアプラグの製造方法を説明する工程図で、(a)〜(i)は側断面図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a process diagram for explaining a method of manufacturing a via plug according to the present invention, wherein (a) to (i) are side sectional views. 本発明の実施例1のビアプラグの製造方法を説明する工程図で、(a)〜(c)は側断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is process drawing explaining the manufacturing method of the via plug of Example 1 of this invention, (a)-(c) is a sectional side view. 従来のめっきによるビアプラグの製造方法を説明する工程図で、(a)〜(e)は側断面図である。It is process drawing explaining the manufacturing method of the via plug by the conventional plating, (a)-(e) is a sectional side view.

符号の説明Explanation of symbols

1…ビア用孔を有する絶縁基材
3…ビア
4…下層導体層
4a…配線層
5…導体
8…ビア用孔
9…絶縁基材
10…凸型形状のビアを有する導体基材
11…導体基材
12…レジスト層
13…レジスト層
22…エッチング防止層
23…エッチング防止層
DESCRIPTION OF SYMBOLS 1 ... Insulating base material 3 which has a hole for vias ... Via 4 ... Lower layer conductor layer 4a ... Wiring layer 5 ... Conductor 8 ... Via hole 9 ... Insulating base material 10 ... Conductive base material 11 which has a convex-shaped via ... Conductor Base material 12 ... resist layer 13 ... resist layer 22 ... etching prevention layer 23 ... etching prevention layer

Claims (4)

半導体装置用配線基板に形成され、半導体装置との入出力の端子として用いるビアプラグにおいて、下層の導体層と、絶縁層と、表層の導体層が順番に積層され、ビアを介して電気的に接続された構造のビアプラグが、下層の導体層と同一の材料から凸型の形状に成形したビアの導体層と、ビア用孔を成形した絶縁層基材とを用いて、前記凸型のビアと、ビア用孔とを嵌着したことを特徴とするビアプラグ。   In a via plug formed on a wiring board for a semiconductor device and used as an input / output terminal for the semiconductor device, a lower conductor layer, an insulating layer, and a surface conductor layer are laminated in order and are electrically connected through a via. A via plug having a structure formed by using a conductive layer of a via formed from the same material as the lower conductive layer into a convex shape and an insulating layer base material formed with a via hole; A via plug having a via hole fitted therein. 半導体装置用配線基板に形成され、半導体装置との入出力の端子として用いるビアプラグの製造方法において、少なくとも下記の製造工程からなることを特徴とする請求項1記載のビアプラグの製造方法。
(a)接着剤と絶縁材からなる絶縁基材にビア用孔を設ける工程。
(b)導電性材からなる導体基材にフォトプロセスのフォトエッチング法を用いて、凸型形状のビアを製造する工程。
(c)凸型形状のビアを成形した導電性材からなる導体基材と、ビア用孔を形成した接着剤と絶縁材からなる絶縁基材とを、前記ビアとビア用孔を嵌着して、貼り合わせる工程。
2. The method of manufacturing a via plug according to claim 1, wherein the method of manufacturing a via plug formed on a wiring board for a semiconductor device and used as an input / output terminal for the semiconductor device comprises at least the following manufacturing steps.
(A) A step of providing a via hole in an insulating base material made of an adhesive and an insulating material.
(B) The process of manufacturing a convex-shaped via | veer using the photo-etching method of a photo process for the conductor base material which consists of an electroconductive material.
(C) A conductor base material made of a conductive material formed with a convex-shaped via, and an insulating base material made of an adhesive and an insulating material formed with a via hole are fitted into the via and the via hole. And bonding.
前記接着剤と絶縁材からなる絶縁基材が、樹脂フイルムからなる基材であることを特徴とする請求項2記載のビアプラグの製造方法。   3. The method of manufacturing a via plug according to claim 2, wherein the insulating base material made of the adhesive and the insulating material is a base material made of a resin film. 前記導電性材からなる導体基材が、銅箔からなる基材であることを特徴とする請求項2、又は3記載のビアプラグの製造方法。   4. The method of manufacturing a via plug according to claim 2, wherein the conductive base material made of the conductive material is a base material made of copper foil.
JP2003300924A 2003-08-26 2003-08-26 Via plug and its manufacturing method Withdrawn JP2005072304A (en)

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