JP2005049519A - Display device - Google Patents

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Publication number
JP2005049519A
JP2005049519A JP2003204659A JP2003204659A JP2005049519A JP 2005049519 A JP2005049519 A JP 2005049519A JP 2003204659 A JP2003204659 A JP 2003204659A JP 2003204659 A JP2003204659 A JP 2003204659A JP 2005049519 A JP2005049519 A JP 2005049519A
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Japan
Prior art keywords
circuit
inspection
signal line
lines
display device
Prior art date
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Pending
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JP2003204659A
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Japanese (ja)
Inventor
Tamahiko Saito
藤 玲 彦 齋
Hiroyuki Kimura
村 裕 之 木
Koji Takahashi
橋 康 二 高
Takashi Maeda
田 孝 志 前
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Japan Display Central Inc
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Toshiba Matsushita Display Technology Co Ltd
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Priority to JP2003204659A priority Critical patent/JP2005049519A/en
Publication of JP2005049519A publication Critical patent/JP2005049519A/en
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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To enable peripheral circuits to be inspected correctly without enlarging a circuit scale. <P>SOLUTION: This liquid crystal display device is equipped with a pixel array part 1 having pixel TFTs (Thin Film Transistors) which are formed near respective intersections of signal lines and signal lines which are provided in line shape on a glass substrate, a scannning line driving circuit 2 for driving scanning lines, a signal line driving circuit 3 for driving signal lines, a drive IC 4 for controlling the signal line driving circuit 3, an inspection circuit 5 for inspecting whether there is a fault on manufacturing in the pixel array 1 and the signal line driving circuit 3 or not and an OLB pad 6 being the connection part with the external circuit (not shown). Since the inspection 5 is arranged between the signal line driving circuit 3 and the drive IC (Integrated Circuit) 4 and the drive IC 4 and the inspection circuit 5 are made to utilize the same data lines, not only a defect in the pixel array 1 but also a defect in the signal line driving circuit 3 can be detected correctly when performing inspection. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、検査回路を内蔵する表示装置に関する。
【０００２】
【従来の技術】
画素アレイ部が形成されるガラス基板上に、信号線駆動回路や走査線駆動回路等の周辺回路を一体に形成した駆動回路一体型の表示装置が提案されている。例えば、ポリシリコンＴＦＴ（Ｔｈｉｎ Ｆｉｌｍ Ｔｒａｎｓｉｓｔｏｒ）はＣＭＯＳ化が容易で、移動度も高いため、画素アレイ部と周辺回路を同一のガラス基板上に形成することができる。
【０００３】
近年、ガラス基板上に形成されるＴＦＴの駆動能力不足を補うためや、低消費電力化を図るため、走査線駆動回路をガラス基板上に形成し、信号線駆動回路を内蔵した駆動用ＩＣをガラス基板上やガラス基板に接続されるＦＰＣ（フレキシブルケーブル）上に実装する例が増えてきた。
【０００４】
表示解像度が高くなるにつれて、ガラス基板上に形成される回路パターンも複雑になり、断線や短絡などの製造上の不具合を発見しにくくなる。そこで、ガラス基板上に検査回路を予め形成して、画素アレイ部の製造上の不具合を自動検出できるようにしている（特許文献１参照）。
【０００５】
【特許文献１】
特開２０００−４７２５５公報
【０００６】
【発明が解決しようとする課題】
図４はこの種の検査回路５を内蔵する従来の駆動回路一体型表示装置の概略構成を示すブロック図である。図示のように、従来の表示装置は、信号線駆動回路３や走査線駆動回路２と離れた場所に検査回路５を形成していた。
【０００７】
図５は図４の検査回路５及び信号線駆動回路３の詳細構成を示す回路図である。図示のように、検査回路５は、一端が各信号線に接続され他端が検査信号線ＴＳＴ−Ｄに共通に接続されるトランジスタＱ３を有する。これらトランジスタＱ３のゲート端子は検査制御線ＴＳＴ−Ｇに共通に接続されている。
【０００８】
信号線駆動回路３は、一端が各信号線に接続され他端が駆動ＩＣに接続されるトランジスタＱ１を有する。トランジスタＱ１のゲート端子には書込み制御信号ＳＷ１〜ＳＷ３が供給される。
【０００９】
図５に示すように、検査回路５は、信号線駆動回路３に接続されていないため、信号線駆動回路３内に断線や短絡等の不具合があっても、検査回路５は不具合を検出できないという問題がある。
【００１０】
本発明は、このような点に鑑みてなされたものであり、その目的は、回路規模を大きくすることなく、周辺回路を正しく検査可能な表示装置を提供することにある。
【００１１】
【課題を解決するための手段】
上述した課題を解決するために、本発明は、絶縁基板上に縦横に列設される信号線及び走査線と、これら信号線及び走査線の各交点付近に形成される表示素子と、を有する画素アレイ部と、信号線を駆動する信号線駆動回路と走査線を駆動する走査線駆動回路とを有する周辺回路と、前記画素アレイ部及び前記周辺回路の検査を行う検査回路と、を備え、前記周辺回路は、前記画素アレイ部及び前記検査回路に隣接して前記絶縁基板上に形成される第１回路と、前記検査回路を挟んで前記第１回路と反対側の前記絶縁基板上に実装または形成される第２回路と、を有する。
【００１２】
【発明の実施の形態】
以下、本発明に係る表示装置について、図面を参照しながら具体的に説明する。以下では、表示装置の一例として、液晶表示装置について主に説明する。
【００１３】
（第１の実施形態）
図１は液晶表示装置の一実施形態の概略構成を示すブロック図である。図１の液晶表示装置は、ガラス基板上に列設された信号線及び走査線の各交点付近に形成される画素ＴＦＴ（Ｔｈｉｎ Ｆｉｌｍ Ｔｒａｎｓｉｓｔｏｒ）を有する画素アレイ部１と、走査線を駆動する走査線駆動回路２と、信号線を駆動する信号線駆動回路３と、信号線駆動回路３を制御する駆動ＩＣ４と、画素アレイ部１及び信号線駆動回路３に製造上の不具合があるか否かを検査する検査回路５と、不図示の外部回路との接続部分であるＯＬＢパッド６とを備えている。
【００１４】
以下では、ガラス基板上に形成される走査線駆動回路２、信号線駆動回路３及び駆動ＩＣ４を周辺回路と呼ぶ。画素アレイ部１、周辺回路及び検査回路５は、例えばポリシリコン・プロセスによるＴＦＴを用いて形成される。検査回路５は、信号線駆動回路３と駆動ＩＣの間のガラス基板上に形成される。より詳しくは、検査回路５は、ガラス基板と対向基板とを液晶層を挟んで封止する封止部材よりも内側の絶縁基板上に形成される。
【００１５】
図２は図１の信号線駆動回路３及び検査回路５の詳細回路の一例を示す回路図である。図２の信号線駆動回路３は、一端が各信号線に接続され他端が駆動ＩＣ４からのデータ線ｄ１，ｄ２，…に接続される複数のトランジスタＱ１を有する。これらトランジスタＱ１のゲート端子には、書込み制御信号ＳＷ１〜ＳＷ３が供給される。検査回路５は、一端がデータ線ｄ１，ｄ２，…に接続され他端が検査データ線ＴＳＴ−Ｄに接続される複数のトランジスタＱ２を有する。これらトランジスタＱ２のゲート端子には、外部回路から供給される検査制御信号ＴＳＴ−Ｇが供給される。
【００１６】
以下、通常表示時と検査時とに分けて、本実施形態の液晶表示装置の動作を説明する。まず、通常表示時は、検査回路５内のトランジスタＱ２はいずれもオフ状態であり、駆動ＩＣ４からのデータが各データ線ｄ１，ｄ２，…に供給される。１本のデータ線には、ＲＧＢ用の３つのトランジスタＱ１が接続されており、走査パルスによりいずれか一つのトランジスタＱ１がオンして、データ線ｄ１，ｄ２，…上のデータが対応する信号線に書き込まれる。図２の例では、１水平ライン分の全画素を色ごとに３つに分けて、信号線書込みを行う。
【００１７】
検査時には、１水平ライン分のトランジスタＱ１がオンし、検査データ線ＴＳＴ−Ｄ上のデータがデータ線ｄ１，ｄ２，…に供給される。したがって、書込み制御信号ＳＷ１〜ＳＷ３のタイミングに合わせて、検査データ線ＴＳＴ−Ｄ上のデータがデータ線ｄ１，ｄ２，…を介して各信号線に書き込まれる。
【００１８】
１水平ラインに対して検査データ線ＴＳＴ−Ｄは１本しか設けられていないため、図１の回路の場合、検査時には１水平ライン分の全信号線に同一の電圧が書き込まれる。すなわち、横一列が同じ色になる。
【００１９】
仮に、信号線駆動回路３内に断線や短絡などの不具合があると、検査時に意図した色の表示が行われなくなり、不具合があることを一目で把握することができる。したがって、従来は不可能であった信号線駆動回路３の不具合検出を簡易かつ迅速に行うことができる。
【００２０】
なお、画素アレイ部１内の信号線を複数のブロックに分割し、各ブロックごとに検査回路５を設けるようにしてもよい。この場合、検査時には、各ブロックの水平ライン方向が同一色になる。
【００２１】
このように、第１の実施形態では、信号線駆動回路３と駆動ＩＣ４の間に検査回路５を配置し、駆動ＩＣ４と検査回路５が同じデータ線ｄ１，ｄ２，…を利用するようにしたため、検査時には、画素アレイ部１内の不良だけでなく、信号線駆動回路３内の不良も正しく検出することができる。
【００２２】
（第２の実施形態）
第２の実施形態は、第１の実施形態よりも細かい検査ができるようにしたものである。
【００２３】
第２の実施形態の液晶表示装置は、図１と同様のブロック構成を有するが、検査回路５の回路構成が図２と異なっている。
【００２４】
図３は信号線駆動回路３と検査回路５の第２の実施形態の詳細回路図である。
図３の検査回路５は、２本の検査データ線ＴＳＴ−Ｄ１，ＴＳＴ−Ｄ２を有し、横方向に隣接する検査回路５内のトランジスタＱ２ａ，Ｑ２ｂには、それぞれ別個の検査データ線ＴＳＴ−Ｄ１，ＴＳＴ−Ｄ２が接続されている。
【００２５】
検査時には、図３の左側のトランジスタＱ２ａは、検査データ線ＴＳＴ−Ｄ上のデータを信号線に供給し、右側のトランジスタＱ２ｂは、検査データ線ＴＳＴ−Ｄ上のデータを信号線に供給する。したがって、これら２本の検査データ線ＴＳＴ−Ｄ１，ＴＳＴ−Ｄ２上のデータが互いに異なっていれば、隣接する２画素の表示データも異なったものになる。このような場合に、仮に隣接する２画素が同じ色で表示された場合には、どこかで短絡が起こったことを示しており、第１の実施形態では検出できなかった不良を検出できる。
【００２６】
なお、検査データ線ＴＳＴ−Ｄの数を３本以上にしてもよい。検査データ線ＴＳＴ−Ｄの数を増やすほど、検査時に複雑な色を表示でき、不具合があるか否かをより正確に検出できるようになる。
【００２７】
このように、第２の実施形態では、検査データ線ＴＳＴ−Ｄの数を増やして、検査時に第１の実施形態よりも複雑な色を表示できるようにするため、より正確に不良検出を行うことができる。
【００２８】
上述した第１及び第２の実施形態では、本発明を液晶表示装置に適用した例を説明したが、本発明は液晶表示装置以外の各種の平面表示装置（例えば、ＰＤＰ：Ｐｌａｓｍａ Ｄｉｓｐｌａｙ ＰａｎｅｌやＥｌ：Ｅｌｅｃｔｒｏｌｕｍｉｎｅｓｃｅｎｓｅ）にも適用可能である。
【００２９】
【発明の効果】
以上詳細に説明したように、本発明によれば、検査回路を周辺回路の第１回路と第２回路の間に配置するため、画素アレイ部の不良だけでなく、周辺回路の少なくとも一部の不良も検出でき、検査精度を向上できる。
【図面の簡単な説明】
【図１】液晶表示装置の一実施形態の概略構成を示すブロック図。
【図２】図１の信号線駆動回路３及び検査回路５の詳細回路の一例を示す回路図。
【図３】信号線駆動回路３と検査回路５の第２の実施形態の詳細回路図。
【図４】検査回路５を内蔵する従来の駆動回路一体型表示装置の概略構成を示すブロック図。
【図５】図４の検査回路５及び信号線駆動回路３の詳細構成を示す回路図。
【符号の説明】
１ 画素アレイ部
２ 走査線駆動回路
３ 信号線駆動回路
４ 駆動ＩＣ
５ 検査回路
６ ＯＬＢパッド[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device incorporating a test circuit.
[0002]
[Prior art]
There has been proposed a driving circuit integrated display device in which peripheral circuits such as a signal line driving circuit and a scanning line driving circuit are integrally formed on a glass substrate on which a pixel array portion is formed. For example, since a polysilicon TFT (Thin Film Transistor) can be easily formed into a CMOS and has high mobility, the pixel array portion and the peripheral circuit can be formed on the same glass substrate.
[0003]
In recent years, in order to compensate for the lack of driving capability of TFTs formed on a glass substrate and to reduce power consumption, a driving IC having a scanning line driving circuit formed on a glass substrate and incorporating a signal line driving circuit has been developed. An example of mounting on a glass substrate or an FPC (flexible cable) connected to the glass substrate has increased.
[0004]
As the display resolution becomes higher, the circuit pattern formed on the glass substrate becomes more complicated, and it becomes difficult to find manufacturing defects such as disconnection and short circuit. In view of this, an inspection circuit is formed in advance on a glass substrate so that a manufacturing defect of the pixel array portion can be automatically detected (see Patent Document 1).
[0005]
[Patent Document 1]
Japanese Patent Laid-Open No. 2000-47255
[Problems to be solved by the invention]
FIG. 4 is a block diagram showing a schematic configuration of a conventional drive circuit integrated display device incorporating this type of inspection circuit 5. As shown in the figure, in the conventional display device, the inspection circuit 5 is formed in a place away from the signal line driving circuit 3 and the scanning line driving circuit 2.
[0007]
FIG. 5 is a circuit diagram showing a detailed configuration of the inspection circuit 5 and the signal line driving circuit 3 of FIG. As illustrated, the inspection circuit 5 includes a transistor Q3 having one end connected to each signal line and the other end commonly connected to the inspection signal line TST-D. The gate terminals of these transistors Q3 are commonly connected to the inspection control line TST-G.
[0008]
The signal line driving circuit 3 includes a transistor Q1 having one end connected to each signal line and the other end connected to the driving IC. Write control signals SW1 to SW3 are supplied to the gate terminal of the transistor Q1.
[0009]
As shown in FIG. 5, since the inspection circuit 5 is not connected to the signal line drive circuit 3, the inspection circuit 5 cannot detect the malfunction even if there is a malfunction such as disconnection or short circuit in the signal line drive circuit 3. There is a problem.
[0010]
The present invention has been made in view of the above points, and an object of the present invention is to provide a display device that can correctly inspect peripheral circuits without increasing the circuit scale.
[0011]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention includes signal lines and scanning lines arranged vertically and horizontally on an insulating substrate, and display elements formed in the vicinity of intersections of these signal lines and scanning lines. A peripheral circuit having a pixel array unit, a signal line driving circuit for driving a signal line, and a scanning line driving circuit for driving a scanning line, and an inspection circuit for inspecting the pixel array unit and the peripheral circuit, The peripheral circuit is mounted on the insulating substrate on the opposite side of the first circuit with the first circuit formed on the insulating substrate adjacent to the pixel array unit and the inspection circuit. Or a second circuit to be formed.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a display device according to the present invention will be specifically described with reference to the drawings. Hereinafter, a liquid crystal display device will be mainly described as an example of the display device.
[0013]
(First embodiment)
FIG. 1 is a block diagram showing a schematic configuration of an embodiment of a liquid crystal display device. The liquid crystal display device of FIG. 1 includes a pixel array unit 1 having pixel TFTs (Thin Film Transistors) formed in the vicinity of intersections of signal lines and scanning lines arranged on a glass substrate, and scanning for driving the scanning lines. Whether or not the line driving circuit 2, the signal line driving circuit 3 for driving the signal line, the driving IC 4 for controlling the signal line driving circuit 3, the pixel array unit 1 and the signal line driving circuit 3 have manufacturing problems. And an OLB pad 6 which is a connection portion with an external circuit (not shown).
[0014]
Hereinafter, the scanning line driving circuit 2, the signal line driving circuit 3, and the driving IC 4 formed on the glass substrate are referred to as peripheral circuits. The pixel array unit 1, the peripheral circuit, and the inspection circuit 5 are formed using, for example, a TFT by a polysilicon process. The inspection circuit 5 is formed on a glass substrate between the signal line driving circuit 3 and the driving IC. More specifically, the inspection circuit 5 is formed on the insulating substrate inside the sealing member that seals the glass substrate and the counter substrate with the liquid crystal layer interposed therebetween.
[0015]
FIG. 2 is a circuit diagram showing an example of detailed circuits of the signal line driving circuit 3 and the inspection circuit 5 of FIG. 2 includes a plurality of transistors Q1 having one end connected to each signal line and the other end connected to data lines d1, d2,... Write control signals SW1 to SW3 are supplied to the gate terminals of the transistors Q1. The inspection circuit 5 includes a plurality of transistors Q2 having one end connected to the data lines d1, d2,... And the other end connected to the inspection data line TST-D. A test control signal TST-G supplied from an external circuit is supplied to the gate terminals of the transistors Q2.
[0016]
Hereinafter, the operation of the liquid crystal display device of the present embodiment will be described separately for normal display and inspection. First, during normal display, all the transistors Q2 in the inspection circuit 5 are in an off state, and data from the driving IC 4 is supplied to the data lines d1, d2,. Three data transistors for RGB are connected to one data line, and any one of the transistors Q1 is turned on by the scanning pulse, and the data on the data lines d1, d2,. Is written to. In the example of FIG. 2, signal lines are written by dividing all pixels for one horizontal line into three for each color.
[0017]
At the time of inspection, the transistor Q1 for one horizontal line is turned on, and the data on the inspection data line TST-D is supplied to the data lines d1, d2,. Therefore, the data on the test data line TST-D is written to each signal line via the data lines d1, d2,... In synchronization with the timing of the write control signals SW1 to SW3.
[0018]
Since only one inspection data line TST-D is provided for one horizontal line, in the case of the circuit of FIG. 1, the same voltage is written to all signal lines for one horizontal line at the time of inspection. That is, the horizontal row has the same color.
[0019]
If there is a defect such as a disconnection or a short circuit in the signal line driving circuit 3, the intended color display is not performed at the time of inspection, and it is possible to grasp at a glance that there is a defect. Therefore, it is possible to easily and quickly detect a defect in the signal line driving circuit 3 that has been impossible in the past.
[0020]
Note that the signal lines in the pixel array unit 1 may be divided into a plurality of blocks, and an inspection circuit 5 may be provided for each block. In this case, at the time of inspection, the horizontal line direction of each block becomes the same color.
[0021]
As described above, in the first embodiment, the inspection circuit 5 is arranged between the signal line driving circuit 3 and the driving IC 4, and the driving IC 4 and the inspection circuit 5 use the same data lines d1, d2,. At the time of inspection, not only a defect in the pixel array unit 1 but also a defect in the signal line drive circuit 3 can be detected correctly.
[0022]
(Second Embodiment)
In the second embodiment, a finer inspection than in the first embodiment can be performed.
[0023]
The liquid crystal display device of the second embodiment has the same block configuration as that in FIG. 1, but the circuit configuration of the inspection circuit 5 is different from that in FIG.
[0024]
FIG. 3 is a detailed circuit diagram of the second embodiment of the signal line driving circuit 3 and the inspection circuit 5.
The inspection circuit 5 of FIG. 3 has two inspection data lines TST-D1 and TST-D2. The transistors Q2a and Q2b in the inspection circuit 5 adjacent in the horizontal direction are respectively connected to separate inspection data lines TST- D1 and TST-D2 are connected.
[0025]
At the time of inspection, the transistor Q2a on the left side in FIG. 3 supplies data on the inspection data line TST-D to the signal line, and the transistor Q2b on the right side supplies data on the inspection data line TST-D to the signal line. Therefore, if the data on these two inspection data lines TST-D1 and TST-D2 are different from each other, the display data of the adjacent two pixels are also different. In such a case, if two adjacent pixels are displayed in the same color, this indicates that a short circuit has occurred somewhere, and a defect that could not be detected in the first embodiment can be detected.
[0026]
Note that the number of inspection data lines TST-D may be three or more. As the number of inspection data lines TST-D is increased, more complex colors can be displayed during inspection, and whether or not there is a defect can be detected more accurately.
[0027]
As described above, in the second embodiment, the number of inspection data lines TST-D is increased so that a more complex color than that in the first embodiment can be displayed at the time of inspection. be able to.
[0028]
In the first and second embodiments described above, an example in which the present invention is applied to a liquid crystal display device has been described. However, the present invention is not limited to a liquid crystal display device (for example, PDP: Plasma Display Panel or El). : Electroluminescence).
[0029]
【The invention's effect】
As described above in detail, according to the present invention, since the inspection circuit is arranged between the first circuit and the second circuit of the peripheral circuit, not only the defect of the pixel array unit but also at least a part of the peripheral circuit is provided. Defects can also be detected, and inspection accuracy can be improved.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration of an embodiment of a liquid crystal display device.
2 is a circuit diagram showing an example of detailed circuits of a signal line driving circuit 3 and an inspection circuit 5 of FIG. 1;
FIG. 3 is a detailed circuit diagram of a second embodiment of a signal line driving circuit 3 and an inspection circuit 5;
FIG. 4 is a block diagram showing a schematic configuration of a conventional drive circuit integrated display device incorporating a test circuit 5;
5 is a circuit diagram showing a detailed configuration of the inspection circuit 5 and the signal line driving circuit 3 of FIG. 4;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Pixel array part 2 Scan line drive circuit 3 Signal line drive circuit 4 Drive IC
5 Inspection circuit 6 OLB pad

Claims (6)

絶縁基板上に縦横に列設される信号線及び走査線と、これら信号線及び走査線の各交点付近に形成される表示素子と、を有する画素アレイ部と、
信号線を駆動する信号線駆動回路と走査線を駆動する走査線駆動回路とを有する周辺回路と、
前記画素アレイ部及び前記周辺回路の検査を行う検査回路と、を備え、
前記周辺回路は、
前記画素アレイ部及び前記検査回路に隣接して前記絶縁基板上に形成される第１回路と、
前記検査回路を挟んで前記第１回路と反対側の前記絶縁基板上に実装または形成される第２回路と、を有することを特徴とする表示装置。A pixel array section having signal lines and scanning lines arranged in rows and columns on an insulating substrate, and display elements formed near the intersections of these signal lines and scanning lines;
A peripheral circuit having a signal line driving circuit for driving signal lines and a scanning line driving circuit for driving scanning lines;
An inspection circuit for inspecting the pixel array unit and the peripheral circuit, and
The peripheral circuit is
A first circuit formed on the insulating substrate adjacent to the pixel array unit and the inspection circuit;
And a second circuit mounted or formed on the insulating substrate opposite to the first circuit with the inspection circuit interposed therebetween. 前記第１回路は、前記信号線駆動回路の少なくとも一部を含んでおり、
前記第２回路は、前記絶縁基板上に実装される半導体チップに内蔵されることを特徴とする請求項１に記載の表示装置。The first circuit includes at least a part of the signal line driver circuit;
The display device according to claim 1, wherein the second circuit is built in a semiconductor chip mounted on the insulating substrate. 各画素ごとに設けられ、各信号線に表示データを供給する表示データ線と、
検査時に、各信号線に検査データを供給する検査データ線と、を備え、
前記信号線駆動回路は、一端が対応する信号線に接続され他端が表示データ線に接続される複数の第１トランジスタを有し、
前記検査回路は、一端が対応する表示データ線に接続され、他端が検査データ線に接続される複数の第２トランジスタを有することを特徴とする請求項１または２に記載の表示装置。A display data line provided for each pixel and supplying display data to each signal line;
An inspection data line for supplying inspection data to each signal line at the time of inspection;
The signal line driving circuit has a plurality of first transistors having one end connected to a corresponding signal line and the other end connected to a display data line,
3. The display device according to claim 1, wherein the inspection circuit includes a plurality of second transistors having one end connected to a corresponding display data line and the other end connected to the inspection data line. 前記検査データ線は、２本以上設けられ、
水平方向に隣接する２画素の信号線には、互いに異なる検査データ線からの検査データが供給されることを特徴とする請求項３に記載の表示装置。Two or more inspection data lines are provided,
4. The display device according to claim 3, wherein inspection data from different inspection data lines is supplied to signal lines of two pixels adjacent in the horizontal direction. 前記画素アレイ部、前記周辺回路及び前記検査回路は、ポリシリコンプロセスによるＴＦＴ（Ｔｈｉｎ Ｆｉｌｍ Ｔｒａｎｓｉｓｔｏｒ）を用いて形成されることを特徴とする請求項１〜４のいずれかに記載の表示装置。The display device according to claim 1, wherein the pixel array unit, the peripheral circuit, and the inspection circuit are formed by using a TFT (Thin Film Transistor) by a polysilicon process. 前記絶縁基板に液晶層を挟んで対向配置される対向基板と、
前記絶縁基板及び前記対向基板を封止する封止部材と、を備え、
前記検査回路は、前記絶縁基板上の前記封止部材の内側部分に形成されることを特徴とする請求項１〜５のいずれかに記載の表示装置。A counter substrate disposed opposite to the insulating substrate across a liquid crystal layer;
A sealing member for sealing the insulating substrate and the counter substrate,
The display device according to claim 1, wherein the inspection circuit is formed in an inner portion of the sealing member on the insulating substrate.
JP2003204659A 2003-07-31 2003-07-31 Display device Pending JP2005049519A (en)

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