JP2005039142A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP2005039142A JP2005039142A JP2003276697A JP2003276697A JP2005039142A JP 2005039142 A JP2005039142 A JP 2005039142A JP 2003276697 A JP2003276697 A JP 2003276697A JP 2003276697 A JP2003276697 A JP 2003276697A JP 2005039142 A JP2005039142 A JP 2005039142A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 30
- 238000007747 plating Methods 0.000 claims abstract description 104
- 238000000034 method Methods 0.000 claims abstract description 71
- 238000009713 electroplating Methods 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000000463 material Substances 0.000 claims abstract description 3
- 230000001186 cumulative effect Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 239000007788 liquid Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 80
- 239000010949 copper Substances 0.000 description 60
- 230000007547 defect Effects 0.000 description 24
- 239000011229 interlayer Substances 0.000 description 15
- 238000005530 etching Methods 0.000 description 14
- 239000002184 metal Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000000654 additive Substances 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 6
- 230000002093 peripheral effect Effects 0.000 description 6
- 238000011282 treatment Methods 0.000 description 6
- 230000000996 additive effect Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000002265 prevention Effects 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
【解決手段】 半導体基板上の絶縁膜に形成された、配線用溝およびビア孔のうち少なくともいずれか一方に導電層を埋め込むための電解めっき法は、導電層の材料を含んだめっき液の単位面積あたりに流れる電流値である電流密度とめっき時間との積である積算電流密度が所定の値となる条件でめっき処理を行う第1のステップと、第1のステップよりも電流密度が小さい条件でめっき処理を行う第2のステップとを有するものである。
【選択図】 図1
Description
前記電解めっき法は、
前記導電層の材料を含んだめっき液の単位面積あたりに流れる電流値である電流密度とめっき時間との積である積算電流密度が所定の値となる条件でめっき処理を行う第1のステップと、該第1のステップよりも前記電流密度が小さい条件でめっき処理を行う第2のステップとを有するものである。
14 めっき槽
16 アノード
18 電源ユニット
20 電圧計/電流計
22 制御部
100 半導体基板
110 下地絶縁膜
112 第1のエッチングストッパ膜
113 第1の層間絶縁膜
114 第1の配線
116 第2のエッチングストッパ膜
118 第2の層間絶縁膜
120 反射防止膜
122 ビア孔パターン
124 レジスト
126 ビア孔
130 バリアメタル層
132 Cuシード層
133 Cu層
134 ビア
136 第2の配線
138 第3のエッチングストッパ膜
140 第3の層間絶縁膜
142 金属拡散防止膜
144 保護膜
150 絶縁膜
160 第1のCuめっき層
164 Cuめっき層
D めっき液
W ウエハ
Claims (8)
- 半導体基板上の絶縁膜に形成された、配線用溝およびビア孔のうち少なくともいずれか一方に電解めっき法により導電層を埋め込む工程を有する半導体装置の製造方法であって、
前記電解めっき法は、
前記導電層の材料を含んだめっき液の単位面積あたりに流れる電流値である電流密度とめっき時間との積である積算電流密度が所定の値となる条件でめっき処理を行う第1のステップと、該第1のステップよりも前記電流密度が小さい条件でめっき処理を行う第2のステップとを有する半導体装置の製造方法。 - 前記積算電流密度が0.01〜0.1A・sec/cm2である請求項1記載の半導体装置の製造方法。
- 前記第1のステップで前記めっき液に印加する電圧が所定の一定値である請求項1または2記載の半導体装置の製造方法。
- 前記第1のステップにおけるめっき処理の開始前から前記電圧を前記めっき液に印加する請求項3記載の半導体装置の製造方法。
- 前記電圧の値が1.59〜3.83mV/cm2である請求項3または4記載の半導体装置の製造方法。
- 前記第1のステップの電流密度が4.77〜19.2mA/cm2である請求項1乃至5のいずれか1項記載の半導体装置の製造方法。
- 前記第2のステップの電流密度が所定の一定値である請求項1乃至6のいずれか1項記載の半導体装置の製造方法。
- 前記第2のステップの電流密度が1.5〜13mA/cm2である請求項7記載の半導体装置の製造方法。
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JP2003276697A JP2005039142A (ja) | 2003-07-18 | 2003-07-18 | 半導体装置の製造方法 |
US10/892,352 US7229916B2 (en) | 2003-07-18 | 2004-07-16 | Method of manufacturing a semiconductor device |
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JP2003276697A JP2005039142A (ja) | 2003-07-18 | 2003-07-18 | 半導体装置の製造方法 |
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JP2005039142A true JP2005039142A (ja) | 2005-02-10 |
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US (1) | US7229916B2 (ja) |
JP (1) | JP2005039142A (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011080139A (ja) * | 2009-09-10 | 2011-04-21 | Fujifilm Corp | 金属充填微細構造体およびその製造方法 |
US8038864B2 (en) | 2006-07-27 | 2011-10-18 | Renesas Electronics Corporation | Method of fabricating semiconductor device, and plating apparatus |
JP2012122097A (ja) * | 2010-12-08 | 2012-06-28 | Ebara Corp | 電気めっき方法 |
JP5380838B2 (ja) * | 2005-06-22 | 2014-01-08 | 日本電気株式会社 | 半導体装置の製造方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2006038335A1 (ja) * | 2004-10-01 | 2008-05-15 | 国立大学法人大阪大学 | 電気化学的析出方法、電気化学的析出装置及び微細構造体 |
US20090250352A1 (en) * | 2008-04-04 | 2009-10-08 | Emat Technology, Llc | Methods for electroplating copper |
KR20140011137A (ko) | 2012-07-17 | 2014-01-28 | 삼성전자주식회사 | Tsv 구조를 구비한 집적회로 소자 및 그 제조 방법 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5989623A (en) * | 1997-08-19 | 1999-11-23 | Applied Materials, Inc. | Dual damascene metallization |
JPH1197391A (ja) | 1997-09-16 | 1999-04-09 | Ebara Corp | 半導体ウエハー配線電解メッキ方法 |
WO2001090446A2 (en) * | 2000-05-23 | 2001-11-29 | Applied Materials, Inc. | Method and apparatus to overcome anomalies in copper seed layers and to tune for feature size and aspect ratio |
US6797144B2 (en) * | 2002-05-08 | 2004-09-28 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for reducing surface defects in an electrodeposition process |
-
2003
- 2003-07-18 JP JP2003276697A patent/JP2005039142A/ja active Pending
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2004
- 2004-07-16 US US10/892,352 patent/US7229916B2/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5380838B2 (ja) * | 2005-06-22 | 2014-01-08 | 日本電気株式会社 | 半導体装置の製造方法 |
US8038864B2 (en) | 2006-07-27 | 2011-10-18 | Renesas Electronics Corporation | Method of fabricating semiconductor device, and plating apparatus |
JP2011080139A (ja) * | 2009-09-10 | 2011-04-21 | Fujifilm Corp | 金属充填微細構造体およびその製造方法 |
JP2012122097A (ja) * | 2010-12-08 | 2012-06-28 | Ebara Corp | 電気めっき方法 |
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US7229916B2 (en) | 2007-06-12 |
US20050048769A1 (en) | 2005-03-03 |
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