JP2005038891A - Method of manufacturing semiconductor product and circuit board - Google Patents

Method of manufacturing semiconductor product and circuit board Download PDF

Info

Publication number
JP2005038891A
JP2005038891A JP2003197155A JP2003197155A JP2005038891A JP 2005038891 A JP2005038891 A JP 2005038891A JP 2003197155 A JP2003197155 A JP 2003197155A JP 2003197155 A JP2003197155 A JP 2003197155A JP 2005038891 A JP2005038891 A JP 2005038891A
Authority
JP
Japan
Prior art keywords
electrode
circuit board
electrodes
terminal portion
laser beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003197155A
Other languages
Japanese (ja)
Inventor
Koji Kamezaki
浩司 亀崎
Chiharu Wakamatsu
千春 若松
Shinichi Kato
真一 加藤
Daiichi Seki
大一 関
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2003197155A priority Critical patent/JP2005038891A/en
Publication of JP2005038891A publication Critical patent/JP2005038891A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75253—Means for applying energy, e.g. heating means adapted for localised heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor product which is capable of surely making an electric connection without using a conductive adhesive agent, and to provide a circuit board. <P>SOLUTION: In a method of mounting a semiconductor device 2 on a translucent circuit board 1 where a metal wiring pattern is formed on its surface by the use of a laser beam, the electrodes 5 of the semiconductor device 2 are placed direct and pressed on the terminals 3 of a wiring pattern, and joint surfaces between the terminals 3 and the electrodes 5 are irradiated with a laser beam from behind the circuit board 1 to fuse the terminals 3 and the electrodes 5 together while the electrodes 5 are pressed on the terminals 3. The terminals 3 and the electrodes 5 are welded together while abutting on each other, so that a space between the adjacent terminals 3 and electrodes 5 can be kept large enough when the terminals 3 and the electrodes 5 are connected together, and a short circuit hardly occurs between the adjacent electrodes 5. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置を透光性を有する基板上に実装する半導体製品の製造方法および回路基板に関する。
【０００２】
【従来の技術】
従来、ガラスエポキシ製の基板にＩＣ（半導体装置）を実装する方法として、ＩＣの電極パッドと基板の端子部とを導電性接着剤を用いて接合する方法が用いられている。導電性接着剤は、基板上に印刷等の手法を用いて、所定位置に所定の厚みで塗布される。そして、この上にＩＣの電極パッドを載置してから導電性接着剤を硬化させている。
【０００３】
近年、製品の小型化の要請が高まり、半導体装置の電極と基板の端子も狭ピッチで製造されている。
【０００４】
この半導体装置の電極と基板の端子の電気的接続を行う方法として、電極を端子に導電性接着剤を用いてボンディングした後、端子の裏面からＹＡＧレーザ光を照射して、端子と導電性接着剤との間に介在するエポキシ樹脂を除去する方法が開発されている（例えば、特許文献１参照。）。
【０００５】
【特許文献１】
特開平６−１１８４３４号公報 （第２−３頁、第１図）
【０００６】
【発明が解決しようとする課題】
しかしながら、特許文献１に記載された方法では、半導体装置の実装に導電性接着剤を用いているので、導電性接着剤の印刷パターンの位置が基板の端子部のパターンに対してずれることがあり、狭ピッチの製品の場合には、位置ずれにより隣接する端子との間でショート等の不具合が発生することがある。
【０００７】
そこで本発明は、導電性接着剤を使用せずに電気的接続を確実に行う半導体製品の製造方法および回路基板を提供することを目的とする。
【０００８】
【課題を解決するための手段】
本発明の半導体製品の製造方法においては、配線パターンの端子部に半導体装置の電極を直接載置して加圧し、基板の裏面からレーザ光を照射して、端子部と電極とを溶着する方法である。
【０００９】
また、本発明の回路基板は、金属配線パターンの端子部に、孔部を形成したことを特徴とする回路基板としたものである。
【００１０】
この発明によれば、導電性接着剤を使用せずに電気的接続を確実に行う半導体製品の製造方法を提供でき、また、回路基板が得られる。
【００１１】
【発明の実施の形態】
本願の請求項１に記載の発明は、透光性を有して、表面に金属配線パターンを形成した回路基板上にレーザ光を用いて半導体装置を実装する方法において、前記配線パターンの端子部に前記半導体装置の電極を直接載置し、前記回路基板の裏面から前記端子部および前記電極の接合部分にレーザ光を照射して、前記端子部と前記電極とを溶着することを特徴とする半導体製品の製造方法としたものであり、端子部と電極とを直接当接させて溶着するので、端子部と電極を接続したときに隣接する端子間と、隣接する電極間とに十分な隙間が確保され、短絡しにくくなるという作用を有する。
【００１２】
請求項２に記載の発明は、前記端子部には孔部が形成され、レーザ光は、前記孔部を通過して前記電極に照射されることを特徴とする請求項１に記載の半導体製品の製造方法としたものであり、レーザ光を電極に照射して電極の表面を加熱することができ、電極と端子部の界面が溶着されるという作用を有する。
【００１３】
請求項３に記載の発明は、複数の前記孔部は直線状に配列され、前記回路基板は、レーザ光を照射するレーザ装置に対して、前記孔部に沿って相対移動可能に設けられ、前記回路基板または前記レーザ装置は、レーザ光が前記孔部の内側を通過するように移動することを特徴とする請求項１または２に記載の半導体製品の製造方法としたものであり、レーザ光を連続的に照射した状態で、複数の接合部分を順に溶着するという作用を有する。
【００１４】
請求項４に記載の発明は、レーザ光を照射する前に、前記端子部と前記電極とを加圧して密着させることを特徴とする請求項１から３のいずれかの項に記載の半導体製品の製造方法としたものであり、溶着前後の厚みを一定に保持するとともに、端子部と電極との間に隙間があいた状態でレーザ光が照射されることを防止するという作用を有する。
【００１５】
請求項５に記載の発明は、透光性を有して、表面に金属配線パターンを形成した回路基板において、前記金属配線パターンの端子部には、孔部が形成されていることを特徴とする回路基板としたものであり、前記孔部にレーザ光を通過させ、電極にレーザ光を照射するという作用を有する。
【００１６】
以下、本発明の実施の形態について、図１から図６を用いて説明する。
【００１７】
図１は本発明の一実施の形態の半導体製品の製造方法を示す説明図、図２（Ａ）は同半導体製品の製造方法に用いる回路基板の電極の斜視図、（Ｂ）は同回路基板の電極の平面図である。図１に示すように、本実施の形態の半導体製品の製造方法は、透光性を有して、表面に金属配線パターンを形成した回路基板１上にレーザ光を用いて半導体装置２を実装する方法である。
【００１８】
回路基板１は、基材として、ソーダライムガラス、無アルカリガラス、石英ガラスおよび高い光透過性を持つ有機材料等の光透過性材料が用いられる。この基材の表面には、厚みが数μｍ以下の導電性膜からなる配線パターンが形成されており、配線パターンには、表面を露出させた複数の端子部３が形成されている。端子部３は、基材の表面に直線状に配列されている。
【００１９】
端子部３および配線パターンの材質としては、例えば、金、銀、銅等の金属の他、ＩＴＯ、ＩＺＯ等の導電性材料を用いることができる。
【００２０】
図２に示すように、端子部３には、複数の円形の孔部４が貫通して形成されている。各孔部４の中心は直線状に配置されている。また、他の端子部３の孔部４の中心も同じ直線上に配置されている。なお、ビーム径が孔部４の直径よりも大きい場合には、必ずしも直線上に配置されていなくてもよい。
【００２１】
孔部４は、配線パターンを形成するときに同時に形成することができ、その内部には基材の表面が露出している。配線パターンおよび孔部４は、エッチングにより形成されるので、その表面は平滑に形成されており、光の透過性がよくなっている。
【００２２】
図１に示すように、半導体装置２は、ＩＣ表面に突起状の電極５（バンプ）を形成している。電極５は、加圧により変形可能な程度の剛性を有している。電極５および端子部３は同じ材質で形成することが好ましい。
【００２３】
回路基板１は、厚みのある平板状のステージ６上に載置されている。ステージ６は、石英ガラス等の剛性を有する材料で形成され、表面は平滑に形成されている。また、ステージ６は透光性を有することが好ましいが、透光性を有しない材料で形成する場合には、電極５に重なる位置に貫通孔を形成して使用することができる。
【００２４】
半導体装置２を加圧する工具７は、ステンレス等の剛性を有する材料で形成されている。工具７は、その下面を、ステージ６の上面に平行に調整する機能を有している。かかる構成によって、半導体装置２の上面を回路基板１に平行に配置して半導体装置２を押圧でき、複数の電極５を略同じ圧力で端子部３に押圧することができる。
【００２５】
レーザ装置８は、例えば、エキシマレーザを用いている。エキシマレーザは、紫外線を発生するパルス幅が狭いレーザである。エキシマレーザの利点として、微細な加工が可能で加工深さの調整が容易であることが挙げられる。
【００２６】
なお、レーザ装置としてＹＡＧレーザを用いることも可能である。ＹＡＧレーザは、赤外線を発生するレーザで、高いピーク出力を得ることができる。また、基板１を透過して電極５および端子部３を溶着できるものであれば、他の光源を用いても良い。
【００２７】
次に、半導体装置２を実装するときの手順について説明する。
【００２８】
（準備工程）
図３は準備工程の一例を示す説明図である。
【００２９】
（Ａ）、（Ａ’）に示すように基材１０は、ガラス材で形成されている。
【００３０】
回路基板１を形成するときは、まず、（Ｂ）、（Ｂ’）に示すように、基材１０の表面にレジスト膜１１を形成する。
【００３１】
次いで、（Ｃ）、（Ｃ’）に示すように、マスク部材１２でレジスト膜１１を覆い、マスク部材１２の上方から光を照射して露光を行う。マスク部材１２には、配線パターンに合わせた孔部が形成されており、レジスト膜１１には可溶性を有する潜像が形成される。
【００３２】
次に、（Ｄ）、（Ｄ’）に示すようにエッチングを行い、レジスト膜１１に形成された可溶部を溶解除去する。
【００３３】
続いて、（Ｅ）、（Ｅ’）に示すように蒸着またはスパッタにより表面にＡｕを成膜する。Ａｕの薄膜１３は、レジスト膜１１の表面と、基材１０の表面に薄く形成される。
【００３４】
そして、（Ｆ）、（Ｆ’）に示すようにレジスト膜１１を除去することにより、基材１０にＡｕの薄膜１３による配線パターンが形成された回路基板１が形成される。
【００３５】
（押圧工程）
図１に示すように、自動機を用いてステージ６上の所定位置に回路基板１を載置する。
【００３６】
次いで、同様に自動機を用いて半導体装置２を回路基板１上に載置する。このとき、接着剤により半導体装置２を仮固定してもよい。半導体装置２の電極５は、回路基板１の端子部３の上に、横方向の位置を合わせて直接載置される。
【００３７】
次に、ステージ６の上方に待機している工具７を降下させ、半導体装置２を下方に押圧する。押圧によって電極５は少し変形して、端子部３に密着した状態になる。
【００３８】
（溶着工程）
図４は、溶着工程の説明図である。図４に示すように、レーザ装置８は、ステージ６の下方に固定配置されている。また、レーザ装置８から照射されるレーザ光の焦点は、端子部３と電極５の界面に合わせて設定されている。
【００３９】
ステージ６および工具７は、半導体装置２および回路基板１を加圧した状態で挟持したまま、電極５の配列方向に沿って横移動する。このとき、レーザ装置８は、レーザ光を連続的に照射している。
【００４０】
レーザ装置８が孔部４の下方を通過するとき、レーザ光は、ステージ６、回路基板１および端子部３の孔部４を通過して、電極５の表面を加熱する。熱は、電極５の表面から端子部３の表面に伝達されるとともに、電極５および端子部３を溶融させて、固着する。
【００４１】
レーザ光は、孔部４から隣接する孔部４に移動する間に端子部３と回路基板１の基材との間の界面に照射される。また、隣接する端子部３の間を移動するときには、半導体装置２のＩＣの表面に照射される。
【００４２】
レーザ光の焦点は、電極５の表面に合わせている。従って、レーザ光が端子部３と基材との界面や、ＩＣの表面を照射するときには、光が広い範囲に照射されてエネルギーが分散するので、温度上昇は小さくなる。また、電極部以外は光を通さないマスクをステージ部に設けることにより、これらの影響を防ぐことができる。
【００４３】
このように、レーザ光を連続的に照射して溶着を行うことができるので、溶着時間を短縮することができる。また、製造装置に、位置を合わせて製品を送るような複雑な機構を設けなくてもよくなる。なお、レーザ光を照射するタイミングを制御することによって、電極部のみにレーザ光を照射し、電気的接続をさらに確実に行うことも可能である。
【００４４】
（被覆工程）
図５は、被覆工程の説明図である。図５に示すように、端子部３と電極５とを溶着した後に、半導体装置２のパッケージと回路基板１との間の隙間にアンダーフィル材９を塗布して硬化させる。
【００４５】
アンダーフィル材９を塗布することによって、半導体装置２と回路基板１との接着を強固にし、防湿性を向上させることができる。
【００４６】
このようにして、半導体装置２を実装することができる。
【００４７】
なお、溶着工程を行う前に、アンダーフィル材９や接着剤などで半導体装置２を回路基板に仮固定し、その後レーザ光で溶着部の接着剤層を除去しながら溶着を行うことも可能である。
【００４８】
図６は、他の溶着工程の説明図である。
【００４９】
溶着を行うときに、ステージ６と工具７とを横移動しないように固定しておき、レーザ光を横移動するように構成している。レーザ光の横移動は、例えば、レーザ装置を移動させたり、また、レーザ装置を回動させることにより実現することができる。このように構成しても、レーザ光を孔部４内に順に通過させ、電極５および端子部３を溶着することができる。
【００５０】
なお、端子部３の孔部４を省略することも可能である。この場合は、端子部３にレーザ光の焦点を合わせておき、端子部３から電極５に熱を伝達し、端子部３および電極５を溶着する。
【００５１】
また、端子部および電極を複数列に形成した場合は、レーザ装置を列に合わせて複数台配置すると、端子部および電極を１方向に１回移動させるだけで製造を行うことができる。
【００５２】
【発明の効果】
以上のように本発明によれば、配線パターンの端子部に半導体装置の電極を直接載置して加圧し、加圧した状態のまま、基板の裏面から端子部および電極の接合部分にレーザ光を照射して、端子部と前記電極とを溶着するので、端子部と電極を接続したときに隣接する端子間と、隣接する電極間との間に十分な隙間を確保でき、導電性接着剤を使用せずに電気的接続を確実に行うことができる。
【００５３】
また、端子部には孔部を形成し、レーザ光を、孔部を通過して電極に照射すると、電極と端子部とを同時に溶融させることができ、電極と端子部の界面が溶着されるので、信頼性の高い電気的接続部を得ることができる。
【００５４】
また、複数の孔部を直線状に配列し、基板を、レーザ光を照射するレーザ装置に対して、孔部に沿って相対移動可能に設け、基板またはレーザ装置を、レーザ光が孔部の内側を通過するように移動させると、レーザ光を連続的に照射した状態で、複数の接合部分を順に溶着することができ、製造を短時間で行うことができる。
【００５５】
また、レーザ光を照射する前に、端子部と電極とを加圧して密着させると、溶着前後の厚みを一定に保持するとともに、端子部と電極との間に隙間があいた状態でレーザ光が照射されることを防止することができ、高さのばらつきをなくし、溶着を確実に行うことができる。
【図面の簡単な説明】
【図１】本発明の一実施の形態の半導体製品の製造方法を示す説明図
【図２】（Ａ）は同半導体製品の製造方法に用いる回路基板の電極の斜視図
（Ｂ）は同回路基板の電極の平面図
【図３】（Ａ）〜（Ｆ）および（Ａ’）〜（Ｆ’）は準備工程の一例を示す説明図
【図４】溶着工程の説明図
【図５】被覆工程の説明図
【図６】他の溶着工程の説明図
【符号の説明】
１ 回路基板
２ 半導体装置
３ 端子部
４ 孔部
５ 電極
６ ステージ
７ 工具
８ レーザ装置
９ アンダーフィル材
１０ 基材
１１ レジスト膜
１２ マスク部材
１３ 薄膜[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor product in which a semiconductor device is mounted on a light-transmitting substrate and a circuit board.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, as a method of mounting an IC (semiconductor device) on a glass epoxy substrate, a method of bonding an IC electrode pad and a terminal portion of the substrate using a conductive adhesive is used. The conductive adhesive is applied to a predetermined position at a predetermined thickness on the substrate using a technique such as printing. Then, the conductive adhesive is cured after the IC electrode pad is placed thereon.
[0003]
In recent years, there has been an increasing demand for miniaturization of products, and electrodes of semiconductor devices and terminals of substrates are manufactured at a narrow pitch.
[0004]
As a method of electrically connecting the electrode of this semiconductor device and the terminal of the substrate, the electrode is bonded to the terminal using a conductive adhesive, and then YAG laser light is irradiated from the back surface of the terminal to bond the terminal to the conductive bond. A method for removing an epoxy resin intervening with the agent has been developed (for example, see Patent Document 1).
[0005]
[Patent Document 1]
JP-A-6-118434 (page 2-3, FIG. 1)
[0006]
[Problems to be solved by the invention]
However, in the method described in Patent Document 1, since the conductive adhesive is used for mounting the semiconductor device, the position of the printed pattern of the conductive adhesive may deviate from the pattern of the terminal portion of the substrate. In the case of a product with a narrow pitch, a defect such as a short circuit may occur between adjacent terminals due to a positional shift.
[0007]
Then, an object of this invention is to provide the manufacturing method of a semiconductor product and circuit board which perform electrical connection reliably, without using a conductive adhesive.
[0008]
[Means for Solving the Problems]
In the method for manufacturing a semiconductor product of the present invention, a method of welding the terminal part and the electrode by directly placing and pressing the electrode of the semiconductor device on the terminal part of the wiring pattern and irradiating the laser beam from the back surface of the substrate. It is.
[0009]
The circuit board of the present invention is a circuit board characterized in that a hole is formed in a terminal portion of a metal wiring pattern.
[0010]
According to the present invention, it is possible to provide a method for manufacturing a semiconductor product that reliably performs electrical connection without using a conductive adhesive, and to obtain a circuit board.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
The invention according to claim 1 of the present application is a method of mounting a semiconductor device using a laser beam on a circuit board having translucency and having a metal wiring pattern formed on a surface thereof. The electrode of the semiconductor device is mounted directly on the terminal, and the terminal portion and the electrode are welded to each other by irradiating the terminal portion and the electrode joint from the back surface of the circuit board. This is a method for manufacturing a semiconductor product. Since the terminal part and the electrode are directly brought into contact with each other and welded, a sufficient gap is provided between adjacent terminals and between adjacent electrodes when the terminal part and the electrode are connected. Is ensured and has the effect of making short circuiting difficult.
[0012]
According to a second aspect of the present invention, there is provided a semiconductor product according to the first aspect, wherein a hole is formed in the terminal portion, and laser light is irradiated to the electrode through the hole. This method can be used to heat the surface of the electrode by irradiating the electrode with laser light, and has an effect that the interface between the electrode and the terminal portion is welded.
[0013]
According to a third aspect of the present invention, the plurality of holes are arranged in a straight line, and the circuit board is provided so as to be relatively movable along the holes with respect to a laser device that irradiates laser light. 3. The method of manufacturing a semiconductor product according to claim 1, wherein the circuit board or the laser device moves so that laser light passes inside the hole. 3. In this state, a plurality of joint portions are sequentially welded.
[0014]
According to a fourth aspect of the present invention, the semiconductor product according to any one of the first to third aspects, wherein the terminal portion and the electrode are pressed and brought into close contact with each other before irradiating the laser beam. This method has an effect of keeping the thickness before and after welding constant and preventing the laser beam from being irradiated with a gap between the terminal portion and the electrode.
[0015]
The invention according to claim 5 is characterized in that in a circuit board having translucency and having a metal wiring pattern formed on a surface thereof, a hole is formed in a terminal portion of the metal wiring pattern. The circuit board has a function of allowing laser light to pass through the hole and irradiating the electrode with laser light.
[0016]
Hereinafter, embodiments of the present invention will be described with reference to FIGS.
[0017]
FIG. 1 is an explanatory view showing a method of manufacturing a semiconductor product according to an embodiment of the present invention, FIG. 2A is a perspective view of an electrode of a circuit board used in the method of manufacturing the semiconductor product, and FIG. It is a top view of the electrode. As shown in FIG. 1, the method of manufacturing a semiconductor product according to the present embodiment mounts a semiconductor device 2 using a laser beam on a circuit board 1 having translucency and having a metal wiring pattern formed on the surface thereof. It is a method to do.
[0018]
The circuit board 1 is made of a light transmissive material such as soda lime glass, non-alkali glass, quartz glass, or an organic material having high light transmittance as a base material. A wiring pattern made of a conductive film having a thickness of several μm or less is formed on the surface of the base material, and a plurality of terminal portions 3 whose surfaces are exposed are formed in the wiring pattern. The terminal portions 3 are arranged linearly on the surface of the base material.
[0019]
As a material for the terminal portion 3 and the wiring pattern, for example, a conductive material such as ITO or IZO can be used in addition to a metal such as gold, silver, or copper.
[0020]
As shown in FIG. 2, a plurality of circular holes 4 are formed through the terminal portion 3. The center of each hole 4 is arranged linearly. Further, the centers of the hole portions 4 of the other terminal portions 3 are also arranged on the same straight line. In addition, when the beam diameter is larger than the diameter of the hole part 4, it does not necessarily have to be arranged on a straight line.
[0021]
The hole 4 can be formed at the same time as the wiring pattern is formed, and the surface of the substrate is exposed inside. Since the wiring pattern and the hole 4 are formed by etching, the surface thereof is formed smoothly and the light transmittance is improved.
[0022]
As shown in FIG. 1, the semiconductor device 2 has protruding electrodes 5 (bumps) formed on the IC surface. The electrode 5 has a rigidity that can be deformed by pressurization. The electrode 5 and the terminal part 3 are preferably formed of the same material.
[0023]
The circuit board 1 is placed on a thick flat plate stage 6. The stage 6 is formed of a material having rigidity such as quartz glass, and the surface is formed smoothly. Further, the stage 6 preferably has a light-transmitting property, but when formed of a material that does not have a light-transmitting property, a through hole can be formed at a position overlapping the electrode 5 and used.
[0024]
The tool 7 that pressurizes the semiconductor device 2 is formed of a material having rigidity such as stainless steel. The tool 7 has a function of adjusting its lower surface parallel to the upper surface of the stage 6. With this configuration, the upper surface of the semiconductor device 2 can be arranged parallel to the circuit board 1 to press the semiconductor device 2, and the plurality of electrodes 5 can be pressed to the terminal portion 3 with substantially the same pressure.
[0025]
The laser device 8 uses, for example, an excimer laser. The excimer laser is a laser with a narrow pulse width that generates ultraviolet rays. The advantage of the excimer laser is that fine processing is possible and the processing depth can be easily adjusted.
[0026]
It is also possible to use a YAG laser as the laser device. A YAG laser is a laser that generates infrared rays and can obtain a high peak output. Other light sources may be used as long as the electrode 5 and the terminal portion 3 can be welded through the substrate 1.
[0027]
Next, a procedure for mounting the semiconductor device 2 will be described.
[0028]
(Preparation process)
FIG. 3 is an explanatory diagram showing an example of a preparation process.
[0029]
As shown to (A) and (A '), the base material 10 is formed with the glass material.
[0030]
When forming the circuit board 1, first, as shown in (B) and (B ′), a resist film 11 is formed on the surface of the base material 10.
[0031]
Next, as shown in (C) and (C ′), the resist film 11 is covered with the mask member 12, and exposure is performed by irradiating light from above the mask member 12. The mask member 12 is formed with holes corresponding to the wiring pattern, and a soluble latent image is formed on the resist film 11.
[0032]
Next, etching is performed as shown in (D) and (D ′) to dissolve and remove the soluble portion formed in the resist film 11.
[0033]
Subsequently, as shown in (E) and (E ′), Au is deposited on the surface by vapor deposition or sputtering. The Au thin film 13 is thinly formed on the surface of the resist film 11 and the surface of the substrate 10.
[0034]
Then, by removing the resist film 11 as shown in (F) and (F ′), the circuit board 1 in which the wiring pattern of the Au thin film 13 is formed on the base material 10 is formed.
[0035]
(Pressing process)
As shown in FIG. 1, the circuit board 1 is placed at a predetermined position on the stage 6 using an automatic machine.
[0036]
Next, similarly, the semiconductor device 2 is mounted on the circuit board 1 using an automatic machine. At this time, the semiconductor device 2 may be temporarily fixed with an adhesive. The electrode 5 of the semiconductor device 2 is directly placed on the terminal portion 3 of the circuit board 1 with the horizontal position aligned.
[0037]
Next, the tool 7 waiting above the stage 6 is lowered to press the semiconductor device 2 downward. By pressing, the electrode 5 is slightly deformed and is in close contact with the terminal portion 3.
[0038]
(Welding process)
FIG. 4 is an explanatory diagram of the welding process. As shown in FIG. 4, the laser device 8 is fixedly disposed below the stage 6. Further, the focal point of the laser light emitted from the laser device 8 is set in accordance with the interface between the terminal portion 3 and the electrode 5.
[0039]
The stage 6 and the tool 7 move laterally along the arrangement direction of the electrodes 5 while holding the semiconductor device 2 and the circuit board 1 in a pressurized state. At this time, the laser device 8 continuously emits laser light.
[0040]
When the laser device 8 passes under the hole 4, the laser light passes through the stage 6, the circuit board 1, and the hole 4 of the terminal 3 to heat the surface of the electrode 5. The heat is transmitted from the surface of the electrode 5 to the surface of the terminal portion 3, and the electrode 5 and the terminal portion 3 are melted and fixed.
[0041]
The laser light is applied to the interface between the terminal portion 3 and the base material of the circuit board 1 while moving from the hole portion 4 to the adjacent hole portion 4. Further, when moving between adjacent terminal portions 3, the surface of the IC of the semiconductor device 2 is irradiated.
[0042]
The laser beam is focused on the surface of the electrode 5. Therefore, when the laser light irradiates the interface between the terminal portion 3 and the substrate or the surface of the IC, the light is irradiated over a wide range and the energy is dispersed, so the temperature rise is small. Further, by providing a mask that does not transmit light other than the electrode portion on the stage portion, these effects can be prevented.
[0043]
Thus, since welding can be performed by continuously irradiating laser light, the welding time can be shortened. Further, it is not necessary to provide the manufacturing apparatus with a complicated mechanism for sending the product with the position adjusted. In addition, by controlling the timing of irradiating the laser beam, it is possible to irradiate only the electrode portion with the laser beam to further ensure electrical connection.
[0044]
(Coating process)
FIG. 5 is an explanatory diagram of the covering step. As shown in FIG. 5, after the terminal portion 3 and the electrode 5 are welded, an underfill material 9 is applied and cured in the gap between the package of the semiconductor device 2 and the circuit board 1.
[0045]
By applying the underfill material 9, the adhesion between the semiconductor device 2 and the circuit board 1 can be strengthened and the moisture resistance can be improved.
[0046]
In this way, the semiconductor device 2 can be mounted.
[0047]
Before performing the welding process, it is possible to temporarily fix the semiconductor device 2 to the circuit board with an underfill material 9 or an adhesive, and then perform welding while removing the adhesive layer of the welded portion with a laser beam. is there.
[0048]
FIG. 6 is an explanatory diagram of another welding process.
[0049]
When welding is performed, the stage 6 and the tool 7 are fixed so as not to move laterally, and the laser light is moved laterally. The lateral movement of the laser beam can be realized, for example, by moving the laser device or rotating the laser device. Even if comprised in this way, a laser beam can be sequentially passed in the hole 4, and the electrode 5 and the terminal part 3 can be welded.
[0050]
It is possible to omit the hole 4 of the terminal portion 3. In this case, the laser beam is focused on the terminal portion 3, heat is transmitted from the terminal portion 3 to the electrode 5, and the terminal portion 3 and the electrode 5 are welded.
[0051]
Further, when the terminal portions and the electrodes are formed in a plurality of rows, if a plurality of laser devices are arranged in accordance with the rows, the manufacturing can be performed only by moving the terminal portions and the electrodes once in one direction.
[0052]
【The invention's effect】
As described above, according to the present invention, the electrode of the semiconductor device is directly placed on the terminal portion of the wiring pattern and pressed, and the laser beam is applied from the back surface of the substrate to the joint portion of the terminal portion and the electrode while being pressed. The terminal part and the electrode are welded to each other, so that when the terminal part and the electrode are connected, a sufficient gap can be secured between the adjacent terminals and between the adjacent electrodes. The electrical connection can be reliably performed without using the.
[0053]
Further, when a hole is formed in the terminal portion and laser light is irradiated to the electrode through the hole portion, the electrode and the terminal portion can be melted at the same time, and the interface between the electrode and the terminal portion is welded. As a result, a highly reliable electrical connection can be obtained.
[0054]
In addition, a plurality of holes are arranged in a straight line, and the substrate is provided so as to be relatively movable along the holes with respect to the laser device that emits the laser light. When moved so as to pass through the inside, a plurality of joint portions can be sequentially welded in a state where laser light is continuously irradiated, and manufacturing can be performed in a short time.
[0055]
In addition, if the terminal part and the electrode are pressed and adhered before irradiating the laser beam, the thickness before and after welding is kept constant, and the laser beam is emitted with a gap between the terminal part and the electrode. Irradiation can be prevented, height variation can be eliminated, and welding can be performed reliably.
[Brief description of the drawings]
1A and 1B are explanatory views showing a method for manufacturing a semiconductor product according to an embodiment of the present invention. FIG. 2A is a perspective view of an electrode of a circuit board used in the method for manufacturing the semiconductor product. Plan view of electrode on substrate [FIG. 3] (A) to (F) and (A ′) to (F ′) are explanatory diagrams showing an example of a preparation process. [FIG. 4] An explanatory diagram of a welding process [FIG. Explanatory drawing of process [FIG. 6] Explanatory drawing of other welding process [Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Circuit board 2 Semiconductor device 3 Terminal part 4 Hole part 5 Electrode 6 Stage 7 Tool 8 Laser apparatus 9 Underfill material 10 Base material 11 Resist film 12 Mask member 13 Thin film

Claims (5)

透光性を有して、表面に金属配線パターンを形成した回路基板上にレーザ光を用いて半導体装置を実装し、半導体製品を製造する方法において、
前記配線パターンの端子部に前記半導体装置の電極を直接載置し、
前記回路基板の裏側から前記端子部および前記電極の接合部分にレーザ光を照射して、前記端子部と前記電極とを溶着することを特徴とする半導体製品の製造方法。In a method of manufacturing a semiconductor product by mounting a semiconductor device using a laser beam on a circuit board having translucency and having a metal wiring pattern formed on a surface thereof,
The electrode of the semiconductor device is directly placed on the terminal portion of the wiring pattern,
A method for manufacturing a semiconductor product, wherein the terminal portion and the electrode are welded by irradiating a laser beam to a joint portion between the terminal portion and the electrode from the back side of the circuit board. 前記端子部には孔部が形成され、レーザ光は、前記孔部を通過して前記電極に照射されることを特徴とする請求項１に記載の半導体製品の製造方法。2. The method of manufacturing a semiconductor product according to claim 1, wherein a hole is formed in the terminal portion, and laser light is applied to the electrode through the hole. 複数の前記孔部は直線状に配列され、前記回路基板は、レーザ光を照射するレーザ装置に対して、前記孔部に沿って相対移動可能に設けられ、前記回路基板または前記レーザ装置は、レーザ光が前記孔部の内側を通過するように移動することを特徴とする請求項１または２に記載の半導体製品の製造方法。The plurality of holes are arranged in a straight line, and the circuit board is provided so as to be relatively movable along the holes with respect to a laser device that irradiates a laser beam. 3. The method of manufacturing a semiconductor product according to claim 1, wherein the laser beam moves so as to pass through the inside of the hole. レーザ光を照射する前に、前記端子部と前記電極とを加圧して密着させることを特徴とする請求項１から３のいずれかの項に記載の半導体製品の製造方法。4. The method of manufacturing a semiconductor product according to claim 1, wherein the terminal portion and the electrode are pressed and brought into close contact with each other before irradiating the laser beam. 5. 透光性を有して、表面に金属配線パターンを形成した回路基板において、前記金属配線パターンの端子部には、孔部が形成されていることを特徴とする回路基板。A circuit board having translucency and having a metal wiring pattern formed on a surface thereof, wherein a hole is formed in a terminal part of the metal wiring pattern.
JP2003197155A 2003-07-15 2003-07-15 Method of manufacturing semiconductor product and circuit board Pending JP2005038891A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003197155A JP2005038891A (en) 2003-07-15 2003-07-15 Method of manufacturing semiconductor product and circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003197155A JP2005038891A (en) 2003-07-15 2003-07-15 Method of manufacturing semiconductor product and circuit board

Publications (1)

Publication Number Publication Date
JP2005038891A true JP2005038891A (en) 2005-02-10

Family

ID=34207394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003197155A Pending JP2005038891A (en) 2003-07-15 2003-07-15 Method of manufacturing semiconductor product and circuit board

Country Status (1)

Country Link
JP (1) JP2005038891A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303356A (en) * 2005-04-25 2006-11-02 Ricoh Microelectronics Co Ltd Packaging method of electronic component
KR100777575B1 (en) * 2006-03-20 2007-11-16 주식회사 젯텍 A Bonding Method and Apparatus for Electronic Elements Using Laser Beam
WO2014157716A1 (en) * 2013-03-29 2014-10-02 日清紡メカトロニクス株式会社 Printed wiring board and manufacturing method for mounting substrate using printed wiring board
US9171822B2 (en) 2010-05-18 2015-10-27 Corelase Oy Method of sealing and contacting substrates using laser light and electronics module
CN110911331A (en) * 2018-09-14 2020-03-24 东莞市中麒光电技术有限公司 Suction nozzle convenient for transferring and fixing LED chips and method for transferring and fixing single LED chip on backboard
CN111146093A (en) * 2020-01-06 2020-05-12 张正 Semiconductor stack packaging structure and preparation method thereof
CN111192863A (en) * 2020-01-10 2020-05-22 张正 Chip stacking and packaging structure and preparation method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303356A (en) * 2005-04-25 2006-11-02 Ricoh Microelectronics Co Ltd Packaging method of electronic component
KR100777575B1 (en) * 2006-03-20 2007-11-16 주식회사 젯텍 A Bonding Method and Apparatus for Electronic Elements Using Laser Beam
US9171822B2 (en) 2010-05-18 2015-10-27 Corelase Oy Method of sealing and contacting substrates using laser light and electronics module
WO2014157716A1 (en) * 2013-03-29 2014-10-02 日清紡メカトロニクス株式会社 Printed wiring board and manufacturing method for mounting substrate using printed wiring board
CN110911331A (en) * 2018-09-14 2020-03-24 东莞市中麒光电技术有限公司 Suction nozzle convenient for transferring and fixing LED chips and method for transferring and fixing single LED chip on backboard
CN111146093A (en) * 2020-01-06 2020-05-12 张正 Semiconductor stack packaging structure and preparation method thereof
CN111146093B (en) * 2020-01-06 2021-08-24 亿芯微半导体科技(深圳)有限公司 Semiconductor stack packaging structure and preparation method thereof
CN111192863A (en) * 2020-01-10 2020-05-22 张正 Chip stacking and packaging structure and preparation method thereof

Similar Documents

Publication Publication Date Title
KR101918106B1 (en) Apparatus and method for repairing bad elements
US20190364707A1 (en) Substrate inspection device, substrate inspection method and method of manufacturing substrate
JP2015534285A (en) Bonding bare chip dies
WO2010050209A1 (en) Method and apparatus for bonding electronic component and flexible film substrate
JPH055375B2 (en)
JPH0429338A (en) Method circuit board for mounting ic and its mounting
KR101009110B1 (en) A printed circuit board having buried solder bump and a manufacturing method of the same
JP7062703B2 (en) Laser welding equipment and methods for semiconductor devices
JP2002076055A (en) Packaging method and packaging structure of semiconductor device
JPH02155242A (en) Method and device for removing solder
JP2005038891A (en) Method of manufacturing semiconductor product and circuit board
US8030753B2 (en) Semiconductor device and method for making the same
KR20190116235A (en) Apparatus for Bonding Semiconductor Chip and Method for Bonding Semiconductor Chip
JPH08146451A (en) Apparatus for producing circuit device
JP2013041926A (en) Manufacturing method of component built-in substrate
KR101090131B1 (en) Fpcb bonding system using laser and method of bonding fpcb
WO2023190389A1 (en) Transfer device and transfer method
JPH10190210A (en) Manufacture of circuit module
JP2005129756A (en) Method of joining semiconductor element
JP2006066604A (en) Manufacturing device and mounting method for semiconductor device
JP4684843B2 (en) Bump formation method
KR102278826B1 (en) Soldering Apparatus
JPH0737890A (en) Method and apparatus for bonding solder ball
JP2011187699A (en) Semiconductor device and method of manufacturing the same
JP2011187700A (en) Manufacturing device for semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060531

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20060613

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080118

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080122

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080311

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080401

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080529

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20080624