JP2005026393A - REFLOW SOLDERING METHOD EMPLOYING Pb-FREE SOLDER ALLOY, REFLOW SOLDERING METHOD, MIXED MOUNTING METHOD AND MIXED MOUNTED STRUCTURE - Google Patents

REFLOW SOLDERING METHOD EMPLOYING Pb-FREE SOLDER ALLOY, REFLOW SOLDERING METHOD, MIXED MOUNTING METHOD AND MIXED MOUNTED STRUCTURE Download PDF

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Publication number
JP2005026393A
JP2005026393A JP2003189290A JP2003189290A JP2005026393A JP 2005026393 A JP2005026393 A JP 2005026393A JP 2003189290 A JP2003189290 A JP 2003189290A JP 2003189290 A JP2003189290 A JP 2003189290A JP 2005026393 A JP2005026393 A JP 2005026393A
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Japan
Prior art keywords
free solder
circuit board
solder
soldering
flow
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Pending
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JP2003189290A
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Japanese (ja)
Inventor
Tetsuya Nakatsuka
哲也 中塚
Nobuhide Takano
信英 高野
Sadayuki Sugawara
貞幸 菅原
Tomoyuki Omura
智之 大村
Toshio Saeki
敏男 佐伯
Koji Serizawa
弘二 芹沢
Shosaku Ishihara
昌作 石原
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Hitachi Ltd
Hitachi Communication Technologies Ltd
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Hitachi Ltd
Hitachi Communication Technologies Ltd
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Priority to JP2003189290A priority Critical patent/JP2005026393A/en
Priority to KR1020057025222A priority patent/KR100671394B1/en
Priority to PCT/JP2004/009679 priority patent/WO2005004564A1/en
Priority to US10/562,725 priority patent/US20060239855A1/en
Priority to CNA2004800186749A priority patent/CN1817071A/en
Publication of JP2005026393A publication Critical patent/JP2005026393A/en
Pending legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C13/00—Alloys based on tin
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262—Sn as the principal constituent
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3415—Surface mounted components on both sides of the substrate or combined with lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/111—Preheating, e.g. before soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3468—Applying molten solder
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mixed mounting method employing a Pb-free solder alloy in which reflow soldering of a low heat resistant electronic component, e.g. an FPGA, is realized while sustaining the reliability of solder joint strength at the time of reflow soldering. <P>SOLUTION: The mixed mounting method employing a Pb-free solder alloy comprises a step for reflow soldering a surface mounting component 2 at least onto the upper surface of a circuit board 1 using Pb-free reflow solder paste composed of an Sn-(1-4)Ag-(0-1)Cu-(7-10)In (unit: mass%) based alloy, a step for inserting the lead or terminal of an inserted mounting component 5 into a through hole made through the circuit board 1 from the upper surface side, a flux coating step, a preheating step, and a step for reflow soldering the lead or terminal of the inserted mounting component to the circuit board 1 by applying a jet stream 3 of Pb-free solder to the lower surface of the circuit board 1 preheated in the preheating process. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、毒性の少ないＰｂフリーはんだ合金を用いたリフローはんだ付け方法及び混載実装方法並びに混載実装された混載実装構造体に関するものである。
【０００２】
【従来の技術】
有機基板等の回路基板へ電子部品をはんだ付けして実装する際、毒性の少ないＰｂフリーはんだ合金を使用するという要求が生じてきている。
【０００３】
このＰｂフリーはんだを用いた実装方法に関する従来技術としては、特開平１０−１６６１７８号公報（従来技術１）、特開平１１−１７９５８６号公報（従来技術２）、特開平１１−２２１６９４号公報（従来技術３）、特開平１１−３５４９１９号公報（従来技術４）、特開２００１−１６８５１９号公報（従来技術５）および特開２００３−４６２２９号公報（従来技術６）などが知られている。
【０００４】
従来技術１には、Ｐｂフリーはんだとして、Ｓｎ−Ａｇ−Ｂｉ系はんだ、或いはＳｎ−Ａｇ−Ｂｉ−Ｃｕ系はんだ合金が記載されている。従来技術２には、Ｐｂフリーはんだとして有力なＳｎ−Ａｇ−Ｂｉ系はんだを、表面にＳｎ−Ｂｉ系層を施した電極と接続することが記載されている。従来技術３には、電子部品を、有機基板の第１面および第２面からなる両面の各々に、Ｓｎを主成分とし、Ｂｉを０〜６５質量％、Ａｇを０．５〜４．０質量％、Ｃｕ若しくは／及びＩｎを合計０〜３．０質量％含有するＰｂフリーはんだによってリフローはんだ付けすることが記載されている。従来技術４には、Ｂｉを含有するＰｂフリーはんだを用いて電子部品と回路基板とを接続する方法において、はんだを約１０〜２０℃／ｓの冷却速度で冷却することが記載されている。従来技術５には、基板のＡ面でリフローはんだ付けによって電子部品を表面接続実装し、ついで基板のＢ面でフローはんだ付けにより、Ａ面側から挿入した電子部品のリードを電極にフローはんだ付けして接続実装する方法において、Ａ面側でリフローはんだ付けに用いるはんだを、Ｓｎ−（１．５〜３．５ｗｔ％）Ａｇ−（０．２〜０．８ｗｔ％）Ｃｕ−（０〜４ｗｔ％）Ｉｎ−（０〜２ｗｔ％）Ｂｉの組成で構成されるＰｂフリーはんだであり、Ｂ面側でフローはんだ付けに用いるはんだを、Ｓｎ−（０〜３．５ｗｔ％）Ａｇ−（０．２〜０．８ｗｔ％）Ｃｕの組成で構成されるＰｂフリーはんだであることが記載されている。従来技術６には、Ｐｂフリーのはんだを用いて混載実装する方法において、回路基板の上面を冷却してフローはんだ付けすることによって表面実装部品の接続部のはんだの再溶融による表面実装部品のはがれを防止することが記載されている。さらに、従来技術６には、リフローはんだペーストのはんだ合金としてＳｎ−（１〜４）Ａｇ−（０〜８）Ｂｉ−（０〜１）Ｃｕ（単位：質量％）を用いることと、フローはんだとして共晶組成に近いＳｎ−３Ａｇ−０．５ＣｕやＳｎ−０．８Ａｇ−５７Ｂｉ（単位：質量％）を用いることが記載されている。
【０００５】
【特許文献１】
特開平１０−１６６１７８号公報
【特許文献２】
特開平１１−１７９５８６号公報
【特許文献３】
特開平１１−２２１６９４号公報
【特許文献４】
特開平１１−３５４９１９号公報
【特許文献５】
特開２００１−１６８５１９号公報
【特許文献６】
特開２００３−４６２２９号公報
【０００６】
【発明が解決しようとする課題】
ところで、最近、Ｐｂフリーのはんだを用いた混載実装方法において、部品本体の耐熱温度が２２０℃のＦＰＧＡ（フィールドプログラマブルゲートアレイ）などの低耐熱性電子部品を回路基板の表面側にリフローはんだ付けすることが必要となってきている。
【０００７】
さらに、混載実装方法においては、上記低耐熱性電子部品を回路基板の表面側にリフローはんだ付けし、回路基板の表面側から挿入した電子部品のリードにＰｂフリーのはんだを用いてフローはんだ付けする必要がある。このフローはんだ付けの際も、リフローはんだが再溶融して上記低耐熱性電子部品の剥がれを防止すると共に、はんだ接続後の信頼性を低下させないようにする必要がある。
【０００８】
しかしながら、上記従来技術１〜６には、Ｐｂフリーのはんだを用いて、これら必要な課題を満たすような混載実装方法については十分考慮されていなかった。
【０００９】
本発明の目的は、上記課題を解決すべく、ＦＰＧＡ（フィールドプログラマブルゲートアレイ）等の低耐熱性電子部品のリフローはんだ付けを実現したＰｂフリーはんだ合金を用いたリフローはんだ付け方法を提供することにある。
【００１０】
また、本発明の他の目的は、ＦＰＧＡ等の低耐熱性電子部品のリフローはんだ付けを実現し、しかもフローはんだ付けの際リフローはんだ付け部の接続強度の信頼性を維持できるようにしたＰｂフリーはんだ合金を用いた混載実装方法およびそのシステム並びに混載実装構造体を提供することにある。
【００１１】
【課題を解決するための手段】
上記目的を達成するために、本発明は、表面実装部品を回路基板の上面または下面に、Ｓｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ−（７〜１０）Ｉｎ（単位：質量％）をベースとする合金からなるＰｂフリーはんだペーストを用いてはんだ付けを行うことを特徴とするＰｂフリーはんだ合金を用いたリフローはんだ付け方法である。
【００１２】
また、本発明は、前記表面実装部品のリードには、Ｐｂフリーめっきが施されていることを特徴とする。また、本発明は、前記Ｐｂフリーめっきとして、ＳｎめっきまたはＳｎ−Ｂｉめっきであることを特徴とする。
【００１３】
また、本発明は、ＦＰＧＡ等の低耐熱性電子部品（耐熱温度２２０℃程度以下）を含む表面実装部品を回路基板の少なくとも上面にＩｎ入り低融点Ｐｂフリーはんだペーストを用いてはんだ付けを行う低温リフローはんだ付け工程と、挿入実装部品のリード若しくは端子を前記回路基板に穿設されたスルーホールに上面側から挿入する挿入工程と、該挿入工程で挿入実装部品のリード若しくは端子をスルーホールに挿入した後、前記回路基板にフラックスを塗布するフラックス塗布工程と、該フラックス塗布工程で回路基板にフラックスを塗布後、該回路基板の下面を予備加熱する予備加熱工程と、該予備加熱工程で下面を予備加熱された回路基板の上面を冷却しながら回路基板の下面に高信頼性を有するＳｎ−Ｃｕ系やＳｎ−Ａｇ系などの高融点Ｐｂフリーはんだの噴流を当て、挿入実装部品のリード若しくは端子を回路基板にフローはんだ付けを行うフローはんだ付け工程とを有することを特徴とするＰｂフリーはんだを用いた混載実装方法である。
【００１４】
特に、本発明は、前記低温リフローはんだ付け工程において、用いるＩｎ入り低融点Ｐｂフリーはんだペーストとしては、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ系、Ｓｎ−Ａｇ−Ｃｕ系またはＳｎ−Ａｇ−Ｂｉ系にＩｎを加えた系、好ましくはＳｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ−（４〜１０）Ｉｎ（単位：質量％）をベースとする合金である。
【００１５】
合金にＩｎを（４〜１０質量％）加える理由としては、ＩｎはＢｉとは異なり、はんだのベース金属となるＳｎに対して固溶度が高く、はんだ付け時の溶融した状態から室温に冷却してもはんだ内に析出しにくい。また、析出しても微細にはんだ中に分散し、Ｂｉのように、はんだの冷却時にはんだが均一に冷却されず温度勾配を持つと、高温側への偏析が起こりにくい性質があるからである。該偏析が起こると接続部の接続強度を著しく低下させるため、偏析の発生を完全に抑止する必要がある。
【００１６】
また、上記低耐熱性電子部品（耐熱温度２２０℃付近）を含む表面実装部品を、リフロー炉を用いてリフローはんだ付けする際、熱容量の大小、赤外線の反射率などが各部品によって異なるため、部品を搭載した回路基板内には温度ばらつきが生じる。また、この温度ばらつきは回路基板によっては最大１５℃にもなることがわかっている。また、上記低耐熱性電子部品（耐熱温度２２０℃）は熱容量の小さい小型のものが多く、多くの場合リフローはんだ付けする際、基板内で最高温度となる。一方、回路基板上にはんだペーストが供給される場所の中には、ＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）等のように、部品本体と回路基板との間にリフロー炉の熱風が流れ込みにくい場所があり、この場合リフローはんだ付けする際、回路基板内で最低温度となる。
【００１７】
従って、上記低耐熱性電子部品を回路基板にリフローはんだ付けする場合、リフローはんだペーストは最低で２０５℃（＝２２０−１５）付近で溶融する必要があり、これにはＳｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ系はんだに７〜１０質量％程度のＩｎ添加が必要となる。
【００１８】
以上説明した理由により、リフローはんだペーストとしては、上記低耐熱性電子部品のリフローはんだ付けを実現し、偏析の発生を完全に抑止して接続部の接続強度を著しく低下させるのを防止するために、Ｓｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ−（７〜１０）Ｉｎ（単位：質量％）をベースとする合金となる。
【００１９】
さらに、本発明は、前記フローはんだ付け工程において、Ｐｂフリーはんだペーストとしては、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ系、Ｓｎ−Ａｇ−Ｃｕ系、Ｓｎ−Ａｇ−Ｂｉ系またはこれらにＩｎを加えた系等の共晶組成または該共晶組成に近い組成である。特に、Ｓｎ−３Ａｇ−０．５Ｃｕ−ｘＩｎ（０≦ｘ≦９，単位；質量％）は、Ｓｎ−Ａｇ−Ｃｕ系共晶組成または共晶組成に近い組成であり、しかも従来のＳｎ−３７Ｐｂの融点１８３℃よりも高融点であり、極限条件でも接続の高信頼性を有して使用可能である。また、Ｓｎ−０．８Ａｇ−５７Ｂｉは、共晶組成または共晶組成に近い組成であり、使用温度が限定されて使用される場合には、接続の高信頼性を有して使用可能である。
【００２０】
そして、前記フローはんだ付け工程において、回路基板の下面に当てるＰｂフリーはんだの噴流の温度が１７０℃〜２６０℃の範囲内であることを必要とする。これははんだが基板電極に対して十分に濡れる温度であるからである。
【００２１】
また、表面実装部品の電極における従来のめっきに含まれるＰｂは、リフローはんだ付け後の接続部のはんだ組成（共晶組成）から大きく逸脱した別の低温共晶組成を作り出す成分が多量に含まれており、フローはんだ付け時の溶融はんだ（１７０℃〜２６０℃）の熱影響により、リフロー接続部のはんだ再溶融する際、この低温共晶組成が優先的に溶融し、この組成が高温部分に濃縮しやすくなるため、上記偏析の発生を促進する。
【００２２】
従って、表面実装部品の電極のめっきもＰｂフリーの組成とすることが望ましく、組成としては、純Ｓｎ（融点２３２℃）などの表面実装に使用するはんだ合金の構成元素とするのが良い。また、ウィスカー（ひげ結晶）の発生が著しい部品に対しては、Ｓｎに微量のＢｉを添加したものを使用するのが良いとされている。
【００２３】
また、本発明は、前記フローはんだ付け工程において、上記Ｉｎ入り低融点リフローはんだが再溶融して上記低耐熱性電子部品の剥がれを防止するために、回路基板の上面に対して５０℃以下（２０℃〜５０℃の範囲）の窒素等の流体を流量として概ね０．３〜１．２ｍ３／分（好ましくは概ね０．５〜１．２ｍ３／分）にして吹き付けて冷却を行う方がフローはんだの許容溶融温度範囲の上限を広げることができので好ましい。ただし、回路基板にフローはんだ付けを行う際の小径スルーホールや大熱容量挿入実装部品が挿入されるスルーホールへのはんだ揚がりを抑制し、はんだ凝固後に十分な接続強度が得られない場合があるから、上記流量（１．２ｍ３／分）を大幅に超えて使用しないことが望ましい。
【００２４】
また、本発明は、前記フローはんだ付け工程において、回路基板の上面に対して５０℃以下（２０℃〜５０℃の範囲）の窒素等の流体を吹き付けて冷却しながら、表面実装電子部品のリードに放熱用の治具を接触させることによって、フローはんだの許容溶融温度範囲の上限を広げることができる。
【００２５】
【発明の実施の形態】
本発明の実施の形態について、図面を用いて詳細に説明する。
【００２６】
本発明は、図１に示すように、ＦＰＧＡ（フィールドプログラマブルゲートアレイ）などの低耐熱性電子部品（耐熱温度２２０℃程度以下）を含む表面実装部品２、４ａを有機基板等の回路基板１の上面１０１にＩｎ入り低融点Ｐｂフリーはんだペースト１１を用いてはんだ付けを行い、その後、回路基板１の上面側よりスルーホールなどに、挿入実装部品５のリード１２を挿入し、その後、回路基板１にフラックスを塗布し、その後、回路基板１の下面１０２からＰｂフリーの溶融はんだ噴流３によってフローはんだ付けして混載実装することにある。フローはんだ付けする際、回路基板１へのはんだ付け時間を短縮するために、まず回路基板１の下面１０２をシーズヒーターなどの予備加熱装置２２で予備加熱を行う。その後、回路基板１の下面１０２からＰｂフリーの溶融はんだ噴流３によってフローはんだ付けを行い、はんだ付け直後に回路基板１の両面を冷却するものである。
【００２７】
このように、回路基板１の上面１０１に実装されるＦＰＧＡなどの低耐熱性電子部品２は一般的に他の表面実装電子部品と比較して熱容量が小さく、温度が上昇し易い場合が多い。
【００２８】
このことから、一般的なリフロー炉では、リフローはんだ付け時に上記低耐熱性電子部品２の部品本体が基板内最高温度部となる場合が多くなる。また、リフローはんだ付け時に、はんだペースト供給部に熱風が当たるのを部品本体が抑制しやすい構造をもつＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）等の場合、上記はんだペースト供給部が基板内最低温度部となる場合が多くなる。いずれにしても、ＦＰＧＡなどの低耐熱性電子部品２としては、ＱＦＰ−ＬＳＩで構成される場合が多く、ＢＧＡ−ＬＳＩで構成される場合もある。
【００２９】
従って、上記低耐熱性電子部品２の部品本体とはんだペースト供給部１１との間の温度差が回路基板内１の温度ばらつきとなり、一般的なリフロー炉では最大１５℃程度となる。このため、上記低耐熱性電子部品２の部品本体を２２０℃以下とするならば、必然的にはんだペースト供給部１１は２０５℃以下となり、２０５℃でも溶融するＰｂフリーのリフローはんだペーストが必要となる。
【００３０】
そこで、Ｉｎ入り低融点Ｐｂフリーはんだペースト１１としては、２０５℃でも溶融するＳｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ−（７〜１０）Ｉｎ（単位：質量％）をベースとする合金材料にしたことにある。
【００３１】
さらに、上記低耐熱性電子部品２がＢＧＡで構成されている場合には、リフローはんだペーストはもとより、はんだボールも同じ組成にすることが望ましいことになる。
【００３２】
また、フローはんだ噴流３のＰｂフリーの材料としては、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ系、Ｓｎ−Ａｇ−Ｃｕ系、Ｓｎ−Ａｇ−Ｂｉ系またはこれらにＩｎを加えた系等の共晶組成または該共晶組成に近い組成である。特に、Ｓｎ−３Ａｇ−０．５Ｃｕ−ｘＩｎ（０≦ｘ≦９，単位：質量％）は、Ｓｎ−Ａｇ−Ｃｕ系共晶組成または共晶組成に近い組成であり、しかも従来のＳｎ−３７Ｐｂの融点１８３℃よりも高融点であり、極限条件でも接続の高信頼性を有して使用可能である。また、Ｓｎ−０．８Ａｇ−５７Ｂｉは、共晶組成または共晶組成に近い組成であり、使用温度が限定されて使用される場合には、接続の高信頼性を有して使用可能である。
【００３３】
そして、前記フローはんだ付け工程において、回路基板の下面に当てるＰｂフリーはんだの噴流の温度が１７０℃〜２６０℃の範囲内であることを必要とする。これははんだが基板電極に対して十分に濡れる温度であるからである。
【００３４】
また、上記フラックス塗布工程前に、必要に応じて回路基板１にＡｌ等の金属製の反り防止治具を取り付けてもよい。また、回路基板１の下面に表面実装部品がリフローはんだ付けによって実装されている場合には、この部分にカバー（図示せず）を取り付けてフローはんだが付かないようにすることも可能である。
【００３５】
また、フローはんだ付けする際、図２に示すように、回路基板１の上面１０２を基板冷却装置６で５０℃以下（２０℃〜５０℃の範囲）の窒素等の流体を概ね０．３〜１．２ｍ３／分（好ましくは０．５〜１．２ｍ３／分）の流量で吹き付けて冷却すれば、フローはんだの許容溶融温度範囲の上限を広げることが可能となる。さらに、表面実装電子部品２のリード等に図３に示すように、アルミ等の金属の放熱治具を接触させれば、フローはんだの許容溶融温度範囲の上限をさらに広げることが可能となる。
【００３６】
このように、回路基板１の上面１０１を基板冷却装置６で冷却した状態で、フローはんだ付けをすることによって、フローはんだの溶融温度範囲の上限を広げたとしても、表面実装部品２、４の接続部においてＩｎ入り低融点Ｐｂフリーはんだペースト１１の再溶融によって剥がれが生じるのを防止することが可能となる。
【００３７】
［第１の実施例］
第１の実施例は、回路基板１として、一般的に幅広く使用されている厚さが１．６ｍｍ程度、縦が３５０ｍｍ程度、横が３５０ｍｍ程度、基板面銅箔厚さが１８μｍ程度であり、１ｍｍ程度の内径、１．６ｍｍ程度のＣｕパッド径、０．７個／ｃｍ２程度の密度で形成されたスルーホールを有するガラスエポキシ基板１ａを用いた。
【００３８】
表面実装部品２としては、リードピッチ０．５ｍｍ程度、リード幅０．２ｍｍ程度、Ｓｎ−１０ｍａｓｓ％Ｐｂめっきを施された２０８本の４２アロイ製リードを持った３２ｍｍ角ＱＦＰ−ＬＳＩ２ａを用いた。
【００３９】
そして、ガラスエポキシ基板１ａの上面に、３２ｍｍ角ＱＦＰ−ＬＳＩ２ａを、Ｓｎ−３Ａｇ−０．５Ｃｕ−ｘＩｎ（０≦ｘ≦９，単位：質量％）の１０種類のＩｎ含有はんだペースト（次の表１に詳細を示す）１１によりリフローはんだ付けを行った。
【００４０】
【表１】

Figure 2005026393
【００４１】
この表１から明らかなように、Ｉｎが７質量％になると固相線温度が１９８℃となり、液相線温度が２１１℃となり、２０５℃付近で溶融することになる。従って、Ｉｎが７質量％以上含有するようにすれば、ＦＰＧＡなどの低耐熱性電子部品（耐熱温度２２０℃程度以下）２を回路基板１の表面側にリフローはんだ付けすることが可能となる。
【００４２】
しかし、Ｉｎが１０質量％を越えて含有すると、はんだの冷却時に偏析が起こり、接続部の接続強度を著しく低下させることになるため、Ｉｎの含有量を１０質量％以下にする必要がある。
【００４３】
次に、この基板サンプルのＱＦＰ−ＬＳＩ２ａが４個接続されている方の回路基板１の上面側より、基板のスルーホール（図示せず）に、Ｓｎ−１０ｍａｓｓ％Ｐｂめっきを施された０．５ｍｍ角の端子（リード）１１ａを持つ２．５４ｍｍピッチ６端子コネクタ５ａを６個挿入した。
【００４４】
次に、回路基板１の下面１０２について最高出力９ｋＷのシーズヒーターを使用した予備加熱を行い、１分で２５℃（常温）の回路基板１ａの下面１０２の温度を、最高部１１８℃、最低部１００℃にした。その後、回路基板１の上面１０１を基板冷却装置６で冷却しない状態で、共晶組成に近いＳｎ−３Ａｇ−０．５Ｃｕ（単位：質量％）やＳｎ−０．８Ａｇ−５７Ｂｉ（単位：質量％）のはんだの噴流３ａを基板１ａの下面１０２に当てて、図１に示すように基板冷却装置６による冷却をせずに、６端子コネクタ５ａのはんだ付けを行い基板サンプルを作製したものである。但し、この際、フローはんだ槽（図示せず）の溶融はんだをＳｎ−０．８Ａｇ−５７Ｂｉ、Ｓｎ−０．７ＣｕあるいはＳｎ−３Ａｇ−０．５Ｃｕとし、その温度が１７０〜２６０℃となるようにフローはんだ槽の温度を数条件に固定した。
【００４５】
以上説明したサンプルにおいて、ＱＦＰ−ＬＳＩ２ａの接続部に破断がおきているかを観察した。
【００４６】
図４は、リフローはんだ材料組成が本発明に係るＳｎ−３Ａｇ−０．５Ｃｕ−ｘＩｎ（０≦ｘ≦９，単位：質量％）の１０種類のＩｎ含有はんだペーストの場合の実験結果を示す。図１１には、リフローはんだ材料組成が比較例としてのＳｎ−３Ａｇ−０．５Ｃｕ−ｘＢｉ（０≦ｘ≦８，単位：質量％）の９種類のＢｉ含有はんだペースト場合の実験結果を示す。
【００４７】
各図とも、横軸にフローはんだ槽の溶融はんだの温度を、縦軸にＱＦＰ−ＬＳＩの接続に使用したはんだのＢｉ、Ｉｎ含有量をとり、破断が起きなかった条件を○印で、破断が起きた条件を×印で示した。
【００４８】
また、各図の中の実線は、破断が起きる条件と起きない条件の境界と考えられる線である。なお、図４の本発明に係る実験結果を図１１の比較例の実験結果と比較するために、図４の中に図１１の境界を点線で示した。
【００４９】
図４に示す如く、基板１ａの上面１０１を冷却しない実験結果でも、ＱＦＰ−ＬＳＩ２ａの接続に使用したはんだペースト１１を本発明に係るＳｎ−３Ａｇ−０．５Ｃｕ−ｘＩｎとしたことにより、Ｓｎ−３Ａｇ−０．５Ｃｕ−ｘＢｉとした比較例に比べて、フローはんだ付け時の接続部の破断が起きにくく、溶融はんだの許容温度範囲を広くできることがわかった。
【００５０】
即ち、表面実装用リフローはんだ組成として本発明のようにＳｎ−Ａｇ−Ｃｕ系にＩｎを添加することにより、フローはんだ付け時の表面実装部品の偏析剥離が抑制できることが実験によって確認することができた。
【００５１】
さらに、図４に示す実験結果によれば、Ｉｎの含有量が７質量％の場合フロー溶融はんだの温度を２３５℃まで、Ｉｎの含有量が８〜９質量％の場合フロー溶融はんだの温度を２３０℃までにすることができることが確認できた。
【００５２】
［第２の実施例］
第２の実施例において、第１の実施例と相違する点は、フローはんだ付けの際、図２に示すように、回路基板１の上面１０１を基板冷却装置６で２０℃〜５０℃程度の窒素等の流体を概ね０．５ｍ３／分の流量で吹き付けて冷却した点である。図５には、横軸にフローはんだ槽の溶融はんだの温度を、縦軸にＱＦＰ−ＬＳＩの接続に使用したはんだのＩｎ含有量をとり、破断が起きなかった条件を○印で、破断が起きた条件を×印で示した。また、図５の中の実線は、破断が起きる条件と起きない条件の境界と考えられる線である。
【００５３】
第２の実施例の実験結果によれば、図５に示すように、フロー溶融はんだの温度の上限が図４に示す第１の実施例に比べて１０℃弱上昇させてもよいことが確認できた。さらに、図５に示す実験結果によれば、Ｉｎの含有量が７質量％の場合フロー溶融はんだの温度を２４５℃まで、Ｉｎの含有量が８質量％の場合フロー溶融はんだの温度を２４０℃まで、Ｉｎの含有量が９質量％の場合フロー溶融はんだの温度を２３５℃までにすることができることが確認できた。
【００５４】
［第３の実施例］
第３の実施例は、第２の実施例において、図２に示すように、回路基板１の上面１０１を基板冷却装置６で２０℃〜５０℃程度の窒素等の流体を概ね１．２ｍ３／分の流量で吹き付けて冷却したものである。図６には、横軸にフローはんだ槽の溶融はんだの温度を、縦軸にＱＦＰ−ＬＳＩの接続に使用したはんだのＩｎ含有量をとり、破断が起きなかった条件を○印で、破断が起きた条件を×印で示した。また、図６の中の実線は、破断が起きる条件と起きない条件の境界と考えられる線である。
【００５５】
第３の実施例の実験結果によれば、図６に示すように、フローはんだの許容溶融温度の上限が図４に示す第１の実施例に比べて１５℃程度上昇させてもよいことが確認できた。さらに、図６に示す実験結果によれば、Ｉｎの含有量が７質量％の場合フローはんだの許容溶融温度を２５０℃まで、Ｉｎの含有量が８質量％の場合フローはんだの許容溶融温度を２４５℃まで、Ｉｎの含有量が９質量％の場合フローはんだの許容溶融温度を２４０℃までにすることができることが確認できた。
【００５６】
以上の結果により、窒素等の流体の吹き付け量を１．２ｍ３／分程度まで増加させると、表面実装部品用リフローはんだにＩｎ量を７〜９％程度添加しても、２４０〜２５０℃のＳｎ−Ａｇ−Ｃｕ溶融はんだ等を用いてフローはんだ付けを行うことが可能となる。
【００５７】
［第４の実施例］
第４の実施例は、第２および第３の実施例と同様に、フローはんだ付けを行う際、基板冷却装置６を作動させた状態で、さらにリフローはんだ付けされた表面実装部品（３２ｍｍ角ＱＦＰ−ＬＳＩ）２の接続部にアルミ等の金属製の正方形の枠の形状をした放熱治具７を搭載して表面実装部品２のリードに放熱治具７を接触させることにより回路基板１の上面１０１を冷却し、フローはんだ付け時の表面実装部品の偏析剥離の抑制効果を向上させたものである。なお、この際、フロー溶融はんだをＳｎ−０．７ＣｕあるいはＳｎ−３Ａｇ−０．５Ｃｕとし、その温度が２５０〜２８０℃となるようにフローはんだ槽の温度を数条件に固定した。
【００５８】
図７には、横軸にフローはんだ槽の溶融はんだの温度を、縦軸にＱＦＰ−ＬＳＩの接続に使用したはんだのＩｎ含有量をとり、破断が起きなかった条件を○印で、破断が起きた条件を×印で示した。また、図７の中の実線は、破断が起きる条件と起きない条件の境界と考えられる線である。
【００５９】
第４の実施例の実験結果によれば、図７に示すように、フローはんだの許容溶融温度の上限が図４に示す第１の実施例に比べて２０℃程度上昇させてもよいことが確認できた。さらに、図７に示す実験結果によれば、Ｉｎの含有量が７質量％の場合フローはんだの許容溶融温度を２６０℃まで、Ｉｎの含有量が８〜９質量％の場合フローはんだの許容溶融温度を２５０℃までにすることができることが確認できた。
【００６０】
以上の結果により、窒素吹き付け量を１．２ｍ３／分程度にて基板上面冷却を行い、放熱治具を使用すれば、表面実装部品用リフローはんだにＩｎ量を９％程度添加しても、２５０℃のＳｎ−Ａｇ−Ｃｕ溶融はんだ等を用いてフローはんだ付けを行うことが可能となる。要するに、第４の実施例によれば、２５０℃のＳｎ−Ａｇ−Ｃｕ溶融はんだ等を用いてフローはんだ付けを行う場合において、表面実装部品用はんだに添加できるＩｎ量は９％程度まで増加させることが可能となり、低耐熱性電子部品に十分対応させることが容易となる。
【００６１】
［第５の実施例］
第５の実施例は、第１の実施例において、リフローはんだ付けされる表面実装部品のリードめっきをＰｂフリー化することにより、フローはんだ付け時の表面実装部品の偏析剥離の抑制効果を向上させたものである。
【００６２】
但し、この際、フローはんだ槽（図示せず）の溶融はんだを共晶組成に近いＳｎ−０．８Ａｇ−５７Ｂｉ、Ｓｎ−０．７ＣｕあるいはＳｎ−３Ａｇ−０．５Ｃｕ（単位：質量％）とし、その温度が２３５〜２８０℃となるようにフローはんだ槽の温度を数条件に固定した。
【００６３】
以上説明した各サンプルにおいて、ＱＦＰ−ＬＳＩ２ａの接続部に破断がおきているかを観察した。
【００６４】
図８、図９に第５の実施例であるそれぞれＳｎ−３質量％Ｂｉめっき、Ｓｎめっきの場合の実験結果を示す。これら図８、図９は、横軸にフローはんだ槽の溶融はんだの温度を、縦軸にＱＦＰ−ＬＳＩの接続に使用したはんだのＩｎ含有量をとり、破断が起きなかった条件を○印で、破断が起きた条件を×印で示した。また、各図の中の実線は、破断が起きる条件と起きない条件の境界と考えられる線である。
【００６５】
なお、図４（Ｓｎ−１０Ｐｂめっきを使用したもの）の実験結果と比較するために、図８の中に図４の境界を点線で示した。さらに、図８（Ｓｎ−３Ｂｉめっきを使用したもの）の実験結果と比較するために、図９の中に図８の境界を点線で示した。
【００６６】
これらの結果により、Ｓｎ−３Ｂｉめっきを使用した場合（図８）、２５０℃のＳｎ−Ａｇ−Ｃｕ溶融はんだ等でフローはんだ付けを行う場合、表面実装部品用はんだに添加できるＩｎ量は８％程度であることがわかる。さらに、Ｓｎめっきを使用した場合（図９）、２５０℃のＳｎ−Ａｇ−Ｃｕ溶融はんだ等でフローはんだ付けを行う場合、表面実装部品用はんだに添加できるＩｎ量は９％程度であることがわかる。しかしながら、２６０℃のＳｎ−Ａｇ−Ｃｕ溶融はんだ等でフローはんだ付けを行う場合には、表面実装部品用はんだに添加できるＩｎ量は５％程度になってしまう。
【００６７】
以上説明したように、表面実装部品のリードめっきをＰｂフリー化する第５の実施例によれば、第１の実施例と同様に、基板冷却装置６で冷却することなく、リフローはんだに添加できるＩｎ量を８〜９％程度にすることができ、低耐熱性電子部品に十分対応させることが容易となる。
【００６８】
［第６の実施例］
第６の実施例は、第４の実施例において、リフローはんだ付けされる表面実装部品のリードめっきをＰｂフリー化することにより、フローはんだ付け時の表面実装部品の偏析剥離の抑制効果を向上させたものである。
【００６９】
但し、この際、フローはんだ槽（図示せず）の溶融はんだを共晶組成に近いＳｎ−０．７Ｃｕ（単位：質量％）やＳｎ−３Ａｇ−０．５Ｃｕ（単位：質量％）とし、その温度が２５０〜２８０℃となるようにフローはんだ槽の温度を数条件に固定した。
【００７０】
以上説明した各サンプルにおいて、ＱＦＰ−ＬＳＩ２ａの接続部に破断がおきているかを観察した。
【００７１】
図１０に第６の実施例の実験結果を示す。この図１０は、横軸にフローはんだ槽の溶融はんだの温度を、縦軸にＱＦＰ−ＬＳＩの接続に使用したはんだのＩｎ含有量をとり、破断が起きなかった条件を○印で、破断が起きた条件を×印で示した。また、図１０の中の実線は、破断が起きる条件と起きない条件の境界と考えられる線である。なお、図９（Ｓｎめっきを使用し、基板上面冷却も放熱治具も使用しないもの）の実験結果と比較するために、図１０の中に図９の境界を点線で示した。
【００７２】
図１０に示すように、第６の実施例によれば、２５０℃、２６０℃の両方の温度のＳｎ−Ａｇ−Ｃｕ溶融はんだ等でフローはんだ付けを行う場合においても、表面実装部品用はんだに添加できるＩｎ量は９％程度にすることが可能となり、その結果、低耐熱性電子部品に十分対応することが可能となる。
【００７３】
【発明の効果】
本発明によれば、ＦＰＧＡ等の低耐熱性電子部品の回路基板へのリフローはんだ付けをＰｂフリーはんだ合金を用いて実現できる効果を奏する。
【００７４】
また、本発明によれば、ＦＰＧＡ等の低耐熱性電子部品を含む表面実装部品の回路基板へのリフローはんだ付けと挿入実装部品等についての回路基板へのフローはんだ付けとをＰｂフリーはんだ合金を用いて行なってＰｂフリー化に伴い発生するはんだ付け欠陥を防止し、しかも高信頼性を維持した混載実装を実現できる効果を奏する。
【００７５】
また、本発明によれば、Ｐｂフリーはんだ合金を用いたＦＰＧＡ等の低耐熱性電子部品を含む表面実装部品および挿入実装部品等の混載実装において、フローはんだ付けの際、溶融はんだの噴流の温度許容範囲を高温度側に拡張することができるので温度のコントロールがしやすくなる効果を奏する。
【図面の簡単な説明】
【図１】本発明に係るＰｂフリーはんだを用いた混載実装方法の第１の実施例を説明するための図である。
【図２】本発明に係るＰｂフリーはんだを用いた混載実装方法の第２及び第３の実施例を説明するための図である。
【図３】本発明に係る第４の実施例であるＱＦＰに放熱治具を取付ける（搭載する）状態を示す図である。
【図４】本発明に係る第１の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図５】本発明に係る第２の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図６】本発明に係る第３の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図７】本発明に係る第４の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図８】本発明に係る第５の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図９】本発明に係る第６の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図１０】本発明に係る第７の実施例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【図１１】比較例におけるＱＦＰ−ＬＳＩ接続部破断条件を示した図である。
【符号の説明】
１…回路基板（ガラスエポキシ基板）、２…ＦＰＧＡ等の低耐熱性電子部品を含む表面実装部品、３…溶融はんだ噴流、４、４ａ、４ｂ…表面実装部品（チップ部品）、５…挿入実装部品（６端子コネクタ）、６…基板冷却装置、７…放熱治具。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a reflow soldering method and a mixed mounting method using a less toxic Pb-free solder alloy, and a mixed mounting structure in which the mounting is performed in a mixed manner.
[0002]
[Prior art]
When soldering and mounting an electronic component on a circuit board such as an organic substrate, a demand has arisen to use a Pb-free solder alloy with low toxicity.
[0003]
As conventional techniques relating to the mounting method using Pb-free solder, Japanese Patent Application Laid-Open No. 10-166178 (Conventional Technology 1), Japanese Patent Application Laid-Open No. 11-179586 (Conventional Technology 2), Japanese Patent Application Laid-Open No. 11-221694 (Conventional Technology). Technology 3), JP-A-11-354919 (conventional technology 4), JP-A-2001-168519 (conventional technology 5), JP-A-2003-46229 (conventional technology 6), and the like are known.
[0004]
Prior art 1 describes Sn—Ag—Bi solder or Sn—Ag—Bi—Cu solder alloy as Pb-free solder. Prior art 2 describes connecting Sn-Ag-Bi solder, which is effective as Pb-free solder, to an electrode having a Sn-Bi layer on its surface. In Prior Art 3, the electronic component is composed of Sn as a main component on each of the first and second surfaces of the organic substrate, Bi is 0 to 65 mass%, and Ag is 0.5 to 4.0. It is described that reflow soldering is performed with Pb-free solder containing 0 to 3.0% by mass of Cu, and / or In by mass%. Prior art 4 describes that in a method of connecting an electronic component and a circuit board using Pb-free solder containing Bi, the solder is cooled at a cooling rate of about 10 to 20 ° C./s. In the prior art 5, electronic parts are surface-mounted by reflow soldering on the A side of the board, and then the solder of the electronic parts inserted from the A side is flow soldered to the electrodes by flow soldering on the B side of the board. In the connection mounting method, the solder used for reflow soldering on the A side is Sn- (1.5 to 3.5 wt%) Ag- (0.2 to 0.8 wt%) Cu- (0 to 4 wt. %) In- (0 to 2 wt%) Bi, which is a Pb-free solder having a composition of Sn- (0 to 3.5 wt%) Ag- (0. 2 to 0.8 wt%) Pb-free solder composed of Cu. In prior art 6, in the method of mounting by mounting using Pb-free solder, the upper surface of the circuit board is cooled and flow soldered to peel off the surface mounted component by remelting the solder at the connection portion of the surface mounted component. It is described to prevent. Furthermore, in prior art 6, Sn- (1-4) Ag- (0-8) Bi- (0-1) Cu (unit: mass%) is used as the solder alloy of the reflow solder paste, and flow soldering is used. It is described that Sn-3Ag-0.5Cu or Sn-0.8Ag-57Bi (unit: mass%) close to the eutectic composition is used.
[0005]
[Patent Document 1]
JP-A-10-166178
[Patent Document 2]
JP 11-179586 A
[Patent Document 3]
JP-A-11-221694
[Patent Document 4]
Japanese Patent Laid-Open No. 11-354919
[Patent Document 5]
JP 2001-168519 A
[Patent Document 6]
JP 2003-46229 A
[0006]
[Problems to be solved by the invention]
Recently, in a mixed mounting method using Pb-free solder, low heat-resistant electronic components such as FPGA (Field Programmable Gate Array) having a heat resistant temperature of 220 ° C. are reflow-soldered on the surface side of the circuit board. It has become necessary.
[0007]
Further, in the mixed mounting method, the low heat resistant electronic component is reflow soldered to the surface side of the circuit board, and the solder of the electronic component inserted from the surface side of the circuit board is flow soldered using Pb-free solder. There is a need. Also in this flow soldering, it is necessary to prevent reflow soldering from remelting to prevent the low heat resistant electronic component from peeling off and to reduce the reliability after solder connection.
[0008]
However, the above-described conventional techniques 1 to 6 do not sufficiently consider a mixed mounting method that uses Pb-free solder and satisfies these necessary problems.
[0009]
An object of the present invention is to provide a reflow soldering method using a Pb-free solder alloy that realizes reflow soldering of a low heat resistant electronic component such as an FPGA (Field Programmable Gate Array) in order to solve the above-mentioned problems. is there.
[0010]
Another object of the present invention is to realize reflow soldering of low heat resistance electronic parts such as FPGA and to maintain the reliability of the reflow soldering connection strength during flow soldering. An object is to provide a mixed mounting method and system using a solder alloy, and a mixed mounting structure.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a surface-mounted component on the upper or lower surface of a circuit board with Sn- (1-4) Ag- (0-1) Cu- (7-10) In (unit: mass). %) Is a reflow soldering method using a Pb-free solder alloy, characterized in that soldering is performed using a Pb-free solder paste made of an alloy based on the following.
[0012]
Further, the present invention is characterized in that Pb-free plating is applied to the leads of the surface mount component. Further, the present invention is characterized in that the Pb-free plating is Sn plating or Sn-Bi plating.
[0013]
Further, the present invention is a low temperature soldering surface mount component including a low heat resistance electronic component such as FPGA (heat resistance temperature of about 220 ° C. or less) using a low melting point Pb-free solder paste containing In on at least the upper surface of the circuit board. A reflow soldering process, an insertion process in which the lead or terminal of the insertion mounting component is inserted into the through hole formed in the circuit board from the upper surface side, and the lead or terminal of the insertion mounting component is inserted into the through hole in the insertion process. Then, a flux applying step for applying flux to the circuit board, a preheating step for preheating the lower surface of the circuit board after applying the flux to the circuit substrate in the flux applying step, and a lower surface in the preheating step. A highly reliable Sn-Cu type or Sn-Ag type or the like having high reliability on the lower surface of the circuit board while cooling the upper surface of the preheated circuit board Applying a melting point Pb-free solder jets, a hybrid mounting method using a Pb-free solder, characterized in that it comprises a flow soldering process in the circuit board the lead or terminal of an insertion mounting component performing flow soldering.
[0014]
In particular, according to the present invention, the low melting point Pb-free solder paste containing In used in the low-temperature reflow soldering step is Sn-Cu, Sn-Ag, Sn-Ag-Cu, or Sn-Ag-Bi. It is an alloy based on a system to which In is added, preferably Sn- (1-4) Ag- (0-1) Cu- (4-10) In (unit: mass%).
[0015]
The reason for adding In (4 to 10% by mass) to the alloy is that, unlike Bi, In is highly soluble in Sn, which is the base metal of the solder, and cooled from the molten state to the room temperature during soldering. Even so, it does not easily precipitate in the solder. Moreover, even if it precipitates, it is finely dispersed in the solder, and, like Bi, when the solder is not uniformly cooled and has a temperature gradient, segregation to the high temperature side hardly occurs. . When the segregation occurs, the connection strength of the connecting portion is remarkably lowered, so that it is necessary to completely prevent the occurrence of segregation.
[0016]
In addition, when surface mounting components including the above low heat resistance electronic components (heat resistant temperature around 220 ° C.) are reflow soldered using a reflow furnace, the size of heat capacity, infrared reflectance, etc. vary depending on each component. Variation in temperature occurs in the circuit board on which is mounted. Further, it has been found that this temperature variation can be as high as 15 ° C. depending on the circuit board. The low heat resistant electronic components (heat resistant temperature 220 ° C.) are often small and have a small heat capacity. In many cases, the temperature is the highest in the substrate when reflow soldering is performed. On the other hand, there are places where the solder paste is supplied onto the circuit board, such as BGA (Ball Grid Array), where the hot air of the reflow furnace hardly flows between the component body and the circuit board. In case of reflow soldering, the temperature becomes the lowest in the circuit board.
[0017]
Therefore, when reflow soldering the low heat resistance electronic component to a circuit board, the reflow solder paste must be melted at around 205 ° C. (= 220-15) at the minimum, which includes Sn− (1-4). About 7-10 mass% In addition is needed to Ag- (0-1) Cu type solder.
[0018]
For the reasons described above, as the reflow solder paste, in order to realize the reflow soldering of the above low heat resistance electronic components, and to completely prevent the occurrence of segregation and prevent the connection strength of the connecting portion from being significantly reduced. , Sn- (1-4) Ag- (0-1) Cu- (7-10) In (unit: mass%) based alloy.
[0019]
Furthermore, according to the present invention, in the flow soldering step, Sn-Cu-based, Sn-Ag-based, Sn-Ag-Cu-based, Sn-Ag-Bi-based, or In is added as the Pb-free solder paste. It is a eutectic composition such as a system or a composition close to the eutectic composition. In particular, Sn-3Ag-0.5Cu-xIn (0 ≦ x ≦ 9, unit: mass%) is a Sn—Ag—Cu-based eutectic composition or a composition close to the eutectic composition, and the conventional Sn-37Pb. The melting point is higher than the melting point of 183 ° C., and can be used with high connection reliability even under extreme conditions. Sn-0.8Ag-57Bi is a eutectic composition or a composition close to the eutectic composition, and can be used with high connection reliability when used at a limited operating temperature. .
[0020]
And in the said flow soldering process, the temperature of the jet stream of Pb free solder applied to the lower surface of a circuit board needs to exist in the range of 170 to 260 degreeC. This is because the solder is sufficiently wetted with respect to the substrate electrode.
[0021]
In addition, Pb contained in the conventional plating on the electrode of the surface mount component contains a large amount of a component that creates another low temperature eutectic composition greatly deviating from the solder composition (eutectic composition) of the connection part after reflow soldering. The low temperature eutectic composition is preferentially melted when the solder of the reflow joint is remelted due to the heat effect of the molten solder (170 ° C. to 260 ° C.) during flow soldering. Since it becomes easy to concentrate, generation | occurrence | production of the said segregation is accelerated | stimulated.
[0022]
Therefore, it is desirable that the electrode of the surface-mounted component also has a Pb-free composition, and the composition is preferably a constituent element of a solder alloy used for surface mounting, such as pure Sn (melting point: 232 ° C.). In addition, it is recommended to use a component in which a small amount of Bi is added to Sn for a part in which whiskers (whisker crystals) are remarkably generated.
[0023]
Further, in the flow soldering step, the present invention provides a low melting point reflow solder containing In that prevents melting of the low heat resistant electronic component to 50 ° C. or less (up to 50 ° C. ( The flow rate of a fluid such as nitrogen in the range of 20 ° C. to 50 ° C. is generally 0.3 to 1.2 m. 3 / Min (preferably approximately 0.5 to 1.2 m 3 / Min), and cooling by spraying is preferable because the upper limit of the allowable melting temperature range of the flow solder can be expanded. However, there is a case where sufficient soldering strength cannot be obtained after solder solidification by suppressing solder lifting to the small-diameter through-hole and the through-hole into which a large heat capacity insertion mounting component is inserted when performing flow soldering on the circuit board. , The above flow rate (1.2m 3 / Min) should not be used much more.
[0024]
Further, according to the present invention, in the flow soldering step, the lead of the surface mount electronic component is cooled while sprayed with a fluid such as nitrogen of 50 ° C. or less (range of 20 ° C. to 50 ° C.) on the upper surface of the circuit board. The upper limit of the allowable melting temperature range of the flow solder can be expanded by bringing a jig for heat dissipation into contact with the solder.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described in detail with reference to the drawings.
[0026]
In the present invention, as shown in FIG. 1, surface mount components 2 and 4a including low heat resistance electronic components (heat resistant temperature of about 220 ° C. or less) such as FPGA (field programmable gate array) are mounted on a circuit board 1 such as an organic substrate. Soldering is performed on the upper surface 101 using the low melting point Pb-free solder paste 11 containing In, and then the leads 12 of the insertion mounting component 5 are inserted into the through holes from the upper surface side of the circuit substrate 1. Then, flux is applied to the substrate, and thereafter, the solder is mounted by flow soldering from the lower surface 102 of the circuit board 1 by the Pb-free molten solder jet 3. When performing flow soldering, in order to shorten the soldering time to the circuit board 1, first, the lower surface 102 of the circuit board 1 is preheated by a preheating device 22 such as a sheathed heater. Thereafter, flow soldering is performed from the lower surface 102 of the circuit board 1 by the Pb-free molten solder jet 3, and both surfaces of the circuit board 1 are cooled immediately after the soldering.
[0027]
As described above, the low heat-resistant electronic component 2 such as FPGA mounted on the upper surface 101 of the circuit board 1 generally has a smaller heat capacity than other surface-mounted electronic components, and the temperature is likely to rise.
[0028]
For this reason, in a general reflow furnace, the component main body of the low heat resistant electronic component 2 often becomes the highest temperature part in the substrate during reflow soldering. In the case of a BGA (Ball Grid Array) or the like having a structure in which the component main body can easily prevent hot air from hitting the solder paste supply part during reflow soldering, the solder paste supply part becomes the lowest temperature part in the board Will increase. In any case, the low heat resistance electronic component 2 such as FPGA is often configured by QFP-LSI and may be configured by BGA-LSI.
[0029]
Therefore, the temperature difference between the component main body of the low heat resistant electronic component 2 and the solder paste supply unit 11 becomes a temperature variation in the circuit board 1 and is about 15 ° C. at maximum in a general reflow furnace. Therefore, if the component body of the low heat resistant electronic component 2 is set to 220 ° C. or lower, the solder paste supply unit 11 inevitably becomes 205 ° C. or lower, and a Pb-free reflow solder paste that melts even at 205 ° C. is required. Become.
[0030]
Therefore, the low melting point Pb-free solder paste 11 containing In is based on Sn- (1-4) Ag- (0-1) Cu- (7-10) In (unit: mass%) that melts even at 205 ° C. The alloy material to be used.
[0031]
Furthermore, when the low heat resistant electronic component 2 is made of BGA, it is desirable that the solder balls have the same composition as well as the reflow solder paste.
[0032]
Further, as the Pb-free material of the flow solder jet 3, the eutectic composition such as Sn—Cu, Sn—Ag, Sn—Ag—Cu, Sn—Ag—Bi, or a system obtained by adding In to these is used. Or it is a composition close | similar to this eutectic composition. In particular, Sn-3Ag-0.5Cu-xIn (0≤x≤9, unit: mass%) is a Sn-Ag-Cu eutectic composition or a composition close to the eutectic composition, and the conventional Sn-37Pb. The melting point is higher than the melting point of 183 ° C., and can be used with high connection reliability even under extreme conditions. Sn-0.8Ag-57Bi is a eutectic composition or a composition close to the eutectic composition, and can be used with high connection reliability when used at a limited operating temperature. .
[0033]
And in the said flow soldering process, the temperature of the jet stream of Pb free solder applied to the lower surface of a circuit board needs to exist in the range of 170 to 260 degreeC. This is because the solder is sufficiently wetted with respect to the substrate electrode.
[0034]
Moreover, before the said flux application | coating process, you may attach metal warpage prevention jigs, such as Al, to the circuit board 1 as needed. Further, when a surface-mounted component is mounted on the lower surface of the circuit board 1 by reflow soldering, a cover (not shown) can be attached to this portion to prevent flow soldering.
[0035]
In addition, when performing flow soldering, as shown in FIG. 2, the upper surface 102 of the circuit board 1 is subjected to a fluid such as nitrogen at a temperature of 50 ° C. or less (range of 20 ° C. to 50 ° C.) by the substrate cooling device 6. 1.2m 3 / Min (preferably 0.5-1.2m 3 / Min), the upper limit of the allowable melting temperature range of the flow solder can be expanded. Furthermore, as shown in FIG. 3, when the heat radiation jig made of metal such as aluminum is brought into contact with the lead or the like of the surface mount electronic component 2, the upper limit of the allowable melting temperature range of the flow solder can be further expanded.
[0036]
Thus, even if the upper limit of the melting temperature range of the flow solder is widened by performing the flow soldering in a state where the upper surface 101 of the circuit board 1 is cooled by the substrate cooling device 6, It is possible to prevent peeling due to remelting of the low melting point Pb-free solder paste 11 containing In at the connection portion.
[0037]
[First embodiment]
In the first embodiment, as the circuit board 1, the thickness generally used is about 1.6 mm, the length is about 350 mm, the width is about 350 mm, and the board surface copper foil thickness is about 18 μm. Inner diameter of about 1 mm, Cu pad diameter of about 1.6 mm, 0.7 pieces / cm 2 The glass epoxy board | substrate 1a which has the through hole formed with the density of the grade was used.
[0038]
As the surface-mounted component 2, a 32 mm square QFP-LSI 2a having 208 lead made of 42 alloy plated with a lead pitch of about 0.5 mm, a lead width of about 0.2 mm, and Sn-10 mass% Pb plating was used.
[0039]
Then, on the upper surface of the glass epoxy substrate 1a, 32 mm square QFP-LSI 2a is replaced with 10 types of In-containing solder pastes of Sn-3Ag-0.5Cu-xIn (0 ≦ x ≦ 9, unit: mass%) (the following table). The reflow soldering was performed according to 11.
[0040]
[Table 1]
Figure 2005026393
[0041]
As is apparent from Table 1, when In becomes 7 mass%, the solidus temperature becomes 198 ° C., the liquidus temperature becomes 211 ° C., and melting occurs near 205 ° C. Therefore, if In is contained in an amount of 7 mass% or more, it becomes possible to reflow solder a low heat resistant electronic component 2 (heat resistant temperature of about 220 ° C. or less) 2 such as FPGA to the surface side of the circuit board 1.
[0042]
However, if the content of In exceeds 10% by mass, segregation occurs during the cooling of the solder, and the connection strength of the connection portion is significantly reduced. Therefore, the content of In needs to be 10% by mass or less.
[0043]
Next, Sn-10 mass% Pb plating was applied to the through hole (not shown) of the substrate from the upper surface side of the circuit substrate 1 to which the four QFP-LSIs 2a of the substrate sample were connected. Six 2.54 mm pitch 6 terminal connectors 5a having 5 mm square terminals (leads) 11a were inserted.
[0044]
Next, the lower surface 102 of the circuit board 1 is pre-heated using a sheathed heater with a maximum output of 9 kW, and the temperature of the lower surface 102 of the circuit board 1a at 25 ° C. (room temperature) in 1 minute is the highest part 118 ° C. and the lowest part. 100 ° C. Thereafter, Sn-3Ag-0.5Cu (unit: mass%) or Sn-0.8Ag-57Bi (unit: mass%) close to the eutectic composition without cooling the upper surface 101 of the circuit board 1 with the substrate cooling device 6. The solder jet 3a is applied to the lower surface 102 of the substrate 1a, and the 6-terminal connector 5a is soldered without cooling by the substrate cooling device 6 as shown in FIG. . However, at this time, the molten solder in the flow solder bath (not shown) is Sn-0.8Ag-57Bi, Sn-0.7Cu, or Sn-3Ag-0.5Cu, and the temperature is 170 to 260 ° C. The temperature of the flow solder bath was fixed to several conditions.
[0045]
In the sample described above, it was observed whether or not the connection portion of the QFP-LSI 2a was broken.
[0046]
FIG. 4 shows the experimental results in the case of 10 types of In-containing solder paste having a reflow solder material composition of Sn-3Ag-0.5Cu-xIn (0 ≦ x ≦ 9, unit: mass%) according to the present invention. In FIG. 11, the experimental result in the case of nine types of Bi containing solder paste whose reflow solder material composition is Sn-3Ag-0.5Cu-xBi (0 <= x <= 8, unit: mass%) as a comparative example is shown.
[0047]
In each figure, the horizontal axis represents the temperature of the molten solder in the flow solder bath, the vertical axis represents the Bi and In contents of the solder used for the connection of the QFP-LSI, and the condition where no fracture occurred is indicated by a circle. The conditions under which this occurred occurred are indicated by a cross.
[0048]
Moreover, the solid line in each figure is a line considered as the boundary of the conditions which a fracture | rupture causes, and the conditions which do not occur. In order to compare the experimental result according to the present invention in FIG. 4 with the experimental result of the comparative example in FIG. 11, the boundary of FIG.
[0049]
As shown in FIG. 4, even in the experimental result in which the upper surface 101 of the substrate 1a is not cooled, Sn—Ag—0.5Cu—xIn according to the present invention is used as the solder paste 11 used for the connection of the QFP-LSI 2a. Compared to the comparative example of 3Ag-0.5Cu-xBi, it was found that breakage of the connection part during flow soldering hardly occurs and the allowable temperature range of the molten solder can be widened.
[0050]
That is, by adding In to the Sn-Ag-Cu system as in the present invention as a reflow solder composition for surface mounting, it can be confirmed by experiments that segregation peeling of surface mounting components during flow soldering can be suppressed. It was.
[0051]
Furthermore, according to the experimental results shown in FIG. 4, when the In content is 7% by mass, the temperature of the flow molten solder is up to 235 ° C., and when the In content is 8-9% by mass, the temperature of the flow molten solder is It was confirmed that the temperature could be increased up to 230 ° C.
[0052]
[Second Embodiment]
In the second embodiment, the difference from the first embodiment is that when the flow soldering is performed, the upper surface 101 of the circuit board 1 is about 20 ° C. to 50 ° C. by the substrate cooling device 6 as shown in FIG. Approximately 0.5m of fluid such as nitrogen 3 It is the point which cooled by spraying with the flow volume of / min. In FIG. 5, the horizontal axis represents the temperature of the molten solder in the flow solder bath, the vertical axis represents the In content of the solder used for the connection of the QFP-LSI, and the condition where no breakage occurred is indicated by a circle. The conditions that occurred were indicated by a cross. In addition, the solid line in FIG. 5 is a line that is considered as a boundary between a condition where the fracture occurs and a condition where the fracture does not occur.
[0053]
According to the experimental results of the second embodiment, as shown in FIG. 5, it is confirmed that the upper limit of the temperature of the flow molten solder may be increased by a little less than 10 ° C. compared to the first embodiment shown in FIG. did it. Further, according to the experimental results shown in FIG. 5, when the In content is 7% by mass, the temperature of the flow molten solder is up to 245 ° C., and when the In content is 8% by mass, the temperature of the flow molten solder is 240 ° C. Until now, it was confirmed that the temperature of the flow molten solder can be increased to 235 ° C. when the In content is 9% by mass.
[0054]
[Third embodiment]
In the third embodiment, as shown in FIG. 2, the upper surface 101 of the circuit board 1 is subjected to approximately 1.2 m of a fluid such as nitrogen at about 20 ° C. to 50 ° C. by the substrate cooling device 6 as shown in FIG. 3 It is cooled by spraying at a flow rate of / min. In FIG. 6, the horizontal axis represents the temperature of the molten solder in the flow solder bath, the vertical axis represents the In content of the solder used for the connection of the QFP-LSI, and the condition where the fracture did not occur is indicated by a circle. The conditions that occurred were indicated by a cross. Further, the solid line in FIG. 6 is a line that is considered as a boundary between a condition where the fracture occurs and a condition where the fracture does not occur.
[0055]
According to the experimental results of the third embodiment, as shown in FIG. 6, the upper limit of the allowable melting temperature of the flow solder may be increased by about 15 ° C. compared to the first embodiment shown in FIG. It could be confirmed. Further, according to the experimental results shown in FIG. 6, when the In content is 7% by mass, the allowable melting temperature of the flow solder is up to 250 ° C., and when the In content is 8% by mass, the allowable melting temperature of the flow solder is It was confirmed that the allowable melting temperature of the flow solder can be increased up to 240 ° C. when the In content is 9% by mass up to 245 ° C.
[0056]
Based on the above results, the amount of sprayed fluid such as nitrogen is 1.2m. 3 If the amount is increased to about 1 / min, flow soldering is performed using Sn-Ag-Cu molten solder at 240 to 250 ° C. even if the amount of In is added to the reflow solder for surface mounting components by about 7 to 9%. Is possible.
[0057]
[Fourth embodiment]
In the fourth embodiment, similarly to the second and third embodiments, when performing the flow soldering, the surface cooling component (32 mm square QFP) further reflow-soldered with the substrate cooling device 6 operated. (LSI) A heat radiating jig 7 in the shape of a square frame made of metal such as aluminum is mounted on the connecting portion of the circuit board 2, and the heat radiating jig 7 is brought into contact with the lead of the surface mount component 2, so 101 is cooled, and the effect of suppressing segregation peeling of the surface mount component during flow soldering is improved. At this time, the flow molten solder was Sn-0.7Cu or Sn-3Ag-0.5Cu, and the temperature of the flow solder bath was fixed to several conditions so that the temperature was 250 to 280 ° C.
[0058]
In FIG. 7, the horizontal axis represents the temperature of the molten solder in the flow solder bath, the vertical axis represents the In content of the solder used for the connection of the QFP-LSI, The conditions that occurred were indicated by a cross. In addition, the solid line in FIG. 7 is a line that is considered as a boundary between a condition in which fracture occurs and a condition in which fracture does not occur.
[0059]
According to the experimental results of the fourth example, as shown in FIG. 7, the upper limit of the allowable melting temperature of the flow solder may be increased by about 20 ° C. compared to the first example shown in FIG. It could be confirmed. Further, according to the experimental results shown in FIG. 7, when the In content is 7% by mass, the allowable melting temperature of the flow solder is up to 260 ° C., and when the In content is 8-9% by mass, the allowable melting of the flow solder is It was confirmed that the temperature could be up to 250 ° C.
[0060]
Based on the above results, the nitrogen blowing amount is 1.2 m. 3 If the substrate top surface is cooled at about / min and a heat dissipating jig is used, even if an In amount of about 9% is added to the reflow solder for surface mounting components, Sn-Ag-Cu molten solder at 250 ° C. is used. Thus, flow soldering can be performed. In short, according to the fourth embodiment, when performing flow soldering using 250 ° C. Sn—Ag—Cu molten solder or the like, the amount of In that can be added to the solder for surface mount components is increased to about 9%. Therefore, it becomes easy to sufficiently cope with low heat resistant electronic components.
[0061]
[Fifth embodiment]
In the fifth embodiment, the lead plating of the surface mounting component to be reflow soldered is made Pb-free in the first embodiment, thereby improving the effect of suppressing segregation peeling of the surface mounting component during flow soldering. It is a thing.
[0062]
However, at this time, the molten solder in the flow solder bath (not shown) is Sn-0.8Ag-57Bi, Sn-0.7Cu or Sn-3Ag-0.5Cu (unit: mass%) close to the eutectic composition. The temperature of the flow solder bath was fixed at several conditions so that the temperature would be 235 to 280 ° C.
[0063]
In each sample described above, it was observed whether or not the connection portion of the QFP-LSI 2a was broken.
[0064]
FIG. 8 and FIG. 9 show experimental results in the case of Sn-3 mass% Bi plating and Sn plating, respectively, according to the fifth embodiment. In FIG. 8 and FIG. 9, the horizontal axis indicates the temperature of the molten solder in the flow solder bath, the vertical axis indicates the In content of the solder used for connecting the QFP-LSI, and the conditions under which the fracture did not occur are indicated by ○. The conditions under which breakage occurred are indicated by crosses. Moreover, the solid line in each figure is a line considered as the boundary of the conditions which a fracture | rupture causes, and the conditions which do not occur.
[0065]
In addition, in order to compare with the experimental result of FIG. 4 (what used Sn-10Pb plating), the boundary of FIG. 4 was shown by the dotted line in FIG. Furthermore, in order to compare with the experimental result of FIG. 8 (using Sn-3Bi plating), the boundary of FIG. 8 is indicated by a dotted line in FIG.
[0066]
Based on these results, when Sn-3Bi plating is used (FIG. 8), when performing flow soldering with 250 ° C. Sn—Ag—Cu molten solder or the like, the amount of In that can be added to the solder for surface mounting components is 8% It turns out that it is a grade. Furthermore, when Sn plating is used (FIG. 9), when performing flow soldering with Sn-Ag-Cu molten solder or the like at 250 ° C., the amount of In that can be added to the solder for surface mount components is about 9%. Recognize. However, in the case of performing flow soldering with 260 ° C. Sn—Ag—Cu molten solder or the like, the amount of In that can be added to the solder for surface mounting components is about 5%.
[0067]
As described above, according to the fifth embodiment in which the lead plating of the surface mount component is made Pb-free, it can be added to the reflow solder without being cooled by the substrate cooling device 6 as in the first embodiment. The amount of In can be reduced to about 8 to 9%, and it becomes easy to sufficiently cope with low heat resistant electronic components.
[0068]
[Sixth embodiment]
In the sixth embodiment, the lead plating of the surface mount component to be reflow soldered is made Pb-free in the fourth embodiment, thereby improving the effect of suppressing segregation peeling of the surface mount component during flow soldering. It is a thing.
[0069]
However, at this time, the molten solder in the flow solder bath (not shown) is Sn-0.7Cu (unit: mass%) or Sn-3Ag-0.5Cu (unit: mass%) close to the eutectic composition, The temperature of the flow solder bath was fixed to several conditions so that the temperature was 250 to 280 ° C.
[0070]
In each sample described above, it was observed whether or not the connection portion of the QFP-LSI 2a was broken.
[0071]
FIG. 10 shows the experimental results of the sixth example. In FIG. 10, the horizontal axis represents the temperature of the molten solder in the flow solder bath, the vertical axis represents the In content of the solder used for the connection of the QFP-LSI, The conditions that occurred were indicated by a cross. Further, the solid line in FIG. 10 is a line that is considered as a boundary between a condition in which fracture occurs and a condition in which fracture does not occur. In addition, in order to compare with the experimental result of FIG. 9 (The thing which uses Sn plating and does not use a board | substrate upper surface cooling and a heat dissipation jig), the boundary of FIG. 9 was shown by the dotted line in FIG.
[0072]
As shown in FIG. 10, according to the sixth embodiment, even when performing flow soldering with Sn-Ag-Cu molten solder or the like at both temperatures of 250 ° C. and 260 ° C., the surface mount component solder is used. The amount of In that can be added can be about 9%, and as a result, it can sufficiently cope with low heat resistant electronic components.
[0073]
【The invention's effect】
According to the present invention, there is an effect that reflow soldering of a low heat resistance electronic component such as FPGA to a circuit board can be realized by using a Pb-free solder alloy.
[0074]
In addition, according to the present invention, Pb-free solder alloy is used for reflow soldering of surface mount components including low heat resistance electronic components such as FPGA to a circuit board and flow soldering to circuit boards of insertion mounted components. It is possible to prevent the soldering defects caused by the Pb-free operation and to achieve the mixed mounting while maintaining the high reliability.
[0075]
In addition, according to the present invention, the temperature of the molten solder jet during flow soldering in the mixed mounting of surface mounting components including low heat resistance electronic components such as FPGA using Pb-free solder alloy and insertion mounting components. Since the allowable range can be extended to the high temperature side, the temperature can be easily controlled.
[Brief description of the drawings]
FIG. 1 is a view for explaining a first embodiment of a mixed mounting method using Pb-free solder according to the present invention.
FIGS. 2A and 2B are diagrams for explaining second and third embodiments of a mixed mounting method using Pb-free solder according to the present invention. FIGS.
FIG. 3 is a view showing a state in which a heat radiating jig is attached (mounted) to a QFP according to a fourth embodiment of the present invention.
FIG. 4 is a diagram showing conditions for breaking a QFP-LSI connection in the first embodiment according to the present invention.
FIG. 5 is a diagram showing conditions for breaking a QFP-LSI connection in a second embodiment according to the present invention.
FIG. 6 is a diagram showing conditions for breaking a QFP-LSI connection in a third embodiment according to the present invention.
FIG. 7 is a diagram showing conditions for breaking a QFP-LSI connection in a fourth embodiment according to the present invention.
FIG. 8 is a diagram showing conditions for breaking a QFP-LSI connection in a fifth embodiment according to the present invention.
FIG. 9 is a diagram showing conditions for breaking a QFP-LSI connection in a sixth embodiment according to the present invention.
FIG. 10 is a diagram showing conditions for breaking a QFP-LSI connection in a seventh embodiment according to the present invention.
FIG. 11 is a diagram showing conditions for breaking a QFP-LSI connection in a comparative example.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Circuit board (glass epoxy board), 2 ... Surface mount components including low heat-resistant electronic components, such as FPGA, 3 ... Molten solder jet 4, 4a, 4b ... Surface mount components (chip components), 5 ... Insert mounting Components (6-terminal connector), 6 ... substrate cooling device, 7 ... heat dissipation jig.

Claims (12)

表面実装部品を回路基板の上面または下面に、Ｓｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ−（７〜１０）Ｉｎ（単位：質量％）をベースとする合金からなるＰｂフリーはんだペーストを用いてはんだ付けを行うことを特徴とするＰｂフリーはんだ合金を用いたリフローはんだ付け方法。Pb-free solder made of an alloy based on Sn- (1-4) Ag- (0-1) Cu- (7-10) In (unit: mass%) on the upper or lower surface of the circuit board. A reflow soldering method using a Pb-free solder alloy, wherein soldering is performed using a paste. 前記表面実装部品のリードには、Ｐｂフリーめっきが施されていることを特徴とする請求項１記載のＰｂフリーはんだ合金を用いたリフローはんだ付け方法。2. The reflow soldering method using a Pb-free solder alloy according to claim 1, wherein the lead of the surface mount component is subjected to Pb-free plating. 前記Ｐｂフリーめっきとして、ＳｎめっきまたはＳｎ−Ｂｉめっきであることを特徴とする請求項２記載のＰｂフリーはんだ合金を用いたリフローはんだ付け方法。The reflow soldering method using a Pb-free solder alloy according to claim 2, wherein the Pb-free plating is Sn plating or Sn-Bi plating. 表面実装部品を回路基板の少なくとも上面に、Ｓｎ−（１〜４）Ａｇ−（０〜１）Ｃｕ−（７〜１０）Ｉｎ（単位：質量％）をベースとする合金からなるＰｂフリーはんだペーストを用いてはんだ付けを行うリフローはんだ付け工程と、
挿入実装部品のリード若しくは端子を前記回路基板に穿設されたスルーホールに上面側から挿入する挿入工程と、
該挿入工程で挿入実装部品のリード若しくは端子をスルーホールに挿入した後、前記回路基板にフラックスを塗布するフラックス塗布工程と、
該フラックス塗布工程で回路基板にフラックスを塗布後、該回路基板の下面を予備加熱する予備加熱工程と、
該予備加熱工程で下面を予備加熱された回路基板の下面に、Ｐｂフリーはんだの噴流を当て、挿入実装部品のリード若しくは端子を回路基板にフローはんだ付けを行うフローはんだ付け工程とを有することを特徴とするＰｂフリーはんだ合金を用いた混載実装方法。Pb-free solder paste made of an alloy based on Sn- (1-4) Ag- (0-1) Cu- (7-10) In (unit: mass%) on at least the upper surface of the circuit board. Reflow soldering process for soldering using,
An insertion step of inserting the lead or terminal of the insertion mounting component into the through hole formed in the circuit board from the upper surface side;
A flux application step of applying a flux to the circuit board after inserting the lead or terminal of the insertion mounted component into the through hole in the insertion step;
A preheating step of preheating the lower surface of the circuit board after applying the flux to the circuit board in the flux application step;
A flow soldering step in which a jet of Pb-free solder is applied to the lower surface of the circuit board whose lower surface has been preheated in the preheating step, and the lead or terminal of the inserted mounting component is flow soldered to the circuit board. A mixed mounting method using a featured Pb-free solder alloy. 前記リフローはんだ付け工程において、前記表面実装部品のリードには、Ｐｂフリーめっきが施されていることを特徴とする請求項４記載のＰｂフリーはんだ合金を用いた混載実装方法。5. The mixed mounting method using a Pb-free solder alloy according to claim 4, wherein, in the reflow soldering step, the lead of the surface mounting component is subjected to Pb-free plating. 前記Ｐｂフリーめっきとして、ＳｎめっきまたはＳｎ−Ｂｉめっきであることを特徴とする請求項５記載のＰｂフリーはんだ合金を用いた混載実装方法。6. The mixed mounting method using a Pb-free solder alloy according to claim 5, wherein the Pb-free plating is Sn plating or Sn-Bi plating. 前記フローはんだ付け工程において、前記Ｐｂフリーはんだは、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ系、Ｓｎ−Ａｇ−Ｃｕ系、Ｓｎ−Ａｇ−Ｂｉ系、またはこれらにＩｎを加えた系の共晶組成または該共晶組成に近い組成であることを特徴とする請求項４または５記載のＰｂフリーはんだ合金を用いた混載実装方法。In the flow soldering step, the Pb-free solder may be Sn—Cu, Sn—Ag, Sn—Ag—Cu, Sn—Ag—Bi, or a system in which In is added to the eutectic composition or 6. The mixed mounting method using a Pb-free solder alloy according to claim 4, wherein the composition is close to the eutectic composition. 前記フローはんだ付け工程において、前記Ｐｂフリーはんだの噴流の温度が１７０℃〜２６０℃の範囲内にあることを特徴とする請求項７記載のＰｂフリーはんだ合金を用いた混載実装方法。The mixed mounting method using a Pb-free solder alloy according to claim 7, wherein in the flow soldering step, a temperature of the jet of the Pb-free solder is in a range of 170 ° C to 260 ° C. 前記フローはんだ付け工程において、前記回路基板の上面に対して５０℃以下の流体を吹付けて冷却することを特徴とする請求項７記載のＰｂフリーはんだ合金を用いた混載実装方法。8. The mixed mounting method using a Pb-free solder alloy according to claim 7, wherein in the flow soldering step, a fluid of 50 [deg.] C. or less is sprayed on the upper surface of the circuit board to cool it. 前記フローはんだ付け工程において、前記流体の流量を０．３〜１．２ｍ３／分とすることを特徴とする請求項９記載のＰｂフリーはんだ合金を用いた混載実装方法。The mixed mounting method using a Pb-free solder alloy according to claim 9, wherein the flow rate of the fluid is 0.3 to 1.2 m 3 / min in the flow soldering step. 前記フローはんだ付け工程において、前記表面実装部品の接続部に放熱治具が接触して取付けられていることを特徴とする請求項９または１０記載のＰｂフリーはんだ合金を用いた混載実装方法。11. The mixed mounting method using a Pb-free solder alloy according to claim 9, wherein in the flow soldering step, a heat radiating jig is attached in contact with a connection portion of the surface mounting component. 請求項４乃至１１の何れか一つに記載のＰｂフリーはんだを用いた混載実装方法を用いて混載実装された混載実装構造体。A mixed mounting structure that is mounted in a mixed manner using the mixed mounting method using the Pb-free solder according to any one of claims 4 to 11.
JP2003189290A 2003-07-01 2003-07-01 REFLOW SOLDERING METHOD EMPLOYING Pb-FREE SOLDER ALLOY, REFLOW SOLDERING METHOD, MIXED MOUNTING METHOD AND MIXED MOUNTED STRUCTURE Pending JP2005026393A (en)

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