JP2004538662A5 - - Google Patents

Download PDF

Info

Publication number
JP2004538662A5
JP2004538662A5 JP2003522178A JP2003522178A JP2004538662A5 JP 2004538662 A5 JP2004538662 A5 JP 2004538662A5 JP 2003522178 A JP2003522178 A JP 2003522178A JP 2003522178 A JP2003522178 A JP 2003522178A JP 2004538662 A5 JP2004538662 A5 JP 2004538662A5
Authority
JP
Japan
Prior art keywords
source
drain
control gate
region
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003522178A
Other languages
English (en)
Japanese (ja)
Other versions
JP2004538662A (ja
JP4481004B2 (ja
Filing date
Publication date
Priority claimed from DE10138585A external-priority patent/DE10138585A1/de
Application filed filed Critical
Publication of JP2004538662A publication Critical patent/JP2004538662A/ja
Publication of JP2004538662A5 publication Critical patent/JP2004538662A5/ja
Application granted granted Critical
Publication of JP4481004B2 publication Critical patent/JP4481004B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2003522178A 2001-08-06 2002-07-26 メモリーセルおよびメモリーセルに書込みを行う方法 Expired - Fee Related JP4481004B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10138585A DE10138585A1 (de) 2001-08-06 2001-08-06 Speicherzelle
PCT/DE2002/002759 WO2003017374A2 (de) 2001-08-06 2002-07-26 Speicherzelle

Publications (3)

Publication Number Publication Date
JP2004538662A JP2004538662A (ja) 2004-12-24
JP2004538662A5 true JP2004538662A5 (enExample) 2008-02-07
JP4481004B2 JP4481004B2 (ja) 2010-06-16

Family

ID=7694577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003522178A Expired - Fee Related JP4481004B2 (ja) 2001-08-06 2002-07-26 メモリーセルおよびメモリーセルに書込みを行う方法

Country Status (8)

Country Link
US (1) US6998672B2 (enExample)
EP (1) EP1415349A2 (enExample)
JP (1) JP4481004B2 (enExample)
KR (1) KR100679775B1 (enExample)
CN (1) CN1539170A (enExample)
DE (1) DE10138585A1 (enExample)
TW (1) TW556320B (enExample)
WO (1) WO2003017374A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7184315B2 (en) * 2003-11-04 2007-02-27 Micron Technology, Inc. NROM flash memory with self-aligned structural charge separation
US7202523B2 (en) 2003-11-17 2007-04-10 Micron Technology, Inc. NROM flash memory devices on ultrathin silicon
JP2008053270A (ja) * 2006-08-22 2008-03-06 Nec Electronics Corp 半導体記憶装置、及びその製造方法
KR100846393B1 (ko) * 2007-03-30 2008-07-15 주식회사 하이닉스반도체 반도체 소자의 트랜지스터 및 그 제조 방법

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6418270A (en) * 1987-07-13 1989-01-23 Oki Electric Ind Co Ltd Semiconductor memory device
US5219774A (en) * 1988-05-17 1993-06-15 Xicor, Inc. Deposited tunneling oxide
US5270559A (en) * 1990-10-15 1993-12-14 California Institute Of Technology Method and apparatus for making highly accurate potential well adjustments in CCD's
US5284784A (en) * 1991-10-02 1994-02-08 National Semiconductor Corporation Buried bit-line source-side injection flash memory cell
JPH0613627A (ja) * 1991-10-08 1994-01-21 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US5910912A (en) * 1992-10-30 1999-06-08 International Business Machines Corporation Flash EEPROM with dual-sidewall gate
US6057575A (en) * 1996-03-18 2000-05-02 Integrated Memory Technologies, Inc. Scalable flash EEPROM memory cell, method of manufacturing and operation thereof
US5963806A (en) * 1996-12-09 1999-10-05 Mosel Vitelic, Inc. Method of forming memory cell with built-in erasure feature
JP3264365B2 (ja) * 1997-03-28 2002-03-11 ローム株式会社 不揮発性記憶素子
US5900657A (en) * 1997-05-19 1999-05-04 National Semiconductor Corp. MOS switch that reduces clock feed through in a switched capacitor circuit
US6281545B1 (en) * 1997-11-20 2001-08-28 Taiwan Semiconductor Manufacturing Company Multi-level, split-gate, flash memory cell
US6091101A (en) * 1998-03-30 2000-07-18 Worldwide Semiconductor Manufacturing Corporation Multi-level flash memory using triple well
US5991204A (en) * 1998-04-15 1999-11-23 Chang; Ming-Bing Flash eeprom device employing polysilicon sidewall spacer as an erase gate
US6043530A (en) * 1998-04-15 2000-03-28 Chang; Ming-Bing Flash EEPROM device employing polysilicon sidewall spacer as an erase gate
US6093945A (en) * 1998-07-09 2000-07-25 Windbond Electronics Corp. Split gate flash memory with minimum over-erase problem
US6107139A (en) * 1998-07-17 2000-08-22 Worldwide Semiconductor Manufacturing Corporation Method for making a mushroom shaped DRAM capacitor
KR100297720B1 (ko) * 1998-10-19 2001-08-07 윤종용 플래쉬메모리셀및그제조방법
US6313500B1 (en) * 1999-01-12 2001-11-06 Agere Systems Guardian Corp. Split gate memory cell
JP3973819B2 (ja) * 1999-03-08 2007-09-12 株式会社東芝 半導体記憶装置およびその製造方法
US6228695B1 (en) * 1999-05-27 2001-05-08 Taiwan Semiconductor Manufacturing Company Method to fabricate split-gate with self-aligned source and self-aligned floating gate to control gate
US6388293B1 (en) * 1999-10-12 2002-05-14 Halo Lsi Design & Device Technology, Inc. Nonvolatile memory cell, operating method of the same and nonvolatile memory array
JP2001148434A (ja) * 1999-10-12 2001-05-29 New Heiro:Kk 不揮発性メモリセルおよびその使用方法、製造方法ならびに不揮発性メモリアレイ
US6504207B1 (en) * 2000-06-30 2003-01-07 International Business Machines Corporation Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same
DE10036911C2 (de) * 2000-07-28 2002-06-06 Infineon Technologies Ag Verfahren zur Herstellung einer Multi-Bit-Speicherzelle

Similar Documents

Publication Publication Date Title
TW200731536A (en) Nonvolatile semiconductor memory device
TW200721492A (en) Non-volatile memory and manufacturing method and operation method thereof
TW200419788A (en) Flash memory having local SONOS structure using notched gate and manufacturing method thereof
WO2007018821A3 (en) Dual-gate device and method
ATE441211T1 (de) Nichtflüchtige integrierte mehrzustands- speichersysteme, die dielektrische speicherelemente verwenden
WO2008004179A3 (en) Non-volatile memory and-array and method for operating the game
TW200643952A (en) Bidirectional split gate nand flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
TW200506946A (en) Method for programming, erasing and reading a flash memory cell
US7663180B2 (en) Semiconductor device
TW200737360A (en) Non-volatile memory array formed by a plurality of fin blocks forming memory cells, a floating gate MOS non-volatile memory transistor thereof, and method of manufacturing the same
TW200515543A (en) NAND flash memory cell row and method of forming the same
WO2007034376A3 (en) Memory device with a strained base layer and method of manufacturing such a memory device
TW200721511A (en) Double gate non-volatile memory device and method of manufacturing such a memory device
JP2004538662A5 (enExample)
WO2008038236A3 (en) A multi-transistor based non-volatile memory cell with dual threshold voltage
TW200723543A (en) Non-volatile memory and manufacturing method and operating method thereof
TW200503251A (en) Nonvolatile semiconductor memory device
US20100177569A1 (en) Single poly eeprom allowing continuous adjustment of its threshold voltage
TW200709395A (en) Non-volatile memory and operatting method thereof
WO2010046922A3 (en) Nonvolatile floating gate analog memory cell
TW200638535A (en) Programmable and erasable digital switch device and manufacturing method and operating method thereof
US8269287B2 (en) Floating gate memory device with increased coupling coefficient
TW200802816A (en) Non-volatile memory and manufacturing method thereof
TW200719413A (en) Semiconductor device and fabricating method thereof
US20120314509A1 (en) Non-volatile semiconductor device, and method of operating the same