JP2004335582A - Photoelectric converting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a photoelectric converting device which can be more increased in numerical aperture. <P>SOLUTION: Pixels are two-dimensionally arranged on a semiconductor substrate, and at least two lines out of a selecting line 101 connected to the gate of a transistor for selecting pixels, an initializing line 102 connected to the gate of a transistor for initializing pixels, and a transfer line 103 connected to the gate of a transistor for transferring signals outputted from the photoelectric converting element of the pixels are of a laminated structure, composed of a first conductor containing a polycrystalline semiconductor and a second conductor which contains polycrystalline semiconductor and is formed on the first conductor through the intermediary of an insulating layer. The first conductor and the second conductor are provided overlapping with each other in a top view on the semiconductor substrate. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a photoelectric conversion device, particularly to a semiconductor substrate, a photoelectric conversion element, a transfer unit for transferring a signal from the photoelectric conversion element, an amplification unit for amplifying the transferred signal, and an output signal output from the amplification unit. A pixel or a unit pixel provided with a selecting unit for performing the operation and an initializing unit for initializing a signal transferred to the amplifying unit is arranged two-dimensionally, and a plurality of pixels arranged in one array direction are common. The selection means, the initialization means, and the transfer means of a plurality of pixels connected to the output line of the pixel array and arranged in another arrangement direction different from the one arrangement direction are respectively a common selection line and a common initialization line. And a photoelectric conversion device connected to a common transfer line.
[0002]
[Prior art]
In applications such as digital still cameras and digital video cameras, CCDs have conventionally been often used as input devices. Recently, image input devices called CMOS image sensors have been developed and commercialized. The CMOS image sensor has an advantage that a process for manufacturing a CMOS logic can be used instead of a special process required by the CCD, and as a result, the cost can be reduced.
[0003]
As a conventional technique, as disclosed in Patent Document 1 and the like, a selection line, a reset line, and a transfer line commonly connected to pixels arranged in a row direction are not stacked, and at least the selection line and the transfer line are not stacked. A CMOS image sensor constituted by metal wiring is cited.
[0004]
[Patent Document 1]
JP 2001-94086 A
[0005]
[Problems to be solved by the invention]
However, the CMOS image sensor has a problem that image quality is deteriorated by diverting a CMOS process. The cause of the image quality deterioration is that the ratio of the openings to be closed per pixel (opening ratio) is low, and the opening area is changed from the opening to the photoelectric conversion unit (for example, if the photodiode on silicon is a photoelectric conversion unit, the silicon The distance to the surface) increases. The problem of the CMOS image sensor will be described with reference to FIG.
[0006]
FIG. 13 is a diagram viewed from above when an example of one pixel of the CMOS sensor is laid out. A pixel selection line 501, a pixel reset line 502, and a transfer line 503 for controlling pixels are arranged for each row. The pixel selection line 501 is connected to the gate 504 of the selection transistor in the pixel, the pixel reset line 502 is connected to the gate 505 of the reset transistor in the pixel, and the transfer line 503 is connected to the transfer gate 506 in the pixel. Reference numeral 507 denotes a photoelectric conversion unit, which is a photodiode here. 508 is a floating diffusion unit, 509 is a gate of an amplifier unit for amplifying the result of photoelectric conversion, and 510 is a vertical output line for transmitting the result of amplification of the amplifier. The voltage supplied to the selection transistor of the pixel is supplied from a power supply that supplies a voltage to the reset transistor of the pixel adjacent in the upward direction (not shown). A power supply for supplying a voltage to the reset transistor shown in FIG. 13 also supplies a voltage to a selection transistor of a pixel adjacent in a downward direction (not shown).
[0007]
The CMOS image sensor uses a normal CMOS process, and the pixel selection line 501, the pixel reset line 502, and the transfer line 503 are each formed using polysilicon or aluminum on the same layer. Since they are arranged on the same layer, theoretically, the maximum value LA of the opening size that can be taken in the vertical direction is as follows: the vertical size of the pixel is LY, the wiring width is LW (each wiring width is equal), and the wiring interval is LS1. , LS2 (here, LS1 = LS2 = LS),
LA = LY−3 × LW−2 × LS Equation (1)
It becomes.
[0008]
No matter how the pixel design is optimized, the vertical aperture size of the pixel is governed by this equation (1). If LW = 0.6 μm and LS = 0.6 μm, for example, a 3.3 μm square pixel If it is attempted to form a vertical aperture, only 0.3 μm can be obtained, and almost no light can be taken in even if a microlens is used.
[0009]
With respect to the problem of the aperture ratio, a solution using a multilayer metal wiring in a CMOS process has been taken. By introducing a multilayer metal wiring as used in the CMOS logic process and arranging the wirings 501 to 503 in a multilayer, the limitation of the formula (1) can be avoided. However, the distance from the microlens to the silicon surface increases due to the multi-layered metal wiring and the CMP technology that also needs to be introduced, resulting in deterioration of the light collection efficiency. In addition, increasing the number of process steps and increasing the difficulty of the process due to an increase in the number of contact holes and via holes per pixel leads to an increase in process cost itself and an increase in cost due to a decrease in yield. .
[0010]
In view of the above, an object of the present invention is to further increase the upper limit of the opening size determined by Expression 1. It is another object of the present invention to prevent an increase in the distance from the microlens to the silicon surface, an increase in process cost, a reduction in yield, and the like without using a multilayer metal wiring layer. Another object of the present invention is not to reduce the reading speed.
[0011]
Means and action for solving the problem
The photoelectric conversion device according to the present invention includes, at least, a photoelectric conversion element, a transfer unit that transfers a signal from the photoelectric conversion element, an amplification unit that amplifies the transferred signal, and an output signal from the amplification unit. A plurality of pixels arranged in a two-dimensional manner, and a plurality of pixels arranged in one array direction are connected to a common output line. The selection unit, the initialization unit, and the transfer unit of a plurality of pixels connected and arranged in another arrangement direction different from the one arrangement direction are respectively a common selection line, a common initialization line, and a common transfer. In the photoelectric conversion device connected to the line,
At least two of the selection line, the initialization line, and the transfer line are a first conductor including a polycrystalline semiconductor, and a polycrystal formed over the first conductor via an insulating layer. In a laminated structure with a second conductor containing a semiconductor, the two wires are provided so as to at least partially overlap each other when viewed from a vertical direction of a surface of the semiconductor substrate. According to the photoelectric conversion device of the present invention, the aperture ratio can be increased by laminating at least two of the selection line, the initialization line, and the transfer line.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0013]
(Embodiment 1)
FIG. 1 is a plan view of a pixel of the photoelectric conversion device according to the first embodiment of the present invention, which is seen through a multilayer from an upper surface, and FIG. 2 is an equivalent circuit diagram.
[0014]
In the photoelectric conversion device of the present embodiment, as shown in FIG. 1, the pixel reset line 102 ″ of the pixel adjacent in the upward direction overlaps with the pixel selection line 101 of the pixel shown in FIG. 1 overlaps with the pixel reset line 102 of the pixel illustrated in Fig. 1. That is, in the present embodiment, the pixel reset line and the pixel selection line overlap between adjacent pixels. Is arranged.
[0015]
In FIG. 1, reference numerals 101, 102, and 103 denote a pixel selection line, a pixel reset (pixel initialization) line, and a transfer line, respectively, commonly arranged for each row. Reference numerals 101 'and 102 "denote a pixel selection line of a pixel arranged downward and a pixel reset (pixel initialization) line of a pixel arranged upward. The pixel selection line 101 is a gate of a pixel selection transistor in the pixel. 104, a pixel reset (pixel initialization) line 102 is directly connected to the gate 105 of the pixel reset transistor, and a transfer line 103 is directly connected to the gate 106 of the transfer transistor without using a different material, and each wiring is formed of the same material as each gate. Reference numeral 107 denotes an output line commonly arranged for each column, and reference numeral 109 denotes a photoelectric conversion unit formed in a semiconductor layer, which is formed in an n-type silicon substrate or n-well here. The light-shielding film is omitted in FIG. 1, but is formed so as to cover portions other than the photoelectric conversion portion 109. There.
[0016]
Reference numeral 110 denotes a gate of an amplifying transistor which receives an optical charge resulting from the photoelectric conversion, amplifies an output corresponding to the photoelectric charge, and transmits the amplified output to an output line 107. The amplifying means includes a floating diffusion (floating diffusion unit) 111. It is composed of a circuit that receives a voltage and outputs it by a source follower amplifier. Reference numeral 112 denotes a power supply line for the amplifying means, which is connected to the light shielding film. Reference numeral 113 denotes a wiring for connecting the floating diffusion 111 and the drain 114 of the reset transistor.
[0017]
3 (a) to 3 (c) are cross-sectional views of respective parts of FIG. 1, FIG. 3 (a) is a cross-sectional view taken along line AA 'of FIG. 1, and FIG. 3 (b) is BB of FIG. 3 (c) is a sectional view taken along the line CC 'of FIG. The same parts as those in FIG. 1 are denoted by the same reference numerals. The pixel selection line 101 'and the pixel reset line 102 in FIG. 1 are omitted. Reference numeral 201 denotes an insulating film for performing field isolation, and reference numeral 202 denotes a base, which is a p-type silicon substrate or a well doped in the p-type silicon substrate. Reference numeral 203 denotes a buried photodiode, which is formed of an n-type semiconductor whose upper surface is substantially covered with a p-type semiconductor layer and is in contact with the base 202. The light shielding film 108 is configured to cover portions other than the photoelectric conversion unit 109.
[0018]
The pixel selection line 101 is disposed so as to overlap with the pixel reset line 102, and is formed here of polysilicon (polycrystalline silicon). The insulating film between the two is formed, for example, by reoxidizing the surface of the polysilicon of the pixel reset line in an oxygen atmosphere. Note that the pixel selection line 101 can be made of a compound of polysilicon and a metal such as titanium, tungsten, or aluminum in order to suppress the wiring resistance. What two lines among the lines of the pixel selection line 101, the pixel reset line 102, and the transfer line 103 are overlapped is appropriately determined as described later.
[0019]
The gate portions 104, 105, and 106 of the respective transistors are respectively coupled to the substrate via a gate oxide film 206, for example, to form a MOS transistor. Here, the transistor is not limited to a MOS transistor, but may be a bipolar transistor, a JFET, or the like.
Reference numeral 205 denotes a heavily doped n-layer, which forms the source and drain of the MOS transistor. 204 ₁ Is the gate of the pixel reset transistor, 204 ₂ Is the gate of the pixel selection transistor, 204 ₃ Is a gate of a transistor serving as an amplifying means.
[0020]
Further, the circuit configuration and the driving method of this pixel are equivalent to a CMOS sensor which fully depletes a well-known photodiode and starts an accumulation operation later. In this CMOS sensor, after the signal charges accumulated in the n-type semiconductor region 203 of the embedded photodiode are completely transferred to the floating diffusion region (floating diffusion) 111, the next signal charge accumulation operation is started.
[0021]
Here, similarly to the conventional example, when the maximum value LA of the opening size that can be theoretically taken in the vertical direction is obtained, the vertical size of the pixel is LY, the wiring width is LW, and the wiring interval is LS.
LA = LY−2 × LW−LS Equation (2)
If the same design rule is used, the vertical opening size can be increased by the sum of the wiring width and the wiring interval. Note that, in this embodiment, since the pixel selection line and the pixel reset line overlap between adjacent pixels, it can be said that some of the pixels overlap, and the vertical aperture size of one pixel is: The size excluding the pixel selection line 101 ′ and the pixel reset line 102, or the pixel selection line 101 and the pixel reset line 102 ″ in FIG. 1 (here, the size excluding the pixel selection line 101 and the pixel reset line 102 ″ is LY).
[0022]
Conventionally, when a 3.3 μm square pixel was designed using a design rule of LS = LW = 0.6, only an opening of 0.3 μm could be secured. However, according to the present embodiment, an opening of 1.5 μm is required. Can be secured.
[0023]
Further, in this embodiment, an example is described in which the output line 107 is formed by etching a metal film mainly composed of aluminum, and the metal film and the light shielding film are formed of an insulating film planarized by CMP. It is formed on. By using CMP, the effect of further miniaturizing the upper wiring layer and eliminating the dependency on the light incident angle due to the uniform height of the side of the opening defined by the light shielding film can be obtained.
[0024]
However, one effect of increasing the aperture can be similarly obtained without being planarized by CMP. For example, in an application where the dependency on the light incident angle does not matter, the effect of reducing the cost of the process by eliminating the CMP process can be obtained instead.
[0025]
Further, a device may be realized by a combination of a layer on which CMP is performed and a layer on which CMP is not performed. For example, when forming the column output line 107, CMP is introduced, and when forming the light shielding layer, CMP is not introduced. If the pattern of the first metal layer is sufficiently simple compared to the base formed of polysilicon, etc., and if the flatness of the light shielding film can be sufficiently secured by the reflow technique of the interlayer insulating film without using CMP, The second CMP can be omitted. As a result, it is possible to obtain the effects of eliminating the dependency on the light incident angle, miniaturizing the column output lines and the like, and the effect of reducing the cost by omitting the CMP process once.
[0026]
On the other hand, the column output line and the like are formed on an interlayer insulating film not using CMP, and only the last light shielding film is formed on the interlayer insulating film using CMP. And cost reduction effects can be obtained. However, in this case, the effect of miniaturization in patterning the column output lines cannot be obtained.
[0027]
In FIG. 1, the reset lines 102 and 102 "and the transfer line 103 are formed of a first layer of polysilicon, the select lines 101 and 101 'are formed of a second layer of polysilicon, and the reset lines 102 and 102" are formed. The configuration in which selection lines 101 ′ and 102 are stacked on the above, respectively, is taken as an example. Of course, the effect of the present invention is not limited to this configuration. The idea of the present invention is to arrange the wiring in the row direction which has been conventionally laid out planarly by using the two-layer polysilicon technology, and from this viewpoint, which wiring is to be arranged in which layer, which wiring Which wiring is to be laminated is not a limitation. It is only necessary to determine which layer is to be arranged and how to arrange it while considering the following matters as design items, and perform an appropriate layout.
[0028]
(1) The two stacked wirings have a larger wiring capacitance than the other non-laminated wiring, and require more time for driving.
[0029]
(2) It is more difficult to control the interface of the gate oxide film of the transistor formed by the upper polysilicon and to control the film thickness as compared with those of the initial polysilicon layer. Easy to happen. The designer can obtain the effect of the present invention in any case by designing while mainly considering the above two matters.
[0030]
(Embodiment 2)
FIG. 4 is a plan view of a pixel of the photoelectric conversion device according to the second embodiment of the present invention, which is seen through the multilayer from the upper surface. FIG. 1 and 2 are denoted by the same reference numerals. 5, the pixel selection line 101 'and the pixel reset line 102 in FIG. 4 are omitted. The photoelectric conversion device of the present embodiment differs from the photoelectric conversion device of the first embodiment in that the gate of the selection MOS transistor and the gate of the amplification transistor overlap.
[0031]
4 and 5, reference numeral 301 denotes a configuration in which the gate 110 of the amplification transistor formed of polysilicon of the first layer is partially covered by the gate 104 of the pixel selection transistor.
[0032]
With this configuration, the space between the gates of the two transistors required in the first embodiment can be further reduced, and the effect of the first embodiment can be obtained in a finer pixel.
[0033]
Here, the selecting MOS transistor is arranged at the upper part, but the selecting MOS transistor may be arranged at the lower part. Considering the amplification characteristics, it is desirable that the amplifying MOS transistor should be formed of the first polysilicon. However, in the first embodiment, for example, when the design is made such that the selection line is formed of the first polysilicon In addition, the MOS transistor for amplification must be formed of the second polysilicon. Even in this case, the effects of the present embodiment of the present invention can be similarly obtained.
[0034]
Further, conventionally, for the purpose of eliminating horizontal shading, a substrate potential wiring connecting pixels in a horizontal direction in a row direction is sometimes connected to fix a potential of the substrate. In the present invention, such wiring is completely eliminated because it causes a reduction in the aperture ratio, and the aperture ratio is effectively improved.
[0035]
Here, it is desirable to use a film obtained by oxidizing the underlying polysilicon as in the conventional two-layer polysilicon process as the insulating film between the polysilicon layers. This is because an oxide film can be selectively formed around the polysilicon. However, depending on design parameters such as the reliability required between the polysilicon layers, the wiring capacitance between the stacked wirings, and the optical characteristics required by the light incident on the photodiode portion, the interlayer film between the polysilicons may be used. Alternatively, an oxide film, a nitride film, a mixed film of an oxide film and a nitride film, a stacked film of an oxide film and a nitride film, or the like may be used. Further, another insulating film may be introduced. In the present embodiment, the supporting base is the substrate 202, but the substrate may be, for example, normal silicon, for example, an SOI substrate. Further, if the same laminated wiring can be introduced, the effect of the present invention can be similarly obtained by using other materials.
[0036]
The configuration in which the gate of the selection MOS transistor and the gate of the amplification transistor of this embodiment overlap can be applied to other embodiments such as Embodiments 3 and 4 described below.
[0037]
(Embodiment 3)
FIG. 6 is a plan view of the pixel of the photoelectric conversion device according to the third embodiment of the present invention, which is seen through the multilayer from the upper surface, and FIG. 7 is an equivalent circuit diagram. 1 and 2 are denoted by the same reference numerals.
[0038]
In the photoelectric conversion device of the present embodiment, as shown in FIG. 7, two photoelectric conversion units, two transfer transistors for transferring charges from the two photoelectric conversion units to the floating diffusion, and the floating diffusion and the input unit are connected. A unit cell is composed of one amplification transistor, one selection transistor, and one reset transistor. Since the unit cell has two photoelectric conversion units, it can be considered that two pixels are substantially formed, and the amplification transistor, the selection transistor, and the reset transistor of the two pixels are shared.
[0039]
As shown in FIG. 6, the reset line 102 'of the unit cell adjacent in the downward direction overlaps the select line 101 of the unit cell shown in FIG. 6, and the select line 101 of the unit cell adjacent in the upward direction. "And the reset line 102 of the unit cell shown in Fig. 6 overlap. 106a and 106b are gates of transfer transistors for transferring charges from the photoelectric conversion units 109a and 109b, and 103a and 103b are photoelectric conversion units 109a and 109b. This is a transfer line of a transfer transistor for transferring electric charges from the transfer line 109b, where the gates 106a and 106b are constituted by a part of the transfer lines 103a and 103b.
[0040]
In the photoelectric conversion device of this embodiment, when the maximum value LA of the opening size that can be theoretically taken in the vertical direction is obtained, the vertical size of a pixel (half of a unit cell) is LY, the wiring width is LW, and the wiring interval is LS. Then
LA = LY−1.5 × LW−0.5LS Equation (3)
Thus, the opening size in the vertical direction can be further increased as compared with the configuration of the first embodiment.
[0041]
Here, an example in which the selection line and the reset line are overlapped is shown, but other wirings can be overlapped as in the first embodiment.
[0042]
(Embodiment 4)
Although the photoelectric conversion devices of Embodiments 1 to 3 described above have described an example in which wirings are overlapped between adjacent pixels or unit cells, in the present embodiment, wirings are overlapped in one pixel. Here is an example.
[0043]
FIG. 8 is a plan view of the pixels of the photoelectric conversion device according to the third embodiment of the present invention, which is seen through from the top to the multilayer, and FIG. 9 is an equivalent circuit diagram. 1 and 2 are denoted by the same reference numerals.
[0044]
In FIG. 8, the selection line 101 and the transfer line 103 are formed of a first layer of polysilicon, the pixel reset line 102 is formed of a second layer of polysilicon, and the reset line 102 is stacked on the transfer line 103. I have.
[0045]
Here, similarly to Embodiment 1, when the maximum value LA of the opening size that can be theoretically taken in the vertical direction is obtained, the vertical size of the pixel is LY, the wiring width is LW, and the wiring interval is LS.
LA = LY−2 × LW−LS Equation (4)
As in the first embodiment, when the same design rule is used as compared with the conventional example, the vertical opening size can be increased by the sum of the wiring width and the wiring interval.
[0046]
In the present embodiment, an example in which the wirings overlap in one pixel has been described, but an embodiment in which the wirings overlap in one unit cell is of course also possible. In this case, the reset line 102 is stacked on the transfer line 103a or 103b in the unit cell described in the third embodiment, and there is no selection line 101 ″ and reset line 102 ′ of the vertically adjacent unit cell.
[0047]
Although the example in which the transfer line and the reset line are overlapped is shown here, other wirings can be overlapped as in the first embodiment.
[0048]
(Embodiment 5)
FIG. 10 is an explanatory diagram showing a signal reading system of the photoelectric conversion device of the present invention. The present embodiment differs from the conventional signal reading system in that a delay element is provided. A plurality of pixels 401 are arranged in a matrix, here a matrix of 5 rows and 3 columns, and pixels in the same column are selectively connected to a vertical line 402. The vertical lines 402 are connected to storage elements 406 to 408 serving as second storage means via delay elements 403 to 405 serving as first storage means. The storage elements are connected to a horizontal line 412 via respective selection switches 409 to 411, and the horizontal line 412 is connected to an output node 413 via a buffer. Here, a capacitance element such as an oxide film capacitance can be used as the storage element. As the delay element, a CCD device or a sample and hold unit using a capacitor and a switch can be used.
[0049]
FIG. 11B is an explanatory diagram of the operation of the signal reading system of FIG. FIG. 11A is an explanatory diagram of the operation of the conventional signal reading system shown for comparison.
[0050]
As shown in FIG. 11A, after the pixel in the n-th row is selected, all the pixels connected to that row are activated by being selectively connected to the vertical line 402 during the pixel access 501 period. Since the conventional CMOS sensor does not have a delay function by the delay element, the value of the pixel is stored in the storage elements 406 to 408 via the output line 402 at a certain timing.
[0051]
Thereafter, in the horizontal signal transfer period 502, the selection switches 409 to 411 are sequentially connected to the horizontal line 412 using a shift register or the like, and the data of each column is output serially.
[0052]
Here, in the pixel of the photoelectric conversion device of the present embodiment described above, the pixel access period 501 tends to be longer than that of the conventional CMOS sensor because the wiring has a laminated structure. Therefore, it is desirable to adopt a driving method described later. Hereinafter, the driving method will be described with reference to FIG.
[0053]
While the pixels in the (n + 1) th row are being read on the vertical line 402 in the pixel access period 503, the data in the nth row is sequentially transferred from the storage elements 406 to 408 having a holding function to the horizontal line 412 by the selection switches 409 to 411. The signal is output by connection (horizontal signal transfer period 504). In the pixel access period 503, the data of the vertical line 402 is held at a certain timing by the delay elements 403 to 405 having a delay function. After the horizontal signal transfer period ends, the data held by the delay elements 403 to 405 is transferred to the storage elements 406 to 408 during the period (transfer period 505) during which the pixel access period of the (n + 2) th row starts. Thereafter, the horizontal signal transfer period (504) of the (n + 1) th row and the pixel access period of the (n + 2) th row are entered.
[0054]
As described above, by performing the horizontal signal transfer of the current row while accessing the pixels of the next row, the effective reading speed is improved. In particular, in the pixel structure of the photoelectric conversion device of the present embodiment, the pixel access period is longer than that of a conventional CMOS sensor or the like, so that this new readout method is particularly effective.
[0055]
Although an analog output is assumed in the circuit diagram of FIG. 10, similar effects can be obtained by, for example, AD conversion immediately before output. The same effect can be obtained by mounting an AD converter for each column, performing AD conversion during the pixel access period, and transferring digital data during the horizontal signal transfer period. When an AD converter is provided for each column, the same effect can be obtained even if the data input to the delay function is AD-converted. For example, even if the data output from the holding function is AD-converted. Similar effects can be obtained. It is preferable that AD conversion be performed before the signal is input to the delay function, so that it is not affected by analog noise generated by the delay function and the holding function. More specifically, in FIG. 10, a plurality of storage elements for connecting analog-to-digital conversion means to the storage elements 406 to 408 are grouped for each unit, connected to a multiplexer for each unit, and an analog / digital converter is connected to the multiplexer. An example of connecting digital conversion means is given.
[0056]
An AD converter is not provided for each column, and the same effect can be obtained even if one AD converter is provided for a plurality of columns. In this case, the total area of the AD converter in the chip is reduced, and the effect of reducing the chip size can be obtained. In this case, it is needless to say that the pixel access period must be time-divided and the AD conversion of the pixels in all columns must be completed before the horizontal signal transfer of the row starts.
[0057]
Next, an imaging system using the photoelectric conversion device will be described. An example in which the photoelectric conversion device of the present invention is applied to a still camera will be described in detail with reference to FIG.
[0058]
FIG. 12 is a block diagram showing a case where the photoelectric conversion device of the present invention is applied to a “still video camera”.
[0059]
In FIG. 12, reference numeral 1101 denotes a barrier which serves both as protection of a lens and a main switch; 1102, a lens for forming an optical image of a subject on a solid-state imaging device 1104 serving as a photoelectric conversion device of the present invention; 1103, a light amount passing through the lens 1102; A diaphragm 1104 is a solid-state imaging device for capturing a subject formed by the lens 1102 as an image signal, and 1106 is an A / D converter for performing analog-digital conversion of an image signal output from the solid-state imaging device 1104. And 1107, a signal processing unit for performing various corrections on the image data output from the A / D converter 1106 and compressing the data, and 1108, a solid-state imaging device 1104, an imaging signal processing circuit 1105, and an A / D converter 1106. , A timing generator for outputting various timing signals to the signal processor 1107, 11 Reference numeral 9 denotes an overall control / arithmetic unit that controls various operations and the entire still video camera. 1110 denotes a memory unit that temporarily stores image data. 1111 denotes an interface unit that performs recording or reading on a recording medium. A removable recording medium 1113 such as a semiconductor memory for recording or reading image data is an interface unit for communicating with an external computer or the like.
[0060]
Next, the operation of the still video camera at the time of shooting in the above configuration will be described.
[0061]
When the barrier 101 is opened, the main power is turned on, the power of the control system is turned on, and the power of the imaging system circuit such as the A / D converter 1106 is turned on.
[0062]
Then, in order to control the amount of exposure, the overall control / arithmetic unit 1109 opens the aperture 1103, and the signal output from the solid-state imaging device 1104 is converted by the A / D converter 1106, and then the signal is processed by the signal processing unit 1107. Is entered. Exposure calculation is performed by the overall control / calculation unit 1109 based on the data.
[0063]
The brightness is determined based on the result of the photometry, and the overall control / arithmetic unit 1109 controls the aperture according to the result.
[0064]
Next, based on the signal output from the solid-state imaging device 1104, high-frequency components are extracted, and the distance to the subject is calculated by the overall control / calculation unit 1109. Thereafter, the lens is driven to determine whether or not the lens is in focus. If it is determined that the lens is not in focus, the lens is driven again to measure the distance.
[0065]
Then, after the focus is confirmed, the main exposure starts. When the exposure is completed, the image signal output from the solid-state imaging device 1104 is A / D converted by an A / D converter 1106, passes through a signal processing unit 1107, and is written in a memory unit by overall control / calculation 1109. After that, the data stored in the memory unit 1110 passes through the recording medium control I / F unit 1111 under the control of the overall control / arithmetic unit 1109 and is recorded on a removable recording medium 1112 such as a semiconductor memory. Further, the image may be processed by inputting directly to a computer or the like through the external I / F unit 1113.
[0066]
Further, the same effect can be obtained even if the post-processing means group for processing data from the sensor in the above system is formed on the same substrate as the sensor, for example. Also, for example, the same effect can be obtained even if the device is formed on a different substrate. By mounting on the same board, the number of IC components can be reduced, and the effect of reducing the mounting and component costs can be obtained. Also, by mounting on a different board, the post-processing means circuit that leaks into the sensor Therefore, it is possible to obtain effects such as a reduction in noise from noise and an improvement in the yield of ICs in the post-processing means.
[0067]
Further, in the embodiment of the present invention, an actual layer such as an impurity layer for preventing formation of a channel below a field oxide film, a barrier metal layer before forming a metal wiring layer, a passivation film formed on the uppermost layer, etc. In semiconductors, various elements that are almost essential are omitted. Further, in the present invention, the layout is merely an explanation of the concept, and restrictions such as a space between wirings and a contact size are ignored. It goes without saying that in the actual design, it is necessary to follow the design guidelines required by the manufacturing process.
[0068]
Further, in the fifth embodiment, various methods such as a method of removing reset noise of a pixel, a method of removing a fixed pattern and a 1 / f noise of an amplification amplifier of each pixel, and a vertical and horizontal shift register, a timing generation unit, etc., which are essential in the periphery. Indispensable elements, essential driving methods, and the like are omitted. This is intentionally performed to make the elements of the present invention stand out, and the effects of the present invention can be similarly obtained even when the essential elements and the essential driving methods conventionally used conventionally are combined with the present invention. It goes without saying that you can get it.
[0069]
The embodiments of the present invention have been described above, but the preferred embodiments of the present invention are the following.
[0070]
Embodiment 1 At least a photoelectric conversion element, a transfer unit for transferring a signal from the photoelectric conversion element, an amplification unit for amplifying the transferred signal, and a selection for outputting an output signal from the amplification unit to a semiconductor substrate. Means, and pixels provided with initialization means for initializing a signal transferred to the amplification means are arranged two-dimensionally, and a plurality of pixels arranged in one array direction are connected to a common output line, In addition, the selection unit, the initialization unit, and the transfer unit of a plurality of pixels arranged in another arrangement direction different from the one arrangement direction are connected to a common selection line, a common initialization line, and a common transfer line, respectively. In the photoelectric conversion device that has been
At least two of the selection line, the initialization line, and the transfer line are a first conductor including a polycrystalline semiconductor, and a polycrystal formed over the first conductor via an insulating layer. A photoelectric conversion device having a laminated structure with a second conductor containing a semiconductor, wherein the two wires are provided so as to at least partially overlap when viewed from a vertical direction of a surface of the semiconductor substrate.
[0071]
According to the photoelectric conversion device of the first embodiment, the aperture ratio can be increased by stacking at least two of the selection line, the initialization line, and the transfer line.
[0072]
(Embodiment 2) At least a photoelectric conversion element, a transfer unit for transferring a signal from the photoelectric conversion element, an amplification unit for amplifying the transferred signal, and a selection for outputting an output signal from the amplification unit to a semiconductor substrate. Means, and pixels provided with initialization means for initializing a signal transferred to the amplification means are arranged two-dimensionally, and a plurality of pixels arranged in one array direction are connected to a common output line, In addition, the selection unit, the initialization unit, and the transfer unit of a plurality of pixels arranged in another arrangement direction different from the one arrangement direction are connected to a common selection line, a common initialization line, and a common transfer line, respectively. In the photoelectric conversion device that has been
The selection line of the one pixel column arranged in the other array direction, at least one of the initialization line and the transfer line, and the selection line of another pixel column adjacent to the one pixel column, At least two of the initialization line and at least one of the transfer lines are a first conductor including a polycrystalline semiconductor, and a polycrystal formed over the first conductor with an insulating layer interposed therebetween. A photoelectric conversion device having a laminated structure with a second conductor containing a semiconductor, wherein the two wires are provided so as to at least partially overlap when viewed from a vertical direction of a surface of the semiconductor substrate.
[0073]
(Embodiment 3) At least a plurality of photoelectric conversion elements, a plurality of transfer means for respectively transferring signals from the plurality of photoelectric conversion elements, an amplifying means for amplifying the transferred signals, and an output from the amplifying means. A plurality of unit cells arranged in a two-dimensional manner, including a unit cell including a selecting unit for outputting a signal and an initializing unit for initializing a signal transferred to the amplifying unit, and arranged in one array direction Are connected to a common output line, and the selection means of the plurality of unit cells arranged in another arrangement direction different from the one arrangement direction, the initialization means, the plurality of transfer means is a common selection line, respectively. In a photoelectric conversion device connected to a common initialization line and a plurality of common transfer lines,
At least two of the selection line, the initialization line, and the plurality of transfer lines are formed over a first conductor including a polycrystalline semiconductor and an insulating layer over the first conductor. A photoelectric conversion device having a stacked structure with a second conductor including a polycrystalline semiconductor, wherein the two wires are provided so as to at least partially overlap when viewed from a vertical direction of a surface of the semiconductor substrate. .
[0074]
(Embodiment 4) At least a plurality of photoelectric conversion elements, a plurality of transfer means for respectively transferring signals from the plurality of photoelectric conversion elements, an amplifying means for amplifying the transferred signals, and an output from the amplifying means. A plurality of unit cells arranged in a two-dimensional manner, including a unit cell including a selecting unit for outputting a signal and an initializing unit for initializing a signal transferred to the amplifying unit, and arranged in one array direction Are connected to a common output line, and the selection means of the plurality of unit cells arranged in another arrangement direction different from the one arrangement direction, the initialization means, the plurality of transfer means is a common selection line, respectively. In a photoelectric conversion device connected to a common initialization line and a plurality of common transfer lines,
In one unit cell column arranged in the other array direction, the selection line, at least one of the initialization line and the transfer line, and the other unit cell column adjacent to the one unit cell column, At least two of the selection line, the initialization line, and at least one of the transfer lines are formed with a first conductor including a polycrystalline semiconductor and an insulating layer over the first conductor. Photoelectric conversion, wherein the two lines are provided so as to overlap at least partially when viewed from the vertical direction of the surface of the semiconductor substrate, in a laminated structure with a second conductor containing a polycrystalline semiconductor. apparatus.
[0075]
(Embodiment 5) The transfer unit, the selection unit, and the initialization unit each include an insulated gate transistor, and the gates of the transfer unit, the selection unit, and the insulated gate transistor of the initialization unit are each the transfer line. , The selection line, is formed of the same material as the initialization line, and
The gate of the insulated gate transistor of the transfer means and the transfer line, the gate of the insulated gate transistor of the selection means and the selection line, the gate of the insulated gate transistor of the initialization means and the initialization line are made of different materials. The photoelectric conversion device according to any one of Embodiments 1 to 4, wherein the photoelectric conversion device is connected without any intervention.
[0076]
According to the photoelectric conversion device of the fifth embodiment, the selection means and the selection line, the initialization means and the initialization line, the contact hole connecting the transfer means and the transfer line, and the like can be omitted, and the aperture ratio can be further increased. It becomes.
[0077]
(Embodiment 6) A light-shielding film for shielding light other than a photoelectric conversion portion of the photoelectric conversion element is provided, and each of the selection line, the initialization line, and the transfer line is the first conductor or the second conductor. The output line is formed of a third conductor disposed on the second conductor, and the light-shielding film is formed of a fourth conductor disposed on the third conductor. The photoelectric conversion device according to any one of Embodiments 1 to 4, wherein the photoelectric conversion device is formed of a body.
[0078]
According to the photoelectric conversion device of the sixth embodiment, in addition, unnecessary light can be prevented from entering the amplifying unit or the floating diffusion (floating diffusion unit), and the image quality can be improved.
[0079]
(Embodiment 7) The amplifying means and the selecting means are constituted by field effect transistors, and the light shielding film is connected to the drain of the field effect transistor of the amplifying means or the drain of the field effect transistor of the selecting means. The photoelectric conversion device according to embodiment 6, wherein:
[0080]
According to the photoelectric conversion device of Embodiment 7, in addition, the light-shielding film can be used as the power supply wiring, and the aperture ratio can be further improved by using the necessary wiring as the light-shielding.
[0081]
(Embodiment 8) The photoelectric conversion device according to embodiment 6, wherein the insulating layer on which the third conductor is deposited is planarized by CMP.
[0082]
According to the photoelectric conversion device of the eighth embodiment, in addition, the unevenness of the layer on which the output line is to be deposited can be minimized by the CMP, which leads to the improvement of the yield and the aperture ratio by processing the output line with high accuracy.
[0083]
(Embodiment 9) The photoelectric conversion device according to embodiment 7 or 8, wherein the insulating layer on which the fourth conductor is deposited is planarized by CMP.
[0084]
According to the photoelectric conversion device of the ninth embodiment, in addition, for example, the incident angle dependency due to the difference in height from the silicon surface of the side of the polygon formed by the opening formed by the light-shielding film becomes a problem. In such a case, the height can be made uniform by introducing CMP, whereby the incident angle dependency can be solved.
[0085]
(Embodiment 10) The amplifying unit and the selecting unit each have an insulated gate transistor, and the gate of the insulated gate transistor of the amplifying unit and the gate of the insulated gate transistor of the selecting unit are interposed via an insulating layer. The photoelectric conversion device according to any one of Embodiments 1 to 9, wherein the photoelectric conversion device is stacked so as to overlap.
[0086]
According to the photoelectric conversion device of Embodiment 10, the margin between the gates of the selection transistor and the amplification transistor can be minimized, and the pixel size can be reduced.
[0087]
(Embodiment 11) An embodiment characterized in that the gate of the insulated gate transistor of the amplifying means is arranged below and the gate of the insulated gate transistor of the selection line is arranged above when viewed from the semiconductor substrate side. 11. The photoelectric conversion device according to 10.
[0088]
According to the photoelectric conversion device of the eleventh embodiment, by placing the gate of the amplification transistor below, it is possible to maintain the quality of the interface of the gate oxide film of the amplification transistor as best as possible, thereby reducing noise. Amplification becomes possible.
[0089]
(Embodiment 12) In the pixel, only the output line, the selection line, the initialization line, and the power supply line for supplying power to the transfer and the pixel are provided. The photoelectric conversion device according to any one of the above.
[0090]
According to the photoelectric conversion device of the twelfth embodiment, further improvement in the aperture ratio can be expected by eliminating the power supply wiring that has been conventionally required.
[0091]
(Embodiment 13) The interlayer insulating material between the stacked wirings is made of an oxide, a nitride, or a mixed compound of an oxide and a nitride of a wiring material positioned below the semiconductor base. The photoelectric conversion device according to any one of Embodiments 1 to 12, wherein
[0092]
According to the photoelectric conversion device of the thirteenth embodiment, by introducing a manufacturing process that can be easily introduced in the current semiconductor process, advantages can be obtained in both cost and reliability.
[0093]
(Embodiment 14) Any of Embodiments 1 to 13, wherein the interlayer insulating film between the stacked wirings is mainly formed by oxidizing a lower wiring when viewed from the semiconductor substrate side. A photoelectric conversion device according to any one of the above.
[0094]
According to the photoelectric conversion device of Embodiment 14, in addition, the insulating film formed by the material of the lower wiring layer itself can be used as the interlayer film, and the conductor can be deposited thereon. , Height rise can be minimized.
[0095]
(Embodiment 15) The photoelectric conversion device according to any one of embodiments 1 to 14, wherein the material of the first conductor and the second conductor is mainly polycrystalline silicon.
[0096]
According to the photoelectric conversion device of the fifteenth embodiment, in addition, high reliability and low cost are realized by using polycrystalline silicon (polysilicon), which is currently the most reliable as a device that oxidizes itself. be able to.
[0097]
(Embodiment 16) The material according to any one of 1 to 15, wherein the material of the first conductor is polycrystalline silicon, and the material of the second conductor is a compound of polycrystalline silicon and a metal. The photoelectric conversion device according to claim 1.
[0098]
According to the photoelectric conversion device of the sixteenth embodiment, in addition, the resistance of the wiring formed of the second conductor can be reduced, and high-speed driving can be performed.
[0099]
(Embodiment 17) The photoelectric conversion device according to any one of embodiments 1 to 16, wherein the photoelectric conversion device is formed on a substrate mainly composed of silicon.
[0100]
According to the photoelectric conversion device of the seventeenth embodiment, low-cost manufacturing can be achieved by using a silicon substrate which has an affinity with polysilicon for cleaning, thermal system, and the like.
[0101]
(Embodiment 18) At least a plurality of first storage units respectively connected to the plurality of output lines, and a plurality of second storage units respectively connected to the plurality of delay units. The photoelectric conversion device according to any one of aspects 1 to 17.
[0102]
According to the photoelectric conversion device of the eighteenth embodiment, it is possible to secure a frame rate that is almost the same as that of the related art even in the present invention in which control of pixels takes a relatively long time.
[0103]
(Embodiment 19) The embodiment 18 wherein the selection means for selectively reading out the contents stored in the plurality of second storage means is connected to the plurality of second storage means. The photoelectric conversion device according to claim 1.
[0104]
According to the photoelectric conversion device of the nineteenth embodiment, in addition, an analog value can be directly read from the storage unit, and the affinity for a system that requires an analog signal can be maintained.
[0105]
(Embodiment 20) The photoelectric conversion apparatus according to embodiment 18, wherein the plurality of second storage units are respectively connected to analog / digital conversion units.
[0106]
According to the photoelectric conversion device of the twentieth embodiment, in addition, compatibility with a system that requires a digital signal can be maintained.
[0107]
(Embodiment 21) An embodiment characterized in that the plurality of second storage units are grouped for each unit, and an analog / digital conversion unit is connected via a multiplex unit connected for each unit. 19. The photoelectric conversion device according to aspect 18.
[0108]
According to the photoelectric conversion device of the twenty-first embodiment, by sharing one AD converter in a sequence, the digital signal is output while the area of the sensor itself is reduced as compared with the photoelectric conversion device of the nineteenth embodiment. be able to.
[0109]
(Embodiment 22) The pixels included in the photoelectric conversion device according to any one of Embodiments 18 to 21 are scanned for each pixel group including a plurality of pixels in one row arranged in the other arrangement direction, and The output signal is held in the plurality of first storage units, the signal held in the plurality of second storage units is output, and the signal held in the plurality of second storage units is A method for driving a photoelectric conversion device, characterized in that, after being output, a signal held in the plurality of first storage units is transferred to the plurality of second storage units.
[0110]
According to the driving method of the photoelectric conversion device of the twenty-second embodiment, it is possible to provide a driving method capable of securing a frame rate that is almost the same as that of the related art even in the present invention in which control of pixels takes a relatively long time. .
[0111]
(Embodiment 23) An imaging system comprising at least an optical system for introducing light, the photoelectric conversion device according to any one of Embodiments 1 to 21, and a post-processing means for processing an output of the photoelectric conversion device.
[0112]
According to the imaging system of Embodiment 23, all the effects of the photoelectric conversion device of the present invention can be obtained even in an imaging system such as a digital camera.
[0113]
(Embodiment 24) The imaging system according to embodiment 23, wherein the post-processing means is formed on the same semiconductor substrate as the photoelectric conversion device.
[0114]
According to the imaging system of the twenty-fourth embodiment, all required post-processing means are contained on one IC, so that the number of chips and the mounting cost can be reduced.
[0115]
(Embodiment 25) The imaging system according to embodiment 23, wherein the post-processing means is formed on a semiconductor substrate different from the photoelectric conversion device.
[0116]
According to the imaging system of the twenty-fifth embodiment, a photoelectric conversion device with low noise can be realized by completely separating a digital IC that easily generates noise and an IC equipped with the photoelectric conversion device according to the present invention.
[0117]
【The invention's effect】
As described above, according to the present invention, the aperture ratio of the photoelectric conversion device can be increased. At this time, it is possible to prevent an increase in the distance from the microlens to the silicon surface, an increase in process cost, a decrease in yield, and the like without using a multilayer metal wiring layer. Further, it is possible to provide a driving method which does not reduce the signal reading speed.
[Brief description of the drawings]
FIG. 1 is a plan view in which pixels of a photoelectric conversion device according to a first embodiment of the present invention are seen through multiple layers from an upper surface.
FIG. 2 is an equivalent circuit diagram of the photoelectric conversion device according to the first embodiment.
3 (a) to 3 (c) are cross-sectional views of respective parts in FIG.
FIG. 4 is a plan view in which pixels of a photoelectric conversion device according to a second embodiment of the present invention are seen through a plurality of layers from the upper surface.
FIG. 5 is a sectional view taken along line CC ′ of FIG. 4;
FIG. 6 is a plan view in which pixels of a photoelectric conversion device according to a third embodiment of the present invention are seen through the multilayer from the top surface.
FIG. 7 is an equivalent circuit diagram of a photoelectric conversion device according to a third embodiment.
FIG. 8 is a plan view in which pixels of a photoelectric conversion device according to a fourth embodiment of the present invention are seen through a plurality of layers from the upper surface.
FIG. 9 is an equivalent circuit diagram of a photoelectric conversion device according to a fourth embodiment.
FIG. 10 is an explanatory diagram showing a signal reading system of the photoelectric conversion device of the present invention.
FIG. 11 is an explanatory diagram of the operation of the signal reading system according to FIG. 10;
FIG. 12 is a block diagram showing a case where the photoelectric conversion device of the present invention is applied to a still video camera.
FIG. 13 is a diagram viewed from above when an example of one pixel of the CMOS sensor is laid out.
[Explanation of symbols]
101 pixel selection line
102 Pixel reset line
103 transfer line
104 Pixel selection transistor gate
105 Pixel reset transistor gate
106 Gate of transfer transistor
107 output line
108 Light shielding film
109 Photoelectric conversion unit
110 Amplification means
111 Floating diffusion (floating diffusion part)
112 power supply
113 Wiring
201 insulating film
202 Substrate (p-type substrate or p-type well)
203 Embedded photodiode (n-type semiconductor)
204 ₁ Pixel reset transistor gate
204 ₂ Pixel selection transistor gate
204 ₃ The gate of the transistor that serves as the amplification
205 Highly doped n-layer
206 Gate oxide film

Claims (1)

At least a photoelectric conversion element, a transfer unit for transferring a signal from the photoelectric conversion element, an amplification unit for amplifying the transferred signal, a selection unit for outputting an output signal from the amplification unit, and an amplification unit Pixels having initialization means for initializing a signal transferred to the means are two-dimensionally arranged, a plurality of pixels arranged in one arrangement direction are connected to a common output line, and The selection means, the initialization means, and the transfer means of a plurality of pixels arranged in another arrangement direction different from the above are respectively connected to a common selection line, a common initialization line, and a common transfer line. In the device,
At least two of the selection line, the initialization line, and the transfer line are a first conductor including a polycrystalline semiconductor, and a polycrystal formed over the first conductor via an insulating layer. A photoelectric conversion device having a laminated structure with a second conductor containing a semiconductor, wherein the two wires are provided so as to at least partially overlap when viewed from a vertical direction of a surface of the semiconductor substrate.

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