JP2004289175A - Switch element, display device using same, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switch element that can short-circuit or open up three or more nodes simultaneously. <P>SOLUTION: The switch has an active layer 101, a gate insulating film 102 that is adjacent to the active layer 101, a gate electrode 103 that is adjacent to the gate insulating film 102, and three or more connection wirings 109 to 111. The active layer 101 has a channel formation area 104 and three or more impurity areas 105 to 107. The connection wirings 109 to 111 are respectively adjacent to each one of the different impurity areas 105 to 107. The impurity areas 105 to 107 have the same conductive type, and are each adjacent to the channel formation area 104. Further, a low-concentration impurity area or an offset area may be provided between the channel formation area 104 and the impurity areas 105 to 107. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

The present invention relates to a switch element formed using a semiconductor film. Further, the switch element formed on the substrate and an organic light emitting element (OLED: Organic Light Emit
ting Diode) between the substrate and the cover material.
Further, the present invention relates to an OLED module in which an IC or the like including a controller is mounted on the OLED panel. In this specification, both the OLED panel and the OLED module are collectively referred to as a light emitting device.

In recent years, a technique for forming a thin film transistor (hereinafter, referred to as a TFT) on a substrate has been greatly advanced, and application development to an active matrix display device has been advanced. The active matrix type display device displays an image by providing a TFT as a switch element for each pixel and sequentially writing a video signal to each pixel. A TFT is an essential element for realizing an active matrix display device.

The TFT also becomes a switch element having three terminals of a source electrode, a drain electrode, and a gate electrode. The electric resistance between the source electrode and the drain electrode is controlled by the voltage applied to the gate electrode.

By the way, in the active matrix type display device, a demand for higher definition of pixels has been increased against the background of a rapid increase in display quality and display information amount and a growing need for lightness, smallness and size. In addition, high functionality such as incorporating a memory in a pixel is being demanded.

However, even if an attempt is made to increase the definition and function of the pixel, the size of the TFT provided in each pixel is limited in view of securing the amount of on-current and withstand voltage.

However, in the case where the ratio of the area of the TFT to the pixel cannot be reduced, in the case of a liquid crystal display device, the area through which light is transmitted in the pixel is reduced, and the apparent luminance is reduced. Also, in the light emitting device, when the light emitted from the OLED is irradiated on the TFT side, OL
Light from the ED is blocked by the TFT, and the apparent brightness is reduced.

Therefore, it is desirable that the number and area of TFTs provided for each pixel be kept as small as possible.

However, if the circuit configuration of each pixel is determined, it is not usually possible to simply reduce the number of TFTs. For example, as shown in FIG. 15A, when it is necessary to simultaneously short-circuit or open three nodes A, B, and C in each pixel, in the case of a TFT that is a three-terminal switch element, at least two TFTs 3001 , 3002, and the number of TFTs cannot be reduced any more.

In particular, in the case of an active matrix type light emitting device, a TF provided in each pixel is generally compared with a liquid crystal display device which does not require anything other than a voltage signal writing switch.
The number of T is large, the connection is complicated, and it is difficult to reduce the number of TFTs.

The present invention has been made in view of the above-described problem, and has as its object to provide a switch element that can simultaneously short-circuit or open three or more nodes and that can reduce the area occupied by a substrate. Another object is to provide an active matrix display device using the switch element.

Also, a problem in putting the light emitting device to practical use is a decrease in the luminance of the OLED due to the deterioration of the organic light emitting material. Note that an OLED has a layer containing an organic compound (organic light emitting material) from which luminescence (Electroluminescence) generated by applying an electric field is obtained (hereinafter, referred to as an organic light emitting layer), an anode layer, and a cathode layer. ing. Luminescence of an organic compound includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission (phosphorescence) when returning from a triplet excited state to a ground state. Either one of the above-described light emissions may be used, or both light emissions may be used.

In the present specification, all the layers provided between the anode and the cathode of the OLED are defined as organic light emitting layers. The organic light emitting layer specifically includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, an OLED has a structure in which an anode / light-emitting layer / cathode is laminated in this order. In addition to this structure, an anode / hole injection layer / light-emitting layer / cathode or anode / hole injection layer / cathode / It may have a structure in which a light-emitting layer / electron transport layer / cathode are stacked in this order.

Organic light-emitting materials are susceptible to moisture, oxygen, light, and heat, and degradation is promoted by these materials. Specifically, the speed of the deterioration depends on the structure of the device for driving the light emitting device, the characteristics of the organic light emitting material, the material of the electrode, the conditions in the manufacturing process, the driving method of the light emitting device, and the like.

Even if the voltage applied to the organic light emitting layer is constant, if the organic light emitting layer deteriorates, the OLED
Of the image becomes low, and the displayed image becomes unclear.

When a color image is displayed using three types of OLEDs corresponding to R (red), G (green), and B (blue), the organic light emitting material constituting the organic light emitting layer is O
It depends on the corresponding color of the LED. Thus, the organic light emitting layer of the OLED may degrade at different rates for each corresponding color. In this case, as the time elapses, the luminance of the OLED differs for each color, and it becomes impossible to display a desired color on the light emitting device.

In addition, the temperature of the organic light emitting layer depends on the outside air temperature, heat generated by the OLED panel itself, and the like. In general, the value of the current flowing in the OLED changes depending on the temperature. Even when the voltage is constant, when the temperature of the organic light emitting layer increases, the current flowing through the OLED increases. Since the current flowing in the OLED and the luminance of the OLED are in a proportional relationship, OLE
The greater the current flowing through D, the higher the brightness of the OLED. As described above, since the luminance of the OLED changes depending on the temperature of the organic light emitting layer, it is difficult to display a desired gray scale, and the current consumption of the light emitting device increases as the temperature increases.

Further, in general, the degree of change of the flowing current due to the temperature change varies depending on the type of the organic light emitting material. Therefore, in the color display, the luminance of the OLED of each color may vary depending on the temperature. If the balance of the luminance of each color is lost, a desired color cannot be displayed.

In view of the above, it is an object of the present invention to provide a light emitting device that can obtain a constant luminance without being affected by deterioration of an organic light emitting layer or a change in temperature and that can perform a desired color display. And

The present invention is a novel switch element having at least four terminals capable of simultaneously short-circuiting or opening three or more nodes, and a light-emitting device using the switch element.

Specifically, the switch element has an active layer, an insulating film in contact with the active layer, a gate electrode in contact with the insulating film, and three or more electrodes (hereinafter, referred to as connection electrodes in this specification). are doing. The active layer has at least one channel forming region and three or more impurity-doped regions, and the connection electrodes are in contact with one of the different impurity regions.

An impurity region in contact with an arbitrary connection terminal is in contact with only one of the channel formation regions. Note that an impurity region in contact with an arbitrary connection terminal may have a low-concentration impurity region sandwiched between the one channel formation region and the one channel formation region. In other words, any two impurity regions in contact with a connection terminal do not sandwich an impurity region in contact with another connection terminal.

The gate electrode overlaps with the channel formation region with an insulating film interposed therebetween. And
By controlling the voltage applied to the gate electrode, the resistance between the connection electrodes can be controlled, and all the connection electrodes can be short-circuited or opened at the same time.

In the switch element of the present invention, a gate electrode may be provided between the substrate and the active layer, or an active layer may be provided between the gate electrode and the substrate.

By using the switch element, an area occupied by a pixel can be reduced as compared with a case where a switch circuit is configured by a plurality of TFTs, and high definition or high functionality can be achieved while maintaining the aperture ratio of the pixel. .

In general, light is emitted while maintaining a constant voltage applied to the OLED,
In the case of emitting light while keeping the current flowing through the ED constant, the latter can reduce the decrease in luminance due to the deterioration of the OLED. In this specification, OL
The current flowing through the ED is called an OLED current, and the voltage applied to the OLED is called an OLED voltage. That is, the luminance of the OLED is controlled not by the voltage but by the current, so that the change in the emission luminance of the OLED due to the deterioration of the OLED can be suppressed.

Therefore, it is preferable to provide the switch element of the present invention in each pixel, and control the drain current Id of the transistor that controls the current flowing to the OLED in the signal line drive circuit when the switch element is on.

When the drain current Id flows, a voltage is generated between the gate electrode and the source region of the transistor that controls the current flowing in the OLED. Then, while maintaining the voltage, the drain current of the transistor is increased by OLE through one or more circuit elements.
D. The transistor that controls the current flowing through the OLED is:
Operate in the saturation region.

In the above configuration, the value of the current flowing through the OLED is controlled by the signal line driving circuit. Therefore, it is possible to control the current flowing through the OLED to a desired value without being affected by a difference in characteristics of a transistor that controls the current flowing through the OLED, deterioration of the OLED, or the like.

In the present invention, the above-described configuration using the switch element can suppress a decrease in the luminance of the OLED even when the organic light emitting layer is deteriorated, and as a result, a clear image can be displayed. Also, in the case of a light emitting device for color display using OLEDs corresponding to each color, even if the organic light emitting layer of the OLED deteriorates at a different speed for each corresponding color, it is possible to prevent the luminance balance of each color from being lost. A desired color can be displayed.

Further, even when the temperature of the organic light emitting layer is affected by the outside air temperature, the heat generated by the OLED panel itself, or the like, the OLED current can be controlled to a desired value. Therefore, since the OLED current and the luminance of the OLED are proportional, it is possible to suppress a change in the luminance of the OLED and to prevent an increase in current consumption with an increase in temperature.
Further, in the case of a color display light-emitting device, a change in the luminance of each color OLED can be suppressed without being affected by a temperature change, so that the balance of the luminance of each color can be prevented from being lost and a desired color can be displayed. can do.

Further, in general, the degree of change of the OLED current in the temperature change varies depending on the type of the organic light emitting material. Therefore, in the color display, the luminance of the OLED of each color may vary depending on the temperature. However, in the light emitting device of the present invention, a desired luminance can be obtained without being affected by a change in temperature. Therefore, it is possible to prevent the luminance balance of each color from being lost and to display a desired color.

In a general light-emitting device, the wiring itself for supplying a current to the OLED itself has a resistance, so that the potential of the wiring slightly decreases depending on the length of the wiring. And this drop in potential
It varies greatly depending on the image to be displayed. In particular, in a plurality of pixels to which current is supplied from the same wiring, when the proportion of pixels having a high number of gradations becomes large, the current flowing through the wiring becomes large, and the potential drops significantly. When the potential drops, the OLE of each pixel
Since the voltage applied to D decreases, the current supplied to each pixel decreases. Therefore, even if an attempt is made to display a certain gradation in a certain pixel, if the number of gradations of another pixel to which the current is supplied from the same wiring changes, the current supplied to the certain pixel accordingly increases. And, as a result, the number of gradations also changes. However, in the light emitting device of the present invention, the current flowing through each OLED can be maintained at a desired value.
It is possible to prevent the gradation from changing due to the potential drop due to the wiring resistance.

Further, by using the switch element of the present invention, the proportion of the area of the transistor in each pixel can be reduced.

Note that in the light emitting device of the present invention, a transistor used for a pixel may be a transistor formed using polycrystalline silicon or a thin film transistor using amorphous silicon. Further, a transistor using an organic semiconductor may be used.

Note that the transistor provided in the pixel of the light emitting device of the present invention may have a single-gate structure, a double-gate structure, or a multi-gate structure having more gate electrodes.

Note that the switch element of the present invention can be used not only for a display device but also for any semiconductor device including an integrated circuit.

With the switch element of the present invention, the area of the switch element can be reduced, and the pixel can have higher definition or higher function.

Further, in the light emitting device of the present invention using the switch element, even if the characteristics of the transistor Tr1 controlling the current flowing in the OLED differ between pixels, a difference occurs in the magnitude of the current flowing in the OLED between pixels. Can be prevented, and uneven brightness can be suppressed. Further, the area of the pixel circuit can be reduced, and as a result, the aperture ratio increases,
Power saving and improvement in reliability of the light emitting device can be achieved.

Further, the light emitting device of the present invention using the switch element can obtain a constant luminance without being affected by a temperature change. Further, in the color display, even when the OLEDs having different organic light emitting materials for each color are provided, it is possible to prevent the luminance of the OLED of each color from being varied depending on the temperature and preventing a desired color from being obtained.

(Embodiment 1)
The configuration of the switch element of the present invention will be described with reference to FIG. FIG. 1A is a top view of a transistor of the present invention, and FIG. 1B is a cross-sectional view of FIG.
FIG. 1C corresponds to a cross-sectional view taken along a broken line BB ′ in FIG. 1A.

The transistor of the present invention comprises an active layer 101 and a gate insulating film 1 in contact with the active layer.
02 and a gate electrode 103 in contact with the gate insulating film 102. The active layer 101 has a channel formation region 104 and impurity regions 105, 106, and 107 to which an impurity imparting conductivity is added. The gate electrode 103 and the channel formation region 104 overlap with a gate insulating film interposed therebetween.

The impurity regions 105, 106, and 107 are in contact with the channel formation region 104, respectively. Note that in this embodiment, all the impurity regions are in contact with the channel formation region 104; however, the present invention is not limited to this structure. A low-concentration impurity region (LD) having a lower impurity concentration than the impurity region is provided between the impurity region and the channel formation region.
D region) may be provided, or a region (offset region) which does not overlap with the gate electrode and to which an impurity is not added may be provided.

An insulating film 108 is formed on gate insulating film 102 so as to cover impurity regions 105, 106, and 107 of active layer 101. Then, the impurity regions 105 and 10 are formed through contact holes formed in the insulating film 108 and the gate insulating film 102.
Connection wirings 109, 110, and 111 connected to 6 and 107, respectively, are formed. Note that in FIG. 1, the gate insulating film 102 is formed of the impurity regions 105, 106, and 107.
However, the present invention is not limited to this configuration. Impurity regions 105 and 106
, 107 do not necessarily need to be covered with the gate insulating film 102 and may be exposed.

The switch element shown in FIG. 1 operates according to the voltage applied to the gate electrode 103.
The resistance between the connection wirings 109, 110, 111 is controlled.

1 includes three nodes, specifically, connection wirings 109 and 110,
111 can be connected simultaneously. In this specification, connection means electrical connection unless otherwise specified.

With the above structure, an area occupied by a transistor or the like to which a switch element is added can be reduced, and a pixel can be made higher definition or more sophisticated without reducing the aperture ratio of the pixel. On the other hand, when the connection of three nodes is controlled using a TFT, 2
It is necessary to use one or more transistors.

(Embodiment 2)
FIG. 2 is a block diagram showing the configuration of the OLED panel of the present invention. Reference numeral 200 denotes a pixel portion in which a plurality of pixels 201 are formed in a matrix. Reference numeral 202 denotes a signal line driving circuit, 203 denotes a first scanning line driving circuit, and 204 denotes a second scanning line driving circuit.

Although the signal line driver circuit 202, the first scan line driver circuit 203, and the second scan line driver circuit 204 are formed over the same substrate as the pixel portion 200 in FIG. 2, the present invention is not limited to this structure. A signal line driver circuit 202, a first scan line driver circuit 203, and a second scan line driver circuit 204 are formed over a substrate different from the pixel portion 200, and the FPC
May be connected to the pixel unit 200 via a connector such as. In FIG. 2, the signal line driving circuit 202, the first scanning line driving circuit 203, and the second scanning line driving circuit 2
04 are provided one by one, but the present invention is not limited to this configuration. The designer can arbitrarily set the numbers of the signal line driving circuits 202, the first scanning line driving circuits 203, and the second scanning line driving circuits 204.

Although not shown in FIG. 2, the pixel portion 200 includes signal lines S1 to Sx, power supply lines V1 to Vx, first scanning lines G1 to Gy, and second scanning lines P1 to Py.
Note that the number of signal lines and the number of power supply lines are not always the same. Further, the number of the first scanning lines and the number of the second scanning lines are not always the same. Further, it is not always necessary to have all of these wirings, and another different wiring may be provided in addition to these wirings.

The power supply lines V1 to Vx are maintained at a predetermined voltage. Note that FIG. 2 illustrates the configuration of a light-emitting device that displays a monochrome image, but the present invention may be a light-emitting device that displays a color image. In this case, the heights of the voltages of the power supply lines V1 to Vx do not need to be all the same, and may be changed for each corresponding color.

Note that in this specification, a voltage means a potential difference from the ground unless otherwise specified.

FIG. 3 shows a detailed configuration example of the pixel 201 shown in FIG. Pixel 20 shown in FIG.
Reference numeral 1 denotes a signal line Si (one of S1 to Sx), a first scanning line Gj (one of G1 to Gy), a second scanning line Pj (one of P1 to Py), and a power supply. Line Vi (V
1 to Vx).

The pixel 201 includes a switch element Sw1 of the present invention and a thin film transistor Tr1.
, Tr2, an OLED 205 and a storage capacitor 206. Storage capacity 20
6 is provided to more reliably maintain the voltage (gate voltage) between the gate electrode and the source region of the switch element Sw1, but is not necessarily provided if the gate capacitance of Tr1 is sufficiently large.

The switch element Sw1 of the present invention is a four-terminal thin-film element capable of controlling connection of three nodes by a voltage applied to a gate electrode. The gate electrode of the switch element Sw1 is connected to the first scanning line Gj. The three impurity regions of the switch element Sw1 are connected, one to the signal line Si, one to the gate electrode of the transistor Tr1, and one to the drain region of the transistor Tr1.

Note that in this specification, in the case of an n-channel transistor, a voltage applied to a source region which is an impurity region is lower than a voltage applied to a drain region which is also an impurity region. In the case of a p-channel transistor, the voltage applied to the source region is higher than the voltage applied to the drain region.

The gate electrode of the transistor Tr2 is connected to the second scanning line Pj. One of the source region and the drain region of the transistor Tr2 is the transistor Tr2.
One is connected to the drain region, and the other is connected to the power supply line Vi.

The source region of the transistor Tr1 is connected to the pixel electrode of the OLED 205. The OLED 205 has an anode and a cathode. In this specification, the cathode is called a counter electrode when the anode is used as a pixel electrode, and the anode is called a counter electrode when the cathode is used as a pixel electrode.

One of the two electrodes of the storage capacitor 206 is connected to the gate electrode and the source region of the switch element Sw1, respectively.

The voltage of the power supply line Vi (power supply voltage) is kept at a constant height. Also, the voltage of the counter electrode is kept at a constant height.

It should be noted that the present invention is not limited to the circuit of FIG.
Tr1 may be either an n-channel transistor or a p-channel transistor. However, when the anode is used as a pixel electrode and the cathode is used as a counter electrode, T
r1 is preferably an n-channel transistor. Conversely, when the anode is used as a counter electrode and the cathode is used as a pixel electrode, Tr1 is preferably a p-channel transistor.

The switch elements Sw1 and Tr2 may be either n-channel transistors or p-channel transistors.

Next, the operation of the light emitting device of the present embodiment described above will be described with reference to FIGS. The operation of the light emitting device of the present invention can be described separately for the writing period Ta and the display period Td for each pixel of each line. FIG. 4 shows a timing chart of the first and second scanning lines. During a period in which the scanning line is selected, in other words, a period in which all the transistors whose gate electrodes are connected to the scanning line are in an on state,
Shown by ON. Conversely, during a period in which a scanning line is not selected, in other words, a period in which all transistors whose gate electrodes are connected to the scanning line are in an off state,
Indicated by FIG. 5 is a diagram simply showing a configuration of a pixel in a writing period Ta and a display period Td.

First, when the writing period Ta starts in the pixels of the first line, the first scanning line G1 is selected, and the switch element Sw1 is turned on. Since the second scanning line P1 is not selected, the transistor Tr2 is off.

Then, based on the video signal input to the signal line driving circuit 202, the signal line S1
A current Ic flows between .about.Sx and the opposing electrode of the OLED 205, respectively. In this specification, the current Ic is called a signal current.

FIG. 5A is a schematic diagram of the pixel 201 when the signal current Ic flows through the signal line Si in the writing period Ta. Reference numeral 210 denotes a terminal for connection to a power supply that applies a voltage to the counter electrode. Reference numeral 211 denotes a constant current source included in the signal line driving circuit 202.

Since the switch element Sw1 is on during the writing period, when the signal current Ic flows through the signal line Si, the current Id (drain current) flowing between the drain region and the source region of the switch element Sw1 has substantially the same value as the signal current Ic. Will be kept.

In the writing period, the transistor Tr1 operates in the saturation region because the gate electrode and the drain region are connected. Therefore, if the gate voltage is V _GS , μ is the mobility, C ₀ is the gate capacitance per unit area, W / L is the ratio of the channel width W to the channel length L of the channel formation region, and V _TH is the threshold, the transistor Tr1 Is expressed by the following equation 1.

_{Id = μC 0 W / L (} V GS -V TH) 2/2 ··· ( Equation 1)

In Equation 1, μ, C ₀ , W / L, and V _TH are all fixed values determined by individual transistors. The drain current Id of the transistor Tr1 is equal to the constant current source 2
11 keeps the same magnitude as the signal current Ic. Therefore, as can be seen from Equation 1, the gate voltage V _GS of the transistor Tr1 is determined by the value of the signal current Ic.

Then, the drain current Id of the transistor Tr1 flows to the OLED 205,
The LED 205 emits light with a luminance corresponding to the magnitude of the current. If the drain current Id is infinitely close to 0 or a reverse bias current, the OLED 205 does not emit light.

When the writing period Ta ends in the pixels on the first line, the selection of the first scanning line G1 ends. Then, the writing period Ta is started in the pixels on the second line, and the first scanning line G2 is selected. Therefore, the switch element Sw1 is turned on in the pixels on the second line. Then, since the second scanning line P2 is not selected, the transistor Tr2 is turned off.

Then, based on the video signal input to the signal line driving circuit 202, the signal line S1
A signal current Ic flows between .about.Sx and the opposing electrode of the OLED 205. Therefore, O
The current flowing through the LED 205 is kept the same as the signal current Ic, and the signal current Ic
The OLED 205 emits light at a luminance corresponding to the size of.

Then, the writing period Ta ends in the pixels on the second line, and thereafter, similarly, the writing period Ta is started sequentially from the third line to the pixels on the y-th line, and the above-described operation is repeated.

On the other hand, when the writing period Ta ends in the pixels on the first line, the display period Td starts next. When the display period Td starts, the second scanning line P1 is selected. Therefore, the transistor Tr2 is turned on in the pixels on the first line. Since the first scanning line G1 is not selected in the display period Td, the switching element Sw is not selected.
1 is off.

FIG. 5B is a schematic diagram of a pixel in the display period Td. Switch element Sw
1 is off and the transistor Tr2 is on, so that the transistor T
The drain region of r1 is connected to the power supply line Vi, and a constant voltage (power supply voltage) is applied.

The transistor Tr1 holds the V _GS defined in the writing period Ta by the holding capacitor 206, and the drain current I
d remains at the signal current Ic. Therefore, similarly to the writing period Ta, the current flowing through the OLED 205 is maintained at the same magnitude as the signal current Ic also in the display period Td. Therefore, in the display period Td, the OLED 205 emits light at the same luminance as the writing period Ta.

When the display period Td ends in the pixels on the first line, the display period Td starts next in the pixels on the second line. And like the pixels on the first line,
The second scanning line P2 is selected, and the transistor Tr2 is turned on. Since the first scanning line G2 is not selected, the switch element Sw1 is off. Then, the OLED 205 emits light with the same luminance as the writing period.

Then, the display period Td ends in the pixels on the second line, and thereafter, similarly, 3
The display period Td starts in order from the pixel on the line to the pixel on the y-th line, and the above-described operation is repeated.

When the writing period Ta and the display period Td end, one frame period ends, and
One image is displayed. Then, the next frame period is started, and the above operation is repeated again. The gradation of each pixel is determined by the magnitude of the current flowing through the OLED 205 in the writing period Ta and the display period Td.

With the above operation, the transistor Tr1 controlling the current flowing to the OLED
Even if the characteristics are different between the pixels, it is possible to prevent a significant variation in the magnitude of the current flowing through the OLED between the pixels, and to suppress the uneven brightness.

Further, in the present invention, with the above configuration, even if the organic light emitting layer is deteriorated, a decrease in the luminance of the OLED can be suppressed, and as a result, a clear image can be displayed. Also,
In the case of a light emitting device for color display using OLED corresponding to each color, even if the organic light emitting layer of the OLED deteriorates at a different speed for each corresponding color, it is desirable to prevent the luminance balance of each color from being lost. Color can be displayed.

Further, even when the temperature of the organic light emitting layer is affected by the outside air temperature, the heat generated by the OLED panel itself, or the like, the OLED current can be controlled to a desired value. Therefore, since the OLED current and the luminance of the OLED are proportional, it is possible to suppress a change in the luminance of the OLED and to prevent an increase in current consumption with an increase in temperature.
Further, in the case of a color display light-emitting device, a change in the luminance of each color OLED can be suppressed without being affected by a temperature change, so that the balance of the luminance of each color can be prevented from being lost and a desired color can be displayed. can do.

Further, in general, the degree of change of the OLED current in the temperature change varies depending on the type of the organic light emitting material. Therefore, in the color display, the luminance of the OLED of each color may vary depending on the temperature. However, in the light emitting device of the present invention, a desired luminance can be obtained without being affected by a change in temperature. Therefore, it is possible to prevent the luminance balance of each color from being lost and to display a desired color.

Further, in the light emitting device of the present invention, the current flowing through each OLED can be maintained at a desired value, so that a change in gradation due to a potential drop due to wiring resistance can be prevented.

Further, by using the switch element of the present invention, the proportion of the area of the transistor in each pixel can be reduced.

Note that the organic light-emitting element used in this embodiment includes a material in which a hole-injection layer, an electron-injection layer, a hole-transport layer, an electron-transport layer, or the like is an inorganic compound alone or a mixture of an organic compound and an inorganic compound. It can also take the form formed by. Further, these layers may be partially mixed with each other.

(Embodiment 3)
In the second embodiment, the case where the video signal is analog has been described. However, it is also possible to drive using a digital video signal.

In the case of a time grayscale driving method using a digital video signal (digital driving method), one image can be displayed by repeatedly appearing the writing period Ta and the display period Td during one frame period. is there.

For example, when an image is displayed by an n-bit video signal, at least n writing periods and n display periods are provided in one frame period. The n writing periods (Ta1 to Tan) and the n display periods (Td1 to Tdn) correspond to each bit of the video signal.

After the writing period Tam (m is an arbitrary number from 1 to n), a display period corresponding to the same number of bits, in this case, Tdm appears. The writing period Ta and the display period Td are collectively called a sub-frame period SF. The sub-frame period including the writing period Tam and the display period Tdm corresponding to the m-th bit is SFm.

The length of the sub-frame periods SF1 to SFn is SF1: SF2:...: SFn = 2
⁰ : 2 ¹ : ...: 2 ^n-1 is satisfied.

In each sub-frame period, whether or not the OLED emits light is selected by each bit of the digital video signal. Then, by controlling the sum of the lengths of the display periods during which light is emitted in one frame period, the number of gray scales can be controlled.

In order to improve the image quality on display, a sub-frame period having a long display period may be divided into several sub-frame periods. For the specific method of division, see Japanese Patent Application No. 2000-2671.
No. 64, which can be referred to.

Note that a period in which a reverse bias voltage is applied to the organic light emitting layer may be provided to extend the life of the organic light emitting layer.

  Hereinafter, examples of the present invention will be described.

(Example 1)
In this embodiment, a transistor of the present invention having a so-called multi-gate structure in which two or more channel formation regions are provided between impurity regions connected to connection wirings will be described. In this embodiment, a transistor having a double gate structure in which two channel formation regions are provided between connection wirings is described; however, the present invention is not limited to a double gate structure, and a channel formation region is provided between connection wirings. A multi-gate structure having three or more gates may be provided.

The structure of the transistor of this embodiment will be described with reference to FIGS. FIG. 6 (A)
FIG. 6B is a top view of the transistor of the present invention, and FIG.
FIG. 6C corresponds to a cross-sectional view taken along a broken line BB ′ in FIG. 6A.

The transistor of the present invention comprises an active layer 301 and a gate insulating film 3 in contact with the active layer.
02 and the gate electrodes 303a, 303b, 303c in contact with the gate insulating film 302.
And The gate electrodes 303a, 303b, 303c are electrically connected, and in this embodiment, all the gate electrodes are a part of the gate wiring 313. The active layer 301 includes channel formation regions 304a, 304b, and 304c, and impurity regions 305, 306, 307, and 312 to which an impurity imparting conductivity is added.

The gate electrode 303a and the channel formation region 304a overlap with the gate insulating film 302 interposed therebetween. The gate electrode 303b and the channel formation region 304b overlap with the gate insulating film 302 interposed therebetween. The gate electrode 303c and the channel formation region 304c overlap with the gate insulating film 302 interposed therebetween.

The impurity regions 305, 306, and 307 are channel forming regions 304a, 3
04b, 304c. The impurity region 312 is in contact with all the channel formation region formation regions 304a, 304b, 304c. Therefore, two channel formation regions 304a and 304b are provided between the impurity regions 305 and 306, and two channel formation regions 304 are provided between the impurity regions 306 and 307.
b and 304c are provided, and two channel forming regions 304c and 304a are provided between the impurity regions 307 and 305.

Note that in this embodiment, all the impurity regions are in contact with the channel formation region, but the present invention is not limited to this structure. A low-concentration impurity region (LDD region) having a lower impurity concentration than the impurity region may be provided between the impurity region and the channel formation region, or a region to which an impurity which does not overlap with the gate electrode is added (an offset region). ) May be provided.

An insulating film 308 is formed over the gate insulating film 302 so as to cover the impurity regions 305, 306, and 307 of the active layer 301. Then, the impurity regions 305 and 30 are formed through the contact holes formed in the insulating film 308 and the gate insulating film 302.
Connection wirings 309, 310, and 311 connected to 6, 6 and 307, respectively, are formed. Note that in FIG. 6, the gate insulating film 302 is formed of the impurity regions 305, 306, and 307.
However, the present invention is not limited to this configuration. Impurity regions 305, 306
, 307 need not necessarily be covered by the gate insulating film 302, and may be exposed.

In the switch element shown in FIG. 6, the resistance between the connection wirings 309, 310, and 311 is controlled by the voltage applied to the gate electrodes 303a, 303b, and 303c.

6 includes three nodes, specifically, connection wirings 309 and 310,
311 can be connected simultaneously. In this specification, connection means electrical connection unless otherwise specified.

With the above structure, the area of the switch element can be reduced, the area occupied by the switch element in the pixel can be reduced, and the pixel can have higher definition. On the other hand, when connection of three nodes is controlled using a double-gate three-terminal transistor, for example, the connection is performed as shown in FIG. 15B, which is clearly shown in FIG.
) Occupies a larger area than the switch element.

In addition, a multi-gate structure can reduce off-state current as compared with a single-gate structure, and thus is more suitable for use as a switch element.

(Example 2)
In this embodiment, a description will be given of a five-terminal switch element of the present invention in which connection between four nodes can be controlled by a voltage applied to a gate electrode.

The configuration of the switch element of the present invention will be described with reference to FIG. FIG. 7A is a top view of the transistor of the present invention, and FIG. 7B is a broken line A-
FIG. 7C corresponds to a cross-sectional view taken along a broken line BB ′ in FIG. 7A.

The transistor of this embodiment has an active layer 501, a gate insulating film 502 in contact with the active layer, and a gate electrode 503 in contact with the gate insulating film 502. The active layer 501 includes a channel formation region 504 and impurity regions 505, 506, 507, and 508 to which an impurity imparting a conductivity type is added. The gate electrode 503 and the channel formation region 504 overlap with a gate insulating film interposed therebetween.

The impurity regions 505, 506, 507, and 508 are respectively formed in the channel formation region 50.
It touches 4. Note that in this embodiment, all the impurity regions are in contact with the channel formation region 504, respectively, but the present invention is not limited to this structure. A low-concentration impurity region (having a lower impurity concentration than the impurity region) between the impurity region and the channel formation region.
An LDD region may be provided, or a region (offset region) which does not overlap with the gate electrode and to which an impurity is not added may be provided.

An insulating film 509 is formed over the gate insulating film 502 so as to cover the impurity regions 505, 506, 507, and 508 of the active layer 501. Then, the impurity region 50 is formed through the contact holes formed in the insulating film 509 and the gate insulating film 502.
5, 506, 507, and 508, the connection wirings 510, 511, and 5 connected respectively.
12, 513 are formed. Note that although the gate insulating film 502 covers the impurity regions 505, 506, 507, and 508 in FIG. 7, the present invention is not limited to this structure. The impurity regions 505, 506, 507, and 508 are not necessarily formed in the gate insulating film 5.
02 need not be covered, and may be exposed.

The switch element shown in FIG. 7 operates according to the voltage applied to the gate electrode 503.
The resistance between the connection wirings 510, 511, 512, and 513 is controlled.

The switch element in FIG. 7 includes four nodes, specifically, connection wirings 510 and 511,
512 and 513 can be connected simultaneously. In this specification, connection means electrical connection unless otherwise specified.

With the above structure, the area of the switch element can be reduced, the area occupied by the switch element in the pixel can be reduced, and the pixel can have higher definition.

In this embodiment, a five-terminal transistor capable of controlling connection of four nodes is described; however, the transistor of the present invention is not limited to four terminals or five terminals. It is possible to design a transistor according to the number of nodes.

(Example 3)
Example 1 In this example, a bottom-gate transistor of the present invention in which a gate electrode is formed between a substrate and an active layer will be described.

The structure of the transistor of the present invention will be described with reference to FIGS. FIG. 8A is a top view of the transistor of the present invention, and FIG.
FIG. 8C corresponds to a cross-sectional view taken along a broken line BB ′ in FIG. 8A.

The switch element of this embodiment has a gate electrode 701, a gate insulating film 702 in contact with the gate electrode 701, and an active layer 703 in contact with the gate insulating film 702. The active layer 703 includes a channel formation region 704 and impurity regions 705, 706, and 707 to which an impurity imparting a conductivity type is added. Gate electrode 70
1 and the channel formation region 704 overlap with the gate insulating film 702 interposed therebetween. Note that a mask 708 is used for forming a channel formation region, and is formed of an insulating film.

The impurity regions 705, 706, and 707 are in contact with the channel formation region 704, respectively. In this embodiment, all the impurity regions are formed in the respective channel forming regions 70.
4, but the present invention is not limited to this configuration. A low-concentration impurity region (LDD region) having a lower impurity concentration than the impurity region may be provided between the impurity region and the channel formation region, or a region to which an impurity which does not overlap with the gate electrode is added (an offset region). ) May be provided.

The insulating film 709 covers the impurity regions 705, 706, and 707 of the active layer 703.
Is formed. Then, connection wirings 710 connected to the impurity regions 705, 706, and 707 through contact holes formed in the insulating film 709, respectively.
711 and 712 are formed.

The switch element shown in FIG. 8 operates according to the voltage applied to the gate electrode 701.
The resistance between the connection wirings 710, 711, 712 is controlled.

The switch element in FIG. 8 includes three nodes, specifically, connection wirings 710 and 711,
712 can be connected simultaneously. In this specification, connection means electrical connection unless otherwise specified.

With the above structure, the area of the switch element can be reduced, the area occupied by the switch element in the pixel can be reduced, and the pixel can have higher definition.

Note that a multi-gate structure may be provided by providing two or more channel formation regions between each connection wiring.

(Example 4)
In this embodiment, a structure of a driving circuit (a signal line driving circuit, a first scanning line driving circuit, and a second scanning line driving circuit) included in a light emitting device of the present invention driven by an analog driving method will be described.

FIG. 9A is a block diagram of the signal line driver circuit 401 of this embodiment. Reference numeral 402 denotes a shift register, 403 denotes a buffer, 404 denotes a sampling circuit, and 405 denotes a current conversion circuit.

A clock signal (CLK) and a start pulse signal (
SP) has been entered. When a clock signal (CLK) and a start pulse signal (SP) are input to the shift register 402, a timing signal is generated.

The generated timing signal is amplified or buffer-amplified in the buffer 403 and input to the sampling circuit 404. Note that a level shifter may be provided instead of the buffer to amplify the timing signal. Further, both a buffer and a level shifter may be provided.

FIG. 9B illustrates a specific structure of the sampling circuit 404 and the current conversion circuit 405. Note that the sampling circuit 404 is connected to the buffer 403 at a terminal 410.

The sampling circuit 404 is provided with a plurality of switches 411. An analog video signal is input to the sampling circuit 404 from the video signal line 406, and the switch 411 samples the analog video signal in synchronization with the timing signal, and inputs the sampled analog video signal to the current conversion circuit 405 in the subsequent stage. FIG. 9 (B
In), the current conversion circuit 405 includes the switch 411 of the sampling circuit 404.
Only the current conversion circuit connected to one of the switches 411 is shown, but it is assumed that a current conversion circuit 405 as shown in FIG.

Although only one transistor is used for the switch 411 in this embodiment,
The switch 411 may be any switch that can sample an analog video signal in synchronization with the timing signal, and is not limited to the configuration of the present embodiment.

The sampled analog video signal is input to a current output circuit 412 included in the current conversion circuit 405. The current output circuit 412 outputs a current (signal current) having a value corresponding to the voltage of the input video signal. Note that although a current output circuit is formed using an amplifier and a transistor in FIG. 9, the present invention is not limited to this configuration, and any circuit that can output a current having a value corresponding to an input video signal is used. Good.

The signal current is input to a reset circuit 417 included in the current conversion circuit 405. The reset circuit 417 has two analog switches 413 and 414, an inverter 416, and a power supply 415.

The reset signal (Res) is input to the analog switch 414, and the reset signal (Res) inverted by the inverter 416 is input to the analog switch 413. The analog switch 413 and the analog switch 414 operate in synchronization with the inverted reset signal and the reset signal, respectively, and when one is on, one is off.

When the analog switch 413 is on, a signal current is input to a corresponding signal line. Conversely, when the analog switch 414 is on, the voltage of the power supply 415 is applied to the signal line, and the signal line is reset. Note that the voltage of the power supply 415 is desirably substantially the same as the voltage of the power supply line provided in the pixel. The closer the current flowing to the signal line is to 0 when the signal line is reset, the better. .

It is desirable that the signal line be reset during the flyback period. However, if it is out of the period during which the image is displayed, it can be reset to a period other than the flyback period as needed.

Note that instead of the shift register, another circuit such as a decoder circuit which can select a signal line may be used.

  Next, the configuration of the first scanning line driving circuit will be described.

FIG. 10 is a block diagram showing a configuration of the first scanning line driving circuit 641. The first scanning line driver circuit 641 has a shift register 642 and a buffer 643, respectively. In some cases, a level shifter may be provided.

In the first scanning line driving circuit 641, the clock CLK is supplied to the shift register 642.
And the start pulse signal SP, the timing signal is generated. The generated timing signal is buffer-amplified in the buffer 643 and supplied to the corresponding first scan line.

The gate electrode of the switch element Sw1 of one line of pixels is connected to the first scanning line. Since the switching elements Sw1 of the pixels for one line must be turned on all at once, a buffer 643 capable of flowing a large current is used.

Note that, instead of the shift register, another circuit that can select a scanning line, such as a decoder circuit, may be used.

Further, the second scanning line driving circuit may have the same configuration as the first scanning line driving circuit.

Note that the voltages of the first and second scanning lines may be controlled by a plurality of scanning line driving circuits respectively corresponding to the respective scanning lines, or the voltages of some or all of the scanning lines may be controlled by one.
The control may be performed by one scanning line driving circuit.

The signal line driver circuit and the scanning line driver circuit for driving the light emitting device of the present invention are not limited to the structure shown in this embodiment. The configuration of this embodiment can be implemented by freely combining with the configurations shown in Embodiments 1 to 3.

(Example 5)
An example of a method for manufacturing a light-emitting device of the present invention will be described with reference to FIGS. Example 1 In this example, a method for manufacturing a light-emitting device having the pixel shown in FIG. 2 will be described. Here, the switch elements Sw1 and Tr1 are representatively shown. Although not particularly shown, the transistor Tr2 can be manufactured according to the manufacturing method of this embodiment.

First, as shown in FIG. 11A, Corning # 7059 glass or # 1759 glass is used.
A base film 5002 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed over a substrate 5001 made of glass such as barium borosilicate glass represented by 37 glass or aluminoborosilicate glass. . For example, a SiH _4, NH _3, N silicon oxynitride film 5002a made from ₂ O by plasma CVD 10 to 200 [nm] (preferably 50 to 100 [nm]) is formed, similarly SiH _4, N Silicon oxynitride film 5002b formed from ₂ O
Is laminated to a thickness of 50 to 200 [nm] (preferably 100 to 150 [nm]).
Although the base film 5002 has a two-layer structure in this embodiment, the base film 5002 may have a single-layer structure or a structure in which two or more insulating films are stacked.

The island-shaped semiconductor layers 5005 and 5006 are formed using a crystalline semiconductor film in which a semiconductor film having an amorphous structure is formed by a laser crystallization method or a known thermal crystallization method. The thickness of the island-shaped semiconductor layers 5005 and 5006 is 25 to 80 [nm] (preferably 30 to 6 nm).
0 [nm]). The material of the crystalline semiconductor film is not limited, but is preferably formed of silicon or a silicon germanium (SiGe) alloy.

When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser is used. In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and irradiated on a semiconductor film. The crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is set to 300 [Hz], and the laser energy density is set to 100 to 400 [mJ / cm ² ].
(Typically 200 to 300 [mJ / cm ² ]). When a YAG laser is used, the second harmonic is used to set the pulse oscillation frequency to 30 to 300 [kHz], and the laser energy density is set to 300 to 600 [mJ / cm ² ] (typically 350 to 500 [mJ]. / cm ²
]) Then, a laser beam condensed linearly with a width of 100 to 1000 [μm], for example, 400 [μm] is irradiated over the entire surface of the substrate, and the superimposition rate (overlap rate) of the linear laser light at this time is 50. Perform as ~ 90 [%].

Note that a continuous wave or pulsed gas laser or solid laser can be used as the laser. Excimer laser, Ar laser, K
r laser, etc., and solid-state lasers such as YAG laser, YVO ₄ laser, YL
An F laser, a YAlO ₃ laser, a glass laser, a ruby laser, an alexandrite laser, a Ti: sapphire laser, and the like can be given. As a solid-state laser,
YAG doped with Cr, Nd, Er, Ho, Ce, Co, Ti or Tm
, YVO ₄ , YLF, YAlO _3, etc. can also be used. The fundamental wave of the laser depends on the material to be doped, and a laser beam having a fundamental wave of about 1 μm can be obtained. Harmonics with respect to the fundamental wave can be obtained by using a nonlinear optical element.

In order to obtain a crystal having a large grain size in crystallization of the amorphous semiconductor film, it is preferable to use a solid-state laser capable of continuous oscillation and apply the second to fourth harmonics of a fundamental wave. Typically, the second harmonic (5) of a Nd: YVO ₄ laser (fundamental wave 1064 nm) is used.
It is desirable to apply the third harmonic (355 nm) or the third harmonic. Specifically, laser light emitted from a continuous-wave YVO ₄ laser having an output of 10 W is converted into a harmonic by a nonlinear optical element. There is also a method in which a YVO ₄ crystal and a nonlinear optical element are put in a resonator to emit a harmonic. Then, the laser light is preferably shaped into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and the laser beam is irradiated on the object to be processed. The energy density at this time is about 0.01 to 100 MW / cm ² (preferably 0.1 to 100 MW / cm ^2).
10 MW / cm ² ) is required. Then, irradiation is performed by moving the semiconductor film relatively to the laser light at a speed of about 10 to 2000 cm / s.

Next, a gate insulating film 5007 which covers the island-shaped semiconductor layers 5005 and 5006 is formed. The gate insulating film 5007 is formed using a plasma CVD method or a sputtering method with a thickness of 40 to 150 [nm] and an insulating film containing silicon. In this embodiment, 1
It is formed of a silicon oxynitride film with a thickness of 20 [nm]. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) and O ₂ are mixed by plasma CVD, the reaction pressure is 40 [Pa], the substrate temperature is 300 to 400 [° C.], and the high frequency (13.5) is used.
6 [MHz]) and discharge at a power density of 0.5 to 0.8 [W / cm ² ]. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 [° C.].

Then, a first conductive film 5008 and a second conductive film 5009 for forming a gate electrode are formed over the gate insulating film 5007. In the present embodiment, the first conductive film 5
008 is formed of Ta to a thickness of 50 to 100 [nm], and the second conductive film 5009 is formed of W to a thickness of 100 to 300 [nm].

The Ta film is formed by a sputtering method by sputtering a Ta target with Ar. In this case, when an appropriate amount of Xe or Kr is added to Ar, the internal stress of the Ta film can be relaxed and the film can be prevented from peeling. The resistivity of the α-phase Ta film is 20 [
μΩcm], and can be used as a gate electrode. However, the resistivity of the β-phase Ta film is about 180 μμcm, which is not suitable for a gate electrode. α-phase Ta
In order to form a film, tantalum nitride having a crystal structure close to the α phase of Ta is
An α-phase Ta film can be easily obtained if it is formed on a Ta base with a thickness of about 0 [nm].

When a W film is formed, it is formed by a sputtering method using W as a target. Alternatively, it can be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, it is necessary to reduce the resistance in order to use it as a gate electrode, and it is desirable that the resistivity of the W film be 20 [μΩcm] or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, the crystallization is inhibited and the resistance is increased. From this, in the case of the sputtering method, a W target having a purity of 99.9999 or 99.99 [%] is used, and a W film is formed with sufficient care so as not to mix impurities from the gas phase during film formation. By doing so, a resistivity of 9 to 20 [μΩcm] can be realized.

In this embodiment, the first conductive film 5008 is Ta and the second conductive film 5009 is W. However, the present invention is not particularly limited, and each is selected from Ta, W, Ti, Mo, Al, Cu, and the like. Or an alloy material or a compound material containing the element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. As a desirable example of another combination other than this embodiment, a combination in which the first conductive film 5008 is formed of tantalum nitride (TaN), the second conductive film 5009 is W, and the first conductive film 5008 is used. Is formed of tantalum nitride (TaN), the second conductive film 5009 is formed of tantalum nitride (TaN), and the second conductive film 5009 is formed of tantalum nitride (TaN).
09 may be a combination of Cu.

Next, a mask 5010 made of a resist is formed, and first etching treatment for forming electrodes and wirings is performed. In this embodiment, ICP (Inductively Coupled Pl
Asma: Inductively coupled plasma) etching method, CF ₄ and Cl ₂ are mixed as an etching gas, and 500 [W] RF (13.56) is applied to the coil type electrode at a pressure of 1 [Pa].
[MHz]) Power is supplied to generate plasma. An RF (13.56 [MHz]) power of 100 [W] is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. When CF ₄ and Cl ₂ are mixed, both the W film and the Ta film are etched to the same extent.

Under the above etching conditions, by making the shape of the resist mask appropriate, the edges of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of the tapered portion is 15 to 45 °.
In order to perform etching without leaving a residue on the gate insulating film, 10 to 20%
It is preferable to increase the etching time at a ratio of about. Since the selectivity of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the exposed surface of the silicon oxynitride film is etched by about 20 to 50 [nm] by over-etching. become. In this manner, the first shape conductive layers 5013 and 5014 (the first conductive layers 5013a and 5013a) including the first conductive layer and the second conductive layer by the first etching process.
5014a and second conductive layers 5013b and 5014b) are formed. At this time, in the gate insulating film 5007, a region which is not covered with the first shape conductive layers 5013 and 5014 is etched to a thickness of about 20 to 50 [nm] to form a thinned region.

Then, a first doping process is performed to add an impurity element imparting n-type.
The doping may be performed by an ion doping method or an ion implantation method. The conditions of the ion doping method are such that the dose is 1 × 10 ^{13 to} 5 × 10 ¹⁴ [atoms / cm ² ] and the acceleration voltage is 60 to 100 [keV]. As an impurity element imparting n-type, an element belonging to Group 15 of the periodic table, typically, phosphorus (P) or arsenic (As) is used. Here, phosphorus (P) is used. In this case, the conductive layers 5013 and 5014 serve as a mask for the impurity element imparting n-type, and are self-aligned with the first impurity regions 5017 and 501.
8 are formed. The first impurity regions 5017 and 5018 have 1 × 10 ²⁰ to 1 × 1
An impurity element imparting n-type is added in a concentration range of 0 ²¹ [atoms / cm ³ ]. (FIG. 11
(B))

Next, as shown in FIG. 11C, a second etching process is performed without removing the resist mask. The W film is selectively etched using CF ₄ , Cl ₂ and O _{2 as an} etching gas. At this time, second shape conductive layers 5028 and 5029 (first conductive layers 5028a and 5029a and second conductive layers 5028b and 5029b) are formed by a second etching process. At this time, in the gate insulating film 5007, a region which is not covered by the second shape conductive layers 5028 and 5029 is further 20 to
A region thinned by etching about 50 [nm] is formed.

The etching reaction of the W film or the Ta film with the mixed gas of CF ₄ and Cl ₂ can be estimated from the generated radicals or ionic species and the vapor pressure of the reaction product. Comparing the vapor pressures of the fluorides of W and Ta and the chlorides, the fluoride of W, WF _6, is extremely high, and the other WCl ₅ , TaF ₅ , and TaCl ₅ are comparable. Therefore, C
With the mixed gas of F ₄ and Cl ₂ , both the W film and the Ta film are etched. However, when an appropriate amount of O ₂ is added to this mixed gas, CF ₄ and O ₂ react to form CO and F, and a large amount of F radicals or F ions are generated. As a result, W having a high fluoride vapor pressure
The etching rate of the film increases. On the other hand, in Ta, even if F increases, the increase in the etching rate is relatively small. Further, since Ta is easily oxidized as compared with W, the surface of Ta is oxidized by adding O ₂ . Since the oxide of Ta does not react with fluorine or chlorine, the etching rate of the Ta film is further reduced. Therefore, it is possible to make a difference in the etching rate between the W film and the Ta film, and it is possible to make the etching rate of the W film higher than that of the Ta film.

Then, a second doping process is performed as shown in FIG. in this case,
Doping with an impurity element imparting n-type is performed under a condition of a higher acceleration voltage with a lower dose than in the first doping process. For example, the acceleration voltage is set to 70 to 120 [keV].
This is performed at a dose of 1 × 10 ¹³ [atoms / cm ² ], and a new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor layer in FIG. The doping is performed using the second shape conductive layers 5028 and 5029 as a mask for the impurity element, so that the impurity element is also added to the region below the first conductive layers 5028a and 5029a. Thus, the third impurity regions 5034 and 503
5 are formed. Phosphorus added to the third impurity regions 5034 and 5035 (
The concentration of P) has a gentle concentration gradient according to the thickness of the tapered portion of the first conductive layers 5028a and 5029a. Note that the first conductive layers 5028a and 5029a
The first conductive layers 5028a and 5029a in the semiconductor layer overlapping the tapered portion
Although the impurity concentration slightly decreases from the end of the tapered portion toward the inside, the impurity concentration is substantially the same.

Next, a third etching process is performed as shown in FIG. This is performed using a reactive ion etching method (RIE method) using CHF ₆ as an etching gas. By the third etching treatment, the tapered portions of the first conductive layers 5028a and 5029a are partially etched, so that a region where the first conductive layer overlaps with the semiconductor layer is reduced. By the third etching process, third shape conductive layers 5039 and 5040 (first conductive layers 5039a and 5040a and second conductive layers 5039b and 5040b) are formed. At this time, in the gate insulating film 5007, the third shape conductive layer 5
Areas not covered by 039 and 5040 are further etched by about 20 to 50 [nm] to form thinner areas.

By the third etching treatment, the third impurity regions 5034 and 5035 overlap with the first conductive layers 5039a and 5040a in the third impurity regions 5034 and 5035.
a, 5035a, and second impurity regions 5034b, 5035b between the first impurity region and the third impurity region.

Then, as shown in FIG. 12B, in the island-shaped semiconductor layer 5005 forming the p-channel TFT, fourth impurity regions 5049 to 5050 having a conductivity type opposite to the first conductivity type are formed.
54 are formed. Using the third shape conductive layer 5040b as a mask for an impurity element, an impurity region is formed in a self-aligned manner. At this time, the n-channel TFT
Is entirely covered with a resist mask 5200. Each of the impurity regions 5049 to 5054 is doped with phosphorus at a different concentration, but is formed by an ion doping method using diborane (B ₂ H ₆ ), and the impurity concentration in each of the regions is 2 × 10 ²⁰ to 50 ×. It should be 2 × 10 ²¹ [atoms / cm ³ ].

Through the above steps, impurity regions are formed in each of the island-shaped semiconductor layers. The third-shaped conductive layers 5039 and 5040 overlapping with the island-shaped semiconductor layer function as gate electrodes.

After removing the resist mask 5200, a step of activating the impurity element added to each island-shaped semiconductor layer is performed for the purpose of controlling the conductivity type. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied.
The thermal annealing method is performed in a nitrogen atmosphere having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less at 400 to 700 ° C., typically 500 to 600 ° C. In this embodiment, the heat treatment is performed at 500 ° C. for 4 hours. However, when the wiring material used for the third shape conductive layers 5039 and 5040 is weak to heat, activation is performed after forming an interlayer insulating film (mainly containing silicon) to protect the wiring and the like. It is preferred to do so.

Note that when activation is performed using a laser annealing method, the laser used for crystallization can be used. In the case of activation, the moving speed is the same as that of crystallization, and about 0.01 to 100 MW / cm ² (preferably 0.01 to 10 MW / c
m ² ).

Furthermore, in an atmosphere containing 3 to 100% of hydrogen, 300 to 450 [° C]
A heat treatment is performed for 12 hours to hydrogenate the island-shaped semiconductor layer. In this step, dangling bonds in the semiconductor layer are terminated by thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Next, as shown in FIG. 12C, a first interlayer insulating film 5055 is formed with a thickness of 100 to 200 [nm] from a silicon oxynitride film. After a second interlayer insulating film 5056 made of an organic insulating material is formed thereon, contact holes are formed in the first interlayer insulating film 5055, the second interlayer insulating film 5056, and the gate insulating film 5007. After patterning and forming the wirings 5059 to 5062, the connection wiring 5 is formed.
The pixel electrode 5064 in contact with 062 is formed by patterning.

As the second interlayer insulating film 5056, a film made of an organic resin is used, and as the organic resin, polyimide, polyamide, acrylic, BCB (benzocyclobutene), or the like can be used. In particular, since the second interlayer insulating film 5056 has a strong meaning of flattening, acrylic having excellent flatness is preferable. In this embodiment, an acrylic film is formed to a thickness that can sufficiently flatten a step formed by a TFT. Preferably, it is 1-5 [μm] (more preferably, 2-4 [μm]).

The contact hole is formed by dry etching or wet etching to form a contact hole reaching the n-type impurity region 5017 or the p-type impurity regions 5049 and 5054, respectively.

Further, as the wirings (including connection wirings and signal lines) 5059 to 5062, a Ti film of 100 [nm], an aluminum film containing Ti of 300 [nm], and a Ti film of 150 [nm] were continuously formed by sputtering. A laminated film having a layered structure patterned into a desired shape is used. Of course, another conductive film may be used.

In this embodiment, an ITO film having a thickness of 110 [nm] was formed as the pixel electrode 5064, and patterning was performed. A contact is made by arranging the pixel electrode 5064 so as to be in contact with and overlap with the connection wiring 5062. Alternatively, a transparent conductive film in which 2 to 20% of zinc oxide (ZnO) is mixed with indium oxide may be used. This pixel electrode 5064 becomes the anode of the OLED. (FIG. 12 (C))

Next, as shown in FIG. 12D, an insulating film containing silicon (a silicon oxide film in this embodiment) is formed to a thickness of 500 [nm], and an opening is formed at a position corresponding to the pixel electrode 5064. Then, a third interlayer insulating film 5065 functioning as a bank is formed. When the opening is formed, a tapered side wall can be easily formed by using a wet etching method. Attention must be paid to the fact that if the side wall of the opening is not sufficiently smooth, the deterioration of the organic light emitting layer due to the step will become a significant problem.

Next, an organic light emitting layer 5066 and a cathode (MgAg electrode) 5067 are continuously formed by using a vacuum deposition method without opening to the atmosphere. The thickness of the organic light emitting layer 5066 is 80 to 200 [nm] (typically 100 to 120 [nm]), and the thickness of the cathode 5067 is 1
The thickness may be set to 80 to 300 [nm] (typically 200 to 250 [nm]).

In this step, an organic light emitting layer is sequentially formed on a pixel corresponding to red, a pixel corresponding to green, and a pixel corresponding to blue. However, since the organic light emitting layer has poor resistance to a solution, it must be formed individually for each color without using a photolithography technique. Therefore, it is preferable to hide a portion other than the desired pixel by using a metal mask and selectively form an organic light emitting layer only at a necessary portion.

That is, first, a mask for hiding all pixels other than pixels corresponding to red is set, and an organic light emitting layer for emitting red light is selectively formed using the mask. Next, a mask for hiding all pixels other than pixels corresponding to green is set, and an organic light emitting layer for emitting green light is selectively formed using the mask. Next, similarly, a mask for covering all pixels other than pixels corresponding to blue is set, and an organic light emitting layer for emitting blue light is selectively formed using the mask. Note that, here, it is described that different masks are used, but the same mask may be used again.

Here, a method of forming three types of OLEDs corresponding to RGB is used. However, a method of combining a white light emitting OLED and a color filter, a blue or blue-green light emitting OLED is used.
A method in which an LED and a phosphor (fluorescent color conversion layer: CCM) are combined, a method in which an OLED corresponding to RGB is overlapped by using a transparent electrode on a cathode (a counter electrode), or the like may be used.

Note that a known material can be used for the organic light-emitting layer 5066. As a known material, it is preferable to use an organic material in consideration of a driving voltage. For example, a four-layer structure including a hole injection layer, a hole transport layer, a light emitting layer, and an electron injection layer may be used as the organic light emitting layer.

Next, a cathode 5067 is formed using a metal mask. In this embodiment, MgAg is used as the cathode 5067, but the present invention is not limited to this. Cathode 506
As 7, another known material may be used.

Finally, a passivation film 5068 made of a silicon nitride film is formed to a thickness of 300 [nm]. By forming the passivation film 5068, the organic light emitting layer 50
66 can be protected from moisture and the like, and the reliability of the OLED can be further improved.

  Thus, a light emitting device having a structure as shown in FIG. 12D is completed.

By the way, the light emitting device of this embodiment exhibits extremely high reliability and can improve the operating characteristics by arranging the TFT having the optimum structure not only in the pixel portion but also in the drive circuit portion. It is also possible to add a metal catalyst such as Ni in the crystallization step to increase the crystallinity. Thus, the driving frequency of the signal line driving circuit can be increased to 10 MHz or more.

First, a TFT having a structure for reducing hot carrier injection so as not to lower the operation speed as much as possible is used as an n-channel TFT of a CMOS circuit forming a drive circuit portion. Note that the driving circuit here includes a shift register, a buffer,
It includes a level shifter, a latch in line-sequential driving, a transmission gate in point-sequential driving, and the like.

In the case of this embodiment, the active layer of the n-channel type TFT has an overlapped LDD region (L) overlapping the gate electrode with the source region, the drain region, and the gate insulating film interposed therebetween.
_OV region), offset LDD that does not overlap the gate electrode with the gate insulating film interposed
Region (L _OFF region) and a channel forming region.

Further, the p-channel type TFT of the CMOS circuit does not need to be provided with the LDD region, since the deterioration due to the hot carrier injection is hardly noticeable. Of course, it is also possible to provide an LDD region similarly to the n-channel type TFT and take measures against hot carriers.

In addition, in a driving circuit, a CMOS circuit in which a current flows bidirectionally through a channel forming region, that is, a CM in which the roles of a source region and a drain region are switched.
In the case where an OS circuit is used, an n-channel TFT forming a CMOS circuit preferably has an LDD region formed on both sides of the channel formation region so as to sandwich the channel formation region. An example of such a transmission gate is a transmission gate used for dot-sequential driving. In the case where a CMOS circuit in which off-state current needs to be suppressed as low as possible is used in the driver circuit, the n-channel TFT forming the CMOS circuit preferably has an L _OV region. An example of such a transmission gate is a transmission gate used for dot sequential driving.

In fact, when the structure shown in FIG. 12D is completed, a protective film (laminate film, ultraviolet curable resin film, etc.) having high airtightness and low degassing or a light-transmitting material is provided so as not to be further exposed to the outside air. It is preferable to package (enclose) with a sealing material. At this time, the reliability of the OLED is improved by setting the inside of the sealing material to an inert atmosphere or disposing a hygroscopic material (for example, barium oxide) inside.

When the airtightness is improved by processing such as packaging, a connector (flexible printed circuit: FPC) for connecting a terminal routed from an element or a circuit formed on the substrate to an external signal terminal is attached. Completed as a product. Such a state in which the product can be shipped is referred to as a light emitting device in this specification.

Further, according to the steps described in this embodiment, the number of photomasks required for manufacturing a light-emitting device can be reduced. As a result, the process can be shortened, which can contribute to a reduction in manufacturing cost and an improvement in yield.

The method for manufacturing the light-emitting device of the present invention is not limited to the method described in this embodiment. The light emitting device of the present invention can be manufactured using a known method.

This embodiment can be implemented by freely combining with Embodiments 1, 2, and 4.

(Example 6)
In the present invention, by using an organic light emitting material that can use phosphorescence from triplet excitons for light emission, external light emission quantum efficiency can be significantly improved. Thus, low power consumption, long life, and light weight of the OLED can be achieved.

Here, a report is shown in which the triplet exciton is used to improve the external emission quantum efficiency.
(T.Tsutsui, C.Adachi, S.Saito, Photochemical Processes in Organized Mol
ecular Systems, ed.K.Honda, (Elsevier Sci.Pub., Tokyo, 1991) p.437.)

The molecular formula of the organic light emitting material (coumarin dye) reported by the above-mentioned paper is shown below.

(MABaldo, DFO'Brien, Y.You, A.Shoustikov, S.Sibley, METhompson,
(SRForrest, Nature 395 (1998) p.151.)

The molecular formula of the organic light emitting material (Pt complex) reported by the above paper is shown below.

(MABaldo, S. Lamansky, PEBurrrows, METhompson, SRForrest, Appl.
Phys. Lett., 75 (1999) p. 4.) (T. Tsutsui, M.-J. Yang, M. Yahiro, K. Nakamura,
T.Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Mayaguchi, Jpn.Appl.Phys.,
38 (12B) (1999) L1502.)

The molecular formula of the organic light emitting material (Ir complex) reported by the above paper is shown below.

As described above, if the phosphorescence emission from the triplet exciton can be used, it is possible in principle to realize an external light emission quantum efficiency three to four times higher than the case where the fluorescence emission from the singlet exciton is used.

Note that the configuration of this embodiment can be implemented by freely combining with any of the configurations of Embodiments 1 to 5.

(Example 7)
Example 1 In this example, the appearance of a light emitting device of the present invention will be described with reference to FIGS.

FIG. 13 is a top view of a light-emitting device formed by sealing an element substrate on which a transistor is formed with a sealing material, and FIG.
13A is a cross-sectional view taken along line AA ′, and FIG. 13C is a cross-sectional view taken along line BB ′ in FIG.

A pixel portion 4002 provided over a substrate 4001, a signal line driver circuit 4003,
The sealing material 4 is provided so as to surround the first and second scanning line driving circuits 4004a and 4004b.
009 is provided. A pixel portion 4002, a signal line driver circuit 4003,
A sealant 4008 is provided over the first and second scan line driver circuits 4004a and 4004b. Therefore, the pixel portion 4002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004 are formed by a substrate 4001 and a sealant 4009.
And a sealing material 4008, which is sealed with a filler 4210.

A pixel portion 4002 provided over a substrate 4001 and a signal line driver circuit 4003
And the first and second scanning line driving circuits 4004a and 4004b have a plurality of TFTs. In FIG. 13B, typically, a driving TFT (here, an n-channel TFT and a p-channel TFT are illustrated) 4201 and a pixel included in the signal line driver circuit 4003 formed over the base film 4010 are illustrated. The transistor Tr1 4202 included in the unit 4002 is illustrated.

In this embodiment, a p-channel TFT or an n-channel TFT manufactured by a known method is used for the driving TFT 4201, and an n-channel TFT manufactured by a known method is used for the transistor Tr1 4202.

An interlayer insulating film (planarization film) 4301 is formed over the driving TFT 4201 and the transistor Tr1 4202, and a pixel electrode (anode) 4203 electrically connected to the drain of the transistor Tr1 4202 is formed thereon. Pixel electrode 420
As 3, a transparent conductive film having a large work function is used. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide, or indium oxide can be used. Further, a material obtained by adding gallium to the transparent conductive film may be used.

Then, an insulating film 4302 is formed over the pixel electrode 4203, and the insulating film 430 is formed.
No. 2 has an opening formed on the pixel electrode 4203. In this opening, an organic light emitting layer 4204 is formed on the pixel electrode 4203. Organic light emitting layer 4204
A known organic light emitting material or inorganic light emitting material can be used. As the organic light emitting material, there are a low molecular (monomer) material and a high molecular (polymer) material, and either may be used.

As a method for forming the organic light emitting layer 4204, a known evaporation technique or coating technique may be used. The structure of the organic light emitting layer may be a stacked structure or a single layer structure by freely combining a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or an electron injection layer.

On the organic light-emitting layer 4204, a cathode 4205 made of a light-shielding conductive film (typically, a conductive film containing aluminum, copper, or silver as a main component or a stacked film of these and another conductive film) is formed. You. Further, it is desirable that moisture and oxygen existing at the interface between the cathode 4205 and the organic light emitting layer 4204 be eliminated as much as possible. Therefore, it is necessary to form the organic light emitting layer 4204 in a nitrogen or rare gas atmosphere, and to form the cathode 4205 without being exposed to oxygen or moisture. In this embodiment, the above-described film formation can be performed by using a multi-chamber method (cluster tool method) film formation apparatus. The cathode 4205 is given a predetermined voltage.

As described above, the OLED 4303 including the pixel electrode (anode) 4203, the organic light emitting layer 4204, and the cathode 4205 is formed. Then, a protective film 4303 is formed over the insulating film 4302 so as to cover the OLED 4303. Protective film 430
No. 3 is effective for preventing oxygen, moisture and the like from entering the OLED 4303.

Reference numeral 4005a denotes a lead wiring connected to a power supply line, and the transistor Tr1
It is electrically connected to the source region 4202. The lead wiring 4005a passes between the sealant 4009 and the substrate 4001 and is electrically connected to the FPC wiring 4301 included in the FPC 4006 via the anisotropic conductive film 4300.

As the sealing material 4008, a glass material, a metal material (typically, a stainless steel material), a ceramic material, or a plastic material (including a plastic film) can be used. As a plastic material, FRP (Fiberglass-Re)
Inforced Plastics) plate, PVF (polyvinyl fluoride)
A film, a mylar film, a polyester film, or an acrylic resin film can be used. Further, a sheet having a structure in which aluminum foil is sandwiched between PVF films or mylar films can also be used.

However, when the direction of light emission from the OLED is directed toward the cover material, the cover material must be transparent. In that case, a transparent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.

As the filler 4103, an ultraviolet curable resin or a thermosetting resin can be used in addition to an inert gas such as nitrogen or argon, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (Polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. In this embodiment, nitrogen was used as the filler.

Further, in order to expose the filler 4103 to a hygroscopic substance (preferably barium oxide) or a substance capable of adsorbing oxygen, a concave portion 4007 is provided on the surface of the sealing material 4008 on the substrate 4001 side to adsorb the hygroscopic substance or oxygen. A possible substance 4207 is arranged. Then, the hygroscopic substance or the substance 4207 capable of adsorbing oxygen is held in the concave part 4007 by the concave part cover member 4208 so that the hygroscopic substance or the substance 4207 capable of adsorbing oxygen is not scattered. Note that the concave portion cover member 4208 has a fine mesh shape, and is configured to allow air and moisture to pass therethrough and not allow a hygroscopic substance or a substance 4207 capable of adsorbing oxygen to pass therethrough. By providing the hygroscopic substance or the substance 4207 which can adsorb oxygen, deterioration of the OLED 4303 can be suppressed.

As shown in FIG. 13C, at the same time as the pixel electrode 4203 is formed, a conductive film 4203a is formed to be in contact with the wiring 4005a.

Further, the anisotropic conductive film 4300 has a conductive filler 4300a. By thermocompression bonding between the substrate 4001 and the FPC 4006, the conductive film 4203a on the substrate 4001 and the FPC wiring 4301 on the FPC 4006 are electrically connected by the conductive filler 4300a.

The configuration of this embodiment can be implemented by freely combining with the configurations shown in Embodiments 1 to 6.

(Example 8)
Organic light emitting materials used for OLEDs are broadly classified into low molecular weight materials and high molecular weight materials. The light emitting device of the present invention can use either a low molecular organic light emitting material or a high molecular organic light emitting material. Further, a material that is difficult to be classified into either a low-molecular type or a high-molecular type (for example, a material described in Japanese Patent Application No. 2001-167508) may be used.

The low molecular weight organic light emitting material is formed by a vapor deposition method. Therefore, it is easy to take a laminated structure, and it is easy to increase efficiency by laminating films having different functions such as a hole transport layer and an electron transport layer. The hole transport layer, the electron transport layer, and the like are not always clearly present. For example, as described in Japanese Patent Application No. 2001-020817, a single layer or a plurality of layers in a mixed state exist, and the height of the OLED increases. Life extension and high luminous efficiency may be achieved.

Typical examples of the low molecular weight organic light emitting material include aluminum complex Alq ₃ having quinolinol as a ligand, and a triphenylamine derivative (TPD).

On the other hand, a high molecular weight organic light emitting material has higher physical strength than a low molecular weight light emitting material, and has high durability of the device. In addition, since a film can be formed by coating, it is relatively easy to manufacture an element.

The structure of a light emitting element using a high molecular weight organic light emitting material is basically the same as that of using a low molecular weight organic light emitting material, that is, a cathode / organic light emitting layer / anode. However, when forming an organic light emitting layer using a high molecular weight organic light emitting material, it is difficult to form a laminated structure as when using a low molecular weight organic light emitting material, and it is known that Is famous for a two-layer structure. Specifically, it has a structure of cathode / light-emitting layer / hole transport layer / anode. In the case of a light-emitting element using a polymer-based organic light-emitting material, Ca can be used as a cathode material.

Note that the light-emitting color of the element is determined by a material for forming the light-emitting layer; therefore, by selecting these, a light-emitting element exhibiting desired light emission can be formed. Polymer organic light-emitting materials that can be used for forming the light-emitting layer include polyparaphenylene vinylene,
Representative examples include polyparaphenylene, polythiophene, and polyfluorene.

Poly (paraphenylenevinylene) includes poly (paraphenylenevinylene) [PP
V], poly (2,5-dialkoxy-1,4-phenylenevinylene) [
RO-PPV], poly (2- (2′-ethyl-hexoxy) -5-methoxy-1,
4-phenylenevinylene) [MEH-PPV] and poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROP-PPV].

Polyparaphenylenes include polyparaphenylene [PPP] derivatives, poly (
2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-
Dihexoxy-1,4-phenylene) and the like.

The polythiophene-based includes polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3-cyclohexyl) −
4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene]
[POPT], poly [3- (4-octylphenyl) -2,2-bithiophene] [
POPT].

The polyfluorene-based includes polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [
PDOF] and the like.

Note that when the hole-transporting polymer organic light-emitting material is formed between the anode and the light-emitting polymer-based organic light-emitting material, hole injection from the anode can be improved. Generally, a solution dissolved in water together with an acceptor material is applied by a spin coating method or the like. In addition, since it is insoluble in an organic solvent, it can be laminated with the above-described light-emitting organic light-emitting material.

As a hole-transporting polymer organic light emitting material, a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, polyaniline [PANI
And polystyrene sulfonic acid [PSS] as an acceptor material.

The configuration of the present embodiment can be implemented by freely combining with any of the configurations of the first to seventh embodiments.

(Example 9)
Since light emitting devices using OLEDs are self-luminous,
Excellent visibility in bright places and wide viewing angle. Therefore, it can be used for display portions of various electronic devices.

As an electronic device using the light emitting device of the present invention, a video camera, a digital camera,
Goggle-type display (head-mounted display), navigation system, sound reproduction device (car audio, audio component, etc.), notebook personal computer, game machine, portable information terminal (mobile computer, mobile phone, portable game machine, electronic book, etc.) ), And an image reproducing apparatus provided with a recording medium (specifically, an apparatus provided with a display capable of reproducing a recording medium such as a Digital Versatile Disc (DVD) and displaying an image). In particular, it is desirable to use a light emitting device for a portable information terminal in which the screen is often viewed from an oblique direction, since the wide viewing angle is regarded as important. FIG. 14 shows specific examples of these electronic devices.

FIG. 14A illustrates an OLED display device including a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The light emitting device of the present invention can be used for the display portion 2003. Since the light-emitting device is a self-luminous type, it does not require a backlight and can be a display portion thinner than a liquid crystal display. Note that the OLED display device includes all information display devices for personal computers, TV broadcast reception, advertisement display, and the like.

FIG. 14B illustrates a digital still camera, which includes a main body 2101 and a display portion 2102.
, Image receiving unit 2103, operation keys 2104, external connection port 2105, shutter 2
106 and the like. The light-emitting device of the present invention can be used for the display portion 2102.

FIG. 14C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The light emitting device of the present invention can be used for the display portion 2203.

FIG. 14D illustrates a mobile computer, which includes a main body 2301 and a display portion 2302.
, Switch 2303, operation key 2304, infrared port 2305, and the like. The light emitting device of the present invention can be used for the display portion 2302.

FIG. 14E illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, and a display portion B2.
404, a recording medium (DVD or the like) reading unit 2405, operation keys 2406, a speaker unit 2407, and the like. The display portion A 2403 mainly displays image information, and the display portion B 2404 mainly displays character information. The light-emitting device of the present invention can be used for these display portions A, B 2403, and 2404. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 14F illustrates a goggle-type display (head-mounted display), which includes a main body 2501, a display portion 2502, and an arm portion 2503. The light-emitting device of the present invention can be used for the display portion 2502.

FIG. 14G illustrates a video camera, which includes a main body 2601, a display portion 2602, and a housing 2.
603, an external connection port 2604, a remote control receiving unit 2605, an image receiving unit 2606,
A battery 2607, a voice input unit 2608, operation keys 2609, and the like are included. The light emitting device of the present invention can be used for the display portion 2602.

Here, FIG. 14H illustrates a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, a sound input portion 2704, a sound output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. The light emitting device of the present invention has a display unit 2
703. Note that the display portion 2703 displays white characters on a black background, so that current consumption of the mobile phone can be suppressed.

If the light emission luminance of the organic light emitting material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used for a front type or rear type projector.

In addition, the electronic devices often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the organic light emitting material is very high, the light emitting device is preferable for displaying moving images.

Further, in the light emitting device, the light emitting portion consumes power. Therefore, it is desirable to display information so that the light emitting portion is reduced as much as possible. Therefore, when a light emitting device is used for a portable information terminal, particularly a display portion mainly for character information such as a mobile phone or a sound reproducing device, the character information is driven by a light emitting portion with a non-light emitting portion as a background. It is desirable to do.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be used for electronic devices in all fields. Further, the electronic apparatus of this embodiment may use the light emitting device having any of the structures shown in Embodiments 1 to 8.

FIG. 4 illustrates a structure of a transistor of the present invention. FIG. 2 is a block diagram of a light emitting device of the present invention. FIG. 3 is a circuit diagram of a pixel of the light emitting device of the present invention. 5 is a timing chart of a signal input to a scanning line. FIG. 3 is a schematic diagram of a pixel in driving. FIG. 4 illustrates a structure of a transistor of the present invention. FIG. 4 illustrates a structure of a transistor of the present invention. FIG. 4 illustrates a structure of a transistor of the present invention. FIG. 3 is a detailed diagram of a signal line driving circuit in an analog driving method. FIG. 3 is a block diagram of a scanning line driver circuit. 4A to 4C illustrate a method for manufacturing a light-emitting device of the present invention. 4A to 4C illustrate a method for manufacturing a light-emitting device of the present invention. 1A and 1B are an external view and a cross-sectional view of a light emitting device of the present invention. FIG. 13 is a diagram of an electronic device using the light-emitting device of the present invention. 9A and 9B are a circuit diagram and a top view of a conventional transistor.

Claims (7)

An active layer, a switch element having a gate insulating film in contact with the active layer, and a gate electrode in contact with the gate insulating film,
A channel formation region and three or more impurity regions of the same conductivity type are formed in the active layer;
The channel formation region and the gate electrode overlap with the gate insulating film interposed therebetween;
The switch element, wherein each of the three or more impurity regions is in contact with the channel formation region. An active layer, a switch element having a gate insulating film in contact with the active layer, and a gate electrode in contact with the gate insulating film,
A channel formation region and three or more impurity regions of the same conductivity type are formed in the active layer;
The channel formation region and the gate electrode overlap with the gate insulating film interposed therebetween;
The three or more impurity regions are in contact with different low concentration impurity regions, respectively.
The switch element, wherein each of the low-concentration impurity regions is in contact with the channel formation region. An active layer, a switch element having a gate insulating film in contact with the active layer, and a gate electrode in contact with the gate insulating film,
A channel formation region and three or more impurity regions of the same conductivity type are formed in the active layer;
The channel formation region and the gate electrode overlap with the gate insulating film interposed therebetween;
The three or more impurity regions are in contact with different offset regions,
The switch element, wherein each of the offset regions is in contact with the channel forming region. 4. The switch element according to claim 1, wherein the gate electrode is provided above the channel formation region with the gate insulating film interposed therebetween. 5. 4. The switch element according to claim 1, wherein the gate electrode is provided below the channel formation region with the gate insulating film interposed therebetween. 5. A display device using the switch element according to claim 1. A semiconductor device using the switch element according to claim 1.

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