JP4926346B2 - Light emitting device - Google Patents

Description

【０２４５】
(M.A.Baldo, D.F.O'Brien, Y.You, A.Shoustikov, S.Sibley, M.E.Thompson, S.R.Forrest, Nature 395 (1998) p.151.)
【０２４６】
上記の論文により報告された有機発光材料（Ｐｔ錯体）の分子式を以下に示す。
【０２４７】
【化２】

【０２４８】
(M.A.Baldo, S.Lamansky, P.E.Burrrows, M.E.Thompson, S.R.Forrest, Appl.Phys.Lett.,75 (1999) p.4.) (T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamura, T.Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Mayaguchi, Jpn.Appl.Phys., 38 (12B) (1999) L1502.)
【０２４９】
上記の論文により報告された有機発光材料（Ｉｒ錯体）の分子式を以下に示す。
【０２５０】
【化３】

【０２５１】
以上のように三重項励起子からの燐光発光を利用できれば原理的には一重項励起子からの蛍光発光を用いる場合より３〜４倍の高い外部発光量子効率の実現が可能となる。
【０２５２】
なお本実施例は、実施例１〜９と組み合わせて実施することが可能である。
【０２５３】
（実施例１１）
ＯＬＥＤに用いられる有機発光材料は低分子系と高分子系に大別される。本発明の発光装置は、低分子系の有機発光材料でも高分子系の有機発光材料でも用いることができる。
【０２５４】
低分子系の有機発光材料は、蒸着法により成膜される。したがって積層構造をとりやすく、ホール輸送層、電子輸送層などの機能が異なる膜を積層することで高効率化しやすい。
【０２５５】
低分子系の有機発光材料としては、キノリノールを配位子としたアルミニウム錯体Ａｌｑ₃、トリフェニルアミン誘導体（ＴＰＤ）等が挙げられる。
【０２５６】
一方、高分子系の有機発光材料は低分子系に比べて物理的強度が高く、素子の耐久性が高い。また塗布により成膜することが可能であるので、素子の作製が比較的容易である。
【０２５７】
高分子系の有機発光材料を用いた発光素子の構造は、低分子系の有機発光材料を用いたときと基本的には同じであり、陰極／有機発光層／陽極となる。しかし、高分子系の有機発光材料を用いた有機発光層を形成する際には、低分子系の有機発光材料を用いたときのような積層構造を形成させることは難しく、知られている中では２層の積層構造が有名である。具体的には、陰極／発光層／正孔輸送層／陽極という構造である。なお、高分子系の有機発光材料を用いた発光素子の場合には、陰極材料としてＣａを用いることも可能である。
【０２５８】
なお、素子の発光色は、発光層を形成する材料で決まるため、これらを選択することで所望の発光を示す発光素子を形成することができる。発光層の形成に用いることができる高分子系の有機発光材料は、ポリパラフェニレンビニレン系、ポリパラフェニレン系、ポリチオフェン系、ポリフルオレン系が挙げられる。
【０２５９】
ポリパラフェニレンビニレン系には、ポリ（パラフェニレンビニレン） [ＰＰＶ] の誘導体、ポリ（２，５−ジアルコキシ−１，４−フェニレンビニレン） [ＲＯ−ＰＰＶ]、ポリ（２−（２'−エチル−ヘキソキシ）−５−メトキシ−１，４−フェニレンビニレン）[ＭＥＨ−ＰＰＶ]、ポリ（２−（ジアルコキシフェニル）−１,４−フェニレンビニレン）[ＲＯＰｈ−ＰＰＶ]等が挙げられる。
【０２６０】
ポリパラフェニレン系には、ポリパラフェニレン［ＰＰＰ］の誘導体、ポリ（２，５−ジアルコキシ−１，４−フェニレン）[ＲＯ−ＰＰＰ]、ポリ（２，５−ジヘキソキシ−１，４−フェニレン）等が挙げられる。
【０２６１】
ポリチオフェン系には、ポリチオフェン［ＰＴ］の誘導体、ポリ（３−アルキルチオフェン）［ＰＡＴ］、ポリ（３−ヘキシルチオフェン）［ＰＨＴ］、ポリ（３−シクロヘキシルチオフェン）［ＰＣＨＴ］、ポリ（３−シクロヘキシル−４−メチルチオフェン）［ＰＣＨＭＴ］、ポリ（３，４−ジシクロヘキシルチオフェン）［ＰＤＣＨＴ］、ポリ［３−（４−オクチルフェニル）−チオフェン］［ＰＯＰＴ］、ポリ［３−（４−オクチルフェニル）−２，２ビチオフェン］［ＰＴＯＰＴ］等が挙げられる。
【０２６２】
ポリフルオレン系には、ポリフルオレン［ＰＦ］の誘導体、ポリ（９，９−ジアルキルフルオレン）［ＰＤＡＦ］、ポリ（９，９−ジオクチルフルオレン）［ＰＤＯＦ］等が挙げられる。
【０２６３】
なお、正孔輸送性の高分子系の有機発光材料を、陽極と発光性の高分子系有機発光材料の間に挟んで形成すると、陽極からの正孔注入性を向上させることができる。一般にアクセプター材料と共に水に溶解させたものをスピンコート法などで塗布する。また、有機溶媒には不溶であるため、上述した発光性の有機発光材料との積層が可能である。
【０２６４】
正孔輸送性の高分子系の有機発光材料としては、ＰＥＤＯＴとアクセプター材料としてのショウノウスルホン酸（ＣＳＡ）の混合物、ポリアニリン［ＰＡＮＩ］とアクセプター材料としてのポリスチレンスルホン酸［ＰＳＳ］の混合物等が挙げられる。
【０２６５】
なお、本実施例の構成は、実施例１〜実施例１０のいずれの構成とも自由に組み合わせて実施することが可能である。
【０２６６】
（実施例１２）
発光装置は自発光型であるため、液晶ディスプレイに比べ、明るい場所での視認性に優れ、視野角が広い。従って、様々な電子機器の表示部に用いることができる。
【０２６７】
本発明の発光装置を用いた電子機器として、ビデオカメラ、デジタルカメラ、ゴーグル型ディスプレイ（ヘッドマウントディスプレイ）、ナビゲーションシステム、音響再生装置（カーオーディオ、オーディオコンポ等）、ノート型パーソナルコンピュータ、ゲーム機器、携帯情報端末（モバイルコンピュータ、携帯電話、携帯型ゲーム機または電子書籍等）、記録媒体を備えた画像再生装置（具体的にはＤＶＤ（ｄｉｇｉｔａｌ ｖｅｒｓａｔｉｌｅ ｄｉｓｃ）等の記録媒体を再生し、その画像を表示しうるディスプレイを備えた装置）などが挙げられる。特に、斜め方向から画面を見る機会が多い携帯情報端末は、視野角の広さが重要視されるため、発光装置を用いることが望ましい。それら電子機器の具体例を図１７に示す。
【０２６８】
図１７（Ａ）は表示装置であり、筐体２００１、支持台２００２、表示部２００３、スピーカー部２００４、ビデオ入力端子２００５等を含む。本発明の発光装置は表示部２００３に用いることができる。発光装置は自発光型であるためバックライトが必要なく、液晶ディスプレイよりも薄い表示部とすることができる。なお、表示装置は、パソコン用、ＴＶ放送受信用、広告表示用などの全ての情報表示用表示装置が含まれる。
【０２６９】
図１７（Ｂ）はデジタルスチルカメラであり、本体２１０１、表示部２１０２、受像部２１０３、操作キー２１０４、外部接続ポート２１０５、シャッター２１０６等を含む。本発明の発光装置は表示部２１０２に用いることができる。
【０２７０】
図１７（Ｃ）はノート型パーソナルコンピュータであり、本体２２０１、筐体２２０２、表示部２２０３、キーボード２２０４、外部接続ポート２２０５、ポインティングマウス２２０６等を含む。本発明の発光装置は表示部２２０３に用いることができる。
【０２７１】
図１７（Ｄ）はモバイルコンピュータであり、本体２３０１、表示部２３０２、スイッチ２３０３、操作キー２３０４、赤外線ポート２３０５等を含む。本発明の発光装置は表示部２３０２に用いることができる。
【０２７２】
図１７（Ｅ）は記録媒体を備えた携帯型の画像再生装置（具体的にはＤＶＤ再生装置）であり、本体２４０１、筐体２４０２、表示部Ａ２４０３、表示部Ｂ２４０４、記録媒体（ＤＶＤ等）読み込み部２４０５、操作キー２４０６、スピーカー部２４０７等を含む。表示部Ａ２４０３は主として画像情報を表示し、表示部Ｂ２４０４は主として文字情報を表示するが、本発明の発光装置はこれら表示部Ａ、Ｂ２４０３、２４０４に用いることができる。なお、記録媒体を備えた画像再生装置には家庭用ゲーム機器なども含まれる。
【０２７３】
図１７（Ｆ）はゴーグル型ディスプレイ（ヘッドマウントディスプレイ）であり、本体２５０１、表示部２５０２、アーム部２５０３を含む。本発明の発光装置は表示部２５０２に用いることができる。
【０２７４】
図１７（Ｇ）はビデオカメラであり、本体２６０１、表示部２６０２、筐体２６０３、外部接続ポート２６０４、リモコン受信部２６０５、受像部２６０６、バッテリー２６０７、音声入力部２６０８、操作キー２６０９等を含む。本発明の発光装置は表示部２６０２に用いることができる。
【０２７５】
ここで図１７（Ｈ）は携帯電話であり、本体２７０１、筐体２７０２、表示部２７０３、音声入力部２７０４、音声出力部２７０５、操作キー２７０６、外部接続ポート２７０７、アンテナ２７０８等を含む。本発明の発光装置は表示部２７０３に用いることができる。なお、表示部２７０３は黒色の背景に白色の文字を表示することで携帯電話の消費電力を抑えることができる。
【０２７６】
なお、将来的に有機発光材料の発光輝度が高くなれば、出力した画像情報を含む光をレンズ等で拡大投影してフロント型若しくはリア型のプロジェクターに用いることも可能となる。
【０２７７】
また、上記電子機器はインターネットやＣＡＴＶ（ケーブルテレビ）などの電子通信回線を通じて配信された情報を表示することが多くなり、特に動画情報を表示する機会が増してきている。有機発光材料の応答速度は非常に高いため、発光装置は動画表示に好ましい。
【０２７８】
また、発光装置は発光している部分が電力を消費するため、発光部分が極力少なくなるように情報を表示することが望ましい。従って、携帯情報端末、特に携帯電話や音響再生装置のような文字情報を主とする表示部に発光装置を用いる場合には、非発光部分を背景として文字情報を発光部分で形成するように駆動することが望ましい。
【０２７９】
以上の様に、本発明の適用範囲は極めて広く、あらゆる分野の電子機器に用いることが可能である。また、本実施例の電子機器は実施例１〜１１に示したいずれの構成の発光装置を用いても良い。
【０２８０】
【発明の効果】
本発明は上記構成により、ＴＦＴによってＩ_DS−Ｖ_GS特性に多少のばらつきがあっても、等しいゲート電圧がかかったときに出力される電流量のばらつきを抑えることができる。よってＩ_DS−Ｖ_GS特性のバラツキによって、同じ電圧の信号を入力してもＯＬＥＤの発光量が隣接画素で大きく異なってしまうという現象を抑制することが可能になる。
【０２８１】
また、本発明では、表示を行わない非表示期間を設けることができる。従来のデューティー比（画素が発光して階調表示を行う期間の１フレーム期間に占める割合）が１００％であるホールド型のアナログ駆動法の場合、動画がぼけてしまい、高速応答で動画表示に向いているというＯＬＥＤの特徴を十分に生かしきれなかった。しかし、本発明の発光装置では、非表示期間を設けてインパルス型の駆動をすることができるので、動画がぼけるのを回避することができる。
【図面の簡単な説明】
【図１】 本発明の発光装置の回路構成を示すブロック図。
【図２】 本発明の発光装置の画素の回路図。
【図３】 各期間における画素の電気的接続を示す図。
【図４】 本発明の発光装置の駆動方法を示す図。
【図５】 本発明の発光装置の駆動方法を示す図。
【図６】 本発明の発光装置の駆動方法を示す図。
【図７】 本発明の発光装置の作製行程を示す図。
【図８】 本発明の発光装置の作製行程を示す図。
【図９】 本発明の発光装置の作製行程を示す図。
【図１０】 本発明の発光装置の画素上面図。
【図１１】 本発明の発光装置の断面図。
【図１２】 本発明の発光装置の断面図。
【図１３】 本発明の発光装置の駆動回路の構成を示すブロック図。
【図１４】 本発明の発光装置の信号線駆動回路の回路図。
【図１５】 本発明の発光装置の信号線駆動回路のラッチ上面図。
【図１６】 本発明の発光装置の外観図及び断面図。
【図１７】 本発明の発光装置を用いた電子機器。
【図１８】 従来の発光装置の画素部の回路図。
【図１９】 ＴＦＴのＩ_DS−Ｖ_GS特性を示す図。
【図２０】 特願２０００−３５９０３２号に記載の画素の回路図。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an OLED panel in which an organic light emitting diode (OLED) formed on a substrate is enclosed between the substrate and a cover material. The present invention also relates to an OLED module in which an IC including a controller is mounted on the OLED panel. In this specification, the OLED panel and the OLED module are collectively referred to as a light emitting device. The present invention further relates to a driving method of the light emitting device and an electronic apparatus using the light emitting device.
[0002]
[Prior art]
The OLED emits light by itself and has high visibility, is not required for a backlight necessary for a liquid crystal display device (LCD), is optimal for thinning, and has no restriction on the viewing angle. Therefore, in recent years, light emitting devices using OLEDs have attracted attention as display devices that replace CRTs and LCDs. The light emitting device is also called an organic EL display (OELD) or an organic light emitting diode.
[0003]
The OLED has a layer (hereinafter, referred to as an organic light emitting layer) containing an organic compound (organic light emitting material) capable of obtaining luminescence generated by applying an electric field, an anode layer, and a cathode layer. . Luminescence in organic compounds includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state. Any one of the above-described light emission may be used, or both light emission may be used.
[0004]
In this specification, all layers provided between the anode and the cathode of the OLED are defined as organic light emitting layers. Specifically, the organic light emitting layer includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, the OLED has a structure in which an anode / light emitting layer / cathode is laminated in this order. In addition to this structure, the anode / hole injection layer / light emitting layer / cathode and the anode / hole injection layer / The light emitting layer / electron transport layer / cathode may be stacked in this order.
[0005]
Incidentally, as one of the driving methods of the light emitting device, there is an analog driving method (analog driving method). Hereinafter, an analog driving method of the light emitting device will be described.
[0006]
FIG. 18 illustrates a structure of a pixel portion 1800 of a general light emitting device. The pixel portion 1800 includes scanning lines G1 to Gy, power supply lines V1 to Vx, and signal lines S1 to Sx. The scanning lines G1 to Gy are respectively connected to the gate electrodes of the switching TFT 1801 included in each pixel. One of the source region and the drain region of the switching TFT 1801 included in each pixel is one of the signal lines S1 to Sx, and the other is the gate electrode of the driving TFT 1804 included in each pixel and the capacitor 1808 included in each pixel. Are connected to each.
[0007]
In the present specification, the connection means an electrical connection unless otherwise specified.
[0008]
The source region of the driving TFT 1804 included in each pixel is connected to any one of the power supply lines V1 to Vx, and the drain region is connected to the pixel electrode of the OLED 1806. The power supply lines V1 to Vx are connected to a capacitor 1808 included in each pixel.
[0009]
The OLED 1806 includes an anode, a cathode, and an organic light emitting layer provided between the anode and the cathode. When the anode of the OLED 1806 is connected to the source region or the drain region of the driving TFT 1804, the anode of the OLED 1806 becomes a pixel electrode. Conversely, when the cathode of the OLED 1806 is connected to the source region or drain region of the driving TFT 1804, the cathode of the OLED 1806 becomes a pixel electrode. In this specification, when the anode is used as a pixel electrode, the cathode is called a counter electrode, and when the cathode is used as a pixel electrode, the anode is called a counter electrode.
[0010]
The voltage difference between the pixel electrode voltage and the counter electrode voltage is applied to the organic light emitting layer as an OLED drive voltage. Note that the voltage in this specification means a potential difference from the ground unless otherwise specified.
[0011]
The operation of each pixel when the light-emitting device shown in FIG. 18 is driven by an analog driving method will be described.
[0012]
First, the voltages of the power supply lines V1 to Vx are kept at a constant height. The voltage of the counter electrode is also maintained at a constant height. The voltage of the power supply lines V1 to Vx and the voltage of the counter electrode have a voltage difference with the power supply voltage to such an extent that the OLED emits light when the voltages of the power supply lines V1 to Vx are applied to the pixel electrodes of the OLED. ing.
[0013]
The scanning lines G1 to Gy are sequentially selected by the scanning line driving circuit. In this specification, the selection of a scanning line means that all thin film transistors whose gate electrodes are connected to the scanning line are turned on. Therefore, the switching TFT 1801 having the gate electrode connected to each scanning line is turned on in order.
[0014]
Then, analog video signals are sequentially input to the signal lines S1 to Sx. Analog video signals input to the signal lines S1 to Sx are input to the gate electrode of the driving TFT 1804 via the switching TFT 1801.
[0015]
The amount of current flowing through the channel formation region of the driving TFT 1804 is controlled by the voltage of a signal input to the gate electrode of the driving TFT 1804. Therefore, the voltage applied to the pixel electrode of the OLED 1806 is determined by the voltage of the analog video signal input to the gate electrode of the driving TFT 1804. Therefore, the OLED 1806 emits light under the control of the voltage of the analog video signal.
[0016]
One image is formed by performing the above-described operation on all the pixels. Note that a period until the light emission amount of the OLED of all pixels is controlled by an analog video signal is referred to as one frame period.
[0017]
As described above, the light emission amount of the OLED is controlled by the analog video signal, and gradation display is performed by controlling the light emission amount.
[0018]
[Problems to be solved by the invention]
The manner in which the amount of current supplied to the OLED is controlled by the gate voltage of the driving TFT in the analog driving method described above will be described in detail with reference to FIGS.
[0019]
FIG. 19A shows the gate-source voltage (gate voltage) V. _GS The voltage V between the source and drain of the driving TFT when V is changed _DS And drain current I _DS It is a graph which shows the relationship. From this graph, the amount of current flowing for an arbitrary gate voltage can be known.
[0020]
When gradation display is performed in the analog driving method, the driving TFT is driven using a saturation region. In the saturation region, the threshold voltage is V _TH Then | V _GS -V _TH | <| V _DS A region having a gate voltage satisfying |. This region is used for current control by gate voltage.
[0021]
The voltage of the analog video signal input into the pixel when the switching TFT is turned on becomes the gate voltage of the driving TFT. At this time, according to the characteristics shown in FIGS. 19A and 19B, the drain current with respect to the gate voltage is determined on a one-to-one basis. That is, the voltage of the drain region is determined corresponding to the voltage of the analog video signal input to the gate electrode of the driving TFT, a predetermined drain current flows through the OLED, and the OLED emits light with a light emission amount corresponding to the current amount Emits light.
[0022]
As described above, the light emission amount of the OLED is controlled by the video signal, and gradation display is performed by controlling the light emission amount.
[0023]
However, the above-mentioned analog driving method has a drawback that it is very vulnerable to variations in TFT characteristics. In FIG. 19B, the threshold voltage V _TH The gate voltage V when V is changed _GS And drain current I _DS It is a graph which shows the relationship. Even if a gate voltage equal to the driving TFT of each pixel is applied, the same drain current cannot be output if the characteristics of the driving TFT vary. In FIG. 19B, the threshold voltage V _TH When I change _DS -V _GS Although it is a graph showing characteristics, the drain current value to be output also differs when there are variations in mobility, gate capacitance, etc. in addition to the threshold voltage.
[0024]
Further, as is apparent from FIGS. 19A and 19B, if the characteristics are slightly shifted, a situation may occur in which the amount of output current is greatly different even when an equal gate voltage is applied. If this happens, the amount of light emitted from the OLED will be greatly different between adjacent pixels even if signals of the same voltage are input due to slight variations in characteristics.
[0025]
As described above, the analog driving method is extremely sensitive to the variation in characteristics of the driving TFT, and this point has been an obstacle in the gradation display of the conventional active matrix light emitting device.
[0026]
Further, in the conventional analog drive using the pixels shown in FIG. 18, a so-called hold-type display in which an image continues to be displayed for each pixel until the next rewriting is performed, and a moving image is blurred (does not move smoothly). There was also a problem.
[0027]
The present invention has been made in view of the above problems, and an object thereof is to provide an active matrix light-emitting device capable of displaying a clear gradation. It is another object of the present invention to provide a high-performance electronic device including such an active matrix light-emitting device as a display device.
[0028]
[Means for Solving the Problems]
The present inventor has greatly reduced the variation in characteristics of the driving TFTs, and at the same time, in order to prevent blurring of moving images, the switching TFT for writing the video signal to the pixel and the voltage of the written video signal Based on this, a plurality of driving TFTs for passing current to the OLED and TFTs for erasing video signals written in the pixels (hereinafter referred to as erasing TFTs) are provided in each pixel. Further, the plurality of driving TFTs are connected in parallel with a plurality of driving TFTs connected in series. All the driving TFTs have their gate electrodes connected to each other. Hereinafter, in this specification, a plurality of driving TFTs provided in each pixel are collectively referred to as a driving TFT group.
[0029]
By providing the above-described driving TFT group in each pixel, in the present invention, the driving TFT I _DS -V _GS Even if there is some variation in characteristics, it is possible to avoid a situation in which the light emission amount of the OLED greatly differs between adjacent pixels when a signal of the same voltage is input.
[0030]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the structure of the light emitting device of the present invention and the driving method thereof will be described with two examples. One is a method using a digital video signal, and the other is a method using an analog video signal.
(Embodiment 1)
First, 2 with an n-bit digital video signal. ⁿ A case where gradation display is performed will be described.
[0031]
FIG. 1 is a block diagram of a light-emitting device using the driving method of the present invention, in which 100 is a pixel portion, 102 is a signal line driving circuit, 103 is a first scanning line driving circuit, and 104 is a second scanning line driving circuit.
[0032]
Although not shown, the pixel unit 100 includes signal lines S1 to Sx, first scanning lines Ga1 to Gay, second scanning lines Ge1 to Gey, and power supply lines V1 to Vx.
[0033]
A pixel 101 is a region having one signal line, one first scanning line, two second scanning lines, and one power supply line. The pixel unit 100 is provided with a plurality of pixels 101 in a matrix.
[0034]
In FIG. 1, the signal line driver circuit 102, the first scan line driver circuit 103, and the second scan line driver circuit 104 are formed over the same substrate as the pixel portion 100; however, the present invention is not limited to this structure. The signal line driver circuit 102, the first scan line driver circuit 103, and the second scan line driver circuit 104 are formed on a different substrate from the pixel unit 100, and are connected to the pixel unit 100 through a connector such as an FPC. Also good. In FIG. 1, the signal line driver circuit 102, the first scan line driver circuit 103, and the second scan line driver circuit 104 are provided one by one, but the present invention is not limited to this configuration. The number of the signal line driving circuit 102, the first scanning line driving circuit 103, and the second scanning line driving circuit 104 can be arbitrarily set by a designer.
[0035]
FIG. 2 shows the configuration of the pixel of the present invention. 2 includes a signal line Si (one of S1 to Sx), a first scanning line Gaj (one of Ga1 to Gay), and a second scanning line Gej (Ge1 to Gey). 1) and a power supply line Vi (one of V1 to Vx).
[0036]
Note that the number of signal lines and power supply lines is not necessarily the same. Further, the number of the first scanning lines and the number of the second scanning lines are not necessarily the same. Further, it is not always necessary to have all of these wirings, and other different wirings may be provided in addition to these wirings.
[0037]
The pixel 101 includes a switching TFT 107, an erasing TFT 109, an OLED 110, and a capacitor 112. Further, the pixel 101 has a driving TFT group 108 including a plurality of driving TFTs.
[0038]
In the light emitting device of the present invention, the driving TFT group 108 has s × t driving TFTs. FIG. 2 shows the driving TFT group 108 when s = t = 2. The s × t driving TFTs are connected in series between the power supply line Vi and the OLED 110. That is, s channel formation regions connected in series are connected in parallel between the power supply line Vi and the OLED 110. All the driving TFTs have their gate electrodes connected to each other.
[0039]
If the values of s and t are both 2 or more, the designer can arbitrarily set them.
[0040]
The gate electrode of the switching TFT 107 is connected to the first scanning line Gaj. One of the source region and the drain region of the switching TFT 107 is connected to the signal line Si, and the other is connected to the gate electrodes of all the driving TFTs included in the driving TFT group 108.
[0041]
Note that in this specification, the voltage applied to the source region of the n-channel transistor is lower than the voltage applied to the drain region. The voltage applied to the source region of the p-channel transistor is higher than the voltage applied to the drain region.
[0042]
The capacitor 112 is formed between the power supply line Vi and the gate electrodes of all the driving TFTs included in the driving TFT group 108. When the switching TFT 107 is in a non-selected state (off state), it is provided to hold the gate voltages of all the driving TFTs included in the driving TFT group 108 group. Note that although a structure in which the capacitor 112 is provided is described in this embodiment mode, the present invention is not limited to this structure, and a structure without the capacitor 112 may be employed. Since the light emitting device of the present invention is provided with 2 × 2 or more driving TFTs, the capacity (gate capacity) formed between the gate electrode and the active layer of the driving TFT group is one driving TFT. It is larger than the case, and the gate voltage can be sufficiently held by the gate capacitance.
[0043]
The gate electrode of the erasing TFT 109 is connected to the second scanning line Gej. One of the source region and the drain region of the erasing TFT 109 is connected to the power supply line Vi, and the other is connected to the gate electrodes of all the driving TFTs of the driving TFT group 108.
[0044]
The OLED 110 includes an anode, a cathode, and an organic light emitting layer provided between the anode and the cathode.
[0045]
A predetermined voltage is applied to the counter electrode of the OLED 110 from a power source provided outside the substrate having the pixel portion 101. A predetermined voltage is applied to the power supply lines V1 to Vx from a power supply provided outside the substrate including the pixel portion 101. The voltage difference between the counter electrode and the power supply line is maintained at such a magnitude that the OLED emits light when the voltage of the power supply line is applied to the pixel electrode.
[0046]
1 and 2 show the configuration of a light emitting device that displays a monochrome image, the present invention may be a light emitting device that displays a color image. In that case, the voltage levels of the power supply lines V1 to Vx need not be kept all the same, and may be changed for each corresponding color.
[0047]
The current typical light emitting device has a light emission amount of 200 cd / m per area of the pixel portion. ² In this case, the current per area of the pixel portion is several mA / cm. ² A degree is required. Therefore, when the size of the pixel portion is increased, it becomes difficult to control on / off of a voltage applied to a power supply line from a power supply provided in an IC or the like with a switch. In the present invention, the voltage difference between the power supply line and the counter electrode is always kept constant, and it is not necessary to control the voltage supplied from the power supply provided in the IC with a switch. It is useful for realizing.
[0048]
As the switching TFT 107, the driving TFT group 108, and the erasing TFT 109, either an n-channel TFT or a p-channel TFT can be used. However, all the driving TFTs included in the driving TFT group 108 have the same polarity. When the anode is used as the pixel electrode and the cathode is used as the counter electrode, it is desirable that all the driving TFTs are p-channel transistors. On the contrary, when the anode is used as the counter electrode and the cathode is used as the pixel electrode, it is desirable that all the driving TFTs are n-channel transistors.
[0049]
The switching TFT 107 and the erasing TFT 109 may have a multi-gate structure (a structure including an active layer having two or more channel formation regions connected in series) instead of a single gate structure.
[0050]
Next, a method for driving the light emitting device of the present invention shown in FIGS. 1 and 2 will be described.
[0051]
The driving of the light emitting device of the present invention can be described by being divided into a writing period Ta, a display period Tr, and a non-display period Td. The timing at which the writing period Ta, the display period Tr, and the non-display period Td appear has a time difference for each pixel of each line.
[0052]
FIG. 4 shows the timing when the writing period Ta, the display period Tr, and the non-display period Td appear. The horizontal axis indicates time, and the vertical axis indicates the positions of the first scanning line and the second scanning line that the pixel has. However, since the writing period Ta is short, the start timing of the writing periods Ta1 to Tan corresponding to each bit is indicated by an arrow in order to make the drawing easier to see. For each corresponding bit, the period from the start of the pixel writing period for the first line to the end of the pixel writing period for the y-th line is denoted as ΣTa1 to ΣTan.
[0053]
First, the writing period Ta1 starts in the pixels on the first line. When the writing period Ta1 is started, the first scanning line driving circuit 103 selects the first scanning line Ga1 of the first line, and all the switching TFTs 107 of the pixels of the first line are turned on. At this time, since the second scanning line Ge1 of the first line is not selected, the erasing TFT 109 is turned off.
[0054]
FIG. 3A simply shows connection of circuit elements of each pixel in the writing period Ta.
[0055]
Then, a digital video signal of the first bit (hereinafter referred to as a digital video signal) is input to the signal lines S1 to Sx, and the voltage of the digital video signal is the gate electrode of all the driving TFTs of the driving TFT group 108. Given to.
[0056]
Note that in this specification, a video signal is input to a pixel when a voltage of a video signal is applied to the gate electrode of the driving TFT group 108 via the switching TFT 107.
[0057]
The digital video signal has information of “0” or “1”, and the digital video signals of “0” and “1” are signals having one voltage of Hi and one of Lo. According to the voltage of the digital video signal, it is selected whether all the driving TFTs included in the driving TFT group 108 are turned on or off.
[0058]
When the driving TFT group 108 is off, in other words, when all the driving TFTs included in the driving TFT group 108 are off, the voltage of the power supply line is not applied to the pixel electrode, so the OLED 110 does not emit light.
[0059]
When the driving TFT group 108 is on, in other words, when all the driving TFTs included in the driving TFT group 108 are on, the voltage of the power supply line is applied to the pixel electrode, and the OLED 110 emits light.
[0060]
As described above, simultaneously with the input of the digital video signal to the pixels on the first line, the OLED 110 emits light or does not emit light, and the pixels on the first line perform display.
[0061]
Then, the writing period ends at the pixels on the first line, and the writing period Ta1 starts at the pixels on the second line. When the writing period Ta1 is started in the pixels on the second line, the first scanning line Ga2 is selected. Similarly to the pixels on the first line, the digital video signal of the first bit is input to the pixels on the second line, and the pixels on the second line perform display.
[0062]
When the writing period Ta1 ends in the pixels on the second line, similarly, the writing period Ta1 starts in the pixels on and after the third line, and the first scanning lines Ga3 to Gay are sequentially selected. Then, a 1-bit digital video signal is input to the pixels of each line, and the pixels of each line perform display.
[0063]
On the other hand, when the writing period Ta1 ends in the pixels on the first line, the display period Tr1 starts next.
[0064]
FIG. 3B simply shows connection of circuit elements of each pixel in the display period Tr.
[0065]
In the display period Tr1, since the first scanning line Ga1 and the second scanning line Ge1 are in a non-selected state, the voltage applied to the gate electrode of the driving TFT group 108 is held in the writing period. Therefore, when the driving TFT group 108 is turned on in the writing period Ta1, the driving TFT group 108 remains on in the display period Tr1 and the OLED 110 continues to emit light. On the other hand, when the driving TFT group 108 is turned off during the writing period Ta1, the driving TFT group 108 remains off and the OLED 110 remains in a non-light emitting state even during the display period Tr1.
[0066]
Next, when the writing period Ta1 ends in the pixels on the second line, the display period Tr1 starts. Similarly to the pixels on the first line, the digital video input to the pixels in the writing period Ta1 also on the pixels on the second line. The display of the pixel is maintained according to the voltage of the signal.
[0067]
The display period Tr1 is also started in order for the pixels on and after the third line. Similarly to the pixels on the first line, the display of the pixels is maintained in the pixels on each line in accordance with the voltage of the digital video signal input to the pixels in the writing period Ta1.
[0068]
On the other hand, before the display period Tr1 is started in the pixels of all lines, the display period Tr1 is ended and the non-display period Td1 is started in the pixels of the first line.
[0069]
When the non-display period Td1 is started, the second scanning line Ge1 of the first line is selected, and the erasing TFT 109 of the pixel of the first line is turned on. In the non-display period Td1, the first scanning line Ga1 remains in a non-selected state.
[0070]
FIG. 3C simply shows connection of circuit elements of each pixel in the non-display period Td.
[0071]
When the erasing TFT 109 is turned on, the voltage of the power supply line is applied to the gate electrode of the driving TFT group 108. Therefore, in the driving TFT group 108, the gate voltage of the driving TFT in which the voltage of the power supply line is applied to the source region becomes close to 0, and the driving TFT 108 is turned off. Accordingly, the voltage of the power supply line is not applied to the pixel electrode of the OLED 110, and the OLED 110 does not emit light.
[0072]
Next, the non-display period Td1 also appears in order in the pixels on and after the second line, and the OLED 110 of each pixel stops emitting light.
[0073]
Next, the writing period Ta2 is started in the pixels on the first line, and the first scanning line Ga1 is selected. Then, a 2-bit digital video signal is input to the pixels on the first line, and the pixels on the second line perform display.
[0074]
The writing period Ta2 is also started in order for the pixels on and after the second line.
[0075]
On the other hand, when the writing period Ta2 ends in the pixels on the first line, the display period Tr2 starts next, and the display of the pixels is maintained. In addition, the writing period Ta2 ends in the pixels on and after the second line, and the display period Tr2 starts in order.
[0076]
The operation described above is repeated until the display period Tam (m is an arbitrary natural number of 1 to n) is started, and the writing period Ta, the display period Tr, and the non-display period Td appear repeatedly.
[0077]
For ease of explanation, FIG. 4 shows a case where m = n−2, but it goes without saying that the present invention is not limited to this. In the present invention, m can be arbitrarily selected from 1 to n.
[0078]
When Tam [n-2 (hereinafter, m = n-2 is shown in parentheses)] is started, an m-bit digital signal is input to the pixels on the first line, and display is performed. Then, when the writing period Tam ends in the pixels on the first line, the writing period Tam starts sequentially in the pixels on and after the second line, and the m-bit digital signal is input to the pixels on each line.
[0079]
On the other hand, when the writing period Tam ends in the pixels on the first line, the display period Trm starts next, and the display of the pixels on the first line is maintained. In the pixels on and after the second line, when the writing period Tam ends, the display period Trm starts in order, and the display of the pixels on each line is maintained.
[0080]
Next, after the display period Trm of the pixels of all lines is started, the writing period Ta (m + 1) [n−1] is started in the pixels of the first line, and the (m + 1) [n−1] -th bit is started. A digital video signal is input to the pixels on the first line.
[0081]
On the other hand, when the writing period Ta (m + 1) [n−1] ends in the pixels on the first line, the display period Tr (m + 1) [n−1] starts next, and the display of the pixels on the first line is maintained. The In the pixels on and after the second line, when the writing period Ta (m + 1) [n−1] ends, the display period Tr (m + 1) [n−1] is started in order, and the display of the pixels in each line is performed. Maintained.
[0082]
The above-described operation is repeated until the display period Trn ends in all pixels.
[0083]
When all the display periods Tr1 to Trn are completed, one image can be displayed. In the present invention, a period during which one image is displayed is referred to as one frame period (F).
[0084]
Then, after the end of one frame period, the next frame period is started, the writing period Ta1 is started again in the pixels on the first line, and the above-described operation is repeated again.
[0085]
The light emitting device preferably has 60 or more frame periods per second. When the number of images displayed per second is less than 60, flickering of images may start to be noticeable visually.
[0086]
In the present invention, it is important that the sum of the lengths of all the writing periods is shorter than one frame period. In addition, the length of the display period is Tr1: Tr2: Tr3:...: Tr (n−1): Trn = 2. ⁰ : 2 ¹ : 2 ² : ...: 2 ^(n-2) : 2 ^(n-1) Is necessary. 2 in combination with this display period ⁿ Of the gradations, a desired gradation display can be performed.
[0087]
By obtaining the sum of the lengths of the display periods during which the OLED emits light during one frame period, the gradation displayed by the pixel in the frame period is determined. For example, when n = 8 and the luminance when the pixel emits light in the entire display period is 100%, 1% luminance can be expressed when the pixel emits light in Tr1 and Tr2, and Tr3, Tr5, and Tr8 can be expressed. When is selected, a luminance of 60% can be expressed.
[0088]
Note that a period ΣTam from the start of the pixel writing period Tam for the first line to the end of the pixel writing period Tam for the y-th line is shorter than the length of the display period Trm.
[0089]
The display periods Tr1 to Trn may appear in any order. For example, in one frame period, it is possible to cause the display period to appear in the order of Tr3, Tr5, Tr2,. However, the order in which the display periods Tr1 to Trn do not overlap each other is more preferable. In addition, the non-display periods Td1 to Tdn are more preferably in an order that does not overlap each other.
[0090]
In the present invention, the driving TFT is operated in the saturation region during light emission. By operating in the saturation region, even if the luminance-voltage characteristics of the OLED change due to a slight deterioration of the OLED or a change in environmental temperature, if the luminance-current characteristic does not change, the emission luminance will change over time. It can be prevented from changing.
[0091]
The present invention is different from the pixel described in Japanese Patent Application No. 2000-359032 shown in FIG. 20 filed by the present applicant in that a plurality of driving TFTs are arranged in a grid pattern. In FIG. 20, each pixel includes a signal line 701, a first scanning line 702, a second scanning line 703, a power supply line 704, a switching TFT 705, a driving TFT 706, an erasing TFT 707, and an OLED 708. Unlike the pixel shown in FIG. 20, in the present invention, since driving TFTs having a driving TFT of 2 × 2 or more are connected in series and in parallel, the heat generated by the current flowing through the active layer of the driving TFT is reduced. Radiation can be performed efficiently and deterioration of the driving TFT can be suppressed. Further, according to the present invention, a plurality of driving TFTs are arranged in a lattice pattern so that each driving TFT I _DS -V _GS Even if there is some variation in characteristics, variation in the amount of current output when an equal gate voltage is applied to the driving TFT group can be suppressed. So I _DS -V _GS Due to the variation in characteristics, it is possible to avoid a situation in which the light emission amount of the OLED greatly differs between adjacent pixels even when signals of the same voltage are input.
[0092]
In the present invention, a non-display period in which no display is performed can be provided. Thereby, unlike the hold-type drive, it is possible to avoid blurring of moving images.
[0093]
(Embodiment 2)
In this embodiment mode, an impulse-type driving method using an analog video signal will be described. 1 and 2 are referred to for a block diagram of the light-emitting device and a pixel structure.
[0094]
In the case of using an analog video signal, similarly to the case of using a digital video signal, driving of the light emitting device of the present invention can be described by being divided into a writing period Ta, a display period Tr, and a non-display period Td. However, in the case of driving using an analog video signal, one writing period Ta, one display period Tr, and one non-display period Td appear in one frame period.
[0095]
Further, the timing at which the writing period Ta, the display period Tr, and the non-display period Td appear has a time difference for each pixel of each line.
[0096]
When the writing period Ta is started in each pixel, the first scanning line Ga is selected, and the switching TFT 107 is turned on. At this time, the second scanning line Ge is not selected, and the erasing TFT 109 is off. For connection of circuit elements of each pixel in the writing period Ta, FIG. 3A can be referred to.
[0097]
An analog video signal is input to the signal line, and the voltage of the analog video signal is applied to the gate electrodes of all the driving TFTs in the driving TFT group 108. Each driving TFT supplies a drain current having a magnitude corresponding to the voltage of the analog video signal input to the gate electrode to the OLED 110. Therefore, the light emission luminance of the OLED 110 is determined according to the voltage of the analog video signal, and gradation is displayed.
[0098]
When the writing period Ta ends, the display period Tr starts next. In the display period Tr, since the first scanning line Ga and the second scanning line Ge are in a non-selected state, the voltage applied to the gate electrode of the driving TFT group 108 is held in the writing period Ta. Connection of circuit elements of each pixel in the display period Tr can be referred to FIG. Therefore, the OLED 110 continues to maintain the light emission luminance determined in the writing period Ta.
[0099]
When the display period Tr ends, the non-display period Td starts next. When the non-display period Td is started, the second scanning line Ge is selected and the erasing TFT 109 is turned on. The first scanning line Ga remains in a non-selected state. For connection of circuit elements of each pixel in the non-display period Td, FIG. 3C can be referred to.
[0100]
When the erasing TFT 109 is turned on, the voltage of the power supply line is applied to the gate electrode of the driving TFT group 108. Therefore, in the driving TFT group 108, the gate voltage of the driving TFT in which the voltage of the power supply line is applied to the source region becomes close to 0, and the driving TFT 108 is turned off. Therefore, the voltage of the power supply line is not applied to the pixel electrode of the OLED 110, and the OLED 110 does not emit light.
[0101]
The above-described operation is performed in all pixels. When the writing period Ta, the display period Tr, and the non-display period Td all appear in the pixels of each line, one frame period ends.
[0102]
In this manner, in the case of the impulse type driving method, the display is once erased until the next video signal is written for each pixel, and thus light emission and non-light emission are repeated in each pixel. Unlike the hold-type driving method, such an impulse-type driving method can prevent a moving image from being blurred.
[0103]
In the light-emitting device of the present invention, a plurality of driving TFTs are arranged in a lattice shape in the present invention, so that variations in drain current caused by variations in characteristics such as threshold values and mobility of the driving TFTs are suppressed. Can do. Therefore, the present invention is not limited to a digital driving method using a digital video signal, and is suitable for an analog driving method using an analog video signal.
[0104]
【Example】
Examples of the present invention will be described below.
[0105]
Example 1
In this example, the order in which display periods appear in the driving method described in Embodiment Mode 1 will be described. In the present embodiment, when a 6-bit digital video signal is used, the order in which the display periods Tr1 to Tr6 appear will be described as an example. However, in this embodiment, a case where m = 5 will be described. Note that the present invention is not limited to the configuration of this embodiment with respect to the number of bits of the corresponding digital video signal and the value of m. The configuration of this embodiment is effective when the number of bits of the digital video signal is 3 or more.
[0106]
FIG. 5 shows the timing when the writing period Ta, the display period Tr, and the non-display period Td appear in the driving method of this embodiment. The horizontal axis indicates time, and the vertical axis indicates the positions of the first scanning line and the second scanning line that the pixel has. However, since the writing period is short, the start timing of the writing periods Ta1 to Ta6 corresponding to each bit is indicated by an arrow in order to make the drawing easier to see. In addition, for each corresponding bit, the period from the start of the pixel writing period of the first line to the end of the pixel writing period of the y line is denoted by ΣTa1 to ΣTa6, respectively.
[0107]
Further, since detailed operation of the pixel has already been described in the embodiment, description thereof is omitted here.
[0108]
In the driving method of this embodiment, the longest display period (Tr6 in this embodiment) in one frame period is not provided at the beginning and end of one frame period. In other words, another display period included in the same frame period appears before and after the longest display period in one frame period.
[0109]
However, a writing period corresponding to the same bit always appears immediately before the display period.
[0110]
With the above-described configuration, it is possible to make it difficult for human eyes to recognize display unevenness that occurs due to adjacent display periods that emit light between adjacent frame periods when intermediate grayscale display is performed.
[0111]
The configuration of this embodiment is effective when n ≧ 3.
[0112]
(Example 2)
In this example, another example of the driving method described in Embodiment Mode 1 will be described. In this embodiment, an n-bit digital video signal is used. However, in this embodiment, a case where m = n−2 will be described.
[0113]
In the driving method of the present embodiment, the display period Trn corresponding to the most significant bit digital video signal is divided into a first display period Trn_1 and a second display period Trn_2. A first writing period Tan_1 and a second writing period Tan_2 are provided corresponding to the first display period Trn_1 and the second display period Trn_2, respectively.
[0114]
FIG. 6 shows the timing at which the writing period Ta, the display period Tr, and the non-display period Td appear in the driving method of this embodiment. The horizontal axis indicates time, and the vertical axis indicates the positions of the first scanning line and the second scanning line that the pixel has. However, since the writing period is short, in order to make the drawing easier to see, the start timings of the writing periods Ta1 to Ta (n-1), Tan_1, and Tan_2 corresponding to each bit are indicated by arrows. For each corresponding bit, the period from the start of the pixel writing period of the first line to the end of the pixel writing period of the y-th line is represented by ΣTa1 to ΣTa (n−1), ΣTan_1, and ΣTan_2. Show.
[0115]
Further, since detailed operation of the pixel has already been described in the embodiment, description thereof is omitted here.
[0116]
In this embodiment, display periods corresponding to other bits are provided in the display period corresponding to the digital video signal of the same bit (between the first display period Trn_1 and the second display period Trn_2 in this embodiment). .
[0117]
The lengths of the display periods Tr1 to Trn, Trn_1, Trn_2 are Tr1: Tr2:...: Tr (n-1) :( Trn_1 + Trn_2) = 2. ⁰ : 2 ¹ : ...: 2 ^n-1 Meet.
[0118]
In the driving method of the present invention, gradation is displayed by controlling the sum of the lengths of the display periods during which light is emitted in one frame period.
[0119]
In the present embodiment, the display unevenness caused by the adjacent display periods emitting light in the adjacent frame periods when the intermediate gradation is displayed by the above configuration is the case of the embodiment and the first embodiment. It can be made difficult to be recognized by human eyes compared to.
[0120]
In this embodiment, the case where there are two display periods corresponding to the same bit has been described, but the present invention is not limited to this. Three or more display periods corresponding to the same bit may be provided in one frame period.
[0121]
In this embodiment, a plurality of display periods corresponding to the most significant bit digital video signal are provided. However, the present invention is not limited to this. A plurality of display periods corresponding to bits other than the most significant bit may be provided. In addition, the number of bits provided with a plurality of corresponding display periods is not limited to one, and a configuration in which a plurality of display periods correspond to some of the bits may be employed.
[0122]
The configuration of this embodiment is effective when n ≧ 2. This embodiment can be implemented in combination with the first embodiment.
[0123]
(Example 3)
In this example, a method for manufacturing a TFT of a pixel portion in a light-emitting device of the present invention will be described. However, in order to simplify the description, the drive TFT group will be described by showing only two of the 2 × 2 drive TFTs. In this embodiment, only a method for manufacturing a TFT in a pixel portion will be described. However, driving circuits (a signal line driving circuit, a first scanning line driving circuit, and a second scanning line driving circuit) provided in the pixel portion and the periphery thereof are used. It is also possible to manufacture TFTs at the same time.
[0124]
First, as shown in FIG. 7A, a silicon oxide film is formed on a substrate 5001 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass, or aluminoborosilicate glass, A base film 5002 made of an insulating film such as a silicon nitride film or a silicon oxynitride film is formed. For example, SiH by plasma CVD method _Four , NH _Three , N ₂ A silicon oxynitride film 5002a made of O is formed to 10 to 200 nm (preferably 50 to 100 nm), and similarly SiH _Four , N ₂ A silicon oxynitride silicon nitride film 5002b formed from O is stacked to a thickness of 50 to 200 nm (preferably 100 to 150 nm). Although the base film 5002 is shown as a two-layer structure in this embodiment, it may be formed as a single-layer film of the insulating film or a structure in which two or more layers are stacked.
[0125]
The island-shaped semiconductor films 5003 to 5005 are formed using a crystalline semiconductor film in which a semiconductor film having an amorphous structure is formed using a laser crystallization method or a known thermal crystallization method. The island-like semiconductor films 5003 to 5005 are formed to a thickness of 25 to 80 nm (preferably 30 to 60 nm). There is no limitation on the material of the crystalline semiconductor film, but the crystalline semiconductor film is preferably formed of silicon or a silicon germanium (SiGe) alloy.
[0126]
In order to fabricate a crystalline semiconductor film by laser crystallization, a pulse oscillation type or continuous emission type excimer laser, YAG laser, YVO _Four Use a laser. In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly collected by an optical system and irradiated onto a semiconductor film. Crystallization conditions are appropriately selected by the practitioner, but when an excimer laser is used, the pulse oscillation frequency is 300 Hz and the laser energy density is 100 to 400 mJ / cm. ² (Typically 200-300mJ / cm ² ). When a YAG laser is used, the second harmonic is used and the pulse oscillation frequency is set to 30 to 300 kHz, and the laser energy density is set to 300 to 600 mJ / cm. ² (Typically 350-500mJ / cm ² ) Then, laser light condensed linearly with a width of 100 to 1000 μm, for example 400 μm, is irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear laser light at this time is 50 to 90%.
[0127]
Next, a gate insulating film 5007 is formed to cover the island-shaped semiconductor films 5003 to 5005. The gate insulating film 5007 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by a plasma CVD method or a sputtering method. In this embodiment, a silicon oxynitride film is formed with a thickness of 120 nm. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) and O ₂ And a reaction pressure of 40 Pa, a substrate temperature of 300 to 400 ° C., a high frequency (13.56 MHz), and a power density of 0.5 to 0.8 W / cm. ² And can be formed by discharging. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 ° C.
[0128]
Then, a first conductive film 5008 and a second conductive film 5009 for forming a gate electrode are formed over the gate insulating film 5007. In this embodiment, the first conductive film 5008 is formed with Ta to a thickness of 50 to 100 nm, and the second conductive film 5009 is formed with W to a thickness of 100 to 300 nm.
[0129]
The Ta film is formed by sputtering, and a Ta target is sputtered with Ar. In this case, when an appropriate amount of Xe or Kr is added to Ar, the internal stress of the Ta film can be relieved and peeling of the film can be prevented. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used as a gate electrode, but the resistivity of the β-phase Ta film is about 180 μΩcm and is not suitable for a gate electrode. In order to form an α-phase Ta film, tantalum nitride having a crystal structure close to Ta's α-phase is formed on a Ta base with a thickness of about 10 to 50 nm, so that an α-phase Ta film can be easily obtained. be able to.
[0130]
When forming a W film, it is formed by sputtering using W as a target. In addition, tungsten hexafluoride (WF ₆ It can also be formed by a thermal CVD method using In any case, in order to use as a gate electrode, it is necessary to reduce the resistance, and the resistivity of the W film is desirably 20 μΩcm or less. The resistivity of the W film can be reduced by increasing the crystal grains. However, when there are many impurity elements such as oxygen in W, crystallization is hindered and the resistance is increased. Therefore, when sputtering is used, a W target having a purity of 99.99 or 99.9999% is used, and a W film is formed with sufficient consideration so that impurities are not mixed in the gas phase during film formation. Thus, a resistivity of 9 to 20 μΩcm can be realized.
[0131]
Note that in this example, the first conductive film 5008 is Ta and the second conductive film 5009 is W, but there is no particular limitation, and any of these is selected from Ta, W, Ti, Mo, Al, and Cu. You may form with an element or the alloy material or compound material which has the said element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. An example of another combination other than the present embodiment is a combination in which the first conductive film is formed of tantalum nitride (TaN), the second conductive film is W, and the first conductive film is formed of tantalum nitride (TaN). Preferably, the second conductive film is formed using a combination of Al, the first conductive film is formed using tantalum nitride (TaN), and the second conductive film is formed using a combination of Cu. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or an AgPdCu alloy may be used as the first conductive film and the second conductive film.
[0132]
The structure is not limited to the two-layer structure, and for example, a three-layer structure in which a tungsten film, an aluminum-silicon alloy (Al-Si) film, and a titanium nitride film are sequentially stacked may be employed. In the case of a three-layer structure, tungsten nitride may be used instead of tungsten, or an aluminum-titanium alloy film (Al-Ti) is used instead of an aluminum-silicon alloy film (Al-Si) film. Alternatively, a titanium film may be used instead of the titanium nitride film.
[0133]
Note that it is important to select an optimum etching method and etchant type depending on the material of the conductive film.
[0134]
Next, a resist mask 5010 is formed, and a first etching process is performed to form electrodes and wirings. In this embodiment, an ICP (Inductively Coupled Plasma) etching method is used, and CF is used as an etching gas. _Four And Cl ₂ And 500 W of RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1 Pa to generate plasma. 100 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. CF _Four And Cl ₂ When W is mixed, the W film and the Ta film are etched to the same extent.
[0135]
Under the above etching conditions, by making the shape of the resist mask suitable, the end portions of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of the tapered portion is 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%. Since the selection ratio of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the surface where the silicon oxynitride film is exposed is etched by about 20 to 50 nm by the overetching process. Thus, the first shape conductive layers 5011 to 5014 (the first conductive layers 5011a to 5014a and the second conductive layers 5011b to 5014b) formed of the first conductive layer and the second conductive layer by the first etching process. Form. At this time, in the gate insulating film 5007, a region which is not covered with the first shape conductive layers 5011 to 5014 is etched and thinned by about 20 to 50 nm. (Fig. 7 (A))
[0136]
Then, an impurity element imparting N-type is added by performing a first doping process. (FIG. 7B) The doping method may be an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁴ atoms / cm ² The acceleration voltage is set to 60 to 100 keV. As an impurity element imparting N-type, an element belonging to Group 15, typically phosphorus (P) or arsenic (As) is used. Here, phosphorus (P) is used. In this case, the conductive layers 5011 to 5014 serve as a mask for the impurity element imparting N-type, and the first impurity regions 5017 to 5023 are formed in a self-aligning manner. The first impurity regions 5017 to 5023 have 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three An impurity element imparting N-type is added in a concentration range of.
[0137]
Next, as shown in FIG. 7C, a second etching process is performed. Similarly, using the ICP etching method, the etching gas is CF. _Four And Cl ₂ And O ₂ And 500 W of RF (13.56 MHz) power is supplied to the coil-type electrode at a pressure of 1 Pa to generate plasma. 50 W RF (13.56 MHz) power is applied to the substrate side (sample stage), and a lower self-bias voltage is applied than in the first etching process. Under such conditions, the W film is anisotropically etched, and Ta, which is the first conductive layer, is anisotropically etched at a slower etching rate to form the second shape conductive layers 5024 to 5027 (first Conductive layers 5024a to 5027a and second conductive layers 5024b to 5027b) are formed. At this time, in the gate insulating film 5007, a region that is not covered with the second shape conductive layers 5024 to 5027 is further etched by about 20 to 50 nm to form a thinned region.
[0138]
CF of W film and Ta film _Four And Cl ₂ The etching reaction by the mixed gas can be estimated from the generated radicals or ion species and the vapor pressure of the reaction product. Comparing the vapor pressure of fluoride and chloride of W and Ta, WF, which is fluoride of W ₆ Is extremely high, other WCl _Five , TaF _Five , TaCl _Five Are comparable. Therefore, CF _Four And Cl ₂ With this mixed gas, both the W film and the Ta film are etched. However, an appropriate amount of O is added to this mixed gas. ₂ When CF is added _Four And O ₂ Reacts to CO and F, and a large amount of F radicals or F ions are generated. As a result, the etching rate of the W film having a high fluoride vapor pressure is increased. On the other hand, the increase in etching rate of Ta is relatively small even when F increases. Further, since Ta is more easily oxidized than W, O ₂ When Ta is added, the surface of Ta is oxidized. Since the Ta oxide does not react with fluorine or chlorine, the etching rate of the Ta film further decreases. Therefore, it is possible to make a difference in the etching rate between the W film and the Ta film, and the etching rate of the W film can be made larger than that of the Ta film.
[0139]
Then, a second doping process is performed as shown in FIG. In this case, the impurity amount imparting N-type is doped as a condition of a high acceleration voltage by lowering the dose than the first doping treatment. For example, the acceleration voltage is 70 to 120 keV and 1 × 10 ¹³ atoms / cm ² A new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor film in FIG. Doping is performed using the second shape conductive layers 5024 to 5027 as masks against the impurity elements, so that the impurity elements are also added to the lower regions of the second conductive layers 5024a to 5027a. Thus, third impurity regions 5030 to 5037 overlapping with the second conductive layers 5024a to 5027a and second impurity regions 5040 to 5047 between the first impurity region and the third impurity region are formed. An impurity element imparting N-type conductivity is 1 × 10 6 in the second impurity region. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three 1 × 10 in the third impurity region. ¹⁶ ~ 1x10 ¹⁸ atoms / cm ^Three So that the concentration becomes.
[0140]
Then, as shown in FIG. 8B, fourth impurity regions 5050 to 5060 having a conductivity type opposite to the first conductivity type are formed in the island-shaped semiconductor film 5004 forming the P-channel TFT. The second conductive layers 5024b to 5027b are used as masks against the impurity element, and impurity regions are formed in a self-aligning manner. At this time, the island-shaped semiconductor films 5003 and 5005 forming the N-channel TFT are covered with the resist mask 5200 in advance. The impurity regions 5050 to 5060 are doped with phosphorus at different concentrations, but diborane (B ₂ H ₆ ) And an impurity concentration of 2 × 10 6 in any region. ²⁰ ~ 2x10 ^{twenty one} atoms / cm ^Three To be.
[0141]
Through the above steps, impurity regions are formed in each island-like semiconductor film. The second conductive layers 5024 to 5027 overlapping with the island-shaped semiconductor film function as gate electrodes.
[0142]
Thus, for the purpose of controlling the conductivity type, a step of activating the impurity element added to each island-like semiconductor film is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 1 ppm or less, preferably 0.1 ppm or less in a nitrogen atmosphere at 400 to 700 ° C., typically 500 to 600 ° C. In this example, the temperature is 500 ° C. for 4 hours. Heat treatment is performed. However, in the case where the wiring material used for 5024 to 5027 is weak against heat, activation is preferably performed after an interlayer insulating film (having silicon as a main component) is formed in order to protect the wiring and the like.
[0143]
Further, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to perform a step of hydrogenating the island-shaped semiconductor film. This step is a step of terminating dangling bonds in the semiconductor film with thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.
[0144]
Next, as shown in FIG. 8C, a first interlayer insulating film 5061 is formed with a thickness of 100 to 200 nm from a silicon oxynitride film. After a second interlayer insulating film 5062 made of an organic insulating material is formed thereon, contact holes are formed in the first interlayer insulating film 5061, the second interlayer insulating film 5062, and the gate insulating film 5007. Each wiring (including connection wiring and signal lines) 5065 to 5069 is formed by patterning.
[0145]
As the second interlayer insulating film 5062, a film made of an organic resin is used, and polyimide, polyamide, acrylic, BCB (benzocyclobutene), or the like can be used as the organic resin. In particular, since the second interlayer insulating film 5062 has a strong meaning of flattening, acrylic having excellent flatness is preferable. In this embodiment, the acrylic film is formed with a film thickness that can sufficiently flatten the step formed by the TFT. The thickness is preferably 1 to 5 μm (more preferably 2 to 4 μm).
[0146]
The contact holes are formed by dry etching or wet etching, and contact holes reaching N-type impurity regions 5017, 5018, 5022, 5023 or P-type impurity regions 5050, 5060 are formed.
[0147]
Further, as wirings (including connection wirings and signal lines) 5065 to 5069, a laminated film having a three-layer structure in which a Ti film is formed to 100 nm, an aluminum film containing Ti is 300 nm, and a Ti film 150 nm is continuously formed by a sputtering method has a desired shape The one patterned is used. Of course, other conductive films may be used.
[0148]
Next, as shown in FIG. 9A, a third interlayer insulating film 5071 made of an organic resin is formed. As the organic resin, polyimide, polyamide, acrylic, BCB (benzocyclobutene), or the like can be used. In particular, since the third interlayer insulating film 5071 has a strong meaning of flattening, acrylic having excellent flatness is preferable. In this embodiment, the acrylic film is formed with a film thickness that can sufficiently flatten the step formed by the TFT. The thickness is preferably 1 to 5 μm (more preferably 2 to 4 μm).
[0149]
Next, a contact hole reaching the wiring 5068 is formed in the third interlayer insulating film 5071, and a pixel electrode 5073 is formed. In this embodiment, an indium tin oxide (ITO) film having a thickness of 110 nm is formed and patterned to form a pixel electrode 5073. Alternatively, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide may be used. This pixel electrode 5073 corresponds to the anode of the OLED (FIG. 9A).
[0150]
FIG. 10 is a top view of the pixel in the state of FIG. A cross-sectional view taken along broken lines AA ′, BB ′, and CC ′ in FIG. 10 corresponds to FIG.
[0151]
5080 is a switching TFT, 5081 to 5084 are driving TFTs, and 5085 is an erasing TFT.
[0152]
A wiring 5065 corresponding to the signal line Si is connected to the first impurity region 5017 of the island-shaped semiconductor film (active layer) 5003 included in the switching TFT 5080. Further, the second shape conductive layer 5024 corresponding to the gate electrode of the switching TFT 5080 is connected to the first scanning line Gaj 5090. In addition, the first impurity region 5018 of the island-shaped semiconductor film (active layer) 5003 included in the switching TFT 5080 is connected to the gate wiring 5091 through the wiring 5066.
[0153]
Part of the gate wiring 5091 includes a second shape conductive layer 5025 corresponding to the gate electrode of the driving TFT 5081, a second shape conductive layer 5026 corresponding to the gate electrode of the driving TFT 5082, and the gate electrode of the driving TFT 5083. And a second shape conductive layer corresponding to the gate electrode of the driving TFT 5082. The driving TFTs 5081 to 5084 each include an island-shaped semiconductor film 5004. A third impurity region 5050 included in the island-shaped semiconductor film 5004 is connected to a wiring 5067 corresponding to the power supply line Vi. The third impurity region 5060 included in the island-shaped semiconductor film 5004 is connected to the wiring 5068.
[0154]
The gate wiring 5091 is connected to the first impurity region 5023 of the island-shaped semiconductor film 5005 included in the erasing TFT 5085 through the wiring 5069. In addition, the first impurity region 5022 of the island-shaped semiconductor film 5005 included in the erasing TFT 5085 is connected to the power supply line 5067. A second shape conductive layer 5027 corresponding to the gate electrode of the erasing TFT 5085 is connected to the second scanning line Gej5092.
[0155]
The wiring 5068 is connected to the pixel electrode 5073.
[0156]
Next, as shown in FIG. 9B, an insulating film containing silicon (in this embodiment, a silicon oxide film) is formed to a thickness of 500 nm, and an opening is formed at a position corresponding to the pixel electrode 5073. A fourth interlayer insulating film 5074 is formed. When the opening is formed, a tapered sidewall can be easily formed by using a wet etching method. If the side wall of the opening is not sufficiently smooth, the deterioration of the organic light emitting layer due to the step becomes a significant problem.
[0157]
Next, the organic light emitting layer 5075 and the cathode (MgAg electrode) 5076 are continuously formed by using a vacuum deposition method without being released to the atmosphere. Note that the thickness of the organic light emitting layer 5075 may be 80 to 200 nm (typically 100 to 120 nm), and the thickness of the cathode 5076 may be 180 to 300 nm (typically 200 to 250 nm).
[0158]
In this step, an organic light emitting layer and a cathode are sequentially formed for a pixel corresponding to red, a pixel corresponding to green, and a pixel corresponding to blue. However, since the organic light emitting layer has poor resistance to a solution, it must be formed for each color individually without using a photolithography technique. Therefore, it is preferable to use a metal mask to hide other than the desired pixels and to selectively form the organic light emitting layer and the cathode only at necessary portions.
[0159]
That is, first, a mask that hides all pixels other than those corresponding to red is set, and an organic light emitting layer that emits red light is selectively formed using the mask. Next, a mask that hides all but the pixels corresponding to green is set, and an organic light emitting layer that emits green light is selectively formed using the mask. Next, similarly, a mask for hiding all but the pixels corresponding to blue is set, and a blue light emitting organic light emitting layer is selectively formed using the mask. Note that although all the different masks are described here, the same mask may be used. Moreover, it is preferable to process without breaking a vacuum until an organic light emitting layer is formed on all pixels.
[0160]
Here, a method of forming three types of OLEDs corresponding to RGB is used, but a method of combining a white light emitting OLED and a color filter, a blue or blue green light emitting OLED and a phosphor (fluorescent color conversion layer: CCM). ), A method of superimposing OLEDs corresponding to RGB using a transparent electrode as a cathode (counter electrode), or the like may be used.
[0161]
A known material can be used for the organic light emitting layer 5075. As the known material, it is preferable to use an organic material in consideration of the driving voltage. For example, a four-layer structure including a hole injection layer, a hole transport layer, a light emitting layer, and an electron injection layer may be used as the organic light emitting layer.
[0162]
Next, a cathode 5076 is formed. In this embodiment, an example in which an MgAg electrode is used as a cathode of an OLED is shown, but other known materials may be used.
[0163]
Next, a protective electrode 5077 is formed covering the organic light emitting layer and the cathode. The protective electrode 5077 can protect the organic light emitting layer from moisture and the like, and can improve the reliability of the OLED. As the protective electrode 5077, a conductive film containing aluminum as a main component may be used. The protective electrode 5077 may be formed by a vacuum evaporation method using a mask different from that used when the organic light emitting layer and the cathode are formed. In addition, it is preferable to continuously form the organic light emitting layer and the cathode without releasing them to the atmosphere after forming them.
[0164]
Thus, an active matrix light-emitting device having a structure as shown in FIG. 9B is completed.
[0165]
By the way, a TFT manufactured by the manufacturing method of this embodiment can be used not only for a pixel portion but also for a driver circuit, thereby exhibiting very high reliability and improving operating characteristics. In addition, it is possible to increase the crystallinity by adding a metal catalyst such as Ni in the crystallization step. Accordingly, the driving frequency of the signal line driver circuit can be 10 MHz or more.
[0166]
First, a TFT having a structure that reduces hot carrier injection so as not to reduce the operating speed as much as possible is used as an N-channel TFT of a CMOS circuit that forms a driving circuit. Note that the driving circuit here includes a shift register, a buffer, a level shifter, a latch in line sequential driving, a transmission gate in dot sequential driving, and the like.
[0167]
In this embodiment, the active layer of the N-channel TFT includes a source region, a drain region, a GOLD region, an LDD region, and a channel formation region, and the GOLD region overlaps with the gate electrode through the gate insulating film.
[0168]
In addition, since the P-channel TFT of the CMOS circuit is hardly concerned about deterioration due to hot carrier injection, it is not particularly necessary to provide an LDD region. Of course, it is also possible to provide an LDD region as in the case of the N-channel TFT and take measures against hot carriers.
[0169]
In addition, when the driving circuit uses a CMOS circuit in which a current flows bidirectionally in the channel formation region, that is, a CMOS circuit in which the roles of the source region and the drain region are switched, an N-channel TFT that forms the CMOS circuit In this case, it is preferable to form the LDD region in such a manner that the channel formation region is sandwiched between both sides of the channel formation region. An example of this is a transmission gate used for dot sequential driving. Further, in the case where a CMOS circuit that needs to keep the off-current value as low as possible is used in the driver circuit, the N-channel TFT forming the CMOS circuit has a configuration in which a part of the LDD region overlaps with the gate electrode through the gate insulating film. It is preferable to have. As such an example, there is a transmission gate used for dot sequential driving.
[0170]
Actually, when the state shown in FIG. 9B is completed, a protective film (laminate film, ultraviolet curable resin film, etc.) or a light-transmitting material having high hermeticity and low degassing so as not to be exposed to the outside air. It is preferable to package (enclose) with a sealing material. At that time, if the inside of the sealing material is made an inert atmosphere or a hygroscopic material (for example, barium oxide) is arranged inside, the reliability of the OLED is improved.
[0171]
In addition, when the airtightness is improved by processing such as packaging, a connector (flexible printed circuit: FPC) for connecting the terminal drawn from the element or circuit formed on the substrate and the external signal terminal is attached. Completed as a product.
[0172]
In this embodiment, the switching TFT and the erasing TFT have a single gate structure. However, the switching TFT and the erasing TFT may have a multi-gate structure. A TFT having a multi-gate structure can suppress off-state current as compared with a TFT having a single gate structure. For this reason, it is more preferable to use a multi-gate structure for the switching TFT as a switching element.
[0173]
Note that this embodiment can be implemented in combination with Embodiment 1 or Embodiment 2.
[0174]
Example 4
In the third embodiment, an example in which the anode is used as the pixel electrode and the cathode is used as the counter electrode has been described. In this embodiment, a configuration of a pixel in which the cathode is used as the pixel electrode and the anode is used as the counter electrode will be described. .
[0175]
FIG. 11 shows a cross-sectional view of the pixel of this embodiment. In FIG. 11, 5300 is a switching TFT, 5301 and 5302 are driving TFTs, and 5303 is an erasing TFT. In this embodiment, the structure of a pixel provided with 2 × 2 driving TFTs will be described, but only two driving TFTs are shown in FIG.
[0176]
In FIG. 11, the switching TFT 5300 and the erasing TFT 5303 are n-channel TFTs. The switching TFT 5300 and the erasing TFT 5303 may be either an n-channel TFT or a p-channel TFT.
[0177]
In FIG. 11, driving TFTs 5301 and 5302 are n-channel TFTs. In this embodiment, the cathode of the OLED is used as the pixel electrode, the anode is used as the counter electrode, and it is desirable that all the driving TFTs are n-channel TFTs.
[0178]
5310 corresponds to an OLED. The OLED 5310 includes a pixel electrode 5311 that is a cathode, an organic light emitting layer 5312, and a counter electrode 5313 that is an anode.
[0179]
In this embodiment, an aluminum alloy film (aluminum film containing 1 wt% titanium) having a thickness of 300 nm was used as the pixel electrode 5311.
[0180]
Although not shown, the organic light emitting layer 5312 has a light emitting layer near the cathode and a hole injection layer near the anode. This is only an example, and the configuration of the organic light emitting layer of this embodiment is not limited to this. Various examples of the combination of the organic light emitting layers have already been reported, and any of the configurations may be used.
[0181]
For the counter electrode 5313, an anode made of a transparent conductive film is formed to a thickness of 120 nm.
In this embodiment, a transparent conductive film in which 10 to 20 wt% zinc oxide is added to indium oxide is used. The film forming method is preferably formed by vapor deposition at room temperature so that the organic light emitting layer 5312 is not deteriorated.
[0182]
After the counter electrode 5313 is formed, a second passivation film 5314 made of a silicon nitride oxide film is formed to a thickness of 300 nm by a plasma CVD method. At this time, it is necessary to pay attention to the film formation temperature. Remote plasma CVD may be used to lower the film formation temperature.
[0183]
In the light emitting device of this embodiment, light emitted from the OLED 5310 is transmitted to the counter electrode 5313 side without passing through the pixel electrode 5311. Therefore, light is not blocked by the TFT formed on the substrate. Therefore, it is possible to increase the luminance of the OLED panel without increasing the current flowing through the OLED as compared with the case where the anode is used for the pixel electrode and the cathode is used for the counter electrode. Further, the light emission luminance of the OLED panel is not affected by the arrangement and number of TFTs in each pixel.
[0184]
In this embodiment, the switching TFT and the erasing TFT have a single gate structure. However, the switching TFT and the erasing TFT may have a multi-gate structure. A TFT having a multi-gate structure can suppress off-state current as compared with a TFT having a single gate structure. For this reason, it is more preferable to use a multi-gate structure for the switching TFT as a switching element.
[0185]
This embodiment can be implemented in combination with Embodiment 1 or Embodiment 2.
[0186]
(Example 5)
In this embodiment, a structure of a pixel of a light emitting device of the present invention using a bottom gate type TFT will be described. However, in order to simplify the description, the drive TFT group will be described by showing only two of the 2 × 2 drive TFTs. In this embodiment, only a method for manufacturing a TFT in a pixel portion will be described. However, driving circuits (a signal line driving circuit, a first scanning line driving circuit, and a second scanning line driving circuit) provided in the pixel portion and the periphery thereof are used. It is also possible to manufacture TFTs at the same time.
[0187]
FIG. 12 is a cross-sectional view of a pixel of the light emitting device of this example.
[0188]
Reference numeral 5400 denotes a switching TFT, 5401 and 5402 denote driving TFTs, and 5403 denotes an erasing TFT.
[0189]
The switching TFT 5400 includes a gate electrode 5410, a gate insulating film 5411 in contact with the gate electrode 5410, and an island-shaped semiconductor film 5412 in contact with the gate insulating film 5411. The semiconductor film 5412 includes a channel formation region 5413, second impurity regions 5414 and 5415 corresponding to the LDD region, which are in contact with the channel formation region 5413, and first impurity regions 5416 and 5417 which are in contact with the LDD regions 5414 and 5415. And have.
[0190]
The driving TFTs 5401 and 5402 include gate electrodes 5420 and 5421, a gate insulating film 5411 in contact with the gate electrodes 5420 and 5421, and an island-shaped semiconductor film 5422 in contact with the gate insulating film 5411. The semiconductor film 5422 includes channel formation regions 5423 and 5424 and impurity regions 5425 to 5427 in contact with the channel formation regions 5423 and 5424.
[0191]
The erasing TFT 5403 includes a gate electrode 5430, a gate insulating film 5411 in contact with the gate electrode 5430, and an island-shaped semiconductor film 5432 in contact with the gate insulating film 5411. The semiconductor film 5432 includes a channel formation region 5433, second impurity regions 5434 and 5435 corresponding to the LDD region, which are in contact with the channel formation region 5433, and first impurity regions 5436 and 5437 which are in contact with the LDD regions 5434 and 5435. And have.
[0192]
An impurity region 5427 included in the driving TFT 5402 is connected to a pixel electrode 5451 included in the OLED 5450 through a wiring 5452.
[0193]
In this embodiment, the switching TFT and the erasing TFT have a single gate structure. However, the switching TFT and the erasing TFT may have a multi-gate structure. A TFT having a multi-gate structure can suppress off-state current as compared with a TFT having a single gate structure. For this reason, it is more preferable to use a multi-gate structure for the switching TFT as a switching element.
[0194]
In this embodiment, the case where the anode is used as the pixel electrode has been described. However, the cathode may be used as the pixel electrode. In this case, the driving TFTs 5401 and 5402 are preferably n-channel TFTs.
[0195]
Note that this embodiment can be implemented in combination with Embodiment 1 or Embodiment 2.
[0196]
(Example 6)
In this example, the configuration of the driving circuit (signal line driving circuit, first and second scanning line driving circuits) of the light-emitting device corresponding to the driving method described in Embodiment Mode 1 is described.
I will explain.
[0197]
FIG. 14 is a block diagram of a driving circuit of the self-light emitting device of this embodiment. FIG. 14A illustrates a signal line driver circuit 601 which includes a shift register 602, a latch (A) 603, and a latch (B) 604.
[0198]
In the signal line driver circuit 601, the clock signal (CLK) and the start pulse (SP) are input to the shift register 602. The shift register 602 sequentially generates timing signals based on the clock signal (CLK) and the start pulse (SP), and sequentially inputs the timing signals to subsequent circuits through a buffer or the like (not shown).
[0199]
The timing signal from the shift register 602 is buffered and amplified by a buffer or the like. A wiring to which a timing signal is input has a large load capacitance (parasitic capacitance) because many circuits or elements are connected thereto. This buffer is provided in order to prevent “blunting” of the rising edge or falling edge of the timing signal caused by the large load capacity. Note that the buffer is not necessarily provided.
[0200]
The timing signal buffered and amplified by the buffer is input to the latch (A) 603. The latch (A) 603 includes a plurality of stages of latches for processing an n-bit digital video signal. When the timing signal is input, the latch (A) 603 sequentially captures and holds n-bit digital video signals input from the outside of the signal line driver circuit 601.
[0201]
Note that when a digital video signal is taken into the latch (A) 603, the digital video signal may be sequentially input to latches of a plurality of stages included in the latch (A) 603. However, the present invention is not limited to this configuration. A plurality of stages of latches included in the latch (A) 603 may be divided into several groups, and so-called division driving may be performed in which digital video signals are input simultaneously in parallel for each group. Note that the number of groups at this time is called the number of divisions. For example, when the latches are divided into groups for every four stages, it is said that the driving is divided into four.
[0202]
The time until the writing of the digital video signal to all the latches of the latch (A) 603 is completed is called a line period. Actually, the line period may include a period in which a horizontal blanking period is added to the line period.
[0203]
When one line period ends, a latch signal (Latch Signal) is input to the latch (B) 604. At this moment, the digital video signals written and held in the latch (A) 603 are sent all at once to the latch (B) 604, and are written and held in the latches of all stages of the latch (B) 604.
[0204]
The digital video signal is sequentially written into the latch (A) 603 that has finished sending the digital video signal to the latch (B) 604 based on the timing signal from the shift register 602.
[0205]
During the second line of one line, the digital video signal written and held in the latch (B) 603 is input to the signal line.
[0206]
Note that another circuit such as a decoder circuit may be used instead of the shift register, and the digital video signal may be sequentially written into the latch circuit.
[0207]
FIG. 14B is a block diagram illustrating a configuration of the first scan line driver circuit.
[0208]
The first scan line driver circuit 605 includes a shift register 606 and a buffer 607, respectively. In some cases, it may have a level shift.
[0209]
In the first scan line driver circuit 605, the timing signal from the shift register 606 is input to the buffer 607 and input to the corresponding first scan line. A gate electrode of a switching TFT of a pixel for one line is connected to the first scanning line. Since the switching TFTs for the pixels for one line must be turned on all at once, a buffer that can flow a large current is used.
[0210]
Note that since the second scan line driver circuit has the same structure as the first scan line driver circuit, FIG. 14B is referred to. However, in the case of the second scanning line driving circuit, the output from the buffer is input to the second scanning line. Further, the gate electrode of the erasing TFT of the pixel for one line is connected to the second scanning line. Since the erasing TFTs for the pixels for one line must be turned on all at once, a buffer capable of flowing a large current is used.
[0211]
Note that another circuit such as a decoder circuit may be used instead of the shift register to select the gate signal and supply the timing signal.
[0212]
The drive circuit used in the present invention is not limited to the configuration shown in this embodiment. This embodiment can be implemented by freely combining with Embodiments 1 to 5.
[0213]
(Example 7)
In this example, a detailed structure of the signal line driver circuit 601 shown in FIG. 13 corresponding to the driving method shown in Embodiment Mode 1 is described.
[0214]
FIG. 14 shows a circuit diagram of the signal line driver circuit of this embodiment. The shift register 801, latches (A) (802), and latches (B) (803) are arranged as shown in FIG. In this embodiment, one set of latches (A) (802) and one set of latches (B) (803) correspond to four signal lines St to S (t + 3). In this embodiment, the level shift for changing the amplitude range of the voltage of the signal is not provided. However, the designer may appropriately provide it.
[0215]
The clock signal CLKB, the clock signal CLKB in which the polarity of the CLK is inverted, the start pulse signal SP, and the drive direction switching signal SL / R are input to the shift register 801 from the wirings shown in the drawing, respectively. The digital video signal VD input from the outside is input to the latch (A) (802) from the wiring shown in the drawing. The signals S_LATb in which the polarities of the latch signals S_LAT and S_LAT are inverted are respectively input to the latches (B) (803) from the wirings shown in the drawing.
[0216]
A detailed configuration of the latches (A) and (802) will be described by taking a part 804 of the latches (A) and (802) corresponding to the signal line St as an example. A portion 804 of the latch (A) (802) has two clocked inverters and two inverters.
[0217]
A top view of a portion 804 of the latch (A) (802) is shown in FIG. Reference numerals 831a and 831b are active layers of TFTs forming one of the inverters included in a part 804 of the latch (A) (802), and 836 is a common gate electrode of the TFTs forming one of the inverters. is there. 832a and 832b are active layers of TFTs that form another inverter included in a part 804 of the latch (A) (802), and 837a and 837b are gates provided on the active layers 832a and 832b, respectively. Electrode. Note that the gate electrodes 837a and 837b are electrically connected.
[0218]
Reference numerals 833a and 833b denote active layers of TFTs that form one of the clocked inverters included in the part 804 of the latch (A) (802). Gate electrodes 838a and 838b are provided on the active layer 833a to form a double gate structure. Gate electrodes 838b and 839 are provided on the active layer 833b to form a double gate structure.
[0219]
Reference numerals 834a and 834b denote active layers of TFTs that form another clocked inverter included in a part 804 of the latch (A) (802). Gate electrodes 839 and 840 are provided on the active layer 834a to form a double gate structure. Further, gate electrodes 840 and 841 are provided on the active layer 834b to form a double gate structure.
[0220]
This embodiment can be implemented in combination with the first to sixth embodiments.
[0221]
(Example 8)
In this example, a process of manufacturing a light-emitting device of the present invention by sealing a substrate on which an OLED is formed so that the OLED is not exposed to the air will be described. 16A is a top view of the light-emitting device of the present invention, and FIG. 16B is a cross-sectional view taken along line AA ′ in FIG. 16A. FIG. 16C is a cross-sectional view taken along the line BB ′ of FIG.
[0222]
A sealant 4009 is provided so as to surround the pixel portion 4002 provided over the substrate 4001, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004b. In addition, a sealing material 4008 is provided over the pixel portion 4002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004b. Therefore, the pixel portion 4002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004 a and 400 b are sealed with the filler 4210 by the substrate 4001, the sealant 4009, and the sealant 4008. .
[0223]
The pixel portion 4002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004b provided over the substrate 4001 include a plurality of TFTs. In FIG. 16B, typically, a driver circuit TFT included in the signal line driver circuit 4003 formed over the base film 4010 (here, an n-channel TFT and a p-channel TFT are illustrated) 4201. One driving TFT 4202 included in the pixel portion 4002 is illustrated.
[0224]
In this embodiment, a p-channel TFT or an n-channel TFT manufactured by a known method is used for the driving circuit TFT 4201, and a p-channel TFT manufactured by a known method is used for the driving TFT 4202. . Further, the pixel portion 4002 is provided with a storage capacitor (not shown) connected to the gate of the driving TFT 4202.
[0225]
An interlayer insulating film (planarization film) 4301 is formed over the driver circuit TFT 4201 and the driver TFT 4202, and a pixel electrode (anode) 4203 electrically connected to the drain of the driver TFT 4202 is formed thereon. As the pixel electrode 4203, a transparent conductive film having a large work function is used. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide, or indium oxide can be used. Moreover, you may use what added the gallium to the said transparent conductive film.
[0226]
An insulating film 4302 is formed over the pixel electrode 4203, and an opening is formed over the pixel electrode 4203 in the insulating film 4302. In this opening, an organic light emitting layer 4204 is formed on the pixel electrode 4203. A known organic light emitting material or inorganic light emitting material can be used for the organic light emitting layer 4204. The organic light emitting material includes a low molecular (monomer) material and a high molecular (polymer) material, either of which may be used.
[0227]
As a method for forming the organic light emitting layer 4204, a known vapor deposition technique or coating technique may be used. The structure of the organic light emitting layer may be a laminated structure or a single layer structure by freely combining a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or an electron injection layer.
[0228]
On the organic light emitting layer 4204, a cathode 4205 made of a light-shielding conductive film (typically a conductive film containing aluminum, copper or silver as a main component or a laminated film of these with another conductive film) is formed. The In addition, it is desirable to remove moisture and oxygen present at the interface between the cathode 4205 and the organic light emitting layer 4204 as much as possible. Therefore, it is necessary to devise a method in which the organic light emitting layer 4204 is formed in a nitrogen or rare gas atmosphere and the cathode 4205 is formed without being exposed to oxygen or moisture. In this embodiment, the above-described film formation is possible by using a multi-chamber type (cluster tool type) film formation apparatus. The cathode 4205 is given a predetermined voltage.
[0229]
As described above, the OLED 4303 including the pixel electrode (anode) 4203, the organic light emitting layer 4204, and the cathode 4205 is formed. A protective film 4303 is formed on the insulating film 4302 so as to cover the OLED 4303. The protective film 4303 is effective in preventing oxygen, moisture, and the like from entering the OLED 4303.
[0230]
Reference numeral 4005 a denotes a lead wiring connected to the power supply line, and is electrically connected to the source region of the driving TFT 4202. The lead wiring 4005 a passes between the sealant 4009 and the substrate 4001 and is electrically connected to the FPC wiring 4301 included in the FPC 4006 through the anisotropic conductive film 4300.
[0231]
As the sealing material 4008, a glass material, a metal material (typically a stainless steel material), a ceramic material, or a plastic material (including a plastic film) can be used. As the plastic material, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film, or an acrylic resin film can be used. A sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can also be used.
[0232]
However, when the emission direction of light from the OLED is directed toward the cover material, the cover material must be transparent. In that case, a transparent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.
[0233]
Further, as the filler 4103, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used. PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (Polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. In this example, nitrogen was used as the filler.
[0234]
Further, in order to expose the filler 4103 to a hygroscopic substance (preferably barium oxide) or a substance capable of adsorbing oxygen, a recess 4007 is provided on the surface of the sealing material 4008 on the substrate 4001 side to adsorb the hygroscopic substance or oxygen. A possible substance 4207 is placed. In order to prevent the hygroscopic substance or the substance 4207 capable of adsorbing oxygen from scattering, the concave part cover material 4208 holds the hygroscopic substance or the substance 4207 capable of adsorbing oxygen in the concave part 4007. Note that the concave cover material 4208 has a fine mesh shape, and is configured to allow air and moisture to pass therethrough but not a hygroscopic substance or a substance 4207 capable of adsorbing oxygen. By providing the hygroscopic substance or the substance 4207 capable of adsorbing oxygen, deterioration of the OLED 4303 can be suppressed.
[0235]
As shown in FIG. 16C, the conductive film 4203a is formed so as to be in contact with the lead wiring 4005a at the same time as the pixel electrode 4203 is formed.
[0236]
The anisotropic conductive film 4300 has a conductive filler 4300a. By thermally pressing the substrate 4001 and the FPC 4006, the conductive film 4203a on the substrate 4001 and the FPC wiring 4301 on the FPC 4006 are electrically connected by the conductive filler 4300a.
[0237]
In addition, a present Example can be implemented in combination with Examples 1-7.
[0238]
Example 9
In the light-emitting device of the present invention, the material used for the organic light-emitting layer of the OLED is not limited to the organic light-emitting material, and can also be implemented using an inorganic light-emitting material. However, since current inorganic light-emitting materials have a very high driving voltage, a TFT having a withstand voltage characteristic that can withstand such a driving voltage must be used.
[0239]
Alternatively, if an inorganic light-emitting material with a lower driving voltage is developed in the future, it can be applied to the present invention.
[0240]
Moreover, the structure of a present Example can be implemented in combination with Examples 1-8.
[0241]
(Example 10)
In the present invention, by using an organic light emitting material that can utilize phosphorescence from triplet excitons for light emission, the external light emission quantum efficiency can be dramatically improved. Thereby, low power consumption, long life, and light weight of the OLED can be achieved.
[0242]
Here, a report of using triplet excitons to improve the external emission quantum efficiency is shown.
(T. Tsutsui, C. Adachi, S. Saito, Photochemical Processes in Organized Molecular Systems, ed. K. Honda, (Elsevier Sci. Pub., Tokyo, 1991) p.437.)
[0243]
The molecular formula of the organic light-emitting material (coumarin dye) reported by the above paper is shown below.
[0244]
[Chemical 1]

[0245]
(MABaldo, DFO'Brien, Y.You, A.Shoustikov, S.Sibley, METhompson, SRForrest, Nature 395 (1998) p.151.)
[0246]
The molecular formula of the organic light-emitting material (Pt complex) reported by the above paper is shown below.
[0247]
[Chemical formula 2]

[0248]
(MABaldo, S. Lamansky, PEBurrrows, METhompson, SRForrest, Appl.Phys.Lett., 75 (1999) p.4.) (T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamura, T Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Mayaguchi, Jpn.Appl.Phys., 38 (12B) (1999) L1502.)
[0249]
The molecular formula of the organic light-emitting material (Ir complex) reported by the above paper is shown below.
[0250]
[Chemical 3]

[0251]
As described above, if phosphorescence emission from triplet excitons can be used, in principle, it is possible to realize an external emission quantum efficiency that is 3 to 4 times higher than that in the case of using fluorescence emission from singlet excitons.
[0252]
In addition, a present Example can be implemented in combination with Examples 1-9.
[0253]
(Example 11)
Organic light-emitting materials used for OLEDs are roughly classified into low molecular weight systems and high molecular weight systems. The light emitting device of the present invention can be used with either a low molecular weight organic light emitting material or a high molecular weight organic light emitting material.
[0254]
The low molecular weight organic light emitting material is formed by a vapor deposition method. Therefore, it is easy to take a laminated structure, and it is easy to increase the efficiency by laminating films having different functions such as a hole transport layer and an electron transport layer.
[0255]
Low molecular weight organic light-emitting materials include aluminum complex Alq with quinolinol as a ligand. _Three , Triphenylamine derivatives (TPD) and the like.
[0256]
On the other hand, a high molecular organic light emitting material has higher physical strength and higher device durability than a low molecular material. In addition, since the film can be formed by coating, the device can be manufactured relatively easily.
[0257]
The structure of a light emitting element using a high molecular weight organic light emitting material is basically the same as that when a low molecular weight organic light emitting material is used, and is a cathode / organic light emitting layer / anode. However, when forming an organic light emitting layer using a high molecular weight organic light emitting material, it is difficult to form a laminated structure as in the case of using a low molecular weight organic light emitting material. The two-layer structure is famous. Specifically, the structure is cathode / light-emitting layer / hole transport layer / anode. In the case of a light emitting element using a polymer organic light emitting material, Ca can also be used as a cathode material.
[0258]
Note that since the color of light emitted from the element is determined by the material for forming the light-emitting layer, a light-emitting element exhibiting desired light emission can be formed by selecting them. Examples of the polymer organic light emitting material that can be used for forming the light emitting layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.
[0259]
The polyparaphenylene vinylene system includes derivatives of poly (paraphenylene vinylene) [PPV], poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2′- Ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like.
[0260]
The polyparaphenylene series includes derivatives of polyparaphenylene [PPP], poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-dihexoxy-1,4-phenylene). ) And the like.
[0261]
The polythiophene series includes polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3-cyclohexyl). -4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [3- (4-octylphenyl) -2,2 bithiophene] [PTOPT] and the like.
[0262]
Examples of the polyfluorene series include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.
[0263]
Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting organic light-emitting material.
[0264]
Examples of the hole-transporting polymer organic light emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. It is done.
[0265]
In addition, the structure of a present Example can be implemented in combination with any structure of Example 1- Example 10 freely.
[0266]
(Example 12)
Since the light-emitting device is a self-luminous type, it has excellent visibility in a bright place and a wide viewing angle compared to a liquid crystal display. Therefore, it can be used for display portions of various electronic devices.
[0267]
As an electronic device using the light emitting device of the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook type personal computer, a game device, Play back a recording medium such as a portable information terminal (mobile computer, mobile phone, portable game machine or electronic book), an image playback device (specifically a DVD (digital versatile disc)) equipped with a recording medium, A device having a display capable of displaying). In particular, it is desirable to use a light-emitting device for a portable information terminal that often has an opportunity to see a screen from an oblique direction because the wide viewing angle is important. Specific examples of these electronic devices are shown in FIGS.
[0268]
FIG. 17A illustrates a display device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The light emitting device of the present invention can be used for the display portion 2003. Since the light-emitting device is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display can be obtained. The display devices include all information display devices for personal computers, for receiving TV broadcasts, for displaying advertisements, and the like.
[0269]
FIG. 17B illustrates a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. The light emitting device of the present invention can be used for the display portion 2102.
[0270]
FIG. 17C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The light-emitting device of the present invention can be used for the display portion 2203.
[0271]
FIG. 17D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. The light emitting device of the present invention can be used for the display portion 2302.
[0272]
FIG. 17E illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. Although the display portion A 2403 mainly displays image information and the display portion B 2404 mainly displays character information, the light-emitting device of the present invention can be used for the display portions A, B 2403, and 2404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.
[0273]
FIG. 17F illustrates a goggle type display (head mounted display), which includes a main body 2501, a display portion 2502, and an arm portion 2503. The light emitting device of the present invention can be used for the display portion 2502.
[0274]
FIG. 17G illustrates a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and the like. . The light-emitting device of the present invention can be used for the display portion 2602.
[0275]
Here, FIG. 17H shows a cellular phone, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. The light emitting device of the present invention can be used for the display portion 2703. Note that the display portion 2703 can reduce power consumption of the mobile phone by displaying white characters on a black background.
[0276]
If the light emission luminance of the organic light emitting material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used in a front type or rear type projector.
[0277]
In addition, the electronic devices often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the organic light emitting material has a very high response speed, the light emitting device is preferable for displaying moving images.
[0278]
In addition, since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background. It is desirable to do.
[0279]
As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. In addition, the electronic device of this embodiment may use the light emitting device having any structure shown in Embodiments 1 to 11.
[0280]
【Effect of the invention】
According to the above configuration, the present invention uses a TFT to provide I _DS -V _GS Even if there is some variation in characteristics, variation in the amount of current output when equal gate voltage is applied can be suppressed. So I _DS -V _GS Due to the variation in characteristics, it is possible to suppress the phenomenon that the light emission amount of the OLED greatly differs between adjacent pixels even when the same voltage signal is input.
[0281]
In the present invention, a non-display period in which no display is performed can be provided. In the case of the hold type analog driving method in which the conventional duty ratio (the ratio of the period in which the pixel emits light and performs gradation display in one frame period) is 100%, the moving image is blurred, and the moving image is displayed with high-speed response. I couldn't make full use of the characteristics of OLED. However, in the light-emitting device of the present invention, the non-display period can be provided and the impulse-type driving can be performed, so that it is possible to avoid blurring of moving images.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a circuit configuration of a light-emitting device of the present invention.
FIG. 2 is a circuit diagram of a pixel of a light emitting device of the present invention.
FIG. 3 is a diagram showing electrical connection of pixels in each period.
4A and 4B illustrate a driving method of a light-emitting device of the present invention.
FIG. 5 is a diagram showing a driving method of a light emitting device of the present invention.
6A and 6B illustrate a driving method of a light-emitting device of the present invention.
7 is a diagram showing a manufacturing process of a light-emitting device of the present invention. FIG.
FIG. 8 is a diagram showing a manufacturing process of a light-emitting device of the present invention.
9 is a diagram showing a manufacturing process of a light-emitting device of the present invention. FIG.
FIG. 10 is a top view of a pixel of a light-emitting device according to the present invention.
FIG. 11 is a cross-sectional view of a light-emitting device of the present invention.
FIG. 12 is a cross-sectional view of a light-emitting device of the present invention.
FIG. 13 is a block diagram illustrating a configuration of a driving circuit of a light emitting device according to the present invention.
FIG. 14 is a circuit diagram of a signal line driver circuit of a light emitting device of the present invention.
FIG. 15 is a top view of a latch of a signal line driver circuit of a light-emitting device according to the present invention.
16A and 16B are an external view and a cross-sectional view of a light-emitting device of the present invention.
FIG. 17 shows an electronic device using the light-emitting device of the present invention.
FIG. 18 is a circuit diagram of a pixel portion of a conventional light emitting device.
FIG. 19 TFT I _DS -V _GS The figure which shows a characteristic.
FIG. 20 is a circuit diagram of a pixel described in Japanese Patent Application No. 2000-359032.

Claims (8)

A light emitting device having a plurality of pixels,
The pixel includes a first TFT, a second TFT, a plurality of third TFTs, an organic light emitting element having a pixel electrode, a signal line, and a power line.
One of the source and drain of the first TFT is connected to the signal line, and the other is connected to the gates of all the plurality of third TFTs.
One of the source or drain of the second TFT is connected to the power supply line, and the other is connected to the gates of all the plurality of third TFTs.
Between the pixel electrode and the power supply line, there is a path in which at least two third TFTs are connected in series, and at least two paths are provided in parallel.
The plurality of third TFTs overlap with the power supply line ,
A light-emitting device using the power supply line as a connection wiring of the plurality of third TFTs . A light emitting device having a plurality of pixels,
The pixel includes a first TFT, a second TFT, a plurality of third TFTs, an organic light emitting element having a pixel electrode, a signal line, a power supply line, a first scanning line, and a second scanning line. A scanning line, and
A gate of the first TFT is connected to the first scanning line;
A gate of the second TFT is connected to the second scanning line;
One of the source and the drain of the first TFT is connected to the signal line, and the other is connected to the gates of all the plurality of third TFTs.
One of the source and drain of the second TFT is connected to the power supply line, and the other is connected to the gates of all the plurality of third TFTs.
Between the pixel electrode and the power supply line, there is a path in which at least two third TFTs are connected in series, and at least two paths are provided in parallel.
The plurality of third TFTs overlap with the power supply line ,
A light-emitting device using the power supply line as a connection wiring of the plurality of third TFTs .   3. The light emitting device according to claim 1, wherein the plurality of third TFTs have the same polarity. In any one of claims 1 to 3, wherein the source or drain the other of the first source or drain while said second TFT of the TFT includes a gate electrode common to the plurality of third TFT A light-emitting device, which is electrically connected via A light emitting device having a plurality of pixels,
The pixel includes a first TFT, a second TFT, a plurality of third TFTs, an organic light emitting element having a pixel electrode, a signal line, and a power line.
One of the source and drain of the first TFT is connected to the signal line, and the other is connected to the gates of all the plurality of third TFTs.
One of the source or drain of the second TFT is connected to the power supply line, and the other is connected to the gates of all the plurality of third TFTs.
Between the pixel electrode and the power supply line, there is a path in which at least two third TFTs are connected in series, and at least two paths are provided in parallel.
The plurality of third TFTs overlap with the power supply line,
The other of the source and drain of the first TFT and the other of the source and drain of the second TFT are electrically connected through a gate electrode common to the plurality of third TFTs. A light emitting device. A light emitting device having a plurality of pixels,
The pixel includes a first TFT, a second TFT, a plurality of third TFTs, an organic light emitting element having a pixel electrode, a signal line, a power supply line, a first scanning line, and a second scanning line. A scanning line, and
A gate of the first TFT is connected to the first scanning line;
A gate of the second TFT is connected to the second scanning line;
One of the source and the drain of the first TFT is connected to the signal line, and the other is connected to the gates of all the plurality of third TFTs.
One of the source and drain of the second TFT is connected to the power supply line, and the other is connected to the gates of all the plurality of third TFTs.
Between the pixel electrode and the power supply line, there is a path in which at least two third TFTs are connected in series, and at least two paths are provided in parallel.
The plurality of third TFTs overlap with the power supply line,
The other of the source and drain of the first TFT and the other of the source and drain of the second TFT are electrically connected through a gate electrode common to the plurality of third TFTs. A light emitting device. 7. The light-emitting device according to claim 5, wherein the plurality of third TFTs all have the same polarity. In any one of claims 5 to 7, as a connecting wire of said plurality of third TFT, a light-emitting device characterized in that it uses the power line.

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