JP2004265970A - Wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board in which the effect of a parasitic capacitance between an electrode pad and a face conductor can be reduced effectively and thereby entire impedance matching can be realized easily. <P>SOLUTION: On the second major surface MP2 side of a flat core 2, two or more conductor layers M11 and M12 and dielectric layers V11 and V12 having inner layer surface conductors 15 and 17 functioning as a power supply layer and a ground layer, respectively, are formed alternately between a second path end pad 20 and the second major surface MP2 of the flat core 2 such that the dielectric layer V12 is arranged directly under the second path end pad 20. A signal transmission path has a core side pad 18 on the second major surface MP2 of the flat core 2, connection conductor through openings 15a and 17a being connected at corresponding positions of the core side pad 18 are formed on two or more inner layer surface conductors 15 and 17, and conductors 34c and 34d for connecting the core side pad 18 and the second path end pad 20 are arranged on the inside of the connection conductor through openings 15a and 17a. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring board.
[0002]
[Prior art]
[Patent Document 1]
JP-A-2001-160598
As a wiring board on which semiconductor parts such as LSIs and ICs are mounted or various thick-film printing elements are built inside the board, a resin dielectric layer is formed on both sides of a plate-shaped core made of glass reinforced resin or the like. A multi-layer wiring board is used in which a metal conductor layer and a metal conductor layer are alternately laminated. The metal conductor layer includes a wiring portion for signal transmission. In recent years, on a board used for a computer device or an optical communication device having a high clock frequency, the signal frequency handled is also a high-frequency band exceeding 1 GHz, and the wiring portion is also a strip line. Shielded lines for high frequencies, such as microstrip lines and microstrip lines, are employed.
[0004]
In the multilayer wiring board as described above, the characteristic impedance is matched to a specified value (50Ω) as a conventional means for increasing the signal transmission efficiency of the wiring portion. A strip line or microstrip line is a transmission line structure having a specified characteristic impedance, using parameters such as the distance between a surface conductor (ground layer or power supply layer) and a line facing each other, the line width, and the dielectric constant of a dielectric material sandwiched therebetween. Can be designed based on distributed constant circuit theory.
[0005]
In the multilayer wiring board, the signal transmission path is formed on a second main surface side from a pad (for example, a solder land for flip chip connection with a semiconductor component) formed on the first main surface side of the plate-shaped core. Pads (for example, BGA or PGA pads for connection to a motherboard) are formed. In this case, as described above, a desired characteristic impedance of the conductor line portion routed in the conductor layer can be relatively easily realized by a well-known theoretical design method for each form of the high-frequency shield line. However, when the board is incorporated into an actual product, it is necessary that the characteristic impedance of the signal transmission path as a whole of the multilayer wiring board, that is, the entire area between the pads matches the specified value. .
[0006]
On the signal transmission path, besides the line portion whose characteristic impedance is theoretically defined (hereinafter referred to as the standard impedance portion) such as a stripline or microstripline, a via conductor or a through-hole conductor that penetrates the plate-shaped core There are at least some parts that do not have a specified value of characteristic impedance (hereinafter, also referred to as non-standard impedance parts), such as parts and pads themselves arranged on the substrate surface. Each of these causes impedance mismatch. In this case, it is conceivable to achieve impedance matching by changing the line width or the thickness of the dielectric layer of the strip line or the micro strip line forming the standard impedance portion. This is a method of pressing against the impedance portion, and it is highly likely that the change will affect the design change of the entire substrate.
[0007]
In the non-standard impedance portion, for example, vias and through-hole conductors do not have a plane conductor (ground or power supply) that would otherwise accompany the standard impedance portion, so that the capacitance becomes smaller and the reactance becomes larger than the standard impedance portion. There is a tendency. On the other hand, since the conductor pad forms a large parasitic capacitance between the conductor and the surface conductor which is arranged so as to surround the periphery thereof or is opposed to the dielectric pad with the dielectric layer interposed therebetween, the reactance is conversely reduced. There is a tendency. Then, when a coupling is formed between the capacitance and the inductance, a frequency characteristic of the impedance becomes zero or a pole is generated, which has a considerable influence on impedance matching in a desired frequency band.
[0008]
For example, in a substrate including an electrode pad, Patent Literature 1 proposes a method for achieving impedance matching by the following method. That is, when the diameter of the electrode pad is w, the distance in the plane between the inner edge of the via opening formed immediately below the electrode pad and the outer edge of the electrode pad in the surface conductor layer opposed to the dielectric layer is d, and 0 <D ≦ w. Thereby, the parasitic capacitance formed between the electrode pad and the surface conductor layer is greatly reduced, and the impedance mismatch due to the formation of the electrode pad is eliminated.
[0009]
[Problems to be solved by the invention]
In Patent Document 1, only one surface conductor layer is provided immediately below the electrode pad, and the thickness of the dielectric layer (insulator layer) between the pad and the surface conductor is relatively large. However, in recent years, with the increase in the number of terminals of electronic components such as integrated circuits mounted on the wiring board, in order to secure a sufficient number of ground terminals or power supply terminals, the main surface of the substrate on the electrode pad formation side has 2. Description of the Related Art A wiring board in which a plurality of surface conductors such as a power supply layer and a ground layer are stacked via a dielectric layer has been increasingly used. For example, in an organic substrate in which a dielectric layer is formed of a resin dielectric sheet, the thickness of the resin dielectric sheet separating the surface conductors tends to decrease year by year in order to make the substrate thinner and lighter. As a result, even when an opening for reducing the parasitic capacitance is provided in the surface conductor layer immediately below the electrode pad, a set of the lower surface conductor and the resin dielectric sheet (dielectric layer) is formed in combination with the electrode pad. Since the influence of the parasitic capacitance is large, there is a problem that the impedance matching of the entire signal transmission path cannot be realized as desired.
[0010]
It is an object of the present invention to effectively reduce the influence of parasitic capacitance between an electrode pad and a plane conductor even when a plurality of layers of a plane conductor are arranged on a main surface of a wiring board on which an electrode pad is arranged, and furthermore, a signal An object of the present invention is to provide a wiring board that can easily realize impedance matching of the entire transmission path.
[0011]
[Means for Solving the Problems and Functions / Effects]
In order to solve the above problems, the wiring board of the present invention is:
A signal transmission path is formed from the first path end pad provided on the first main surface side of the plate core to the second path end pad provided on the second main surface side of the plate core, ,
Two or more layers of conductors each having an inner surface conductor functioning as a power layer or a ground layer between the second path end pad and the second main surface of the plate core on the second main surface side of the plate core Layers and a dielectric layer are alternately formed by laminating a dielectric layer immediately below the second path end pad, and a signal transmission path is provided on the second main surface of the plate-shaped core by a core-side pad. In each of the inner layer conductors included in the two or more conductor layers, a connection conductor through opening is formed at a position corresponding to the core side pad, and inside the connection conductor through openings, A connection conductor for connecting the core side pad and the second path end pad is arranged,
Further, the inner peripheral edge of each connection conductor penetrating opening of the two or more inner layer surface conductors is located at the same position or the outer peripheral edge of the second path end pad.
[0012]
According to the above configuration, in the substrate structure in which two or more inner layer surface conductors are arranged on the second main surface side of the plate-shaped core and under the second path end pad together with the second path end pad, In the layer surface conductor, a connection conductor penetrating opening for penetrating a connection conductor electrically connected to the second path end pad is formed, and all the inner peripheral edges of the connection conductor penetrating openings are formed in the second path end. It was located at the same position as the outer peripheral edge of the pad or on the outer side. In other words, all the inner layer surface conductors on the side where the second path end pads are arranged are prevented from overlapping in the in-plane direction with the second path end pads. As a result, even when the dielectric layer separating the inner layer surface conductor and the second path end pad is thin, it is possible to sufficiently reduce the parasitic capacitance formed between the second path end pad and each inner layer surface conductor. Therefore, impedance matching of the entire signal transmission path can be easily realized.
[0013]
In the present invention, the relative thickness of the dielectric layer is ε, and the total thickness of the dielectric layer between the second path end pad and the second main surface of the plate core in the thickness direction of the plate core is , 33 □ μm or less, and when applied to a wiring board in which two or more inner layer surface conductors are arranged within the distance, the above effect is remarkable. Conventionally, in a high-frequency wiring board, an inner layer conductor facing the second path end pad with two layers of dielectric material interposed therebetween (that is, an inner layer conductor adjacent to the second path end pad next to the nearest inner layer surface conductor). The effect of the inner layer conductor (hereinafter referred to as the second adjacent inner layer conductor) is considered to be much smaller than that of the nearest inner layer conductor, and the impedance matching of the signal transmission path involving the second path end pad is considered. Has not been considered much. However, when the thickness of the dielectric layer is reduced as described above, even if the second adjacent inner layer surface conductor has an in-plane direction overlap with the second path end pad, the second adjacent inner layer surface conductor has a second surface. The parasitic capacitance to the path end pad is no longer negligible and has a greater effect on the impedance matching of the entire transmission path. In the present invention, all the inner layer surface conductors on the side where the second path end pad is arranged, including the second adjacent inner layer surface conductor, do not have an in-plane direction overlap with the second path end pad. Therefore, the above problem can be effectively suppressed. This configuration is particularly effective when the dielectric layer is formed of a resin dielectric sheet that tends to be thin.
[0014]
Next, the wiring board of the present invention
A conductor layer and a dielectric layer are alternately formed on each of the first main surface and the second main surface of the plate-shaped core, a conductor line on the conductor layer, a via conductor penetrating through the dielectric layer, and a plate-shaped conductor. From the first path end pad provided on the first main surface side of the plate-shaped core, including the signal through-hole conductor covering the inner surface of the signal through-hole penetrating the core in the thickness direction, from the second main surface side A signal transmission path leading to the second path end pad provided in is formed,
One of the two or more inner layer surface conductors is a core conductor covering the second main surface of the plate-shaped core, and a through hole as a connection conductor penetrating opening is provided at a position corresponding to the signal through hole conductor of the core conductor. An opening is formed, and inside the through-hole opening, a through-hole pad that is electrically connected to the signal through-hole conductor is arranged so as to form an annular gap with the through-hole opening,
The connection conductor can be configured to include a through-hole pad and a second-path-end-side via conductor that connects the through-hole pad and the second path end pad in the thickness direction of the dielectric.
[0015]
In this configuration, one of the inner layer surface conductors is a core conductor that covers the second main surface of the plate-shaped core, and a through-hole opening that forms a connection conductor penetrating opening formed in the inner conductor is a second path end pad. And the annular gap width between the through-hole opening and the through-hole pad is also increased. As a result, not only the parasitic capacitance coupling between the core conductor and the second path end pad in the layer thickness direction around the through hole opening but also the in-plane parasitic capacitance coupling between the through hole pad and the core conductor are reduced. This is suppressed, which is further advantageous in achieving impedance matching of the entire signal transmission path. Further, since two or more inner layer conductors are provided, at least one inner layer conductor is provided in addition to the core conductor. An opening for connection conductor penetration (hereinafter, referred to as a via opening) for penetrating the second path end side via conductor is formed in the inner layer surface conductor. Since the via opening is also expanded beyond the outer diameter of the second path end pad, the in-plane parasitic capacitance coupling between the inner layer surface conductor in which the via opening is formed and the second path end side via conductor. Can be similarly suppressed.
[0016]
In the wiring board according to the present invention, the main surface of the dielectric layer immediately below the second path end pad on the side where the second path end pad is disposed can be covered with the path end side conductor. By doing so, it is possible to further increase the number of plane conductors serving as ground layers or power supply layers on the second main surface side of the core substrate on which the second path end pads are arranged.
[0017]
Hereinafter, requirements that can be further added to the wiring board of the present invention will be described.
An impedance adjustment opening for adjusting the characteristic impedance of the signal transmission path can be formed in the surface conductor at a position facing the signal transmission path with the dielectric layer interposed therebetween. If a part of the plane conductor facing the signal transmission path is removed in the form of an opening, the capacitance generated between the signal transmission path and the plane conductor at that part is reduced. Therefore, by providing the impedance adjustment opening as described above, the adjustment margin of the reactance term of the impedance of the signal transmission path can be secured, and the characteristic impedance of the signal transmission path in a desired frequency band can be secured. , Can be easily adjusted by the matching direction with respect to the specified value.
[0018]
Further, the wiring board of the present invention can be configured as follows.
That is, a conductor layer and a dielectric layer are alternately formed on each of the first main surface and the second main surface of the plate-shaped core, a conductor line on the conductor layer, a via conductor penetrating the dielectric layer, and From the first path end pad provided on the first main surface side of the plate-shaped core, including the signal through-hole conductor that covers the inner surface of the signal through-hole penetrating the plate-shaped core in the thickness direction, A signal transmission path leading to the second path end pad provided on the front surface side is formed, and further, the conductor layer has at least one layer on each of the first main surface side and the second main surface side of the plate-shaped core, The surface conductor and the conductor line on the first main surface side, which are arranged to form a surface conductor functioning as a power supply layer or a ground layer, are a strip line or a microstrip having a constant characteristic impedance Z0 (for example, 50Ω). Make up the line It is those,
On the other hand, at the position adjacent to the signal through-hole in the plate-shaped core, a shielding through-hole that penetrates the plate-shaped core in the thickness direction is formed to shield a high-frequency signal transmitted through the signal through-hole conductor. The inner surface of the shield through hole is covered with a shield through hole conductor connected to at least one of the first main surface side surface conductor and the second main surface side surface conductor of the plate-shaped core. And the signal through-hole conductor and the shield through-hole conductor so that the characteristic impedance Z0 ′ of the shielded transmission path structure formed by the signal through-hole conductor and the shield through-hole conductor is in the range of Z0 ± 20Ω. Are adjusted.
[0019]
In the above configuration, the shielding through-hole conductor is provided at a position adjacent to the signal through-hole conductor in the plate-shaped core. The characteristic impedance of a strip line or a microstrip line (standard impedance portion) forming a main part of a signal transmission path from the first path end pad to the second path end pad is defined as Z0, and a signal through-hole conductor and a shield are used. The signal through-hole conductor and the shield through-hole conductor are formed such that the characteristic impedance Z0 ′ of the shield transmission path structure formed by the through-hole conductor (hereinafter, referred to as the through-hole transmission path structure) is in the range of Z0 ± 20Ω. Was adjusted. Since the parasitic capacitance between the signal through-hole conductor and the shield through-hole conductor greatly changes due to the adjustment of the above-mentioned axial distance, the characteristic of the entire signal transmission path is determined in such a manner that the change in the parasitic capacitance is used as an adjustment margin. The impedance can be adjusted with a relatively large width. Therefore, the signal transmission path from the first path end pad to the second path end pad includes many non-standard impedance portions such as vias, signal through-hole conductors, or conductor pads that cause impedance mismatch. Despite this, the characteristic impedance of the signal transmission path can be easily adjusted in the direction of matching to the specified value, and the effects of parasitic capacitance and parasitic inductance that cannot be clearly understood from the structure can be reduced.
[0020]
The signal through-hole conductor has a larger size than other non-standard impedance portions, and has a significant effect on the impedance mismatch of the entire signal transmission path. When the signal through-hole conductor is provided alone, the effect can be grasped as a reduction in the parasitic capacitance due to the accompanying shield conductor and an increase in the reactance term of the characteristic impedance. Therefore, the increase in the reactance term can be effectively suppressed by adjoining and accompanying a shielding through-hole conductor substantially equivalent in size, and loss due to signal leakage can be greatly reduced. However, if the distance between the axes of both through-hole conductors is excessively reduced due to the large conductor area, the parasitic capacitance in the through-hole transmission path structure will increase too much, the reactance term will shift in the shortage direction, and impedance mismatch will occur. May be invited. In other words, the effect of the distance between the axes of the two through-hole conductors on the characteristic impedance change of the entire signal transmission path is relatively large. Therefore, if the characteristic impedance of the through-hole transmission path structure is excessively separated from the characteristic impedance Z0 of the standard impedance part which is a reference for the matching value, impedance matching of the entire signal transmission path can no longer be performed. To avoid such a problem, the distance between the axes is adjusted so that the characteristic impedance Z0 'of the through-hole transmission path structure is in the range of Z0 ± 20Ω.
[0021]
A plurality of shield through-hole conductors can be arranged around the signal through-hole conductor. Thereby, the shielding effect of the signal through-hole conductor is enhanced, and transmission loss can be more effectively suppressed.
[0022]
The change behavior of the L / C coupling between the signal transmission path and the plane conductor when the impedance adjustment opening is changed is described in the signal through-hole conductor and the shield through-hole in the aforementioned through-hole transmission path structure. This is significantly different from the change behavior of the L / C coupling when the distance between the axes with the hole conductor is changed. Therefore, the frequency band in which the impedance adjustment effect appears differs between the impedance adjustment opening and the through-hole transmission path structure. Therefore, by combining these, the impedance can be adjusted in a wider frequency band, and the impedance can be adjusted by selecting a desired frequency band, thereby greatly increasing the degree of freedom of adjustment. A new effect is obtained.
[0023]
The impedance adjustment opening can be specifically formed as follows. That is, the first conductor layer including the first surface conductor, the first dielectric layer, the second conductor layer including the conductor line, and the second dielectric layer are arranged on the first main surface of the plate core from the side close to the plate core. The body layers are laminated in this order. Further, a signal through hole is formed at a position facing the first end of the conductor line so as to penetrate the plate-shaped core in the plate thickness direction. The end on the first main surface side of the signal through-hole conductor covering the inner surface of the signal through-hole is connected to the first end of the conductor line via the first signal via conductor penetrating the first dielectric layer. I do. On the other hand, on the second main surface side of the plate-shaped core, a second path end pad connected to an end of the signal through-hole conductor on the second main surface side is arranged. A second signal via conductor penetrating through the second dielectric layer is connected to the second end of the conductor line, and a first path end pad electrically connected to the second signal via conductor is arranged on the second dielectric layer. I do. Then, a first impedance adjusting opening for adjusting the characteristic impedance of the signal transmission path from the first path end pad to the second path end pad is provided on the first surface conductor to the second end of the conductor line. Formed at the opposing position.
[0024]
In this configuration, when the via that connects the second end of the conductor line and the first path end pad is a second signal via, the second signal via located on the opposite side of the conductor line with the second signal via interposed therebetween. A first impedance adjusting opening is provided in the one-sided conductor so as to face the second end of the conductor line. The portion of the first surface conductor facing the conductor line is also a portion that originally forms a strip line or a microstrip line (standard impedance portion) having a specified characteristic impedance together with the line conductor, but on the other hand, the two dielectric layers However, a relatively large parasitic capacitance is generated between the first path end pad and the first path end pad. As a result, by forming the opening here, the parasitic capacitance serves as an adjustment margin, so that the characteristic impedance of the entire signal transmission path can be adjusted with a relatively large width. Therefore, the signal transmission path from the first path end pad to the second path end pad includes many non-standard impedance portions such as vias, signal through-hole conductors, or conductor pads that cause impedance mismatch. Despite this, by adjusting the aperture size, the characteristic impedance of the signal transmission path can be easily adjusted in the direction of matching to the specified value, reducing the effects of parasitic capacitance and parasitic inductance that cannot be clearly understood from the structure can do.
[0025]
Further, the wiring board of the present invention,
A first conductor layer including a first surface conductor, a first dielectric layer, a second conductor layer including a conductor line, and a second dielectric layer on a first main surface of the plate core from a side close to the plate core; And a third conductor layer including a second surface conductor is laminated and formed in this order,
The conductor line forms a strip line in a form sandwiched between the first surface conductor and the second surface conductor,
At a position facing the first end of the conductor line, a signal through-hole is formed so as to penetrate the plate-shaped core in the thickness direction, and the inner surface of the signal through-hole is covered with the signal through-hole conductor. An end on the first main surface side of the signal through-hole conductor is connected to a first end of the conductor line via a first signal via conductor penetrating the first dielectric layer, and On the second main surface side of the core, a second path end pad connected to the second main surface side end of the signal through-hole conductor is arranged,
A configuration may be adopted in which a first impedance adjustment opening for adjusting the characteristic impedance of the signal transmission path is provided at a position of the second surface conductor facing the first end of the conductor line.
[0026]
In this configuration, when the via connecting the first end of the conductor line and the signal through-hole conductor is set as the first signal via, the first signal via located on the opposite side to the first signal via across the conductor line. A two-sided conductor is provided with a second impedance adjusting opening facing the first end of the conductor line. The portion of the second surface conductor facing the conductor line is also a portion that forms a strip line (standard impedance portion) having a specified characteristic impedance together with the line conductor, but the second impedance adjustment opening is provided here. Thereby, it is possible to provide a margin for adjusting the reactance term of the impedance of the signal transmission path, and thus easily adjust the characteristic impedance of the signal transmission path in a desired frequency band in a matching direction with respect to a specified value. .
[0027]
Further, the first impedance adjustment opening and the second impedance adjustment opening can be provided independently, but can be combined with each other. This makes it possible to further expand the adjustment margin of the reactance term of the impedance of the signal transmission path, and further easily adjust the characteristic impedance of the signal transmission path in a desired frequency band in the matching direction with respect to the specified value. can do. In addition, the parasitic capacitance near the first impedance adjustment opening and the parasitic capacitance near the second impedance adjustment opening both have different conductor shapes and areas on the signal transmission path side facing the opening (for example, in the latter case). In the former case, the conductors involved are mainly transmission lines and via conductors, but in the former case, a slightly larger area of the first path end pad is added thereto), and the distribution of inductance on the conductor side to be coupled is also different. Therefore, the change behavior of the L / C coupling when the opening size is changed is also significantly different. Accordingly, each impedance adjustment opening has a different frequency band in which the impedance adjustment effect is exhibited by adjusting the inner diameter. Therefore, as described above, a plurality of types differing in at least one of the shape and size of the conductor on the signal transmission path side that forms a parasitic capacitance between the plane conductor and the plane conductor formed in the opening and the relative positional relationship with the plane conductor. The effect of increasing the degree of freedom of adjustment becomes more remarkable by providing the impedance adjustment openings in combination.
[0028]
When the inner diameter of the first impedance adjustment opening is d1 and the outer diameter of the first path end pad is d2, it is desirable to adjust the inner diameter d1 of the first impedance adjustment opening within the range of d1 ≦ d2. This is because when the first path end pad and the first impedance adjustment opening have the same dimensions (that is, d1 = d2), the reactance adjustment margin due to the parasitic capacitance between the first surface conductor and the first path end pad is substantially increased. The effect of adjusting the characteristic impedance on the signal transmission path is flattened out. If the first impedance adjustment opening is enlarged in the form of d1> d2, the surface conductor portion facing the line conductor becomes insufficient, and conversely, loss due to signal leakage becomes significant.
[0029]
The inner diameter of the second impedance adjustment opening is desirably set to such an extent that a signal via not accompanied by a shielding conductor is formed at this position, so that loss due to signal leakage does not become significant. For example, assuming that the width of the line conductor is w, the inner diameter d7 of the second impedance adjustment opening is preferably adjusted in the range of d7 <5w.
[0030]
The impedance adjusting opening has the same shape and dimensions as those of the signal transmission path side conductor that forms a parasitic capacitance between the plane conductor and the plane conductor and the signal transmission path side conductor. And a plurality of types different in at least one of the positional relationship can be provided in combination.
[0031]
If the conductor shape and the area on the signal transmission path side facing the impedance adjustment opening are different, the distribution of the inductance on the conductor side to be coupled is also different. Therefore, the change behavior of the L / C coupling when the opening size is changed is also significantly different. Naturally, even when the relative positional relationship between the plane conductor portion and the signal transmission path side conductor portion is different, the change behavior of the L / C coupling is different. Therefore, the plurality of types of impedance adjustment apertures described above have different frequency bands in which the impedance adjustment effect is exhibited by adjusting the inner diameter. Therefore, as described above, a plurality of types of conductors on the signal transmission path side that form a parasitic capacitance between the conductor and the opening and that have at least one of different shapes and dimensions and a relative positional relationship with the surface conductor are different. By providing the impedance adjusting openings in combination, the degree of freedom of impedance adjustment is further improved.
[0032]
Next, the wiring board of the present invention includes a fourth conductor layer including a third surface conductor, a third dielectric layer, and a fourth surface conductor on the second main surface of the plate core from the side close to the plate core. , A fourth dielectric layer and a sixth conductor layer including the fifth surface conductor can be laminated in this order. In the fourth conductor layer, a through-hole opening is formed at a position corresponding to the signal through-hole conductor of the third surface conductor, and inside the through-hole opening, a through-hole for conducting with the signal through-hole conductor. The pad can be arranged so as to form an annular gap between the pad and the through-hole opening. In the fifth conductor layer, a via opening is formed in the fourth surface conductor at a position corresponding to the signal through-hole conductor, and connected to a through-hole pad inside the via opening, A third signal via conductor penetrating through the dielectric layer and the fourth dielectric layer can be arranged. Then, in the sixth conductor layer, a second path end pad opening is formed at a position corresponding to the signal through-hole conductor of the fifth surface conductor, and a third signal is formed inside the second path end pad opening. The second path end pad can be arranged in such a manner as to form an annular gap between the second path end pad and the second path end pad opening so as to be electrically connected to the via conductor. The through-hole pad, the via opening, the second path end pad, and the second path end pad opening can all be arranged concentrically.
[0033]
In this configuration, the third surface conductor is the core conductor described above, and the core conductor and the fourth surface conductor correspond to the inner layer surface conductor. The third surface conductor, which is the core conductor, forms the second adjacent inner layer surface conductor. The third signal via conductor is a second path end side via conductor, and the via opening forms a connection conductor penetrating opening. Further, the through-hole pad means a core-side pad. The fourth dielectric layer forms a dielectric layer immediately below, and the fifth surface conductor constitutes a path end side conductor (in the above configuration, in order to identify the surface conductor, the conductor layer, the dielectric layer, and the via conductor, Numbers such as `` third '' and `` fourth '' given to individual names are not necessarily based on the form and number of the surface conductor, conductor layer, dielectric layer and via conductor on the first main surface side. Absent). On the second main surface side of the plate-shaped core, a plurality of surface conductors functioning as a ground layer or a power supply layer are provided on the second main surface side for making a large number of connections with the ground or the power supply to the motherboard required for LSIs and ICs. Is effective. Also, the first path end pad, which is a pad on the first main surface side, is formed as a solder land or the like for flip-chip connection of an LSI, an IC, or the like. The second path end pad, which is a pad on the side, is formed larger than the first path end pad for BGA connection or PGA connection with the motherboard.
[0034]
The present invention particularly remarkably exerts an effect of improving impedance matching over the entire signal transmission path, and thus an effect of improving transmission efficiency, in a high frequency band of 1 GHz or more (for example, up to 10 GHz, particularly up to 5 GHz) where the influence of parasitic reactance is large. .
[0035]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a sectional view schematically showing a first embodiment of a wiring board of the present invention. The wiring board 1 has a plate-shaped plate core 2 made of a heat-resistant resin plate (for example, a bismaleimide-triazine resin plate) or a fiber-reinforced resin plate (for example, a glass fiber-reinforced epoxy resin). The configuration of the plate-shaped core is not limited to this. For example, a ceramic plate can be exemplified in addition to the fiber-reinforced resin plate, and the ceramic plate itself is a ceramic wiring board having a wiring portion. You may.
[0036]
On the first main surface MP1 of the plate-shaped core 2, from the side close to the plate-shaped core 2, a first conductor layer M1 including the first surface conductor 5, a first dielectric layer V1, and a first conductor layer 7 including the conductor line 7 are arranged. The second conductor layer M2, the second dielectric layer V2, and the third conductor layer M3 including the second surface conductor 9 are laminated in this order. The conductor line 7 forms a strip line between the first surface conductor 5 and the second surface conductor 9. At a position facing the first end of the conductor line 7, a signal through hole 12 is formed in the plate-shaped core 2 by a drill or the like so as to penetrate the plate-shaped core 2 in the plate thickness direction. The inner surface of the signal through hole 12 is covered with a signal through hole conductor 30, and the inside thereof is filled with a resin filling material 31 such as an epoxy resin. On the other hand, as shown in FIG. 2, the second surface conductor 9 is formed with a first path end pad opening 9a so as to surround the second signal via conductor 34b. Inside the opening 9a, the first path end pad 10 which is electrically connected to the second signal via conductor 34b is arranged so as to form an annular gap 10c between the first path end pad opening 9a.
[0037]
The end on the first main surface MP1 side of the signal through-hole conductor 30 is connected to the first end of the conductor line 7 via a first signal via conductor 34a penetrating the first dielectric layer V1. On the other hand, a second signal via conductor 34b penetrating the second dielectric layer V2 is connected to the second end of the conductor line 7, and the second signal via conductor 34b is formed on the second dielectric layer V2. A first path end pad 10 that conducts is disposed.
[0038]
Next, on the second main surface MP2 of the plate-shaped core 2, from the side close to the plate-shaped core 2, a fourth conductor layer M11 including a third surface conductor (core conductor: second adjacent inner layer surface conductor) 15 , Third dielectric layer V11, fifth conductor layer M12 including fourth surface conductor (inner surface conductor) 17, fourth dielectric layer (directly lower dielectric layer) V12, and fifth surface conductor (path end side conductor) 19 Are laminated in this order. In the fourth conductor layer M11, a through-hole opening (opening for connection conductor penetration) 15a is formed in the third surface conductor 15 at a position corresponding to the signal through-hole conductor 30. Inside the through-hole opening 15a, a through-hole pad (core-side pad) 18 that is electrically connected to the signal through-hole conductor 30 is annularly formed between the through-hole opening (connection conductor through-opening) 15a. Are arranged so as to form the gap 18c. In the fifth conductor layer M12, via openings (connection conductor through openings) 17a are formed in the fourth surface conductor 17 at positions corresponding to the signal through-hole conductors 30. Inside the via opening 17a, a third signal via conductor (second path end side via conductor) connected to the through hole pad 18 and penetrating the third dielectric layer V11 and the fourth dielectric layer V12. ) 34c and 34d are arranged. The third signal via conductors 34c and 34d include a via conductor 34c on the third dielectric layer V11 side and a via conductor 34d on the fourth dielectric layer V12 side, and form a stacked via that is overlapped via the via pad 34p. ing. The through-hole pad 18, the via opening 17a, the second path end pad 20, and the second path end pad opening 19a are all arranged concentrically. The through-hole pad 18, the third signal via conductors 34c and 34d, and the via pad 34p form a connection conductor.
[0039]
Each of the conductor layers M1, M2, M3, M11, M12, and M13 is formed as a metal plating layer such as Cu plating. The via conductors 34a, 34b, 34c, and 34d are provided together with the via pads 34p disposed on the conductor layer, and the signal through-hole conductors 30 are provided together with the through-hole pads 18 at both ends. It is formed as a plating layer.
[0040]
On the other hand, the first path end pad 10 is a solder land for flip-chip mounting a semiconductor component (not shown) such as an integrated circuit, and has a structure in which an electroless Ni-P plating layer is covered with an Au plating layer. . The second path end pad 20 is a land for connecting the wiring board 1 to a main board such as a motherboard in a well-known connection form such as BGA or PGA. Is covered with an Au plating layer. And, on the third conductor layer M3 and the sixth conductor layer M13, solder resist layers SR1 and SR2 made of a photosensitive resin composition are respectively formed. Openings 10d are formed in the solder resist layer SR1 on the third conductor layer M3 side so as to correspond to the first path end pads 10 one-to-one in order to expose the first path end pads 10 forming solder lands. Be done. Although only one first path end pad 10 and second path end pad 20 are shown in the figure, a plurality (for example, an array) is actually provided according to the number of terminals of the semiconductor component to be mounted. It is formed.
[0041]
The surface conductors 5, 9, 15, 17, and 19 are used as a ground layer or a power supply layer, and are connected to the motherboard side through one of the lands (second path end pads 20) on the second main surface of the substrate. Connected to ground terminal or power terminal. In the present embodiment, the surface conductors 5, 17 are the power supply layers, and the surface conductors 9, 15, 19 are the ground layers. When the power supply layer is AC grounded, both the power supply layer and the ground layer can be grasped functionally as conductor layers that provide a potential reference (or zero potential point).
[0042]
Of the third surface conductor 15 and the fourth surface conductor 17 forming the inner layer surface conductor, the through-hole opening 15 a and the via opening 17 a forming the connection conductor penetrating opening, and the inner peripheral edge of the via opening 17 a are all connected to the second path end pad 20. The inner diameter of each of the openings 15a, 17a is adjusted to be at the same position as the outer peripheral edge. That is, for all of the inner layer surface conductors 15 and 17 on the side where the second path end pad 20 is arranged, no in-plane overlap occurs between the second path end pad 20 and the second path end pad 20. As a result, even when the dielectric layers V11 and V12 separating the inner layer surface conductors 15 and 17 and the second path end pad 20 are thin, the dielectric layer V11 and V12 are formed between the second path end pad 20 and the respective inner layer conductors 15 and 17. Therefore, it is possible to sufficiently reduce the parasitic capacitance to be achieved, and to easily realize impedance matching of the entire signal transmission path.
[0043]
In addition, it is possible to further expand the inner peripheral edges of the openings 15 a and 17 a so as to be located outside the outer peripheral edge of the second path end pad 20. However, the effect of reducing the parasitic capacitance due to the expansion of the openings 15a, 17a rapidly saturates after the in-plane overlap between the inner layer surface conductors 15, 17 and the second path end pad 20 is eliminated. . Therefore, when it is desired to arrange as many second path end pads 20 as possible on the second main surface side of the wiring board 1, the inner peripheral edges of the openings 15 a and 17 a are aligned with the outer peripheral edges of the second path end pads 20 to save space. It is desirable to adjust so as to be at the same position as possible.
[0044]
Each of the dielectric layers V1, V2, V11, and V12 is formed of a resin dielectric sheet, specifically, a build-up layer formed of a photosensitive resin composition. In the present embodiment, the photosensitive resin composition is composed of an epoxy resin or the like, and is obtained by blending an insulating filler made of SiO ₂ at a ratio of 10% by mass or more and 30% by mass or less, and has a relative dielectric constant ε of It is adjusted to 2 to 4 (for example, about 3). The dielectric layer may be formed of a non-photosensitive resin composition, or may be formed of a ceramic dielectric other than a polymer material such as a resin.
[0045]
The dielectric layers V11 and V12 that are in contact with the inner surface conductors 15 and 17 are each formed using a thin resin dielectric sheet of 16.5 εμm or less (for example, 50 μm or less) (the dielectric layer V1 on the first main surface side). , V2). In the present embodiment, the two dielectric layers V11 and V12 are formed to have substantially the same thickness at 16.5 μm or less. In the thickness direction of the plate-shaped core 2, the total thickness of the dielectric layer between the second path end pad 20 and the second main surface MP2 of the plate-shaped core 2 is 33εμm or less (for example, 100μm or less). Have been. In the present embodiment, the width a of the annular gap 20c between the second path end pad 20 and the second path end pad opening 19a formed in the fifth surface conductor 19 serving as the path end side conductor is directly below. More specifically, the thickness c from the second main surface MP2 of the plate-like core to the lower surface of the second path end pad 20 (however, the dielectric constant is smaller than the thickness f of the fourth dielectric layer V12 forming the dielectric layer). (The total thickness of the body layers, excluding the thickness of the conductor layer). Thereby, in-plane parasitic capacitance coupling between the second path end pad 20 and the fifth surface conductor 19 can be effectively suppressed. FIG. 5 shows an example of a wiring board in which the width a of the gap 20c is further reduced (the configuration is the same as that of FIG. 1 except for the width a).
[0046]
Next, a shield through hole 112 penetrating the plate core 2 in the thickness direction is formed in the plate core 2 at a position adjacent to the signal through hole 12. Then, in order to shield a high-frequency signal transmitted through the signal through-hole conductor 30, the inner surface of the shield through-hole 112 is covered with a shield through-hole conductor 130. The shield through-hole conductor 130 is provided so as to be connected to the third surface conductor 15 which is a surface conductor on the second main surface MP2 side. The signal through-hole conductor 30 and the shield through-hole conductor 130 are formed such that the characteristic impedance Z0 ′ of the shielded transmission path structure formed by the signal through-hole conductor 30 and the shield through-hole conductor 130 is in the range of Z0 ± 20Ω. The distance w between the shaft and the through-hole conductor 130 is adjusted.
[0047]
The portion of the first surface conductor 5 and the second surface conductor 9 facing the conductor line 7 forms a strip line together with the line conductor 7, the permittivity and thickness of the via layers V 1 and V 2, the line width of the line conductor 7, Depending on the thickness (however, in a high frequency band where the skin effect is dominant, the thickness is not so important), the characteristic impedance is designed to be a specified value Z0 (for example, 50Ω). As described above, the signal transmission path from the first path end pad 10 to the second path end pad 20 includes via conductors 34b, 34b, which do not form a strip line, other than a portion (standard impedance portion) configured as a strip line. 34a, 34c, 34d, the signal through-hole conductor 30, the first path end pad 10, the second path end pad 20, and the like. These elements are less likely to be shielded by the surface conductors 5 and 9 and, of course, form nonstandard impedance portions having a different impedance equivalent circuit structure from the stripline. Therefore, even if the standard impedance portion is designed with the specified characteristic impedance value, the entire signal transmission path from the first path end pad 10 to the second path end pad 20 remains unaffected by the influence of the non-standard impedance portion. The characteristic impedance is complexly shifted from a specified value, causing impedance mismatch.
[0048]
However, in the embodiment of FIG. 1, a shield through-hole conductor 130 is provided at a position adjacent to the signal through-hole conductor 30 in the plate-shaped core 2, and a strip line or a micro line serving as a main part of a signal transmission path is provided. Assuming that the characteristic impedance of the strip line (standard impedance portion) is Z0, the characteristic impedance Z0 ′ of the shield transmission path structure (hereinafter, referred to as a through-hole transmission path structure) formed by the signal through-hole conductor 30 and the shield through-hole conductor 130 is formed. The distance w between the axes of both the through-hole conductors 30 and 130 was adjusted so that the value was within a range of Z0 ± 20Ω. Since the parasitic capacitance between the signal through-hole conductor 30 and the shield through-hole conductor 130 greatly changes due to the adjustment of the center distance w, the signal transmission path is formed in such a manner that the margin of the parasitic capacitance is used as an adjustment margin. The overall characteristic impedance can be adjusted with a relatively large width. Therefore, by adjusting the inter-axis distance w, the characteristic impedance of the signal transmission path can be adjusted in the direction of matching to the specified value.
[0049]
For example, the characteristic impedance at the desired frequency of the signal transmission path (or the admittance which is the reciprocal thereof) is simulated while changing the dimension (inner diameter) of the center distance w, and the result is plotted on a Smith chart. What is necessary is just to find the inter-axis distance w that gives the plot point closest to the center point of the Smith chart. The parasitic capacitance between the two through-hole conductors 30 and 130 varies greatly depending on the variation of the inter-axis distance w. For the characteristic impedance of the signal transmission path, the equivalent circuit changes the parallel capacitance with respect to the transmission line. Bring. Therefore, the increase or decrease of the parasitic capacitance due to the inter-axis distance w has an effect of moving the admittance plot point on the equal susceptance circle when using, for example, a smith chart of admittance display.
[0050]
Next, a first impedance adjusting opening 5b for adjusting the characteristic impedance of the signal transmission path is provided at a position of the first surface conductor 5 facing the second end of the conductor line 7. Further, a second impedance adjusting opening 9b for adjusting the characteristic impedance of the signal transmission path is provided at a position of the second surface conductor 9 facing the first end of the conductor line 7. FIG. 3 is a plan view showing an example of a form of forming the impedance adjusting openings 5b and 9b.
By adjusting the opening dimensions of the first impedance adjustment opening 5b and the second impedance adjustment opening 9b, the characteristic impedance of the signal transmission path can be easily adjusted in the direction of matching to the specified value. In this case, the characteristic impedance at the desired frequency of the signal transmission path (or the admittance which is the reciprocal thereof) is simulated while changing the dimensions (inner diameter) of the openings 5b and 9b, and the result is plotted on a Smith chart. Then, it is sufficient to find the dimensions of the openings 5b and 9b that give the plot points closest to the center point of the Smith chart. In particular, the first surface conductor 5 is formed on the first surface conductor 5 because the first surface conductor 5 sandwiches the two dielectric layers but has relatively large parasitic capacitance with the first path end pad 10. The first impedance adjustment opening 5b has an advantage that the impedance adjustment margin can be set large.
[0052]
As shown in FIG. 4, if the inner diameter of the first impedance adjustment opening 5b is d1 and the outer diameter of the first path end pad 10 is d2, when d1 <d2, the first surface conductor 5 and the first path end An overlap corresponding to the diameter difference t = d2−d1 occurs between the pad 10 and the pad 10, as indicated by a dashed line in the figure, and this serves as a reactance adjustment margin due to parasitic capacitance. The smaller t is, the smaller the parasitic capacitance and the larger the reactance. However, this effect substantially reaches a plateau at t = 0 (that is, d1 = d2: this condition is adopted in the present embodiment). Although d1> d2 can be satisfied, since the reactance adjustment effect is reduced, d1 should not be excessively increased in this region so that the shielding effect on the line conductor 7 is reduced, that is, loss due to signal leakage does not excessively occur. It is desirable. Since the above-mentioned parasitic capacitance decreases as the aperture diameter increases, it can be said that it is desirable to make d1 as close as possible to d2 when it is desired to increase the reactance term during impedance matching. Also, the inner diameter d7 of the second impedance adjustment opening is preferably adjusted in the range of d7 <5w, where w is the width of the line conductor, so that loss due to signal leakage does not excessively occur.
[0053]
In particular, in the case of a wiring board having many surface conductors, the parasitic capacitance between the signal transmission path and each surface conductor tends to be excessive. However, in the present embodiment, the openings 15a and 17a of the surface conductors 15 and 17 immediately below the second path end pad, which tend to cause particularly large parasitic capacitance, are both larger than the outer diameter of the second path end pad 20. Thus, the level of the base parasitic capacitance can be sufficiently reduced to a high frequency range. Therefore, the adjustment of the axial distance w between the signal through-hole conductor 30 and the shield through-hole conductor 130 and the diameter of the impedance adjusting openings 5b and 9b can achieve more accurate impedance matching at a desired frequency. It may be performed as fine adjustment for this. Further, it is not necessary to excessively expand the dimensions of the impedance adjusting openings 5b and 9b, and the shielding effect on the signal transmission path is further enhanced. Note that one of the impedance adjustment openings 5b and 9b, for example, the second impedance adjustment opening 9b opened on the first main surface side of the substrate may be omitted.
[0054]
Hereinafter, experimental results for confirming the effects of the present invention will be described. A wiring board in which the thickness of each layer of the wiring board 1 of FIG. 1 and the dimensions of each part (corresponding to the reference numerals in FIG. 1) were adjusted as shown in FIG. 6 was produced by a well-known build-up method. However, the material of the dielectric layer is an epoxy resin, and the relative dielectric constant ε is 3. The width of the gap 20c is 125 μm, and the total thickness c of the third dielectric layer V11 and the fourth dielectric layer V12 is 66 (22ε) μm. The inner diameter of each of the first impedance adjustment opening 5b and the second impedance opening 9b is 115 μm.
[0055]
Further, four shield through-hole conductors 130 were formed in the same size and thickness as the signal through-hole conductor 30 so as to surround the signal through-hole conductor 30. Although the characteristic impedance of the signal through-hole conductor 30 alone is 91.2Ω, the through-hole transmission path structure is set in this embodiment by setting the distance (pitch) between the shields and the shield through-hole conductors 130 to 450 μm. Is adjusted so that the characteristic impedance Z0 ′ of the above is approximately 50Ω.
[0056]
Then, the measurement substrate is defined as g1 = g2, where g1 and g2 are the overlap lengths (diameter difference conversion) of the third surface conductor 15 and the fourth surface conductor 17 and the second path end pad 20 in the in-plane direction. = 0 μm ((1): Example) and g1 = g2 = 100 μm ((2): Comparative Example).
[0057]
The substrate samples (1) and (2) were probed (characteristics) such that the first path end pad 10 (terminal 1) was on the signal input side and the second path end pad 20 (terminal 2) was on the signal output side. (Impedance: 50Ω), and the reflection coefficient S11 of the first path end pad 10 in a frequency band up to 50 GHz was measured by a commercially available network analyzer (manufactured by Agilent Technologies: 8510C).
[0058]
FIG. 7 shows the measurement results of the substrate sample (1) (Example) in which the in-plane direction overlap between the third surface conductor 15 and the fourth surface conductor 17 and the second path end pad 20 is eliminated. In a frequency band up to 10 GHz, a low reflection coefficient of -20 dB or less is generally exhibited, and it is understood that a good impedance matching state is obtained. On the other hand, FIG. 8 shows a measurement result of a substrate sample (2) (comparative example) in which the second path end pad 20 overlaps with both the third surface conductor 15 and the fourth surface conductor 17, and reflects at 4 GHz or more. It can be seen that the coefficient exceeds -20 dB across the board, and the impedance matching state has not been obtained.
[Brief description of the drawings]
FIG. 1 is a sectional view schematically showing a first embodiment of a wiring board of the present invention.
FIG. 2 is a plan view showing an example of forming a first path end pad.
FIG. 3 is a plan view schematically showing a first formation mode of an impedance adjusting opening.
FIG. 4 is a plan view showing the concept of adjusting the inner diameter of the impedance adjustment opening.
FIG. 5 is a sectional view schematically showing a second embodiment of the wiring board of the present invention.
FIG. 6 is an explanatory view showing the specifications of each part of the wiring board used in the effect confirmation experiment.
FIG. 7 is a graph showing the frequency dependence of the reflection coefficient of the example substrate.
FIG. 8 is a graph showing the frequency dependence of the reflection coefficient of the substrate of the comparative example.
[Explanation of symbols]
1,100 Wiring board 2 Plate core 5 First surface conductor 5b First impedance adjustment opening 7 Conductor line 9 Second surface conductor 9a First path end pad opening 9b Second impedance adjustment opening 10 First path end pad 10c gap 12 signal through hole 15 third surface conductor (core conductor: second adjacent inner layer surface conductor)
15a Opening for through hole (opening for connecting conductor through)
17 4th conductor (inner layer conductor)
17a Via opening (connection conductor penetration opening)
18 Pad for through hole (Pad on core side)
18c Gap 19 Fifth surface conductor (path end side conductor)
20 second path end pad 20c gap 30 signal through-hole conductor 34a first signal via conductor 34b second signal via conductor 34c, 34d third signal via conductor (second path end side via conductor)
112 Shield through hole 130 Shield through hole conductor 134 Shield via conductor MP1 First main surface MP2 Second main surface M1 First conductor layer M2 Second conductor layer M3 Third conductor layer M11 Fourth conductor layer M12 Fifth conductor Layer M13 Sixth conductor layer V1 First dielectric layer V2 Second dielectric layer V11 Third dielectric layer V12 Fourth dielectric layer (directly below dielectric layer)

Claims (4)

A signal transmission path is formed from the first path end pad provided on the first main surface side of the plate core to the second path end pad provided on the second main surface side of the plate core, ,
On the second main surface side of the plate-shaped core, between the second path end pad and the second main surface of the plate-shaped core, two layers each having an inner surface conductor functioning as a power supply layer or a ground layer. The above conductor layer and the dielectric layer are alternately laminated and formed in such a manner that a dielectric layer is disposed immediately below the second path end pad, and the signal transmission path is a second main path of the plate core. A core-side pad is provided on the surface, and each of the inner-layer surface conductors included in the two or more conductor layers has a connection conductor through-opening formed at a position corresponding to the core-side pad. A connection conductor that connects the core-side pad and the second path end pad is arranged inside the conductor penetration opening,
In addition, an inner peripheral edge of each connection conductor penetrating opening of the two or more inner layer surface conductors is located at the same position or an outer peripheral edge of the second path end pad. substrate. Assuming that the relative permittivity of the dielectric layer is ε, the total thickness of the dielectric layer between the second path end pad and the second main surface of the plate core in the thickness direction of the plate core is 2. The wiring board according to claim 1, wherein the thickness of the wiring board is 33 袖 m or less. The wiring board according to claim 2, wherein the dielectric layer is formed of a resin dielectric sheet. A conductor layer and a dielectric layer are alternately laminated on each of the first main surface and the second main surface of the plate-shaped core, a conductor line on the conductor layer, a via conductor penetrating the dielectric layer, And in the form including a signal through-hole conductor covering the inner surface of the signal through-hole penetrating the plate-shaped core in the plate thickness direction, from the first path end pad provided on the first main surface side of the plate-shaped core, A signal transmission path leading to a second path end pad provided on the second main surface side is formed,
One of the two or more inner layer surface conductors is a core conductor covering the second main surface of the plate-shaped core, and the connection conductor penetrating hole is provided at a position corresponding to the signal through-hole conductor of the core conductor. A through-hole opening is formed as an opening, and a through-hole pad electrically connected to the signal through-hole conductor forms an annular gap between the through-hole opening and the inside of the through-hole opening. Are arranged in a shape,
2. The connection conductor comprises a pad for the through hole, and a second path end side via conductor connecting the pad for the through hole and the second path end pad in a thickness direction of the dielectric layer. The wiring board according to claim 3.

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