JP2004244646A - Rolled copper alloy foil for resistor and manufacturing method therefor - Google Patents

Rolled copper alloy foil for resistor and manufacturing method therefor Download PDF

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Publication number
JP2004244646A
JP2004244646A JP2002369451A JP2002369451A JP2004244646A JP 2004244646 A JP2004244646 A JP 2004244646A JP 2002369451 A JP2002369451 A JP 2002369451A JP 2002369451 A JP2002369451 A JP 2002369451A JP 2004244646 A JP2004244646 A JP 2004244646A
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Japan
Prior art keywords
resistor
copper alloy
alloy foil
volume resistivity
mass
Prior art date
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Pending
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JP2002369451A
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Japanese (ja)
Inventor
Yasuo Tomioka
靖夫 富岡
Tomohiro Senkawa
智洋 洗川
Norio Yuki
典夫 結城
Junji Miyake
淳司 三宅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mining Holdings Inc
Original Assignee
Nikko Metal Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to JP2002369451A priority Critical patent/JP2004244646A/en
Publication of JP2004244646A publication Critical patent/JP2004244646A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a copper alloy foil suitable for a resistive layer embedded in a substrate, in the multilayer substrate of a packaged multilayer type which aims at enhancing the packaging density and reducing the cost of a printed circuit board. <P>SOLUTION: The rolled copper alloy foil for the resistor of the multilayer substrate has a chemical composition comprising 1.5-5 mass% Ti and the balance Cu with unavoidable impurities, and has a thickness of 50 μm or thinner and a volume resistivity of 300 nΩm or higher. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【産業上の利用分野】
本発明は、プリント基板の高密度化、低コスト化などを目的とした一括積層タイプの多層基板において、基板中に内蔵される抵抗層として用いられる金属箔に関するものである。
【0002】
【従来技術】
近年の電子機器の軽薄短小化、高機能化に伴い、プリント基板には高密度実装が求められ、基板を多層化することにより回路を3次元化して高密度回路を得る、いわゆる多層基板が用いられるケースが増えている。この多層基板において、従来は受動部品である抵抗、コンデンサーは表面実装されるのが一般的であったが、最近、これらの部品を多層基板中の層に内蔵する技術が開発されている。(これを一括積層と称する。)(例えば、非特許文献1、非特許文献2、非特許文献3参照。)部品を多層基板中に内蔵するメリットとしては、以下のとおりである。
▲1▼実装工程を省略でき、製造コストを低減できる。
▲2▼基板表面の実装スペースや実装のためのスルーホールがなくなることにより基板形状の設計の自由度が増す。
▲3▼配線長を自由に調整しやすくなるため、高速信号に絶えられる構造をもつ回路を設計できる。
▲4▼導体層を金属のみとし、絶縁層を再生可能な熱可塑性樹脂のみを用いればリサイクルが可能となる。
などが挙げられる。このような背景から、部品を内蔵した多層基板が使われるケースが増えている。
【0003】
【非特許文献1】
安藤三津雄、岩田照徳「抵抗内臓多層プリント配線板」、Polyfile、1988年12月、第25巻、p.20−22
【非特許文献2】
「一括積層でコスト半減 部品内蔵で機能のみ込む」、日経エレクトロニクス、2002年4月22日号、p.120−123
【非特許文献3】
近藤宏司、外2名、「PALAP―リサイクル可能な一括多層プリント配線板―」、エレクトロニクス実装技術、平成14年9月、第18巻、第9号、p.60−63
【0004】
【発明が解決しようとする課題】
このような多層基板に内蔵される抵抗層用の材料としては、体積抵抗率が高く厚さの薄い材料を用いれば、抵抗部の配線の幅と長さをコントロールすることにより、所望の抵抗値をもつ回路を得るための設計が容易となる。
このような抵抗体を形成する方法としては、BiRu、PbRu6.5といった酸化物のペーストを回路上に印刷したあとプレスにより積層する方法があったが、この方法ではコストがかかること、フレキシブル基板には不向きであることなどの問題があった。
【0005】
このような問題を解決する方法としては、金属箔を抵抗体として用い、リジッドまたはフレキシブルの樹脂と積層後エッチングにより所定サイズに形成する方法が考えられる。この金属箔の求められる性質としては、以下のことが挙げられる。
▲1▼上述のように、体積抵抗率の高いことが求められる。現有するCu、Alやその合金の箔では体積抵抗率が低いため、抵抗体回路として所望する抵抗値を得るには抵抗部の長さを非常に長く取る必要があり、設計の自由度を極端に低下させることから問題である。
▲2▼磁性のある金属箔を用いた場合には、高周波電流の通電を阻害するため、磁性のない金属箔が求められる。
▲3▼熱膨張係数が、絶縁層として用いられる樹脂が近く、積層時にそりを生じないことが求められる。
しかしながら、これらの性質を所望するレベルで兼ね備えた金属箔の出現には至っていない。
【0006】
本発明の課題は、プリント基板の高密度化、低コスト化などを目的とした一括積層タイプの多層基板において、基板中に内蔵される抵抗層に適した金属箔を提供することである。
【0007】
【問題点を解決するための手段及び作用】
発明者らは、抵抗値が高く薄肉化可能な金属箔の材料の開発とその製造プロセスを鋭意研究した結果、Cu−Ti合金をベースとした圧延箔の製造プロセスに着目し、最終焼鈍条件を厳密にコントロールすることにより、マトリックスのCu中にTiを強制的に固溶させ、さらにこれを箔まで圧延することにより所望する体積抵抗率を持つ圧延金属箔を製造できることを明らかにした。
【0008】
即ち、本発明は
(1)化学組成が1.5〜5質量%のTiを含有し残部がCu及び不可避不純物からなり、厚さ50μm以下、体積抵抗率が300nΩ・m以上であることを特徴とする多層基板の抵抗体用圧延銅合金箔、
(2)化学組成が1.5〜5質量%のTiを含有し、さらにZn、Ni、Sn、Si、Mn、P、Mg、Fe、Cr、Co、Al、B、Zr、In、Ag、Hf、Au、MoおよびNbの1種以上を総量で0.005質量%以上5質量%以下を含有し、残部が銅及び不可避不純物からなり、厚さ50μm以下、体積抵抗率が300nΩ・m以上であることを特徴とする多層基板の抵抗体用圧延銅合金箔、
(3)上記(1)または(2)記載の多層基板の抵抗体用圧延銅合金箔において、箔に圧延する前の最終焼鈍における連続焼鈍炉の操業条件に関し、炉温を650℃以上950℃以下とし、炉内滞留時間T(min)を焼鈍板厚t(mm)に対し2t(min)以上5t(min)以下とし、さらに焼鈍温度から200℃までの冷却速度を100℃/s以上とすることを特徴とする多層基板の抵抗体用圧延銅合金箔の製造方法、
である。
【0009】
【発明の実施の形態】
次に本発明の限定理由について述べる。
(1)体積抵抗率および厚さ
上述のように、エッチングにより形成された抵抗体の抵抗値を自由に設計するためには、素材の体積抵抗率が十分高く、厚さが小さいことが必要である。近年の高機能の多層基板に使用可能な箔の体積抵抗率は300nΩ・m以上、望ましくは400nΩ・m以上であることが必要である。また、厚さに関しては50μm以下まで薄くすることが必要である。ただし、厚さが薄くなるとピンホールの発生が多くなり、特に50μm以下ではピンホールが飛躍的に増加する。抵抗体用金属箔としてはピンホールが少なければ少ないほうが良いが、本発明では、1m当たりのピンホール数を1.7個以下とする。
【0010】
(2)Ti含有量、製造条件
次に、上記に示した高い体積抵抗率を得るための条件について説明する。TiはCu中に固溶させることにより抵抗を上昇させる効果の高い元素であるため、選択した。ただし、Cu中のTiの固溶限は温度が低くなるにつれ小さくCu−Ti系合金は、時効させると析出強化により高い強度が得られることから、主にばね材等に使用されている。
しかし、このような時効を行ったものでは、マトリックス中のTi固溶量が小さいため、高い抵抗値を得ることができない。そこで、Tiの抵抗を上昇させる効果を生かすために、高温にて強制的に固溶させたものを常温に持ちきたす、いわゆる溶体化処理を行ったものを箔に適用することを検討した。
【0011】
Tiの添加量については、マトリックス中のTiの固溶量を増やす必要がある。所望の抵抗値を得るためにはTi含有量を1.5質量%以上とする必要があることがわかった。ただしTi含有量が5質量%を超えた場合には、介在物が発生し箔に圧延した際にピンホール個数を増加させる。そのため、Tiの最適な含有量は1.5質量%以上、5質量%以下とした。
【0012】
また、箔に圧延する前の最終焼鈍における連続焼鈍炉の操業条件を制御することが高い体積抵抗率を得る上で重要であることがわかった。すなわち、材料温度を高く、冷却速度を高くすることが必要である。そのためには、炉温を650℃以上、望ましくは700℃以上、さらに望ましくは750℃以上とする。650℃未満ではTiCuが析出し、固溶Ti量が減少して十分な体積抵抗率が得られない。また、950℃を超えると材料に厚い酸化層を生成し、焼鈍後の酸洗において通常条件では酸化層を除去しきれなくなるため、950℃以下とする。
【0013】
炉内滞留時間T(min)を以下の式に基づいて焼鈍板厚t(mm)に対し2t(min)以上5t(min)以下(比例定数aを2min/mm以上、5min/mm以下)とする。
T=a・t (1)
但し、T:炉内滞留時間(min)、a:比例定数(min/mm)、t:板厚(mm)
たとえば、板厚が0.15mmの時の滞留時間T(min)は0.3min以上0.75min以下の時間である。
a<2では滞留時間が短すぎて材料が炉温まで加熱されず、その結果TiCuが析出し、固溶Ti量が減少して体積抵抗率が低下する。a>5では焼鈍に要する時間が長くなりすぎ、生産性に乏しくなる。
さらに焼鈍温度から200℃までの冷却速度を100℃/s以上とすることが必要である。高い冷却速度を得るためには材料を水冷することが望ましい。これはTiCuの析出が反応速度の速いスピノーダル分解によって生じるため、冷却速度が遅いと析出反応が進むことにより固溶Tiが減少してしまうからである。
【0014】
(3)Zn、Ni、Sn、Si、Mn、P、Mg、Fe、Cr、Co、Al、B、Zr、In、Ag、Hf、Au、MoおよびNb
これらの元素はさらに抵抗を上昇させる元素として必要に応じて添加することができる。これらの添加元素の総量が0.005質量%以下では所望する効果が得られず、また5質量%以上では介在物が発生しピンホールを増加させるため、これらの添加元素の総量を0.005質量%以上5質量%以下と定めた。
【0015】
【実施例】
電気銅あるいは無酸素銅を原料として、高周波真空溶解炉にて表1に示す各種組成のインゴットを鋳造した。
次に、このインゴットを900℃に加熱し、この温度に1時間保持した後、厚さ8mmまで熱間圧延し、速やかに冷却した。表面の酸化スケールを面削した後、連続ラインにおける焼鈍と冷間圧延を繰り返し、厚さ0.015mmの箔を得た。なお、箔に圧延する前の最終焼鈍においては炉温、ラインスピード、冷却を厳密にコントロールして行った。式(1)に基づき、炉内滞留時間が所定範囲になるように設定した。
T=a・t (1)
但し、T:炉内滞留時間(min)、a:比例定数(min/mm)、t:板厚(mm)
【0016】
【表1】

Figure 2004244646
【0017】
このようにして得られた各合金箔について、体積抵抗率とピンホール数を評価した。体積抵抗率は四端子法により求めた。ピンホール数は50μm以上のピンホールが検出できるオンライン検査機を用い、1m当たりのピンホール数が1.7個以下のものを○とし、1.7個を超えるものを×として評価した。
【0018】
表1にその結果を示す。結果から判るように、本発明の銅合金箔は高い体積抵抗率を持つことが判る。これに対し、比較例No.21はTi濃度が低く、十分な体積抵抗率が得られなかった例である。比較例No.22はTi含有量が多く、No.23は添加元素の添加量が多いため高い体積抵抗率が得られているが、Ti含有量、添加元素の添加量に伴って介在物が多くなったため、ピンホールが多く発生した例である。
【0019】
比較例No.24は炉温が低く、TiCuが析出して固溶Ti量が減り、十分な体積抵抗率が得られなかった例である。比較例No.25は炉温が高すぎて、厚い酸化層を生成し、焼鈍後の酸洗において十分酸化層を除去しきれなくなり、板厚0.015mmまで圧延できなかった例である。比較例No.26は炉内滞留時間が短く、材料が設定した炉温まで加熱されなかったため、TiCuが析出して固溶Ti量が減り、十分な体積抵抗率が得られなかった例である。比較例27は冷却速度が遅いため、冷却中にTiCuが析出して固溶Ti量が減り、十分な体積抵抗率が得られなかった例である。
【0020】
また、発明例において、最終焼鈍の炉温が670℃の発明例No.4、720℃である発明例No.5と800℃である他の発明例を比較すると、炉温が高いほど、高い体積抵抗率を持つことが判る。
【0021】
【発明の効果】
以上の説明で明らかなように、この発明によれば一括積層タイプの多層基板における内部抵抗層に適した合金箔を提供することができる。[0001]
[Industrial applications]
The present invention relates to a metal foil used as a resistance layer built in a substrate in a multilayer substrate of a batch lamination type for the purpose of increasing the density and cost of a printed substrate.
[0002]
[Prior art]
As electronic devices have become lighter, thinner, smaller, and more sophisticated in recent years, high-density mounting is required on printed circuit boards. Cases are increasing. Conventionally, in this multilayer substrate, resistors and capacitors, which are passive components, were generally mounted on the surface, but recently, a technique for incorporating these components into layers in the multilayer substrate has been developed. (This is called collective lamination.) (See, for example, Non-Patent Document 1, Non-Patent Document 2, and Non-Patent Document 3.) The advantages of embedding components in a multilayer substrate are as follows.
(1) The mounting process can be omitted, and the manufacturing cost can be reduced.
(2) Eliminating the mounting space and through holes for mounting on the board surface increases the degree of freedom in designing the board shape.
(3) Since the wiring length can be easily adjusted freely, it is possible to design a circuit having a structure capable of cutting off high-speed signals.
{Circle around (4)} Recycling is possible by using only a metal for the conductor layer and using only a thermoplastic resin capable of regenerating the insulating layer.
And the like. From such a background, the use of a multi-layer substrate incorporating components is increasing.
[0003]
[Non-patent document 1]
Mitsuo Ando, Terunori Iwata, "Multilayer Printed Wiring Board with Built-in Resistor", Polyfile, December 1988, vol. 25, p. 20-22
[Non-patent document 2]
"Halve the cost by batch lamination, only incorporate functions with built-in components," Nikkei Electronics, April 22, 2002, p. 120-123
[Non-Patent Document 3]
Koji Kondo and two others, "PALAP-Recyclable Batch Multilayer Printed Wiring Board-", Electronics Packaging Technology, September 2002, Vol. 18, No. 9, p. 60-63
[0004]
[Problems to be solved by the invention]
If a material having a high volume resistivity and a small thickness is used as a material for the resistance layer incorporated in such a multilayer substrate, a desired resistance value can be obtained by controlling the width and length of the wiring of the resistance portion. Design for obtaining a circuit having
As a method of forming such a resistor, there was a method of printing an oxide paste such as Bi 2 Ru 2 O 7 or Pb 2 Ru 2 O 6.5 on a circuit and then laminating the paste by pressing. The method has problems such as high cost and unsuitability for a flexible substrate.
[0005]
As a method of solving such a problem, a method of using a metal foil as a resistor, laminating it with a rigid or flexible resin, and forming the same into a predetermined size by etching is considered. The properties required of this metal foil include the following.
{Circle around (1)} As described above, high volume resistivity is required. Since the volume resistivity of the existing foils of Cu, Al and its alloys is low, it is necessary to take a very long resistor portion in order to obtain a desired resistance value as a resistor circuit, and the degree of freedom in design is extremely high. This is a problem from lowering.
{Circle around (2)} When a metal foil having magnetism is used, a metal foil having no magnetism is required in order to hinder the passage of a high-frequency current.
{Circle around (3)} It is required that the resin used as the insulating layer has a thermal expansion coefficient close to that of the insulating layer and does not warp during lamination.
However, metal foils having these properties at desired levels have not yet been developed.
[0006]
An object of the present invention is to provide a metal foil suitable for a resistive layer built in a board in a multilayer board of a collective lamination type for the purpose of increasing the density and reducing the cost of a printed board.
[0007]
[Means and actions for solving the problems]
The inventors of the present invention have conducted intensive research on the development of a material for a metal foil having a high resistance value and a thickness that can be reduced, and have studied the manufacturing process thereof. As a result, the inventors focused on the manufacturing process of a rolled foil based on a Cu-Ti alloy and adjusted the final annealing conditions. By strictly controlling, it was clarified that a rolled metal foil having a desired volume resistivity can be produced by forcibly forming a solid solution of Ti in Cu of the matrix and further rolling this to a foil.
[0008]
That is, the present invention is characterized in that (1) the chemical composition contains 1.5 to 5% by mass of Ti, the balance being Cu and unavoidable impurities, the thickness is 50 μm or less, and the volume resistivity is 300 nΩ · m or more. Rolled copper alloy foil for resistors of a multilayer substrate,
(2) The chemical composition contains 1.5 to 5% by mass of Ti, and further contains Zn, Ni, Sn, Si, Mn, P, Mg, Fe, Cr, Co, Al, B, Zr, In, Ag, Contains at least one of Hf, Au, Mo, and Nb in a total amount of 0.005% by mass or more and 5% by mass or less, with the balance being copper and unavoidable impurities, a thickness of 50 μm or less, and a volume resistivity of 300 nΩ · m or more. Rolled copper alloy foil for a resistor of a multilayer substrate, characterized by being
(3) In the rolled copper alloy foil for a resistor of the multilayer substrate according to the above (1) or (2), regarding the operating conditions of the continuous annealing furnace in the final annealing before rolling into a foil, the furnace temperature is 650 ° C. or more and 950 ° C. The furnace residence time T (min) is set to 2 t (min) or more and 5 t (min) or less with respect to the annealing plate thickness t (mm), and the cooling rate from the annealing temperature to 200 ° C. is set to 100 ° C./s or more. Method for producing a rolled copper alloy foil for a resistor of a multilayer substrate, characterized by being
It is.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the reasons for limitation of the present invention will be described.
(1) Volume resistivity and thickness As described above, in order to freely design the resistance value of a resistor formed by etching, the material must have a sufficiently high volume resistivity and a small thickness. is there. The volume resistivity of foils that can be used for recent high-performance multilayer substrates must be 300 nΩ · m or more, preferably 400 nΩ · m or more. Further, it is necessary to reduce the thickness to 50 μm or less. However, when the thickness is reduced, the number of pinholes increases, and particularly when the thickness is 50 μm or less, the number of pinholes increases dramatically. The better the less pinhole as a resistive metallic foil, but the present invention, the number of pinholes per 1 m 2 to 1.7 or less.
[0010]
(2) Ti Content and Manufacturing Conditions Next, conditions for obtaining the above-described high volume resistivity will be described. Ti was selected because it is an element having a high effect of increasing resistance by forming a solid solution in Cu. However, the solid solubility limit of Ti in Cu decreases as the temperature decreases, and Cu-Ti alloys are mainly used for spring materials and the like because high strength can be obtained by precipitation strengthening when aged.
However, in the case of such aging, a high resistance value cannot be obtained because the amount of Ti solid solution in the matrix is small. Therefore, in order to take advantage of the effect of increasing the resistance of Ti, it has been studied to apply a so-called solutionizing treatment in which a solid solution is forcibly dissolved at a high temperature and brought to room temperature, that is, a solution treatment is performed.
[0011]
Regarding the addition amount of Ti, it is necessary to increase the solid solution amount of Ti in the matrix. It has been found that the Ti content needs to be 1.5% by mass or more in order to obtain a desired resistance value. However, when the Ti content exceeds 5% by mass, inclusions are generated, and the number of pinholes is increased when rolling into foil. Therefore, the optimal content of Ti is set to 1.5% by mass or more and 5% by mass or less.
[0012]
It was also found that controlling the operating conditions of the continuous annealing furnace in the final annealing before rolling into foil is important for obtaining a high volume resistivity. That is, it is necessary to increase the material temperature and the cooling rate. For this purpose, the furnace temperature is set to 650 ° C. or higher, preferably 700 ° C. or higher, and more preferably 750 ° C. or higher. If the temperature is lower than 650 ° C., TiCu 3 precipitates, and the amount of solid solution Ti decreases, so that a sufficient volume resistivity cannot be obtained. On the other hand, when the temperature exceeds 950 ° C., a thick oxide layer is formed on the material, and the oxide layer cannot be completely removed under normal conditions in pickling after annealing.
[0013]
The residence time T (min) in the furnace is set to 2 t (min) or more and 5 t (min) or less (proportional constant a is 2 min / mm or more and 5 min / mm or less) with respect to the thickness of the annealed plate t (mm) based on the following equation. I do.
T = at (1)
Here, T: residence time in the furnace (min), a: proportional constant (min / mm), t: plate thickness (mm)
For example, the residence time T (min) when the plate thickness is 0.15 mm is a time from 0.3 min to 0.75 min.
When a <2, the residence time is too short to heat the material to the furnace temperature. As a result, TiCu 3 is precipitated, the amount of solid solution Ti decreases, and the volume resistivity decreases. When a> 5, the time required for annealing becomes too long, and the productivity becomes poor.
Further, it is necessary to set the cooling rate from the annealing temperature to 200 ° C. at 100 ° C./s or more. It is desirable to water-cool the material in order to obtain a high cooling rate. This is because the precipitation of TiCu 3 is caused by spinodal decomposition with a high reaction rate, and if the cooling rate is low, the precipitation reaction proceeds to reduce solid solution Ti.
[0014]
(3) Zn, Ni, Sn, Si, Mn, P, Mg, Fe, Cr, Co, Al, B, Zr, In, Ag, Hf, Au, Mo and Nb
These elements can be added as necessary as elements for increasing the resistance. If the total amount of these additional elements is 0.005% by mass or less, the desired effect cannot be obtained. If the total amount of these additional elements is 5% by mass or more, inclusions are generated and pinholes are increased. It was determined to be from 5% by mass to 5% by mass.
[0015]
【Example】
Ingots of various compositions shown in Table 1 were cast in a high-frequency vacuum melting furnace using electrolytic copper or oxygen-free copper as a raw material.
Next, the ingot was heated to 900 ° C., maintained at this temperature for 1 hour, hot-rolled to a thickness of 8 mm, and rapidly cooled. After chamfering the oxide scale on the surface, annealing and cold rolling in a continuous line were repeated to obtain a foil having a thickness of 0.015 mm. In the final annealing before rolling into a foil, the furnace temperature, line speed and cooling were strictly controlled. Based on equation (1), the residence time in the furnace was set to be within a predetermined range.
T = at (1)
Here, T: residence time in the furnace (min), a: proportional constant (min / mm), t: plate thickness (mm)
[0016]
[Table 1]
Figure 2004244646
[0017]
For each of the alloy foils thus obtained, the volume resistivity and the number of pinholes were evaluated. The volume resistivity was determined by a four-terminal method. Number pinhole using online inspection device which can detect pin hole of at least 50 [mu] m, the number pinholes per 1 m 2 is an ○ those 1.7 or less was evaluated to exceed 1.7 as ×.
[0018]
Table 1 shows the results. As can be seen from the results, the copper alloy foil of the present invention has a high volume resistivity. On the other hand, in Comparative Example No. 21 is an example in which the Ti concentration was low and a sufficient volume resistivity was not obtained. Comparative Example No. No. 22 has a large Ti content. Sample No. 23 is an example in which a high volume resistivity is obtained due to a large amount of the added element, but a large number of pinholes are generated due to an increase in inclusions with the Ti content and the added amount of the additional element.
[0019]
Comparative Example No. Sample No. 24 is an example in which the furnace temperature was low, TiCu 3 was precipitated, the amount of solid solution Ti was reduced, and a sufficient volume resistivity was not obtained. Comparative Example No. Sample No. 25 is an example in which the furnace temperature was too high to form a thick oxide layer, the oxide layer could not be sufficiently removed by pickling after annealing, and the sheet could not be rolled to a thickness of 0.015 mm. Comparative Example No. 26 is an example in which the residence time in the furnace was short and the material was not heated to the set furnace temperature, so that TiCu 3 was precipitated and the amount of solute Ti was reduced, and a sufficient volume resistivity could not be obtained. In Comparative Example 27, since the cooling rate was low, TiCu 3 was precipitated during cooling, the amount of solid-solution Ti was reduced, and a sufficient volume resistivity was not obtained.
[0020]
In the invention examples, in the case of invention example No. 1 in which the furnace temperature of the final annealing was 670 ° C. Inventive Example No. 4, 720 ° C. Comparing the other invention examples of 5 and 800 ° C., it is understood that the higher the furnace temperature, the higher the volume resistivity.
[0021]
【The invention's effect】
As is apparent from the above description, according to the present invention, it is possible to provide an alloy foil suitable for an internal resistance layer in a collectively laminated type multilayer substrate.

Claims (3)

化学組成が1.5〜5質量%のTiを含有し残部がCu及び不可避不純物からなり、厚さ50μm以下、体積抵抗率が300nΩ・m以上であることを特徴とする多層基板の抵抗体用圧延銅合金箔。For a resistor of a multilayer substrate, characterized in that the chemical composition contains 1.5 to 5% by mass of Ti, and the balance consists of Cu and unavoidable impurities, the thickness is 50 μm or less, and the volume resistivity is 300 nΩ · m or more. Rolled copper alloy foil. 化学組成が1.5〜5質量%のTiを含有し、さらにZn、Ni、Sn、Si、Mn、P、Mg、Fe、Cr、Co、Al、B、Zr、In、Ag、Hf、Au、MoおよびNbの1種以上を総量で0.005質量%以上5質量%以下を含有し、残部が銅及び不可避不純物からなり、厚さ50μm以下、体積抵抗率が300nΩ・m以上であることを特徴とする多層基板の抵抗体用圧延銅合金箔。Chemical composition contains 1.5 to 5% by mass of Ti, and Zn, Ni, Sn, Si, Mn, P, Mg, Fe, Cr, Co, Al, B, Zr, In, Ag, Hf, Au , Mo and Nb in a total amount of 0.005% by mass or more and 5% by mass or less, with the balance being copper and inevitable impurities, a thickness of 50 μm or less, and a volume resistivity of 300 nΩ · m or more. A rolled copper alloy foil for a resistor on a multilayer substrate. 請求項1または2に記載の多層基板の抵抗体用圧延銅合金箔において、箔に圧延する前の最終焼鈍における連続焼鈍炉の操業条件に関し、炉温を650℃以上950℃以下とし、炉内滞留時間T(min)を焼鈍板厚t(mm)に対し2t(min)以上5t(min)以下とし、さらに焼鈍温度から200℃までの冷却速度を100℃/s以上とすることを特徴とする多層基板の抵抗体用圧延銅合金箔の製造方法。The rolled copper alloy foil for a resistor of a multilayer substrate according to claim 1 or 2, wherein the operating temperature of the continuous annealing furnace in final annealing before rolling into foil is 650 ° C or more and 950 ° C or less. The residence time T (min) is set to 2 t (min) or more and 5 t (min) or less with respect to the annealing plate thickness t (mm), and the cooling rate from the annealing temperature to 200 ° C. is set to 100 ° C./s or more. Of producing a rolled copper alloy foil for a resistor of a multi-layer substrate.
JP2002369451A 2002-12-17 2002-12-20 Rolled copper alloy foil for resistor and manufacturing method therefor Pending JP2004244646A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111534714A (en) * 2020-06-24 2020-08-14 宁波博威合金板带有限公司 Nb and Al-containing titanium bronze alloy strip and preparation method thereof
WO2021143257A1 (en) * 2020-01-17 2021-07-22 河北中泊防爆工具集团股份有限公司 Titanium bronze alloy material, preparation method therefor and application thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021143257A1 (en) * 2020-01-17 2021-07-22 河北中泊防爆工具集团股份有限公司 Titanium bronze alloy material, preparation method therefor and application thereof
CN111534714A (en) * 2020-06-24 2020-08-14 宁波博威合金板带有限公司 Nb and Al-containing titanium bronze alloy strip and preparation method thereof
CN111534714B (en) * 2020-06-24 2021-08-31 宁波博威合金板带有限公司 Nb and Al-containing titanium bronze alloy strip and preparation method thereof

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