JP2004235376A - Ceramic electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a ceramic electronic component whose impact resistivity is excellent. <P>SOLUTION: This ceramic electronic component 10 is constituted of a component body 1 with ceramics as main components, and a plurality of external electrodes 5 and 6 formed from the edge faces of the component body 1 to the adjacent mounting faces. In this case, an air gap 7 is formed from the edge faces of the component body 1 to the mounting faces, and covered with the external electrodes 5 and 6 between the external electrodes 5 and 6 and the component body 1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【００４８】
表に示すように、積層体１の稜線上及び稜線付近に、外部電極５、６に覆われた空隙７が形成された本実施例（試料番号３〜７、９〜１２）は、２ｍの高さよりコンクリート板上に落下させた場合もクラック３８の発生率が５％以下となった。特に、０．２≦ｍａ／ｍｔ≦０．８且つ０．２≦ｎａ／ｎｔ≦０．７の範囲にある場合（試料番号４〜６、１０〜１１）、クラック３８の発生率が０％、外部電極固着力が１．５ｋｇ以上、等価直列抵抗（ＥＳＲ）が３００ｍΩ以下となった。
【００４９】
これに対し、空隙７を形成しなかった比較例（試料番号１）、積層体の主面のみに空隙７を形成した比較例（試料番号２）、積層体の端面のみに空隙７を形成した比較例（試料番号７）は、２ｍの高さよりコンクリート板上に落下させた場合、クラック３８の発生率が５％より大きくなった。
【００５０】
これらの結果から、本発明の多連型コンデンサ１０は、積層体１の端面と主面が接する稜線上及び稜線付近に、外部電極５、６に覆われた空隙７が形成されてなるため、多連型コンデンサ１０を半田１３により配線基板１１上の配線パターン１２に表面実装した状態において、落下などによる衝撃が多連型コンデンサ１０に加わっても、クラック３８の発生を低減できることがわかった。
【００５１】
【発明の効果】
本発明のセラミック電子部品によれば、部品本体の端面と実装面が接する稜線部に、外部電極に覆われた空隙が形成されてなるため、耐衝撃性に優れている。
【００５２】
また、空隙は外部電極に覆われているため、空隙にメッキ液が侵入することにより、信頼性が低下することがない。
【図面の簡単な説明】
【図１】本発明の多連型コンデンサを示す図であり、（ａ）は外観斜視図、（ｂ）はＸ−Ｘ線断面図である。
【図２】本発明の多連型コンデンサを配線基板上に表面実装した状態を示す断面図である。
【図３】従来の多連型コンデンサを示す図であり、（ａ）は一部透視状態の外観斜視図、（ｂ）はＸ−Ｘ線断面図である。
【符号の説明】
１０ 多連型コンデンサ（セラミック電子部品）
１ 積層体（部品本体）
２ 誘電体層
３、４ 誘電体層
５、６ 外部電極
７ 空隙[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a ceramic electronic component, and more particularly, to a structure of an external electrode.
[0002]
[Prior art]
A description will be given of a multiple capacitor as an example of a typical ceramic electronic component.
[0003]
FIG. 3 is a diagram showing a conventional multiple capacitor, in which (a) is an external perspective view and (b) is a cross-sectional view taken along line XX.
[0004]
In the figure, 30 is a multiple capacitor, 31 is a laminated body, 32 is a dielectric layer constituting the laminated body 31, 33 and 34 are internal electrodes formed in the laminated body 31, and 35 and 36 are external electrodes. Electrodes. As shown in the figure, the multilayer body 31 of the multiple capacitor 30 is formed by stacking a plurality of dielectric layers 32.
[0005]
Further, for example, a plurality of first and second internal electrodes 33 and 34 are formed between the dielectric layers 32 of the multilayer body 31 so as to face each other. The internal electrode 34 extends to the other end surface of the multilayer body 31.
[0006]
Further, the plurality of external electrodes 35 and 36 are attached to the end surface of the multilayer body 31 and are connected to the first and second internal electrodes 33 and 34. A surface plating layer (not shown) is formed on the surfaces of the external electrodes 35 and 36 as necessary.
[0007]
Such a multiple capacitor 30 is surface-mounted on a wiring pattern on a wiring board with one main surface (mounting surface) down using a bonding material such as solder or a conductive adhesive.
[0008]
[Patent Document 1]
JP-A-2002-57059 (page 2, FIG. 1)
[0009]
[Problems to be solved by the invention]
In recent years, the demand for the multiple capacitors 30 for portable electronic devices such as portable telephones and portable computers has been increasing.
[0010]
However, in a portable electronic device, when used or carried, an impact due to a drop or the like is applied to a multiple capacitor 30 surface-mounted on a wiring board inside the device, and as shown in FIG. There is a problem that cracks 38 occur in the capacitor 30.
[0011]
The present invention has been devised in view of the above problems, and an object of the present invention is to provide a ceramic electronic component having excellent impact resistance.
[0012]
[Means for Solving the Problems]
The present invention provides a rectangular parallelepiped component body made of a ceramic member having an internal conductor formed thereon, and an external electrode connected to the internal conductor and formed so as to straddle an end surface and a main surface of the component body. In the ceramic electronic component provided, a gap covered with an external electrode is formed at a ridge portion where an end surface of the component main body is in contact with a main surface.
[0013]
[Action]
According to the present invention, a gap covered with the external electrode is formed on the ridge line where the end surface of the component body and the mounting surface are in contact with each other and on the ridge line near the ridge line. In a state where the ceramic electronic component is dropped on the surface of the electronic component, cracks can be reduced.
[0014]
That is, in many cases, a stress in the torsional direction is applied to the ceramic electronic component due to an impact due to a drop or the like. At this time, cracks are thought to occur starting from the part where the ridge line of the component body and the external electrode are in contact with the bonding material, and proceed to the side surface of the component body, but due to the presence of this void, the external electrode is appropriately deformed Therefore, it is possible to prevent the stress in the torsional direction from being transmitted to the starting point, and it is considered that the occurrence of cracks can be reduced.
[0015]
Further, since the gap is covered by the external electrode, the reliability does not decrease due to the plating solution entering the gap.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a ceramic electronic component of the present invention will be described with reference to the drawings.
[0017]
The ceramic electronic component of the present invention will be described using a multiple capacitor as an example.
[0018]
1A and 1B are views showing a multiple capacitor of the present invention, wherein FIG. 1A is an external perspective view, and FIG. 1B is a sectional view taken along line XX. FIG. 2 is a sectional view showing a state in which the multiple capacitor of FIG. 1 is surface-mounted on a wiring board.
[0019]
In the drawing, 10 is a multiple capacitor (multiple ceramic electronic component), 1 is a laminated body (component body) made of dielectric ceramic, 2 is a dielectric layer, 3, 4 is an internal electrode, and 5 and 6 are external. Electrodes.
[0020]
As shown in the figure, the multilayer body (component body) 1 of the multiple capacitor 10 is formed by laminating a plurality of dielectric layers 2.
[0021]
The dielectric layer 2 is made of a non-reducing dielectric material containing barium titanate (BaTiO ₃ ) as a main component and a dielectric material containing a glass component, and has a shape of 2.0 mm × 1.2 mm or the like. The thickness is set to 1 to 5 μm to increase the capacity. The dielectric layer 2 is stacked in the upward direction in the drawing to form the laminate 1. The shape, thickness, and number of layers of the dielectric layer 2 can be arbitrarily changed according to the capacitance value.
[0022]
For example, a plurality of internal electrodes 3, 4 are formed facing each other between the dielectric layers 2 of the multilayer body 1, and extend to both end surfaces of the multilayer body 1, respectively. The internal electrodes 3 and 4 are made of, for example, a material mainly containing Ni, and have a thickness of 1 to 2 μm.
[0023]
The external electrodes 5 and 6 are attached to the pair of long side end surfaces of the multilayer body 1 and are connected to the internal electrodes 3 and 4, respectively. The external electrodes 5 and 6 are made of, for example, a metal component such as Cu, Ni, or an alloy thereof, and a glass component, and have three surfaces including an end surface on the long side and two main surfaces adjacent to the end surface (one is a mounting surface). Formed over Further, a surface plating layer (not shown) is formed on the surfaces of the external electrodes 5 and 6. Examples of the surface plating layer include Ni plating, Sn plating, and solder plating.
[0024]
A characteristic of the present invention is that a void 7 covered with the external electrodes 5 and 6 is formed at a ridge portion where the end surface of the laminate 1 is in contact with the main surface.
[0025]
Hereinafter, a method for manufacturing the multiple capacitor of the present invention will be described. Each code is not distinguished before and after firing.
[0026]
First, a conductive paste is formed on a ceramic green sheet 2 serving as a dielectric layer by screen printing, and conductive films 3 and 4 serving as internal electrodes are formed.
[0027]
Then, after stacking a predetermined number of such ceramic green sheets 2 so that the conductor films 3 and 4 face each other and the conductor films 3 and 4 extend to different end faces, the ceramic green sheets 2 are cut and each capacitor is cut. The unfired laminate 1 including the unit N is fired under a predetermined atmosphere, temperature and time. Thus, the internal electrodes 3 and 4 are exposed on the pair of end surfaces of the multilayer body 1 for each capacitor unit N.
[0028]
Thereafter, in order to electrically connect each capacitor unit N to the outside, the conductor films 5 and 6 serving as external electrodes are formed on the end surface of the laminate 1 and the main surface adjacent thereto by a screen printing method, a transfer method from a roller, or the like. To apply. At this time, a carbon paste for forming the voids 7 is applied to the vicinity of the ridge line of the laminate 1 in advance.
[0029]
After removing the binder component from the conductive films 5 and 6 in the air at 250 ° C. to 400 ° C., the external electrodes 5 and 6 are formed by baking at 800 to 900 ° C. in a neutral or reducing atmosphere. At this time, the void 7 is formed by burning and decomposing the carbon paste.
[0030]
Thereafter, surface plating layers (not shown) are formed on the external electrodes 5 and 6 by electrolytic plating or electroless plating.
[0031]
Thus, the multiple capacitor 10 of the present invention is obtained.
[0032]
Thus, according to the present invention, the gap 7 covered with the external electrodes 5 and 6 is formed at the ridge portion where the end face and the main face of the multilayer body 1 are in contact with each other. In a state where the wiring pattern 12 is surface-mounted on the wiring pattern 11, even if an impact due to a drop or the like is applied to the multiple capacitor 10, the occurrence of cracks 38 can be reduced.
[0033]
That is, in many cases, a stress in the torsional direction is applied to the multiple capacitor 10 by an impact due to a drop or the like. At this time, it is considered that a crack 38 occurs starting from a portion where the ridgeline of the laminate 1 is in contact with the external electrodes 5 and 6 and the solder 12, and proceeds to the side surface of the laminate 1. Since the electrodes 5, 6 are appropriately deformed, it is possible to prevent the stress in the torsional direction from being transmitted to the starting point, and it is considered that the occurrence of cracks 38 can be reduced.
[0034]
In addition, since the gap 7 is covered with the external electrodes 5 and 6, the reliability does not decrease due to the plating solution entering the gap 7.
[0035]
Further, since the gap 7 does not exist at a portion where the external electrodes 5 and 6 and the internal electrodes 3 and 4 are respectively joined, the electrical connection therebetween is improved.
[0036]
Here, as shown in FIG. 1B, when the top margin of the laminate 1 is mt and the dimension of the void 7 in the T direction is ma, 0 <ma / mt <1, preferably 0.2 ≦ ma. /Mt≦0.8 is desirable. That is, when the ma / mt ratio is 1 or more, the electrical connection between the internal electrodes 3 and 4 and the external electrodes 5 and 6 decreases. When the distance between the end surface of the multilayer body 1 and the portion where the external electrodes 5 and 6 ride on the main surface of the multilayer body 1 is nt, and the dimension of the gap 7 in the W direction is na, 0 <na / nt < 0.9, preferably 0.2 ≦ na / nt ≦ 0.7. That is, when the na / nt ratio is 0.9 or more, the contact area between the external electrodes 5 and 6 and the main surface of the multilayer body 1 is reduced, so that the fixing force of the external electrodes 5 and 6 to the multilayer body 1 is weakened. .
[0037]
It should be noted that the present invention is not limited to the above embodiments, and various changes and improvements may be made without departing from the spirit of the present invention.
[0038]
For example, in the above embodiment, the description has been made using the multiple capacitors as the multiple ceramic electronic components. However, the present invention can be widely applied to ceramic electronic components such as multilayer ceramic capacitors, circuit boards, and noise filter components.
[0039]
【Example】
The inventor manufactured the multiple capacitor 10 in which the gap 7 covered with the external electrodes 5 and 6 was formed at the ridge of the laminate 1 by the above method. At this time, the ma / mt ratio and the na / nt ratio were changed by changing the application amount of the carbon paste (sample numbers 3 to 7, 9 to 12). Further, ma, mt, na, and nt were confirmed from the SEM image of the fracture surface of the sample 10.
[0040]
As comparative examples, the multiple capacitor 10 in which the void 7 was not formed (Sample No. 1), the multiple capacitor 10 in which the void 7 was formed only in the main surface of the multilayer body 1 (Sample No. 2), the end face of the multilayer body A multiple capacitor 10 (Sample No. 8) having only the voids 7 was also manufactured.
[0041]
The obtained sample was subjected to a drop test, an external electrode fixing force (shear strength) test, and a measurement of an equivalent series resistance (ESR).
[0042]
In the drop test method, as shown in FIG. 2, 100 samples were surface-mounted on a wiring pattern 12 on a 1.6 mm thick glass epoxy substrate (wiring board) 11 by soldering. Then, the substrate 11 was set in a resin case, dropped on a concrete plate from a height of 2 m, and the incidence of cracks 38 was determined by a metallographic microscope.
[0043]
As shown in FIG. 2, in the external electrode fixing force (shear strength) test, 22 samples were surface-mounted on a wiring pattern 12 on a 1.6 mm thick glass epoxy board (wiring board) 11 by soldering 13. The strength was applied by a fixing pin, and the strength when the sample was peeled off from the glass epoxy substrate 11 was obtained.
[0044]
The equivalent series resistance (ESR) was measured for five samples, and was set to the largest value.
[0045]
As a criterion, a case where the rate of occurrence of cracks 38 in the drop test was 5% or less was marked as a non-defective product by a circle. Among the non-defective products, the case where the rate of occurrence of the crack 38 is 0%, the external electrode fixing force is 1.5 kg or more, and the equivalent series resistance (ESR) is 300 mΩ or less is indicated by a double circle. On the other hand, the case where the crack 38 occurrence rate exceeds 5% is marked as a cross, as a defective product.
[0046]
Table 1 shows the results.
[0047]
[Table 1]

[0048]
As shown in the table, the present example (sample numbers 3 to 7 and 9 to 12) in which the voids 7 covered with the external electrodes 5 and 6 were formed on and near the ridge line of the laminate 1 was 2 m. When the steel plate was dropped on the concrete plate from the height, the crack 38 generation rate was 5% or less. In particular, when the ratio is in the range of 0.2 ≦ ma / mt ≦ 0.8 and 0.2 ≦ na / nt ≦ 0.7 (sample numbers 4 to 6, 10 to 11), the crack 38 occurrence rate is 0%. The external electrode fixing force was 1.5 kg or more, and the equivalent series resistance (ESR) was 300 mΩ or less.
[0049]
On the other hand, the comparative example in which the void 7 was not formed (Sample No. 1), the comparative example in which the void 7 was formed only on the main surface of the laminate (Sample No. 2), and the void 7 formed only in the end face of the laminate. In the comparative example (Sample No. 7), when dropped on a concrete plate from a height of 2 m, the incidence of cracks 38 was larger than 5%.
[0050]
From these results, in the multiple capacitor 10 of the present invention, the void 7 covered with the external electrodes 5 and 6 is formed on and near the ridge line where the end surface of the multilayer body 1 is in contact with the main surface. It has been found that, in a state where the multiple capacitor 10 is surface-mounted on the wiring pattern 12 on the wiring board 11 with the solder 13, the occurrence of cracks 38 can be reduced even if an impact due to dropping or the like is applied to the multiple capacitor 10.
[0051]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to the ceramic electronic component of this invention, since the space | gap covered with the external electrode is formed in the ridgeline part which the end surface of a component main body and a mounting surface contact, it is excellent in impact resistance.
[0052]
Further, since the gap is covered by the external electrode, the reliability does not decrease due to the plating solution entering the gap.
[Brief description of the drawings]
FIG. 1 is a view showing a multiple capacitor of the present invention, wherein (a) is an external perspective view and (b) is a cross-sectional view taken along line XX.
FIG. 2 is a cross-sectional view showing a state where the multiple capacitor of the present invention is surface-mounted on a wiring board.
3A and 3B are diagrams showing a conventional multiple capacitor, in which FIG. 3A is an external perspective view in a partially transparent state, and FIG. 3B is a sectional view taken along line XX.
[Explanation of symbols]
10 Multiple capacitors (ceramic electronic components)
1 laminated body (part body)
2 Dielectric layer 3, 4 Dielectric layer 5, 6 External electrode 7 Void

Claims (1)

A ceramic comprising: a rectangular parallelepiped component body made of a ceramic member having an internal conductor formed thereon; and external electrodes connected to the internal conductor and formed so as to extend over an end face and a main surface of the component body. In electronic components,
A ceramic electronic component, wherein a void covered by the external electrode is formed at a ridge between an end surface and a main surface of the component body.

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