JP2004214479A - 半導体装置の製造方法および半導体装置 - Google Patents

半導体装置の製造方法および半導体装置 Download PDF

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Publication number
JP2004214479A
JP2004214479A JP2003000911A JP2003000911A JP2004214479A JP 2004214479 A JP2004214479 A JP 2004214479A JP 2003000911 A JP2003000911 A JP 2003000911A JP 2003000911 A JP2003000911 A JP 2003000911A JP 2004214479 A JP2004214479 A JP 2004214479A
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Japan
Prior art keywords
metal
dummy gate
gate electrode
semiconductor device
diffusion
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Japanese (ja)
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JP2004214479A5 (enExample
Inventor
Hideji Shito
秀治 志渡
Sadahiro Kishii
貞浩 岸井
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Fujitsu Ltd
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Fujitsu Ltd
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Priority to JP2003000911A priority Critical patent/JP2004214479A/ja
Publication of JP2004214479A publication Critical patent/JP2004214479A/ja
Publication of JP2004214479A5 publication Critical patent/JP2004214479A5/ja
Pending legal-status Critical Current

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2003000911A 2003-01-07 2003-01-07 半導体装置の製造方法および半導体装置 Pending JP2004214479A (ja)

Priority Applications (1)

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JP2003000911A JP2004214479A (ja) 2003-01-07 2003-01-07 半導体装置の製造方法および半導体装置

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JP2003000911A JP2004214479A (ja) 2003-01-07 2003-01-07 半導体装置の製造方法および半導体装置

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JP2004214479A true JP2004214479A (ja) 2004-07-29
JP2004214479A5 JP2004214479A5 (enExample) 2006-02-23

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JP2003000911A Pending JP2004214479A (ja) 2003-01-07 2003-01-07 半導体装置の製造方法および半導体装置

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