JP2004200287A - Method of forming electrode for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method by which an electrode for semiconductor device having a very narrow width can be formed without using any special mask nor high-accuracy aligner, but only using the conventional aligner. <P>SOLUTION: After a semiconductor substrate is prepared by successively laminating a first semiconductor layer which does not react to an electrode metal and a second semiconductor layer which reacts to the electrode metal upon a substrate, an etching mask is formed on the surface of the second semiconductor layer and a ridge structure is formed by partially etching off the second semiconductor layer. Then the electrode metal is adhered to the side wall section of the ridge structure. Thereafter, the electrode metal is diffused into the second semiconductor layer through heat treatment. Consequently, the electrode having the very narrow width can be formed by removing the portions of the second semiconductor layer etc., into which the electrode metal is not diffused. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for forming an electrode for a semiconductor device, and more particularly to a method for forming an electrode for a semiconductor device having a fine electrode width.
[0002]
[Prior art]
When forming an electrode pattern having an electrode width of 1 μm or less, a method shown in FIG. 4 is generally used. First, a spacer layer 6 made of, for example, an insulating film is formed on the semiconductor substrate 1, and a pattern of a normal resist film 4 is formed. Then, using the resist film 4 as an etching mask, the spacer layer 6 is etched to expose the semiconductor substrate 1 (FIG. 4A). Electrode metal 5 is deposited on the entire surface (FIG. 4B). Thereafter, by dissolving and removing the resist film 4, an electrode made of the electrode metal 5 is formed on the semiconductor substrate 1 (FIG. 4C).
[0003]
However, in the above method, the electrode width is determined by the opening size of the resist film 4, and in order to reduce the electrode width, it is necessary to reduce the opening size of the resist film. Here, the opening size of the resist film mainly depends on the accuracy of photolithography. In the case of using a normal exposure apparatus, for example, in an i-line stepper, the opening size of the resist cannot be reduced to about 0.35 μm, and an expensive special mask such as a phase shift mask is used to further reduce the dimension. By doing so, patterning of about 0.15 μm is possible. Further, if an expensive EB (electron beam) exposure apparatus was used, patterning of about 0.1 μm was possible (see Non-Patent Document 1, Table 1).
[0004]
[Non-patent document 1]
Abe et al., “Optical / Microwave Semiconductor Application Technology,” First Edition, Science Forum, February 29, 1996, p. 498 [0005]
[Problems to be solved by the invention]
When forming an electrode for a semiconductor device, the electrode width mainly depends on the accuracy of photolithography. To reduce the electrode width, an expensive special mask such as a phase shift mask or an EB exposure apparatus is used. However, there is a drawback in that an expensive and high-resolution exposure apparatus such as that described above must be used, and there are restrictions on the mask and the apparatus. In order to solve such problems, the present invention provides a method for forming an electrode for a semiconductor device having a fine electrode width using a conventional exposure apparatus without using a special mask or a high-precision exposure apparatus. The purpose is to: Still another object is to provide a method for forming an electrode for a semiconductor device with reduced electrode resistance.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, the invention according to claim 1 of the present application provides a first semiconductor layer that does not react with an electrode metal on a substrate, and a second semiconductor layer that reacts with the electrode metal on the first semiconductor layer. Preparing a semiconductor substrate on which is laminated a film that does not react with the electrode metal and serves as an etching mask for the second semiconductor layer on the surface of the second semiconductor layer; Forming an etching mask film in a region including, and using the etching mask film, removing the second semiconductor layer by etching to expose the first semiconductor layer; Forming a ridge structure made of the second semiconductor layer, attaching the electrode metal to an exposed surface of the second semiconductor layer on a side wall portion of a region where an electrode is to be formed of the ridge structure, Do Diffusing the electrode metal from the exposed surface to the second semiconductor layer, removing the etching mask film, the unreacted electrode metal and the second semiconductor layer where the electrode metal is not diffused, Forming a semiconductor device electrode.
[0007]
The invention according to claim 2 is the method for forming an electrode for a semiconductor device according to claim 1, wherein the first semiconductor layer is GaAs or AlGaAs, and the second semiconductor layer is InGaP or AlGaInP. It is characterized in that the electrode metal is Ti.
[0008]
According to a third aspect of the present invention, in the method of forming an electrode for a semiconductor device according to the first or second aspect, after forming the electrode for the semiconductor device, another electrode for reducing the electrode resistance on the electrode for the semiconductor device. It is characterized in that a metal is laminated.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
FIGS. 1 and 2 are cross-sectional views of each step of forming an electrode according to the first embodiment of the present invention. First, a semiconductor substrate in which a GaAs layer 2 (first semiconductor layer) and an InGaP layer 3 (second semiconductor layer) are stacked on a semiconductor substrate 1 is prepared. Then, on the InGaP layer 3, a SiN film 7 as an insulating film serving as an etching mask for the InGaP layer 3 is formed. (FIG. 1A). Next, a resist is applied on the entire surface of the SiN film 7, subjected to an exposure process and a development process, and the resist 4 is patterned at least in a region including a region where an electrode is to be formed (FIG. 1B).
[0010]
Using the resist 4 as an etching mask, the SiN film 7 is etched with an HF-based etchant to form a pattern composed of the SiN film 7 at least in a region including a region where an electrode is to be formed, and then the resist 4 is dissolved and removed (FIG. 1C). Using the SiN film 7 as an etching mask, the InGaP layer 3 exposed by the chlorine-based gas is anisotropically etched. At this time, by using the chlorine-based gas, the InGaP layer 3 is etched and the GaAs layer 2 is not etched, so that the ridge structure 8 composed of the InGaP layer 3 is formed on the GaAs layer 2 (FIG. 1D).
[0011]
Next, a 200 angstrom Ti (titanium) film 9 is deposited as an electrode metal on the entire surface. At this time, vapor deposition is performed in an oblique direction inclined by an angle θ from the normal direction of the substrate. As a result, the Ti film 9 is deposited on one side wall of the ridge structure 8 and the GaAs layer 2 in the region where the electrode is to be formed, and is not deposited on the other side wall of the ridge structure 8 (FIG. 2A).
[0012]
Then, nitrogen (N ₂₎ atmosphere, a heat treatment is carried out at a temperature of 300 ° C. to 400 ° C.. Under these conditions, the Ti film 9 undergoes a solid-phase reaction with the InGaP layer 3, and a solid-phase reaction metal 10 of InGaP and Ti is formed in a region of the ridge structure 8 where an electrode is to be formed (FIG. 2B). By this heat treatment, the Ti film 9 does not react with the GaAs layer 2 and the SiN film 7. Therefore, the solid-phase reaction metal 10 diffuses laterally from the side wall of the ridge structure 8 depending on the heat treatment time, and does not diffuse downward because of the GaAs layer 2. Note that a Schottky contact is formed between the solid-phase reaction metal 10 contacting the GaAs layer 2. Further, the width in the horizontal direction (the electrode width) where the solid-phase reaction metal 10 is formed is determined depending on the heat treatment time and the thickness of the deposited Ti film 9. For example, in a heat treatment at 300 ° C., the solid-state reaction rate of InGaP and Ti is about 50 angstroms / hour, and by controlling the heat treatment time, a solid-phase reaction metal 10 capable of forming a fine electrode width can be formed. Can be formed. In order to suppress variations in the width in the horizontal direction in which the solid phase reaction metal 10 is formed, it is desirable to perform heat treatment until the Ti film 9 completely undergoes a solid phase reaction.
[0013]
The unreacted Ti film 9 and SiN film 7 are removed using an HF-based etchant (FIG. 2C). Next, the InGaP layer 3 of the ridge structure 8 is selectively etched using an HCl-based etchant. By using an HCl-based etchant, it is possible to form the electrode 11 composed of only the solid-phase reaction metal 10 (FIG. 2D).
[0014]
Since the electrode width of the electrode 11 thus formed mainly depends on the thickness of the electrode metal to be deposited and the heat treatment time, a fine electrode width can be formed by a process using an ordinary exposure apparatus. For example, when the thickness of the deposited Ti film was 200 Å, the heat treatment temperature was 300 ° C., and the time was 4 hours, an electrode having an electrode width of 0.02 μm could be formed.
[0015]
Next, a second embodiment of the present invention will be described. In the present invention, a so-called T-type electrode structure can be formed in order to reduce the electrode resistance of the electrode structure described in the first embodiment. First, the electrode 11 is formed according to the manufacturing process described in the first embodiment. Next, a polyimide film 12 is formed so as to completely cover the electrode 11 (FIG. 3A). Instead of the polyimide film, a BCB (benzocyclobutene) film, a SiN film, or a SiO ₂ film may be used.
[0016]
Next, the surface of the polyimide film 12 is removed, and a part of the electrode 11 is exposed. Next, the polyimide film is heat-treated to such an extent that a resist film can be laminated on the polyimide film 12 and can be removed (FIG. 3B). When a BCB film or the like is used, heat treatment is not required.
[0017]
Next, the resist film 4 is patterned so that the electrode 11 is exposed (FIG. 3C). A metal film 13 made of Ti / Pt / Au is vapor-deposited on the entire surface perpendicular to the substrate surface (FIG. 3D). After removing the resist film 4 and the metal film 13 on the resist film 4 by the lift-off method, the polyimide film 12 is removed to form a T-type electrode 14 in which the metal film 13 is laminated on the electrode 11 (FIG. 3E). . By using a T-type electrode as described above, the electrode resistance can be reduced, so that the characteristics of the applied semiconductor device are expected to be improved.
[0018]
Note that the present invention is not limited to the above-described embodiment, and can be variously modified. For example, even when AlGaInP is used instead of the InGaP layer and AlGaAs is used instead of GaAs, or when these combinations are changed, a similar electrode structure is formed using Ti as the electrode metal. Can be. Needless to say, another combination of a semiconductor layer and an electrode metal may be used.
[0019]
【The invention's effect】
As described above, in the present invention, by using a solid-phase reaction metal formed by a solid-phase reaction between a semiconductor and a metal as an electrode, a fine electrode can be formed without using a special mask or a high-precision exposure apparatus. Electrodes of width can be formed. Further, since a so-called T-type electrode can be used, an improvement in the characteristics of the semiconductor device is expected by reducing the electrode resistance.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a first embodiment of the present invention.
FIG. 2 is a diagram illustrating a first embodiment of the present invention.
FIG. 3 is a diagram illustrating a second embodiment of the present invention.
FIG. 4 is a diagram illustrating a conventional method for forming an electrode pattern.
[Explanation of symbols]
1: semiconductor substrate, 2: GaAs layer, 3: InGaP layer, 4 resist film, 7: SiN film, 8: ridge structure, 9: Ti film, 10: solid phase reaction metal, 11: electrode, 12: polyimide film, 13: Electrode metal, 14: T-type electrode

Claims (3)

A step of preparing a semiconductor substrate in which a first semiconductor layer that does not react with an electrode metal on a substrate and a second semiconductor layer that reacts with the electrode metal on the first semiconductor layer;
Forming a film which does not react with the electrode metal and serves as an etching mask for the second semiconductor layer on the surface of the second semiconductor layer, and forms an etching mask film at least in a region including a region where an electrode is to be formed When,
Using the etching mask film, the second semiconductor layer is removed by etching to expose the first semiconductor layer, and a ridge structure including the second semiconductor layer is formed in a region including a region where an electrode is to be formed. The process of
Attaching the electrode metal to the exposed surface of the second semiconductor layer on the side wall of the region where the electrode is to be formed in the ridge structure;
Performing a heat treatment to diffuse the electrode metal from the exposed surface to the second semiconductor layer;
Removing the etching mask film, the unreacted electrode metal and the second semiconductor layer in which the electrode metal is not diffused, and forming a semiconductor device electrode. Formation method. 2. The method for forming an electrode for a semiconductor device according to claim 1, wherein the first semiconductor layer is GaAs or AlGaAs, the second semiconductor layer is InGaP or AlGaInP, and the electrode metal is Ti. Forming method for a semiconductor device electrode. 3. The method for forming an electrode for a semiconductor device according to claim 1, wherein after the electrode for the semiconductor device is formed, another electrode metal for reducing the electrode resistance is laminated on the electrode for the semiconductor device. Of forming a semiconductor device electrode.

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